clk-fsl-flexspi.c 2.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Layerscape FlexSPI clock driver
  4. *
  5. * Copyright 2020 Michael Walle <[email protected]>
  6. */
  7. #include <linux/clk-provider.h>
  8. #include <linux/io.h>
  9. #include <linux/module.h>
  10. #include <linux/platform_device.h>
  11. static const struct clk_div_table ls1028a_flexspi_divs[] = {
  12. { .val = 0, .div = 1, },
  13. { .val = 1, .div = 2, },
  14. { .val = 2, .div = 3, },
  15. { .val = 3, .div = 4, },
  16. { .val = 4, .div = 5, },
  17. { .val = 5, .div = 6, },
  18. { .val = 6, .div = 7, },
  19. { .val = 7, .div = 8, },
  20. { .val = 11, .div = 12, },
  21. { .val = 15, .div = 16, },
  22. { .val = 16, .div = 20, },
  23. { .val = 17, .div = 24, },
  24. { .val = 18, .div = 28, },
  25. { .val = 19, .div = 32, },
  26. { .val = 20, .div = 80, },
  27. {}
  28. };
  29. static const struct clk_div_table lx2160a_flexspi_divs[] = {
  30. { .val = 1, .div = 2, },
  31. { .val = 3, .div = 4, },
  32. { .val = 5, .div = 6, },
  33. { .val = 7, .div = 8, },
  34. { .val = 11, .div = 12, },
  35. { .val = 15, .div = 16, },
  36. { .val = 16, .div = 20, },
  37. { .val = 17, .div = 24, },
  38. { .val = 18, .div = 28, },
  39. { .val = 19, .div = 32, },
  40. { .val = 20, .div = 80, },
  41. {}
  42. };
  43. static int fsl_flexspi_clk_probe(struct platform_device *pdev)
  44. {
  45. struct device *dev = &pdev->dev;
  46. struct device_node *np = dev->of_node;
  47. const char *clk_name = np->name;
  48. const char *clk_parent;
  49. struct resource *res;
  50. void __iomem *reg;
  51. struct clk_hw *hw;
  52. const struct clk_div_table *divs;
  53. divs = device_get_match_data(dev);
  54. if (!divs)
  55. return -ENOENT;
  56. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  57. if (!res)
  58. return -ENOENT;
  59. /*
  60. * Can't use devm_ioremap_resource() or devm_of_iomap() because the
  61. * resource might already be taken by the parent device.
  62. */
  63. reg = devm_ioremap(dev, res->start, resource_size(res));
  64. if (!reg)
  65. return -ENOMEM;
  66. clk_parent = of_clk_get_parent_name(np, 0);
  67. if (!clk_parent)
  68. return -EINVAL;
  69. of_property_read_string(np, "clock-output-names", &clk_name);
  70. hw = devm_clk_hw_register_divider_table(dev, clk_name, clk_parent, 0,
  71. reg, 0, 5, 0, divs, NULL);
  72. if (IS_ERR(hw))
  73. return PTR_ERR(hw);
  74. return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, hw);
  75. }
  76. static const struct of_device_id fsl_flexspi_clk_dt_ids[] = {
  77. { .compatible = "fsl,ls1028a-flexspi-clk", .data = &ls1028a_flexspi_divs },
  78. { .compatible = "fsl,lx2160a-flexspi-clk", .data = &lx2160a_flexspi_divs },
  79. {}
  80. };
  81. MODULE_DEVICE_TABLE(of, fsl_flexspi_clk_dt_ids);
  82. static struct platform_driver fsl_flexspi_clk_driver = {
  83. .driver = {
  84. .name = "fsl-flexspi-clk",
  85. .of_match_table = fsl_flexspi_clk_dt_ids,
  86. },
  87. .probe = fsl_flexspi_clk_probe,
  88. };
  89. module_platform_driver(fsl_flexspi_clk_driver);
  90. MODULE_DESCRIPTION("FlexSPI clock driver for Layerscape SoCs");
  91. MODULE_AUTHOR("Michael Walle <[email protected]>");
  92. MODULE_LICENSE("GPL");