imx-weim.c 9.8 KB

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  1. /*
  2. * EIM driver for Freescale's i.MX chips
  3. *
  4. * Copyright (C) 2013 Freescale Semiconductor, Inc.
  5. *
  6. * This file is licensed under the terms of the GNU General Public
  7. * License version 2. This program is licensed "as is" without any
  8. * warranty of any kind, whether express or implied.
  9. */
  10. #include <linux/module.h>
  11. #include <linux/clk.h>
  12. #include <linux/io.h>
  13. #include <linux/of_device.h>
  14. #include <linux/mfd/syscon.h>
  15. #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
  16. #include <linux/regmap.h>
  17. struct imx_weim_devtype {
  18. unsigned int cs_count;
  19. unsigned int cs_regs_count;
  20. unsigned int cs_stride;
  21. unsigned int wcr_offset;
  22. unsigned int wcr_bcm;
  23. unsigned int wcr_cont_bclk;
  24. };
  25. static const struct imx_weim_devtype imx1_weim_devtype = {
  26. .cs_count = 6,
  27. .cs_regs_count = 2,
  28. .cs_stride = 0x08,
  29. };
  30. static const struct imx_weim_devtype imx27_weim_devtype = {
  31. .cs_count = 6,
  32. .cs_regs_count = 3,
  33. .cs_stride = 0x10,
  34. };
  35. static const struct imx_weim_devtype imx50_weim_devtype = {
  36. .cs_count = 4,
  37. .cs_regs_count = 6,
  38. .cs_stride = 0x18,
  39. .wcr_offset = 0x90,
  40. .wcr_bcm = BIT(0),
  41. .wcr_cont_bclk = BIT(3),
  42. };
  43. static const struct imx_weim_devtype imx51_weim_devtype = {
  44. .cs_count = 6,
  45. .cs_regs_count = 6,
  46. .cs_stride = 0x18,
  47. };
  48. #define MAX_CS_REGS_COUNT 6
  49. #define MAX_CS_COUNT 6
  50. #define OF_REG_SIZE 3
  51. struct cs_timing {
  52. bool is_applied;
  53. u32 regs[MAX_CS_REGS_COUNT];
  54. };
  55. struct cs_timing_state {
  56. struct cs_timing cs[MAX_CS_COUNT];
  57. };
  58. struct weim_priv {
  59. void __iomem *base;
  60. struct cs_timing_state timing_state;
  61. };
  62. static const struct of_device_id weim_id_table[] = {
  63. /* i.MX1/21 */
  64. { .compatible = "fsl,imx1-weim", .data = &imx1_weim_devtype, },
  65. /* i.MX25/27/31/35 */
  66. { .compatible = "fsl,imx27-weim", .data = &imx27_weim_devtype, },
  67. /* i.MX50/53/6Q */
  68. { .compatible = "fsl,imx50-weim", .data = &imx50_weim_devtype, },
  69. { .compatible = "fsl,imx6q-weim", .data = &imx50_weim_devtype, },
  70. /* i.MX51 */
  71. { .compatible = "fsl,imx51-weim", .data = &imx51_weim_devtype, },
  72. { }
  73. };
  74. MODULE_DEVICE_TABLE(of, weim_id_table);
  75. static int imx_weim_gpr_setup(struct platform_device *pdev)
  76. {
  77. struct device_node *np = pdev->dev.of_node;
  78. struct property *prop;
  79. const __be32 *p;
  80. struct regmap *gpr;
  81. u32 gprvals[4] = {
  82. 05, /* CS0(128M) CS1(0M) CS2(0M) CS3(0M) */
  83. 033, /* CS0(64M) CS1(64M) CS2(0M) CS3(0M) */
  84. 0113, /* CS0(64M) CS1(32M) CS2(32M) CS3(0M) */
  85. 01111, /* CS0(32M) CS1(32M) CS2(32M) CS3(32M) */
  86. };
  87. u32 gprval = 0;
  88. u32 val;
  89. int cs = 0;
  90. int i = 0;
  91. gpr = syscon_regmap_lookup_by_phandle(np, "fsl,weim-cs-gpr");
  92. if (IS_ERR(gpr)) {
  93. dev_dbg(&pdev->dev, "failed to find weim-cs-gpr\n");
  94. return 0;
  95. }
  96. of_property_for_each_u32(np, "ranges", prop, p, val) {
  97. if (i % 4 == 0) {
  98. cs = val;
  99. } else if (i % 4 == 3 && val) {
  100. val = (val / SZ_32M) | 1;
  101. gprval |= val << cs * 3;
  102. }
  103. i++;
  104. }
  105. if (i == 0 || i % 4)
  106. goto err;
  107. for (i = 0; i < ARRAY_SIZE(gprvals); i++) {
  108. if (gprval == gprvals[i]) {
  109. /* Found it. Set up IOMUXC_GPR1[11:0] with it. */
  110. regmap_update_bits(gpr, IOMUXC_GPR1, 0xfff, gprval);
  111. return 0;
  112. }
  113. }
  114. err:
  115. dev_err(&pdev->dev, "Invalid 'ranges' configuration\n");
  116. return -EINVAL;
  117. }
  118. /* Parse and set the timing for this device. */
  119. static int weim_timing_setup(struct device *dev, struct device_node *np,
  120. const struct imx_weim_devtype *devtype)
  121. {
  122. u32 cs_idx, value[MAX_CS_REGS_COUNT];
  123. int i, ret;
  124. int reg_idx, num_regs;
  125. struct cs_timing *cst;
  126. struct weim_priv *priv;
  127. struct cs_timing_state *ts;
  128. void __iomem *base;
  129. if (WARN_ON(devtype->cs_regs_count > MAX_CS_REGS_COUNT))
  130. return -EINVAL;
  131. if (WARN_ON(devtype->cs_count > MAX_CS_COUNT))
  132. return -EINVAL;
  133. priv = dev_get_drvdata(dev);
  134. base = priv->base;
  135. ts = &priv->timing_state;
  136. ret = of_property_read_u32_array(np, "fsl,weim-cs-timing",
  137. value, devtype->cs_regs_count);
  138. if (ret)
  139. return ret;
  140. /*
  141. * the child node's "reg" property may contain multiple address ranges,
  142. * extract the chip select for each.
  143. */
  144. num_regs = of_property_count_elems_of_size(np, "reg", OF_REG_SIZE);
  145. if (num_regs < 0)
  146. return num_regs;
  147. if (!num_regs)
  148. return -EINVAL;
  149. for (reg_idx = 0; reg_idx < num_regs; reg_idx++) {
  150. /* get the CS index from this child node's "reg" property. */
  151. ret = of_property_read_u32_index(np, "reg",
  152. reg_idx * OF_REG_SIZE, &cs_idx);
  153. if (ret)
  154. break;
  155. if (cs_idx >= devtype->cs_count)
  156. return -EINVAL;
  157. /* prevent re-configuring a CS that's already been configured */
  158. cst = &ts->cs[cs_idx];
  159. if (cst->is_applied && memcmp(value, cst->regs,
  160. devtype->cs_regs_count * sizeof(u32))) {
  161. dev_err(dev, "fsl,weim-cs-timing conflict on %pOF", np);
  162. return -EINVAL;
  163. }
  164. /* set the timing for WEIM */
  165. for (i = 0; i < devtype->cs_regs_count; i++)
  166. writel(value[i],
  167. base + cs_idx * devtype->cs_stride + i * 4);
  168. if (!cst->is_applied) {
  169. cst->is_applied = true;
  170. memcpy(cst->regs, value,
  171. devtype->cs_regs_count * sizeof(u32));
  172. }
  173. }
  174. return 0;
  175. }
  176. static int weim_parse_dt(struct platform_device *pdev)
  177. {
  178. const struct of_device_id *of_id = of_match_device(weim_id_table,
  179. &pdev->dev);
  180. const struct imx_weim_devtype *devtype = of_id->data;
  181. int ret = 0, have_child = 0;
  182. struct device_node *child;
  183. struct weim_priv *priv;
  184. void __iomem *base;
  185. u32 reg;
  186. if (devtype == &imx50_weim_devtype) {
  187. ret = imx_weim_gpr_setup(pdev);
  188. if (ret)
  189. return ret;
  190. }
  191. priv = dev_get_drvdata(&pdev->dev);
  192. base = priv->base;
  193. if (of_property_read_bool(pdev->dev.of_node, "fsl,burst-clk-enable")) {
  194. if (devtype->wcr_bcm) {
  195. reg = readl(base + devtype->wcr_offset);
  196. reg |= devtype->wcr_bcm;
  197. if (of_property_read_bool(pdev->dev.of_node,
  198. "fsl,continuous-burst-clk")) {
  199. if (devtype->wcr_cont_bclk) {
  200. reg |= devtype->wcr_cont_bclk;
  201. } else {
  202. dev_err(&pdev->dev,
  203. "continuous burst clk not supported.\n");
  204. return -EINVAL;
  205. }
  206. }
  207. writel(reg, base + devtype->wcr_offset);
  208. } else {
  209. dev_err(&pdev->dev, "burst clk mode not supported.\n");
  210. return -EINVAL;
  211. }
  212. }
  213. for_each_available_child_of_node(pdev->dev.of_node, child) {
  214. ret = weim_timing_setup(&pdev->dev, child, devtype);
  215. if (ret)
  216. dev_warn(&pdev->dev, "%pOF set timing failed.\n",
  217. child);
  218. else
  219. have_child = 1;
  220. }
  221. if (have_child)
  222. ret = of_platform_default_populate(pdev->dev.of_node,
  223. NULL, &pdev->dev);
  224. if (ret)
  225. dev_err(&pdev->dev, "%pOF fail to create devices.\n",
  226. pdev->dev.of_node);
  227. return ret;
  228. }
  229. static int weim_probe(struct platform_device *pdev)
  230. {
  231. struct weim_priv *priv;
  232. struct resource *res;
  233. struct clk *clk;
  234. void __iomem *base;
  235. int ret;
  236. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  237. if (!priv)
  238. return -ENOMEM;
  239. /* get the resource */
  240. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  241. base = devm_ioremap_resource(&pdev->dev, res);
  242. if (IS_ERR(base))
  243. return PTR_ERR(base);
  244. priv->base = base;
  245. dev_set_drvdata(&pdev->dev, priv);
  246. /* get the clock */
  247. clk = devm_clk_get(&pdev->dev, NULL);
  248. if (IS_ERR(clk))
  249. return PTR_ERR(clk);
  250. ret = clk_prepare_enable(clk);
  251. if (ret)
  252. return ret;
  253. /* parse the device node */
  254. ret = weim_parse_dt(pdev);
  255. if (ret)
  256. clk_disable_unprepare(clk);
  257. else
  258. dev_info(&pdev->dev, "Driver registered.\n");
  259. return ret;
  260. }
  261. #if IS_ENABLED(CONFIG_OF_DYNAMIC)
  262. static int of_weim_notify(struct notifier_block *nb, unsigned long action,
  263. void *arg)
  264. {
  265. const struct imx_weim_devtype *devtype;
  266. struct of_reconfig_data *rd = arg;
  267. const struct of_device_id *of_id;
  268. struct platform_device *pdev;
  269. int ret = NOTIFY_OK;
  270. switch (of_reconfig_get_state_change(action, rd)) {
  271. case OF_RECONFIG_CHANGE_ADD:
  272. of_id = of_match_node(weim_id_table, rd->dn->parent);
  273. if (!of_id)
  274. return NOTIFY_OK; /* not for us */
  275. devtype = of_id->data;
  276. pdev = of_find_device_by_node(rd->dn->parent);
  277. if (!pdev) {
  278. pr_err("%s: could not find platform device for '%pOF'\n",
  279. __func__, rd->dn->parent);
  280. return notifier_from_errno(-EINVAL);
  281. }
  282. if (weim_timing_setup(&pdev->dev, rd->dn, devtype))
  283. dev_warn(&pdev->dev,
  284. "Failed to setup timing for '%pOF'\n", rd->dn);
  285. if (!of_node_check_flag(rd->dn, OF_POPULATED)) {
  286. /*
  287. * Clear the flag before adding the device so that
  288. * fw_devlink doesn't skip adding consumers to this
  289. * device.
  290. */
  291. rd->dn->fwnode.flags &= ~FWNODE_FLAG_NOT_DEVICE;
  292. if (!of_platform_device_create(rd->dn, NULL, &pdev->dev)) {
  293. dev_err(&pdev->dev,
  294. "Failed to create child device '%pOF'\n",
  295. rd->dn);
  296. ret = notifier_from_errno(-EINVAL);
  297. }
  298. }
  299. platform_device_put(pdev);
  300. break;
  301. case OF_RECONFIG_CHANGE_REMOVE:
  302. if (!of_node_check_flag(rd->dn, OF_POPULATED))
  303. return NOTIFY_OK; /* device already destroyed */
  304. of_id = of_match_node(weim_id_table, rd->dn->parent);
  305. if (!of_id)
  306. return NOTIFY_OK; /* not for us */
  307. pdev = of_find_device_by_node(rd->dn);
  308. if (!pdev) {
  309. pr_err("Could not find platform device for '%pOF'\n",
  310. rd->dn);
  311. ret = notifier_from_errno(-EINVAL);
  312. } else {
  313. of_platform_device_destroy(&pdev->dev, NULL);
  314. platform_device_put(pdev);
  315. }
  316. break;
  317. default:
  318. break;
  319. }
  320. return ret;
  321. }
  322. static struct notifier_block weim_of_notifier = {
  323. .notifier_call = of_weim_notify,
  324. };
  325. #endif /* IS_ENABLED(CONFIG_OF_DYNAMIC) */
  326. static struct platform_driver weim_driver = {
  327. .driver = {
  328. .name = "imx-weim",
  329. .of_match_table = weim_id_table,
  330. },
  331. .probe = weim_probe,
  332. };
  333. static int __init weim_init(void)
  334. {
  335. #if IS_ENABLED(CONFIG_OF_DYNAMIC)
  336. WARN_ON(of_reconfig_notifier_register(&weim_of_notifier));
  337. #endif /* IS_ENABLED(CONFIG_OF_DYNAMIC) */
  338. return platform_driver_register(&weim_driver);
  339. }
  340. module_init(weim_init);
  341. static void __exit weim_exit(void)
  342. {
  343. #if IS_ENABLED(CONFIG_OF_DYNAMIC)
  344. of_reconfig_notifier_unregister(&weim_of_notifier);
  345. #endif /* IS_ENABLED(CONFIG_OF_DYNAMIC) */
  346. return platform_driver_unregister(&weim_driver);
  347. }
  348. module_exit(weim_exit);
  349. MODULE_AUTHOR("Freescale Semiconductor Inc.");
  350. MODULE_DESCRIPTION("i.MX EIM Controller Driver");
  351. MODULE_LICENSE("GPL");