wss.h 7.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220
  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. #ifndef __SOUND_WSS_H
  3. #define __SOUND_WSS_H
  4. /*
  5. * Copyright (c) by Jaroslav Kysela <[email protected]>
  6. * Definitions for CS4231 & InterWave chips & compatible chips
  7. */
  8. #include <sound/control.h>
  9. #include <sound/pcm.h>
  10. #include <sound/timer.h>
  11. #include <sound/cs4231-regs.h>
  12. /* defines for codec.mode */
  13. #define WSS_MODE_NONE 0x0000
  14. #define WSS_MODE_PLAY 0x0001
  15. #define WSS_MODE_RECORD 0x0002
  16. #define WSS_MODE_TIMER 0x0004
  17. #define WSS_MODE_OPEN (WSS_MODE_PLAY|WSS_MODE_RECORD|WSS_MODE_TIMER)
  18. /* defines for codec.hardware */
  19. #define WSS_HW_DETECT 0x0000 /* let CS4231 driver detect chip */
  20. #define WSS_HW_DETECT3 0x0001 /* allow mode 3 */
  21. #define WSS_HW_TYPE_MASK 0xff00 /* type mask */
  22. #define WSS_HW_CS4231_MASK 0x0100 /* CS4231 serie */
  23. #define WSS_HW_CS4231 0x0100 /* CS4231 chip */
  24. #define WSS_HW_CS4231A 0x0101 /* CS4231A chip */
  25. #define WSS_HW_AD1845 0x0102 /* AD1845 chip */
  26. #define WSS_HW_CS4232_MASK 0x0200 /* CS4232 serie (has control ports) */
  27. #define WSS_HW_CS4232 0x0200 /* CS4232 */
  28. #define WSS_HW_CS4232A 0x0201 /* CS4232A */
  29. #define WSS_HW_CS4236 0x0202 /* CS4236 */
  30. #define WSS_HW_CS4236B_MASK 0x0400 /* CS4236B serie (has extended control regs) */
  31. #define WSS_HW_CS4235 0x0400 /* CS4235 - Crystal Clear (tm) stereo enhancement */
  32. #define WSS_HW_CS4236B 0x0401 /* CS4236B */
  33. #define WSS_HW_CS4237B 0x0402 /* CS4237B - SRS 3D */
  34. #define WSS_HW_CS4238B 0x0403 /* CS4238B - QSOUND 3D */
  35. #define WSS_HW_CS4239 0x0404 /* CS4239 - Crystal Clear (tm) stereo enhancement */
  36. #define WSS_HW_AD1848_MASK 0x0800 /* AD1848 serie (half duplex) */
  37. #define WSS_HW_AD1847 0x0801 /* AD1847 chip */
  38. #define WSS_HW_AD1848 0x0802 /* AD1848 chip */
  39. #define WSS_HW_CS4248 0x0803 /* CS4248 chip */
  40. #define WSS_HW_CMI8330 0x0804 /* CMI8330 chip */
  41. #define WSS_HW_THINKPAD 0x0805 /* Thinkpad 360/750/755 */
  42. /* compatible, but clones */
  43. #define WSS_HW_INTERWAVE 0x1000 /* InterWave chip */
  44. #define WSS_HW_OPL3SA2 0x1101 /* OPL3-SA2 chip, similar to cs4231 */
  45. #define WSS_HW_OPTI93X 0x1102 /* Opti 930/931/933 */
  46. /* defines for codec.hwshare */
  47. #define WSS_HWSHARE_IRQ (1<<0)
  48. #define WSS_HWSHARE_DMA1 (1<<1)
  49. #define WSS_HWSHARE_DMA2 (1<<2)
  50. /* IBM Thinkpad specific stuff */
  51. #define AD1848_THINKPAD_CTL_PORT1 0x15e8
  52. #define AD1848_THINKPAD_CTL_PORT2 0x15e9
  53. #define AD1848_THINKPAD_CS4248_ENABLE_BIT 0x02
  54. struct snd_wss {
  55. unsigned long port; /* base i/o port */
  56. struct resource *res_port;
  57. unsigned long cport; /* control base i/o port (CS4236) */
  58. struct resource *res_cport;
  59. int irq; /* IRQ line */
  60. int dma1; /* playback DMA */
  61. int dma2; /* record DMA */
  62. unsigned short version; /* version of CODEC chip */
  63. unsigned short mode; /* see to WSS_MODE_XXXX */
  64. unsigned short hardware; /* see to WSS_HW_XXXX */
  65. unsigned short hwshare; /* shared resources */
  66. unsigned short single_dma:1, /* forced single DMA mode (GUS 16-bit */
  67. /* daughter board) or dma1 == dma2 */
  68. ebus_flag:1, /* SPARC: EBUS present */
  69. thinkpad_flag:1; /* Thinkpad CS4248 needs extra help */
  70. struct snd_card *card;
  71. struct snd_pcm *pcm;
  72. struct snd_pcm_substream *playback_substream;
  73. struct snd_pcm_substream *capture_substream;
  74. struct snd_timer *timer;
  75. unsigned char image[32]; /* registers image */
  76. unsigned char eimage[32]; /* extended registers image */
  77. unsigned char cimage[16]; /* control registers image */
  78. int mce_bit;
  79. int calibrate_mute;
  80. int sw_3d_bit;
  81. unsigned int p_dma_size;
  82. unsigned int c_dma_size;
  83. spinlock_t reg_lock;
  84. struct mutex mce_mutex;
  85. struct mutex open_mutex;
  86. int (*rate_constraint) (struct snd_pcm_runtime *runtime);
  87. void (*set_playback_format) (struct snd_wss *chip,
  88. struct snd_pcm_hw_params *hw_params,
  89. unsigned char pdfr);
  90. void (*set_capture_format) (struct snd_wss *chip,
  91. struct snd_pcm_hw_params *hw_params,
  92. unsigned char cdfr);
  93. void (*trigger) (struct snd_wss *chip, unsigned int what, int start);
  94. #ifdef CONFIG_PM
  95. void (*suspend) (struct snd_wss *chip);
  96. void (*resume) (struct snd_wss *chip);
  97. #endif
  98. void *dma_private_data;
  99. int (*claim_dma) (struct snd_wss *chip,
  100. void *dma_private_data, int dma);
  101. int (*release_dma) (struct snd_wss *chip,
  102. void *dma_private_data, int dma);
  103. };
  104. /* exported functions */
  105. void snd_wss_out(struct snd_wss *chip, unsigned char reg, unsigned char val);
  106. unsigned char snd_wss_in(struct snd_wss *chip, unsigned char reg);
  107. void snd_cs4236_ext_out(struct snd_wss *chip,
  108. unsigned char reg, unsigned char val);
  109. unsigned char snd_cs4236_ext_in(struct snd_wss *chip, unsigned char reg);
  110. void snd_wss_mce_up(struct snd_wss *chip);
  111. void snd_wss_mce_down(struct snd_wss *chip);
  112. void snd_wss_overrange(struct snd_wss *chip);
  113. irqreturn_t snd_wss_interrupt(int irq, void *dev_id);
  114. const char *snd_wss_chip_id(struct snd_wss *chip);
  115. int snd_wss_create(struct snd_card *card,
  116. unsigned long port,
  117. unsigned long cport,
  118. int irq, int dma1, int dma2,
  119. unsigned short hardware,
  120. unsigned short hwshare,
  121. struct snd_wss **rchip);
  122. int snd_wss_pcm(struct snd_wss *chip, int device);
  123. int snd_wss_timer(struct snd_wss *chip, int device);
  124. int snd_wss_mixer(struct snd_wss *chip);
  125. const struct snd_pcm_ops *snd_wss_get_pcm_ops(int direction);
  126. int snd_cs4236_create(struct snd_card *card,
  127. unsigned long port,
  128. unsigned long cport,
  129. int irq, int dma1, int dma2,
  130. unsigned short hardware,
  131. unsigned short hwshare,
  132. struct snd_wss **rchip);
  133. int snd_cs4236_pcm(struct snd_wss *chip, int device);
  134. int snd_cs4236_mixer(struct snd_wss *chip);
  135. /*
  136. * mixer library
  137. */
  138. #define WSS_SINGLE(xname, xindex, reg, shift, mask, invert) \
  139. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  140. .name = xname, \
  141. .index = xindex, \
  142. .info = snd_wss_info_single, \
  143. .get = snd_wss_get_single, \
  144. .put = snd_wss_put_single, \
  145. .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
  146. int snd_wss_info_single(struct snd_kcontrol *kcontrol,
  147. struct snd_ctl_elem_info *uinfo);
  148. int snd_wss_get_single(struct snd_kcontrol *kcontrol,
  149. struct snd_ctl_elem_value *ucontrol);
  150. int snd_wss_put_single(struct snd_kcontrol *kcontrol,
  151. struct snd_ctl_elem_value *ucontrol);
  152. #define WSS_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
  153. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  154. .name = xname, \
  155. .index = xindex, \
  156. .info = snd_wss_info_double, \
  157. .get = snd_wss_get_double, \
  158. .put = snd_wss_put_double, \
  159. .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | \
  160. (shift_right << 19) | (mask << 24) | (invert << 22) }
  161. #define WSS_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
  162. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  163. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
  164. .name = xname, \
  165. .index = xindex, \
  166. .info = snd_wss_info_single, \
  167. .get = snd_wss_get_single, \
  168. .put = snd_wss_put_single, \
  169. .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
  170. .tlv = { .p = (xtlv) } }
  171. #define WSS_DOUBLE_TLV(xname, xindex, left_reg, right_reg, \
  172. shift_left, shift_right, mask, invert, xtlv) \
  173. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  174. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
  175. .name = xname, \
  176. .index = xindex, \
  177. .info = snd_wss_info_double, \
  178. .get = snd_wss_get_double, \
  179. .put = snd_wss_put_double, \
  180. .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | \
  181. (shift_right << 19) | (mask << 24) | (invert << 22), \
  182. .tlv = { .p = (xtlv) } }
  183. int snd_wss_info_double(struct snd_kcontrol *kcontrol,
  184. struct snd_ctl_elem_info *uinfo);
  185. int snd_wss_get_double(struct snd_kcontrol *kcontrol,
  186. struct snd_ctl_elem_value *ucontrol);
  187. int snd_wss_put_double(struct snd_kcontrol *kcontrol,
  188. struct snd_ctl_elem_value *ucontrol);
  189. #endif /* __SOUND_WSS_H */