designware_i2s.h 1.6 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /*
  3. * Copyright (ST) 2012 Rajeev Kumar ([email protected])
  4. */
  5. #ifndef __SOUND_DESIGNWARE_I2S_H
  6. #define __SOUND_DESIGNWARE_I2S_H
  7. #include <linux/dmaengine.h>
  8. #include <linux/types.h>
  9. /*
  10. * struct i2s_clk_config_data - represent i2s clk configuration data
  11. * @chan_nr: number of channel
  12. * @data_width: number of bits per sample (8/16/24/32 bit)
  13. * @sample_rate: sampling frequency (8Khz, 16Khz, 32Khz, 44Khz, 48Khz)
  14. */
  15. struct i2s_clk_config_data {
  16. int chan_nr;
  17. u32 data_width;
  18. u32 sample_rate;
  19. };
  20. struct i2s_platform_data {
  21. #define DWC_I2S_PLAY (1 << 0)
  22. #define DWC_I2S_RECORD (1 << 1)
  23. #define DW_I2S_SLAVE (1 << 2)
  24. #define DW_I2S_MASTER (1 << 3)
  25. unsigned int cap;
  26. int channel;
  27. u32 snd_fmts;
  28. u32 snd_rates;
  29. #define DW_I2S_QUIRK_COMP_REG_OFFSET (1 << 0)
  30. #define DW_I2S_QUIRK_COMP_PARAM1 (1 << 1)
  31. #define DW_I2S_QUIRK_16BIT_IDX_OVERRIDE (1 << 2)
  32. unsigned int quirks;
  33. unsigned int i2s_reg_comp1;
  34. unsigned int i2s_reg_comp2;
  35. void *play_dma_data;
  36. void *capture_dma_data;
  37. bool (*filter)(struct dma_chan *chan, void *slave);
  38. int (*i2s_clk_cfg)(struct i2s_clk_config_data *config);
  39. };
  40. struct i2s_dma_data {
  41. void *data;
  42. dma_addr_t addr;
  43. u32 max_burst;
  44. enum dma_slave_buswidth addr_width;
  45. bool (*filter)(struct dma_chan *chan, void *slave);
  46. };
  47. /* I2S DMA registers */
  48. #define I2S_RXDMA 0x01C0
  49. #define I2S_TXDMA 0x01C8
  50. #define TWO_CHANNEL_SUPPORT 2 /* up to 2.0 */
  51. #define FOUR_CHANNEL_SUPPORT 4 /* up to 3.1 */
  52. #define SIX_CHANNEL_SUPPORT 6 /* up to 5.1 */
  53. #define EIGHT_CHANNEL_SUPPORT 8 /* up to 7.1 */
  54. #endif /* __SOUND_DESIGNWARE_I2S_H */