cs4271.h 961 B

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /*
  3. * Definitions for CS4271 ASoC codec driver
  4. *
  5. * Copyright (c) 2010 Alexander Sverdlin <[email protected]>
  6. */
  7. #ifndef __CS4271_H
  8. #define __CS4271_H
  9. struct cs4271_platform_data {
  10. int gpio_nreset; /* GPIO driving Reset pin, if any */
  11. bool amutec_eq_bmutec; /* flag to enable AMUTEC=BMUTEC */
  12. /*
  13. * The CS4271 requires its LRCLK and MCLK to be stable before its RESET
  14. * line is de-asserted. That also means that clocks cannot be changed
  15. * without putting the chip back into hardware reset, which also requires
  16. * a complete re-initialization of all registers.
  17. *
  18. * One (undocumented) workaround is to assert and de-assert the PDN bit
  19. * in the MODE2 register. This workaround can be enabled with the
  20. * following flag.
  21. *
  22. * Note that this is not needed in case the clocks are stable
  23. * throughout the entire runtime of the codec.
  24. */
  25. bool enable_soft_reset;
  26. };
  27. #endif /* __CS4271_H */