ucb1400.h 4.0 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Register definitions and functions for:
  4. * Philips UCB1400 driver
  5. *
  6. * Based on ucb1400_ts:
  7. * Author: Nicolas Pitre
  8. * Created: September 25, 2006
  9. * Copyright: MontaVista Software, Inc.
  10. *
  11. * Spliting done by: Marek Vasut <[email protected]>
  12. * If something doesn't work and it worked before spliting, e-mail me,
  13. * dont bother Nicolas please ;-)
  14. *
  15. * This code is heavily based on ucb1x00-*.c copyrighted by Russell King
  16. * covering the UCB1100, UCB1200 and UCB1300.. Support for the UCB1400 has
  17. * been made separate from ucb1x00-core/ucb1x00-ts on Russell's request.
  18. */
  19. #ifndef _LINUX__UCB1400_H
  20. #define _LINUX__UCB1400_H
  21. #include <sound/ac97_codec.h>
  22. #include <linux/mutex.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/gpio/driver.h>
  25. /*
  26. * UCB1400 AC-link registers
  27. */
  28. #define UCB_IO_DATA 0x5a
  29. #define UCB_IO_DIR 0x5c
  30. #define UCB_IE_RIS 0x5e
  31. #define UCB_IE_FAL 0x60
  32. #define UCB_IE_STATUS 0x62
  33. #define UCB_IE_CLEAR 0x62
  34. #define UCB_IE_ADC (1 << 11)
  35. #define UCB_IE_TSPX (1 << 12)
  36. #define UCB_TS_CR 0x64
  37. #define UCB_TS_CR_TSMX_POW (1 << 0)
  38. #define UCB_TS_CR_TSPX_POW (1 << 1)
  39. #define UCB_TS_CR_TSMY_POW (1 << 2)
  40. #define UCB_TS_CR_TSPY_POW (1 << 3)
  41. #define UCB_TS_CR_TSMX_GND (1 << 4)
  42. #define UCB_TS_CR_TSPX_GND (1 << 5)
  43. #define UCB_TS_CR_TSMY_GND (1 << 6)
  44. #define UCB_TS_CR_TSPY_GND (1 << 7)
  45. #define UCB_TS_CR_MODE_INT (0 << 8)
  46. #define UCB_TS_CR_MODE_PRES (1 << 8)
  47. #define UCB_TS_CR_MODE_POS (2 << 8)
  48. #define UCB_TS_CR_BIAS_ENA (1 << 11)
  49. #define UCB_TS_CR_TSPX_LOW (1 << 12)
  50. #define UCB_TS_CR_TSMX_LOW (1 << 13)
  51. #define UCB_ADC_CR 0x66
  52. #define UCB_ADC_SYNC_ENA (1 << 0)
  53. #define UCB_ADC_VREFBYP_CON (1 << 1)
  54. #define UCB_ADC_INP_TSPX (0 << 2)
  55. #define UCB_ADC_INP_TSMX (1 << 2)
  56. #define UCB_ADC_INP_TSPY (2 << 2)
  57. #define UCB_ADC_INP_TSMY (3 << 2)
  58. #define UCB_ADC_INP_AD0 (4 << 2)
  59. #define UCB_ADC_INP_AD1 (5 << 2)
  60. #define UCB_ADC_INP_AD2 (6 << 2)
  61. #define UCB_ADC_INP_AD3 (7 << 2)
  62. #define UCB_ADC_EXT_REF (1 << 5)
  63. #define UCB_ADC_START (1 << 7)
  64. #define UCB_ADC_ENA (1 << 15)
  65. #define UCB_ADC_DATA 0x68
  66. #define UCB_ADC_DAT_VALID (1 << 15)
  67. #define UCB_FCSR 0x6c
  68. #define UCB_FCSR_AVE (1 << 12)
  69. #define UCB_ADC_DAT_MASK 0x3ff
  70. #define UCB_ID 0x7e
  71. #define UCB_ID_1400 0x4304
  72. struct ucb1400_gpio {
  73. struct gpio_chip gc;
  74. struct snd_ac97 *ac97;
  75. int gpio_offset;
  76. };
  77. struct ucb1400_ts {
  78. struct input_dev *ts_idev;
  79. int id;
  80. int irq;
  81. struct snd_ac97 *ac97;
  82. wait_queue_head_t ts_wait;
  83. bool stopped;
  84. };
  85. struct ucb1400 {
  86. struct platform_device *ucb1400_ts;
  87. struct platform_device *ucb1400_gpio;
  88. };
  89. struct ucb1400_pdata {
  90. int irq;
  91. int gpio_offset;
  92. int (*gpio_setup)(struct device *dev, int ngpio);
  93. int (*gpio_teardown)(struct device *dev, int ngpio);
  94. };
  95. static inline u16 ucb1400_reg_read(struct snd_ac97 *ac97, u16 reg)
  96. {
  97. return ac97->bus->ops->read(ac97, reg);
  98. }
  99. static inline void ucb1400_reg_write(struct snd_ac97 *ac97, u16 reg, u16 val)
  100. {
  101. ac97->bus->ops->write(ac97, reg, val);
  102. }
  103. static inline u16 ucb1400_gpio_get_value(struct snd_ac97 *ac97, u16 gpio)
  104. {
  105. return ucb1400_reg_read(ac97, UCB_IO_DATA) & (1 << gpio);
  106. }
  107. static inline void ucb1400_gpio_set_value(struct snd_ac97 *ac97, u16 gpio,
  108. u16 val)
  109. {
  110. ucb1400_reg_write(ac97, UCB_IO_DATA, val ?
  111. ucb1400_reg_read(ac97, UCB_IO_DATA) | (1 << gpio) :
  112. ucb1400_reg_read(ac97, UCB_IO_DATA) & ~(1 << gpio));
  113. }
  114. static inline u16 ucb1400_gpio_get_direction(struct snd_ac97 *ac97, u16 gpio)
  115. {
  116. return ucb1400_reg_read(ac97, UCB_IO_DIR) & (1 << gpio);
  117. }
  118. static inline void ucb1400_gpio_set_direction(struct snd_ac97 *ac97, u16 gpio,
  119. u16 dir)
  120. {
  121. ucb1400_reg_write(ac97, UCB_IO_DIR, dir ?
  122. ucb1400_reg_read(ac97, UCB_IO_DIR) | (1 << gpio) :
  123. ucb1400_reg_read(ac97, UCB_IO_DIR) & ~(1 << gpio));
  124. }
  125. static inline void ucb1400_adc_enable(struct snd_ac97 *ac97)
  126. {
  127. ucb1400_reg_write(ac97, UCB_ADC_CR, UCB_ADC_ENA);
  128. }
  129. static inline void ucb1400_adc_disable(struct snd_ac97 *ac97)
  130. {
  131. ucb1400_reg_write(ac97, UCB_ADC_CR, 0);
  132. }
  133. unsigned int ucb1400_adc_read(struct snd_ac97 *ac97, u16 adc_channel,
  134. int adcsync);
  135. #endif