s3c-cpu-freq.h 4.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (c) 2006-2007 Simtec Electronics
  4. * http://armlinux.simtec.co.uk/
  5. * Ben Dooks <[email protected]>
  6. *
  7. * S3C CPU frequency scaling support - driver and board
  8. */
  9. #ifndef __LINUX_SOC_SAMSUNG_S3C_CPU_FREQ_H
  10. #define __LINUX_SOC_SAMSUNG_S3C_CPU_FREQ_H
  11. #include <linux/cpufreq.h>
  12. struct s3c_cpufreq_info;
  13. struct s3c_cpufreq_board;
  14. struct s3c_iotimings;
  15. /**
  16. * struct s3c_freq - frequency information (mainly for core drivers)
  17. * @fclk: The FCLK frequency in Hz.
  18. * @armclk: The ARMCLK frequency in Hz.
  19. * @hclk_tns: HCLK cycle time in 10ths of nano-seconds.
  20. * @hclk: The HCLK frequency in Hz.
  21. * @pclk: The PCLK frequency in Hz.
  22. *
  23. * This contains the frequency information about the current configuration
  24. * mainly for the core drivers to ensure we do not end up passing about
  25. * a large number of parameters.
  26. *
  27. * The @hclk_tns field is a useful cache for the parts of the drivers that
  28. * need to calculate IO timings and suchlike.
  29. */
  30. struct s3c_freq {
  31. unsigned long fclk;
  32. unsigned long armclk;
  33. unsigned long hclk_tns; /* in 10ths of ns */
  34. unsigned long hclk;
  35. unsigned long pclk;
  36. };
  37. /**
  38. * struct s3c_cpufreq_freqs - s3c cpufreq notification information.
  39. * @freqs: The cpufreq setting information.
  40. * @old: The old clock settings.
  41. * @new: The new clock settings.
  42. * @pll_changing: Set if the PLL is changing.
  43. *
  44. * Wrapper 'struct cpufreq_freqs' so that any drivers receiving the
  45. * notification can use this information that is not provided by just
  46. * having the core frequency alone.
  47. *
  48. * The pll_changing flag is used to indicate if the PLL itself is
  49. * being set during this change. This is important as the clocks
  50. * will temporarily be set to the XTAL clock during this time, so
  51. * drivers may want to close down their output during this time.
  52. *
  53. * Note, this is not being used by any current drivers and therefore
  54. * may be removed in the future.
  55. */
  56. struct s3c_cpufreq_freqs {
  57. struct cpufreq_freqs freqs;
  58. struct s3c_freq old;
  59. struct s3c_freq new;
  60. unsigned int pll_changing:1;
  61. };
  62. #define to_s3c_cpufreq(_cf) container_of(_cf, struct s3c_cpufreq_freqs, freqs)
  63. /**
  64. * struct s3c_clkdivs - clock divisor information
  65. * @p_divisor: Divisor from FCLK to PCLK.
  66. * @h_divisor: Divisor from FCLK to HCLK.
  67. * @arm_divisor: Divisor from FCLK to ARMCLK (not all CPUs).
  68. * @dvs: Non-zero if using DVS mode for ARMCLK.
  69. *
  70. * Divisor settings for the core clocks.
  71. */
  72. struct s3c_clkdivs {
  73. int p_divisor;
  74. int h_divisor;
  75. int arm_divisor;
  76. unsigned char dvs;
  77. };
  78. #define PLLVAL(_m, _p, _s) (((_m) << 12) | ((_p) << 4) | (_s))
  79. /**
  80. * struct s3c_pllval - PLL value entry.
  81. * @freq: The frequency for this entry in Hz.
  82. * @pll_reg: The PLL register setting for this PLL value.
  83. */
  84. struct s3c_pllval {
  85. unsigned long freq;
  86. unsigned long pll_reg;
  87. };
  88. /**
  89. * struct s3c_cpufreq_board - per-board cpu frequency informatin
  90. * @refresh: The SDRAM refresh period in nanoseconds.
  91. * @auto_io: Set if the IO timing settings should be generated from the
  92. * initialisation time hardware registers.
  93. * @need_io: Set if the board has external IO on any of the chipselect
  94. * lines that will require the hardware timing registers to be
  95. * updated on a clock change.
  96. * @max: The maxium frequency limits for the system. Any field that
  97. * is left at zero will use the CPU's settings.
  98. *
  99. * This contains the board specific settings that affect how the CPU
  100. * drivers chose settings. These include the memory refresh and IO
  101. * timing information.
  102. *
  103. * Registration depends on the driver being used, the ARMCLK only
  104. * implementation does not currently need this but the older style
  105. * driver requires this to be available.
  106. */
  107. struct s3c_cpufreq_board {
  108. unsigned int refresh;
  109. unsigned int auto_io:1; /* automatically init io timings. */
  110. unsigned int need_io:1; /* set if needs io timing support. */
  111. /* any non-zero field in here is taken as an upper limit. */
  112. struct s3c_freq max; /* frequency limits */
  113. };
  114. /* Things depending on frequency scaling. */
  115. #ifdef CONFIG_ARM_S3C_CPUFREQ
  116. #define __init_or_cpufreq
  117. #else
  118. #define __init_or_cpufreq __init
  119. #endif
  120. /* Board functions */
  121. #ifdef CONFIG_ARM_S3C_CPUFREQ
  122. extern int s3c_cpufreq_setboard(struct s3c_cpufreq_board *board);
  123. #else
  124. static inline int s3c_cpufreq_setboard(struct s3c_cpufreq_board *board)
  125. {
  126. return 0;
  127. }
  128. #endif /* CONFIG_ARM_S3C_CPUFREQ */
  129. #endif