phy.h 61 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /*
  3. * Framework and drivers for configuring and reading different PHYs
  4. * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
  5. *
  6. * Author: Andy Fleming
  7. *
  8. * Copyright (c) 2004 Freescale Semiconductor, Inc.
  9. */
  10. #ifndef __PHY_H
  11. #define __PHY_H
  12. #include <linux/compiler.h>
  13. #include <linux/spinlock.h>
  14. #include <linux/ethtool.h>
  15. #include <linux/linkmode.h>
  16. #include <linux/netlink.h>
  17. #include <linux/mdio.h>
  18. #include <linux/mii.h>
  19. #include <linux/mii_timestamper.h>
  20. #include <linux/module.h>
  21. #include <linux/timer.h>
  22. #include <linux/workqueue.h>
  23. #include <linux/mod_devicetable.h>
  24. #include <linux/u64_stats_sync.h>
  25. #include <linux/irqreturn.h>
  26. #include <linux/iopoll.h>
  27. #include <linux/refcount.h>
  28. #include <linux/android_kabi.h>
  29. #include <linux/atomic.h>
  30. #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
  31. SUPPORTED_TP | \
  32. SUPPORTED_MII)
  33. #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
  34. SUPPORTED_10baseT_Full)
  35. #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
  36. SUPPORTED_100baseT_Full)
  37. #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
  38. SUPPORTED_1000baseT_Full)
  39. extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
  40. extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
  41. extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
  42. extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
  43. extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
  44. extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
  45. extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;
  46. extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
  47. #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
  48. #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
  49. #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
  50. #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
  51. #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
  52. #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
  53. #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features)
  54. #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
  55. extern const int phy_basic_ports_array[3];
  56. extern const int phy_fibre_port_array[1];
  57. extern const int phy_all_ports_features_array[7];
  58. extern const int phy_10_100_features_array[4];
  59. extern const int phy_basic_t1_features_array[3];
  60. extern const int phy_gbit_features_array[2];
  61. extern const int phy_10gbit_features_array[1];
  62. /*
  63. * Set phydev->irq to PHY_POLL if interrupts are not supported,
  64. * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if
  65. * the attached MAC driver handles the interrupt
  66. */
  67. #define PHY_POLL -1
  68. #define PHY_MAC_INTERRUPT -2
  69. #define PHY_IS_INTERNAL 0x00000001
  70. #define PHY_RST_AFTER_CLK_EN 0x00000002
  71. #define PHY_POLL_CABLE_TEST 0x00000004
  72. #define MDIO_DEVICE_IS_PHY 0x80000000
  73. /**
  74. * enum phy_interface_t - Interface Mode definitions
  75. *
  76. * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch
  77. * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined
  78. * @PHY_INTERFACE_MODE_MII: Media-independent interface
  79. * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface
  80. * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface
  81. * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface
  82. * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface
  83. * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface
  84. * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role
  85. * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface
  86. * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay
  87. * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay
  88. * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay
  89. * @PHY_INTERFACE_MODE_RTBI: Reduced TBI
  90. * @PHY_INTERFACE_MODE_SMII: Serial MII
  91. * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface
  92. * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface
  93. * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax
  94. * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII
  95. * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII
  96. * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX
  97. * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX
  98. * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX
  99. * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR
  100. * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI
  101. * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface
  102. * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR
  103. * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR
  104. * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII
  105. * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN
  106. * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII
  107. * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN
  108. * @PHY_INTERFACE_MODE_MAX: Book keeping
  109. *
  110. * Describes the interface between the MAC and PHY.
  111. */
  112. typedef enum {
  113. PHY_INTERFACE_MODE_NA,
  114. PHY_INTERFACE_MODE_INTERNAL,
  115. PHY_INTERFACE_MODE_MII,
  116. PHY_INTERFACE_MODE_GMII,
  117. PHY_INTERFACE_MODE_SGMII,
  118. PHY_INTERFACE_MODE_TBI,
  119. PHY_INTERFACE_MODE_REVMII,
  120. PHY_INTERFACE_MODE_RMII,
  121. PHY_INTERFACE_MODE_REVRMII,
  122. PHY_INTERFACE_MODE_RGMII,
  123. PHY_INTERFACE_MODE_RGMII_ID,
  124. PHY_INTERFACE_MODE_RGMII_RXID,
  125. PHY_INTERFACE_MODE_RGMII_TXID,
  126. PHY_INTERFACE_MODE_RTBI,
  127. PHY_INTERFACE_MODE_SMII,
  128. PHY_INTERFACE_MODE_XGMII,
  129. PHY_INTERFACE_MODE_XLGMII,
  130. PHY_INTERFACE_MODE_MOCA,
  131. PHY_INTERFACE_MODE_QSGMII,
  132. PHY_INTERFACE_MODE_TRGMII,
  133. PHY_INTERFACE_MODE_100BASEX,
  134. PHY_INTERFACE_MODE_1000BASEX,
  135. PHY_INTERFACE_MODE_2500BASEX,
  136. PHY_INTERFACE_MODE_5GBASER,
  137. PHY_INTERFACE_MODE_RXAUI,
  138. PHY_INTERFACE_MODE_XAUI,
  139. /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
  140. PHY_INTERFACE_MODE_10GBASER,
  141. PHY_INTERFACE_MODE_25GBASER,
  142. PHY_INTERFACE_MODE_USXGMII,
  143. /* 10GBASE-KR - with Clause 73 AN */
  144. PHY_INTERFACE_MODE_10GKR,
  145. PHY_INTERFACE_MODE_QUSGMII,
  146. PHY_INTERFACE_MODE_1000BASEKX,
  147. PHY_INTERFACE_MODE_MAX,
  148. } phy_interface_t;
  149. /* PHY interface mode bitmap handling */
  150. #define DECLARE_PHY_INTERFACE_MASK(name) \
  151. DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX)
  152. static inline void phy_interface_zero(unsigned long *intf)
  153. {
  154. bitmap_zero(intf, PHY_INTERFACE_MODE_MAX);
  155. }
  156. static inline bool phy_interface_empty(const unsigned long *intf)
  157. {
  158. return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX);
  159. }
  160. static inline void phy_interface_and(unsigned long *dst, const unsigned long *a,
  161. const unsigned long *b)
  162. {
  163. bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX);
  164. }
  165. static inline void phy_interface_or(unsigned long *dst, const unsigned long *a,
  166. const unsigned long *b)
  167. {
  168. bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX);
  169. }
  170. static inline void phy_interface_set_rgmii(unsigned long *intf)
  171. {
  172. __set_bit(PHY_INTERFACE_MODE_RGMII, intf);
  173. __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf);
  174. __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf);
  175. __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf);
  176. }
  177. /*
  178. * phy_supported_speeds - return all speeds currently supported by a PHY device
  179. */
  180. unsigned int phy_supported_speeds(struct phy_device *phy,
  181. unsigned int *speeds,
  182. unsigned int size);
  183. /**
  184. * phy_modes - map phy_interface_t enum to device tree binding of phy-mode
  185. * @interface: enum phy_interface_t value
  186. *
  187. * Description: maps enum &phy_interface_t defined in this file
  188. * into the device tree binding of 'phy-mode', so that Ethernet
  189. * device driver can get PHY interface from device tree.
  190. */
  191. static inline const char *phy_modes(phy_interface_t interface)
  192. {
  193. switch (interface) {
  194. case PHY_INTERFACE_MODE_NA:
  195. return "";
  196. case PHY_INTERFACE_MODE_INTERNAL:
  197. return "internal";
  198. case PHY_INTERFACE_MODE_MII:
  199. return "mii";
  200. case PHY_INTERFACE_MODE_GMII:
  201. return "gmii";
  202. case PHY_INTERFACE_MODE_SGMII:
  203. return "sgmii";
  204. case PHY_INTERFACE_MODE_TBI:
  205. return "tbi";
  206. case PHY_INTERFACE_MODE_REVMII:
  207. return "rev-mii";
  208. case PHY_INTERFACE_MODE_RMII:
  209. return "rmii";
  210. case PHY_INTERFACE_MODE_REVRMII:
  211. return "rev-rmii";
  212. case PHY_INTERFACE_MODE_RGMII:
  213. return "rgmii";
  214. case PHY_INTERFACE_MODE_RGMII_ID:
  215. return "rgmii-id";
  216. case PHY_INTERFACE_MODE_RGMII_RXID:
  217. return "rgmii-rxid";
  218. case PHY_INTERFACE_MODE_RGMII_TXID:
  219. return "rgmii-txid";
  220. case PHY_INTERFACE_MODE_RTBI:
  221. return "rtbi";
  222. case PHY_INTERFACE_MODE_SMII:
  223. return "smii";
  224. case PHY_INTERFACE_MODE_XGMII:
  225. return "xgmii";
  226. case PHY_INTERFACE_MODE_XLGMII:
  227. return "xlgmii";
  228. case PHY_INTERFACE_MODE_MOCA:
  229. return "moca";
  230. case PHY_INTERFACE_MODE_QSGMII:
  231. return "qsgmii";
  232. case PHY_INTERFACE_MODE_TRGMII:
  233. return "trgmii";
  234. case PHY_INTERFACE_MODE_1000BASEX:
  235. return "1000base-x";
  236. case PHY_INTERFACE_MODE_1000BASEKX:
  237. return "1000base-kx";
  238. case PHY_INTERFACE_MODE_2500BASEX:
  239. return "2500base-x";
  240. case PHY_INTERFACE_MODE_5GBASER:
  241. return "5gbase-r";
  242. case PHY_INTERFACE_MODE_RXAUI:
  243. return "rxaui";
  244. case PHY_INTERFACE_MODE_XAUI:
  245. return "xaui";
  246. case PHY_INTERFACE_MODE_10GBASER:
  247. return "10gbase-r";
  248. case PHY_INTERFACE_MODE_25GBASER:
  249. return "25gbase-r";
  250. case PHY_INTERFACE_MODE_USXGMII:
  251. return "usxgmii";
  252. case PHY_INTERFACE_MODE_10GKR:
  253. return "10gbase-kr";
  254. case PHY_INTERFACE_MODE_100BASEX:
  255. return "100base-x";
  256. case PHY_INTERFACE_MODE_QUSGMII:
  257. return "qusgmii";
  258. default:
  259. return "unknown";
  260. }
  261. }
  262. #define PHY_INIT_TIMEOUT 100000
  263. #define PHY_FORCE_TIMEOUT 10
  264. #define PHY_MAX_ADDR 32
  265. /* Used when trying to connect to a specific phy (mii bus id:phy device id) */
  266. #define PHY_ID_FMT "%s:%02x"
  267. #define MII_BUS_ID_SIZE 61
  268. struct device;
  269. struct phylink;
  270. struct sfp_bus;
  271. struct sfp_upstream_ops;
  272. struct sk_buff;
  273. /**
  274. * struct mdio_bus_stats - Statistics counters for MDIO busses
  275. * @transfers: Total number of transfers, i.e. @writes + @reads
  276. * @errors: Number of MDIO transfers that returned an error
  277. * @writes: Number of write transfers
  278. * @reads: Number of read transfers
  279. * @syncp: Synchronisation for incrementing statistics
  280. */
  281. struct mdio_bus_stats {
  282. u64_stats_t transfers;
  283. u64_stats_t errors;
  284. u64_stats_t writes;
  285. u64_stats_t reads;
  286. /* Must be last, add new statistics above */
  287. struct u64_stats_sync syncp;
  288. };
  289. /**
  290. * struct phy_package_shared - Shared information in PHY packages
  291. * @addr: Common PHY address used to combine PHYs in one package
  292. * @refcnt: Number of PHYs connected to this shared data
  293. * @flags: Initialization of PHY package
  294. * @priv_size: Size of the shared private data @priv
  295. * @priv: Driver private data shared across a PHY package
  296. *
  297. * Represents a shared structure between different phydev's in the same
  298. * package, for example a quad PHY. See phy_package_join() and
  299. * phy_package_leave().
  300. */
  301. struct phy_package_shared {
  302. int addr;
  303. refcount_t refcnt;
  304. unsigned long flags;
  305. size_t priv_size;
  306. /* private data pointer */
  307. /* note that this pointer is shared between different phydevs and
  308. * the user has to take care of appropriate locking. It is allocated
  309. * and freed automatically by phy_package_join() and
  310. * phy_package_leave().
  311. */
  312. void *priv;
  313. };
  314. /* used as bit number in atomic bitops */
  315. #define PHY_SHARED_F_INIT_DONE 0
  316. #define PHY_SHARED_F_PROBE_DONE 1
  317. /**
  318. * struct mii_bus - Represents an MDIO bus
  319. *
  320. * @owner: Who owns this device
  321. * @name: User friendly name for this MDIO device, or driver name
  322. * @id: Unique identifier for this bus, typical from bus hierarchy
  323. * @priv: Driver private data
  324. *
  325. * The Bus class for PHYs. Devices which provide access to
  326. * PHYs should register using this structure
  327. */
  328. struct mii_bus {
  329. struct module *owner;
  330. const char *name;
  331. char id[MII_BUS_ID_SIZE];
  332. void *priv;
  333. /** @read: Perform a read transfer on the bus */
  334. int (*read)(struct mii_bus *bus, int addr, int regnum);
  335. /** @write: Perform a write transfer on the bus */
  336. int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
  337. /** @reset: Perform a reset of the bus */
  338. int (*reset)(struct mii_bus *bus);
  339. /** @stats: Statistic counters per device on the bus */
  340. struct mdio_bus_stats stats[PHY_MAX_ADDR];
  341. /**
  342. * @mdio_lock: A lock to ensure that only one thing can read/write
  343. * the MDIO bus at a time
  344. */
  345. struct mutex mdio_lock;
  346. /** @parent: Parent device of this bus */
  347. struct device *parent;
  348. /** @state: State of bus structure */
  349. enum {
  350. MDIOBUS_ALLOCATED = 1,
  351. MDIOBUS_REGISTERED,
  352. MDIOBUS_UNREGISTERED,
  353. MDIOBUS_RELEASED,
  354. } state;
  355. /** @dev: Kernel device representation */
  356. struct device dev;
  357. /** @mdio_map: list of all MDIO devices on bus */
  358. struct mdio_device *mdio_map[PHY_MAX_ADDR];
  359. /** @phy_mask: PHY addresses to be ignored when probing */
  360. u32 phy_mask;
  361. /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */
  362. u32 phy_ignore_ta_mask;
  363. /**
  364. * @irq: An array of interrupts, each PHY's interrupt at the index
  365. * matching its address
  366. */
  367. int irq[PHY_MAX_ADDR];
  368. /** @reset_delay_us: GPIO reset pulse width in microseconds */
  369. int reset_delay_us;
  370. /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */
  371. int reset_post_delay_us;
  372. /** @reset_gpiod: Reset GPIO descriptor pointer */
  373. struct gpio_desc *reset_gpiod;
  374. /** @probe_capabilities: bus capabilities, used for probing */
  375. enum {
  376. MDIOBUS_NO_CAP = 0,
  377. MDIOBUS_C22,
  378. MDIOBUS_C45,
  379. MDIOBUS_C22_C45,
  380. } probe_capabilities;
  381. /** @shared_lock: protect access to the shared element */
  382. struct mutex shared_lock;
  383. /** @shared: shared state across different PHYs */
  384. struct phy_package_shared *shared[PHY_MAX_ADDR];
  385. };
  386. #define to_mii_bus(d) container_of(d, struct mii_bus, dev)
  387. struct mii_bus *mdiobus_alloc_size(size_t size);
  388. /**
  389. * mdiobus_alloc - Allocate an MDIO bus structure
  390. *
  391. * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready
  392. * for the driver to register the bus.
  393. */
  394. static inline struct mii_bus *mdiobus_alloc(void)
  395. {
  396. return mdiobus_alloc_size(0);
  397. }
  398. int __mdiobus_register(struct mii_bus *bus, struct module *owner);
  399. int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus,
  400. struct module *owner);
  401. #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
  402. #define devm_mdiobus_register(dev, bus) \
  403. __devm_mdiobus_register(dev, bus, THIS_MODULE)
  404. void mdiobus_unregister(struct mii_bus *bus);
  405. void mdiobus_free(struct mii_bus *bus);
  406. struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
  407. static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
  408. {
  409. return devm_mdiobus_alloc_size(dev, 0);
  410. }
  411. struct mii_bus *mdio_find_bus(const char *mdio_name);
  412. struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
  413. #define PHY_INTERRUPT_DISABLED false
  414. #define PHY_INTERRUPT_ENABLED true
  415. /**
  416. * enum phy_state - PHY state machine states:
  417. *
  418. * @PHY_DOWN: PHY device and driver are not ready for anything. probe
  419. * should be called if and only if the PHY is in this state,
  420. * given that the PHY device exists.
  421. * - PHY driver probe function will set the state to @PHY_READY
  422. *
  423. * @PHY_READY: PHY is ready to send and receive packets, but the
  424. * controller is not. By default, PHYs which do not implement
  425. * probe will be set to this state by phy_probe().
  426. * - start will set the state to UP
  427. *
  428. * @PHY_UP: The PHY and attached device are ready to do work.
  429. * Interrupts should be started here.
  430. * - timer moves to @PHY_NOLINK or @PHY_RUNNING
  431. *
  432. * @PHY_NOLINK: PHY is up, but not currently plugged in.
  433. * - irq or timer will set @PHY_RUNNING if link comes back
  434. * - phy_stop moves to @PHY_HALTED
  435. *
  436. * @PHY_RUNNING: PHY is currently up, running, and possibly sending
  437. * and/or receiving packets
  438. * - irq or timer will set @PHY_NOLINK if link goes down
  439. * - phy_stop moves to @PHY_HALTED
  440. *
  441. * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending
  442. * is not expected to work, carrier will be indicated as down. PHY will be
  443. * poll once per second, or on interrupt for it current state.
  444. * Once complete, move to UP to restart the PHY.
  445. * - phy_stop aborts the running test and moves to @PHY_HALTED
  446. *
  447. * @PHY_HALTED: PHY is up, but no polling or interrupts are done. Or
  448. * PHY is in an error state.
  449. * - phy_start moves to @PHY_UP
  450. */
  451. enum phy_state {
  452. PHY_DOWN = 0,
  453. PHY_READY,
  454. PHY_HALTED,
  455. PHY_UP,
  456. PHY_RUNNING,
  457. PHY_NOLINK,
  458. PHY_CABLETEST,
  459. };
  460. #define MDIO_MMD_NUM 32
  461. /**
  462. * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
  463. * @devices_in_package: IEEE 802.3 devices in package register value.
  464. * @mmds_present: bit vector of MMDs present.
  465. * @device_ids: The device identifer for each present device.
  466. */
  467. struct phy_c45_device_ids {
  468. u32 devices_in_package;
  469. u32 mmds_present;
  470. u32 device_ids[MDIO_MMD_NUM];
  471. };
  472. struct macsec_context;
  473. struct macsec_ops;
  474. /**
  475. * struct phy_device - An instance of a PHY
  476. *
  477. * @mdio: MDIO bus this PHY is on
  478. * @drv: Pointer to the driver for this PHY instance
  479. * @phy_id: UID for this device found during discovery
  480. * @c45_ids: 802.3-c45 Device Identifiers if is_c45.
  481. * @is_c45: Set to true if this PHY uses clause 45 addressing.
  482. * @is_internal: Set to true if this PHY is internal to a MAC.
  483. * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc.
  484. * @is_gigabit_capable: Set to true if PHY supports 1000Mbps
  485. * @has_fixups: Set to true if this PHY has fixups/quirks.
  486. * @suspended: Set to true if this PHY has been suspended successfully.
  487. * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus.
  488. * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
  489. * @loopback_enabled: Set true if this PHY has been loopbacked successfully.
  490. * @downshifted_rate: Set true if link speed has been downshifted.
  491. * @is_on_sfp_module: Set true if PHY is located on an SFP module.
  492. * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY
  493. * @state: State of the PHY for management purposes
  494. * @dev_flags: Device-specific flags used by the PHY driver.
  495. *
  496. * - Bits [15:0] are free to use by the PHY driver to communicate
  497. * driver specific behavior.
  498. * - Bits [23:16] are currently reserved for future use.
  499. * - Bits [31:24] are reserved for defining generic
  500. * PHY driver behavior.
  501. * @irq: IRQ number of the PHY's interrupt (-1 if none)
  502. * @phy_timer: The timer for handling the state machine
  503. * @phylink: Pointer to phylink instance for this PHY
  504. * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached
  505. * @sfp_bus: SFP bus attached to this PHY's fiber port
  506. * @attached_dev: The attached enet driver's device instance ptr
  507. * @adjust_link: Callback for the enet controller to respond to changes: in the
  508. * link state.
  509. * @phy_link_change: Callback for phylink for notification of link change
  510. * @macsec_ops: MACsec offloading ops.
  511. *
  512. * @speed: Current link speed
  513. * @duplex: Current duplex
  514. * @port: Current port
  515. * @pause: Current pause
  516. * @asym_pause: Current asymmetric pause
  517. * @supported: Combined MAC/PHY supported linkmodes
  518. * @advertising: Currently advertised linkmodes
  519. * @adv_old: Saved advertised while power saving for WoL
  520. * @lp_advertising: Current link partner advertised linkmodes
  521. * @host_interfaces: PHY interface modes supported by host
  522. * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited
  523. * @autoneg: Flag autoneg being used
  524. * @rate_matching: Current rate matching mode
  525. * @link: Current link state
  526. * @autoneg_complete: Flag auto negotiation of the link has completed
  527. * @mdix: Current crossover
  528. * @mdix_ctrl: User setting of crossover
  529. * @pma_extable: Cached value of PMA/PMD Extended Abilities Register
  530. * @interrupts: Flag interrupts have been enabled
  531. * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt
  532. * handling shall be postponed until PHY has resumed
  533. * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended,
  534. * requiring a rerun of the interrupt handler after resume
  535. * @interface: enum phy_interface_t value
  536. * @skb: Netlink message for cable diagnostics
  537. * @nest: Netlink nest used for cable diagnostics
  538. * @ehdr: nNtlink header for cable diagnostics
  539. * @phy_led_triggers: Array of LED triggers
  540. * @phy_num_led_triggers: Number of triggers in @phy_led_triggers
  541. * @led_link_trigger: LED trigger for link up/down
  542. * @last_triggered: last LED trigger for link speed
  543. * @master_slave_set: User requested master/slave configuration
  544. * @master_slave_get: Current master/slave advertisement
  545. * @master_slave_state: Current master/slave configuration
  546. * @mii_ts: Pointer to time stamper callbacks
  547. * @psec: Pointer to Power Sourcing Equipment control struct
  548. * @lock: Mutex for serialization access to PHY
  549. * @state_queue: Work queue for state machine
  550. * @shared: Pointer to private data shared by phys in one package
  551. * @priv: Pointer to driver private data
  552. *
  553. * interrupts currently only supports enabled or disabled,
  554. * but could be changed in the future to support enabling
  555. * and disabling specific interrupts
  556. *
  557. * Contains some infrastructure for polling and interrupt
  558. * handling, as well as handling shifts in PHY hardware state
  559. */
  560. struct phy_device {
  561. struct mdio_device mdio;
  562. /* Information about the PHY type */
  563. /* And management functions */
  564. struct phy_driver *drv;
  565. u32 phy_id;
  566. struct phy_c45_device_ids c45_ids;
  567. unsigned is_c45:1;
  568. unsigned is_internal:1;
  569. unsigned is_pseudo_fixed_link:1;
  570. unsigned is_gigabit_capable:1;
  571. unsigned has_fixups:1;
  572. unsigned suspended:1;
  573. unsigned suspended_by_mdio_bus:1;
  574. unsigned sysfs_links:1;
  575. unsigned loopback_enabled:1;
  576. unsigned downshifted_rate:1;
  577. unsigned is_on_sfp_module:1;
  578. unsigned mac_managed_pm:1;
  579. unsigned autoneg:1;
  580. /* The most recently read link state */
  581. unsigned link:1;
  582. unsigned autoneg_complete:1;
  583. /* Interrupts are enabled */
  584. unsigned interrupts:1;
  585. unsigned irq_suspended:1;
  586. unsigned irq_rerun:1;
  587. int rate_matching;
  588. enum phy_state state;
  589. u32 dev_flags;
  590. phy_interface_t interface;
  591. /*
  592. * forced speed & duplex (no autoneg)
  593. * partner speed & duplex & pause (autoneg)
  594. */
  595. int speed;
  596. int duplex;
  597. int port;
  598. int pause;
  599. int asym_pause;
  600. u8 master_slave_get;
  601. u8 master_slave_set;
  602. u8 master_slave_state;
  603. /* Union of PHY and Attached devices' supported link modes */
  604. /* See ethtool.h for more info */
  605. __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
  606. __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
  607. __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
  608. /* used with phy_speed_down */
  609. __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old);
  610. /* Host supported PHY interface types. Should be ignored if empty. */
  611. DECLARE_PHY_INTERFACE_MASK(host_interfaces);
  612. /* Energy efficient ethernet modes which should be prohibited */
  613. u32 eee_broken_modes;
  614. #ifdef CONFIG_LED_TRIGGER_PHY
  615. struct phy_led_trigger *phy_led_triggers;
  616. unsigned int phy_num_led_triggers;
  617. struct phy_led_trigger *last_triggered;
  618. struct phy_led_trigger *led_link_trigger;
  619. #endif
  620. /*
  621. * Interrupt number for this PHY
  622. * -1 means no interrupt
  623. */
  624. int irq;
  625. /* private data pointer */
  626. /* For use by PHYs to maintain extra state */
  627. void *priv;
  628. /* shared data pointer */
  629. /* For use by PHYs inside the same package that need a shared state. */
  630. struct phy_package_shared *shared;
  631. /* Reporting cable test results */
  632. struct sk_buff *skb;
  633. void *ehdr;
  634. struct nlattr *nest;
  635. /* Interrupt and Polling infrastructure */
  636. struct delayed_work state_queue;
  637. struct mutex lock;
  638. /* This may be modified under the rtnl lock */
  639. bool sfp_bus_attached;
  640. struct sfp_bus *sfp_bus;
  641. struct phylink *phylink;
  642. struct net_device *attached_dev;
  643. struct mii_timestamper *mii_ts;
  644. struct pse_control *psec;
  645. u8 mdix;
  646. u8 mdix_ctrl;
  647. int pma_extable;
  648. void (*phy_link_change)(struct phy_device *phydev, bool up);
  649. void (*adjust_link)(struct net_device *dev);
  650. #if IS_ENABLED(CONFIG_MACSEC)
  651. /* MACsec management functions */
  652. const struct macsec_ops *macsec_ops;
  653. #endif
  654. ANDROID_KABI_RESERVE(1);
  655. ANDROID_KABI_RESERVE(2);
  656. ANDROID_KABI_RESERVE(3);
  657. ANDROID_KABI_RESERVE(4);
  658. };
  659. static inline struct phy_device *to_phy_device(const struct device *dev)
  660. {
  661. return container_of(to_mdio_device(dev), struct phy_device, mdio);
  662. }
  663. /**
  664. * struct phy_tdr_config - Configuration of a TDR raw test
  665. *
  666. * @first: Distance for first data collection point
  667. * @last: Distance for last data collection point
  668. * @step: Step between data collection points
  669. * @pair: Bitmap of cable pairs to collect data for
  670. *
  671. * A structure containing possible configuration parameters
  672. * for a TDR cable test. The driver does not need to implement
  673. * all the parameters, but should report what is actually used.
  674. * All distances are in centimeters.
  675. */
  676. struct phy_tdr_config {
  677. u32 first;
  678. u32 last;
  679. u32 step;
  680. s8 pair;
  681. };
  682. #define PHY_PAIR_ALL -1
  683. /**
  684. * struct phy_driver - Driver structure for a particular PHY type
  685. *
  686. * @mdiodrv: Data common to all MDIO devices
  687. * @phy_id: The result of reading the UID registers of this PHY
  688. * type, and ANDing them with the phy_id_mask. This driver
  689. * only works for PHYs with IDs which match this field
  690. * @name: The friendly name of this PHY type
  691. * @phy_id_mask: Defines the important bits of the phy_id
  692. * @features: A mandatory list of features (speed, duplex, etc)
  693. * supported by this PHY
  694. * @flags: A bitfield defining certain other features this PHY
  695. * supports (like interrupts)
  696. * @driver_data: Static driver data
  697. *
  698. * All functions are optional. If config_aneg or read_status
  699. * are not implemented, the phy core uses the genphy versions.
  700. * Note that none of these functions should be called from
  701. * interrupt time. The goal is for the bus read/write functions
  702. * to be able to block when the bus transaction is happening,
  703. * and be freed up by an interrupt (The MPC85xx has this ability,
  704. * though it is not currently supported in the driver).
  705. */
  706. struct phy_driver {
  707. struct mdio_driver_common mdiodrv;
  708. u32 phy_id;
  709. char *name;
  710. u32 phy_id_mask;
  711. const unsigned long * const features;
  712. u32 flags;
  713. const void *driver_data;
  714. /**
  715. * @soft_reset: Called to issue a PHY software reset
  716. */
  717. int (*soft_reset)(struct phy_device *phydev);
  718. /**
  719. * @config_init: Called to initialize the PHY,
  720. * including after a reset
  721. */
  722. int (*config_init)(struct phy_device *phydev);
  723. /**
  724. * @probe: Called during discovery. Used to set
  725. * up device-specific structures, if any
  726. */
  727. int (*probe)(struct phy_device *phydev);
  728. /**
  729. * @get_features: Probe the hardware to determine what
  730. * abilities it has. Should only set phydev->supported.
  731. */
  732. int (*get_features)(struct phy_device *phydev);
  733. /**
  734. * @get_rate_matching: Get the supported type of rate matching for a
  735. * particular phy interface. This is used by phy consumers to determine
  736. * whether to advertise lower-speed modes for that interface. It is
  737. * assumed that if a rate matching mode is supported on an interface,
  738. * then that interface's rate can be adapted to all slower link speeds
  739. * supported by the phy. If iface is %PHY_INTERFACE_MODE_NA, and the phy
  740. * supports any kind of rate matching for any interface, then it must
  741. * return that rate matching mode (preferring %RATE_MATCH_PAUSE to
  742. * %RATE_MATCH_CRS). If the interface is not supported, this should
  743. * return %RATE_MATCH_NONE.
  744. */
  745. int (*get_rate_matching)(struct phy_device *phydev,
  746. phy_interface_t iface);
  747. /* PHY Power Management */
  748. /** @suspend: Suspend the hardware, saving state if needed */
  749. int (*suspend)(struct phy_device *phydev);
  750. /** @resume: Resume the hardware, restoring state if needed */
  751. int (*resume)(struct phy_device *phydev);
  752. /**
  753. * @config_aneg: Configures the advertisement and resets
  754. * autonegotiation if phydev->autoneg is on,
  755. * forces the speed to the current settings in phydev
  756. * if phydev->autoneg is off
  757. */
  758. int (*config_aneg)(struct phy_device *phydev);
  759. /** @aneg_done: Determines the auto negotiation result */
  760. int (*aneg_done)(struct phy_device *phydev);
  761. /** @read_status: Determines the negotiated speed and duplex */
  762. int (*read_status)(struct phy_device *phydev);
  763. /**
  764. * @config_intr: Enables or disables interrupts.
  765. * It should also clear any pending interrupts prior to enabling the
  766. * IRQs and after disabling them.
  767. */
  768. int (*config_intr)(struct phy_device *phydev);
  769. /** @handle_interrupt: Override default interrupt handling */
  770. irqreturn_t (*handle_interrupt)(struct phy_device *phydev);
  771. /** @remove: Clears up any memory if needed */
  772. void (*remove)(struct phy_device *phydev);
  773. /**
  774. * @match_phy_device: Returns true if this is a suitable
  775. * driver for the given phydev. If NULL, matching is based on
  776. * phy_id and phy_id_mask.
  777. */
  778. int (*match_phy_device)(struct phy_device *phydev);
  779. /**
  780. * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY
  781. * register changes to enable Wake on LAN, so set_wol is
  782. * provided to be called in the ethernet driver's set_wol
  783. * function.
  784. */
  785. int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
  786. /**
  787. * @get_wol: See set_wol, but for checking whether Wake on LAN
  788. * is enabled.
  789. */
  790. void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
  791. /**
  792. * @link_change_notify: Called to inform a PHY device driver
  793. * when the core is about to change the link state. This
  794. * callback is supposed to be used as fixup hook for drivers
  795. * that need to take action when the link state
  796. * changes. Drivers are by no means allowed to mess with the
  797. * PHY device structure in their implementations.
  798. */
  799. void (*link_change_notify)(struct phy_device *dev);
  800. /**
  801. * @read_mmd: PHY specific driver override for reading a MMD
  802. * register. This function is optional for PHY specific
  803. * drivers. When not provided, the default MMD read function
  804. * will be used by phy_read_mmd(), which will use either a
  805. * direct read for Clause 45 PHYs or an indirect read for
  806. * Clause 22 PHYs. devnum is the MMD device number within the
  807. * PHY device, regnum is the register within the selected MMD
  808. * device.
  809. */
  810. int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
  811. /**
  812. * @write_mmd: PHY specific driver override for writing a MMD
  813. * register. This function is optional for PHY specific
  814. * drivers. When not provided, the default MMD write function
  815. * will be used by phy_write_mmd(), which will use either a
  816. * direct write for Clause 45 PHYs, or an indirect write for
  817. * Clause 22 PHYs. devnum is the MMD device number within the
  818. * PHY device, regnum is the register within the selected MMD
  819. * device. val is the value to be written.
  820. */
  821. int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
  822. u16 val);
  823. /** @read_page: Return the current PHY register page number */
  824. int (*read_page)(struct phy_device *dev);
  825. /** @write_page: Set the current PHY register page number */
  826. int (*write_page)(struct phy_device *dev, int page);
  827. /**
  828. * @module_info: Get the size and type of the eeprom contained
  829. * within a plug-in module
  830. */
  831. int (*module_info)(struct phy_device *dev,
  832. struct ethtool_modinfo *modinfo);
  833. /**
  834. * @module_eeprom: Get the eeprom information from the plug-in
  835. * module
  836. */
  837. int (*module_eeprom)(struct phy_device *dev,
  838. struct ethtool_eeprom *ee, u8 *data);
  839. /** @cable_test_start: Start a cable test */
  840. int (*cable_test_start)(struct phy_device *dev);
  841. /** @cable_test_tdr_start: Start a raw TDR cable test */
  842. int (*cable_test_tdr_start)(struct phy_device *dev,
  843. const struct phy_tdr_config *config);
  844. /**
  845. * @cable_test_get_status: Once per second, or on interrupt,
  846. * request the status of the test.
  847. */
  848. int (*cable_test_get_status)(struct phy_device *dev, bool *finished);
  849. /* Get statistics from the PHY using ethtool */
  850. /** @get_sset_count: Number of statistic counters */
  851. int (*get_sset_count)(struct phy_device *dev);
  852. /** @get_strings: Names of the statistic counters */
  853. void (*get_strings)(struct phy_device *dev, u8 *data);
  854. /** @get_stats: Return the statistic counter values */
  855. void (*get_stats)(struct phy_device *dev,
  856. struct ethtool_stats *stats, u64 *data);
  857. /* Get and Set PHY tunables */
  858. /** @get_tunable: Return the value of a tunable */
  859. int (*get_tunable)(struct phy_device *dev,
  860. struct ethtool_tunable *tuna, void *data);
  861. /** @set_tunable: Set the value of a tunable */
  862. int (*set_tunable)(struct phy_device *dev,
  863. struct ethtool_tunable *tuna,
  864. const void *data);
  865. /** @set_loopback: Set the loopback mood of the PHY */
  866. int (*set_loopback)(struct phy_device *dev, bool enable);
  867. /** @get_sqi: Get the signal quality indication */
  868. int (*get_sqi)(struct phy_device *dev);
  869. /** @get_sqi_max: Get the maximum signal quality indication */
  870. int (*get_sqi_max)(struct phy_device *dev);
  871. ANDROID_KABI_RESERVE(1);
  872. ANDROID_KABI_RESERVE(2);
  873. };
  874. #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
  875. struct phy_driver, mdiodrv)
  876. #define PHY_ANY_ID "MATCH ANY PHY"
  877. #define PHY_ANY_UID 0xffffffff
  878. #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
  879. #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
  880. #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
  881. /* A Structure for boards to register fixups with the PHY Lib */
  882. struct phy_fixup {
  883. struct list_head list;
  884. char bus_id[MII_BUS_ID_SIZE + 3];
  885. u32 phy_uid;
  886. u32 phy_uid_mask;
  887. int (*run)(struct phy_device *phydev);
  888. };
  889. const char *phy_speed_to_str(int speed);
  890. const char *phy_duplex_to_str(unsigned int duplex);
  891. const char *phy_rate_matching_to_str(int rate_matching);
  892. int phy_interface_num_ports(phy_interface_t interface);
  893. /* A structure for mapping a particular speed and duplex
  894. * combination to a particular SUPPORTED and ADVERTISED value
  895. */
  896. struct phy_setting {
  897. u32 speed;
  898. u8 duplex;
  899. u8 bit;
  900. };
  901. const struct phy_setting *
  902. phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
  903. bool exact);
  904. size_t phy_speeds(unsigned int *speeds, size_t size,
  905. unsigned long *mask);
  906. void of_set_phy_supported(struct phy_device *phydev);
  907. void of_set_phy_eee_broken(struct phy_device *phydev);
  908. int phy_speed_down_core(struct phy_device *phydev);
  909. /**
  910. * phy_is_started - Convenience function to check whether PHY is started
  911. * @phydev: The phy_device struct
  912. */
  913. static inline bool phy_is_started(struct phy_device *phydev)
  914. {
  915. return phydev->state >= PHY_UP;
  916. }
  917. void phy_resolve_aneg_pause(struct phy_device *phydev);
  918. void phy_resolve_aneg_linkmode(struct phy_device *phydev);
  919. void phy_check_downshift(struct phy_device *phydev);
  920. /**
  921. * phy_read - Convenience function for reading a given PHY register
  922. * @phydev: the phy_device struct
  923. * @regnum: register number to read
  924. *
  925. * NOTE: MUST NOT be called from interrupt context,
  926. * because the bus read/write functions may wait for an interrupt
  927. * to conclude the operation.
  928. */
  929. static inline int phy_read(struct phy_device *phydev, u32 regnum)
  930. {
  931. return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
  932. }
  933. #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \
  934. timeout_us, sleep_before_read) \
  935. ({ \
  936. int __ret = read_poll_timeout(phy_read, val, (cond) || val < 0, \
  937. sleep_us, timeout_us, sleep_before_read, phydev, regnum); \
  938. if (val < 0) \
  939. __ret = val; \
  940. if (__ret) \
  941. phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
  942. __ret; \
  943. })
  944. /**
  945. * __phy_read - convenience function for reading a given PHY register
  946. * @phydev: the phy_device struct
  947. * @regnum: register number to read
  948. *
  949. * The caller must have taken the MDIO bus lock.
  950. */
  951. static inline int __phy_read(struct phy_device *phydev, u32 regnum)
  952. {
  953. return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
  954. }
  955. /**
  956. * phy_write - Convenience function for writing a given PHY register
  957. * @phydev: the phy_device struct
  958. * @regnum: register number to write
  959. * @val: value to write to @regnum
  960. *
  961. * NOTE: MUST NOT be called from interrupt context,
  962. * because the bus read/write functions may wait for an interrupt
  963. * to conclude the operation.
  964. */
  965. static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
  966. {
  967. return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
  968. }
  969. /**
  970. * __phy_write - Convenience function for writing a given PHY register
  971. * @phydev: the phy_device struct
  972. * @regnum: register number to write
  973. * @val: value to write to @regnum
  974. *
  975. * The caller must have taken the MDIO bus lock.
  976. */
  977. static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
  978. {
  979. return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
  980. val);
  981. }
  982. /**
  983. * __phy_modify_changed() - Convenience function for modifying a PHY register
  984. * @phydev: a pointer to a &struct phy_device
  985. * @regnum: register number
  986. * @mask: bit mask of bits to clear
  987. * @set: bit mask of bits to set
  988. *
  989. * Unlocked helper function which allows a PHY register to be modified as
  990. * new register value = (old register value & ~mask) | set
  991. *
  992. * Returns negative errno, 0 if there was no change, and 1 in case of change
  993. */
  994. static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum,
  995. u16 mask, u16 set)
  996. {
  997. return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr,
  998. regnum, mask, set);
  999. }
  1000. /*
  1001. * phy_read_mmd - Convenience function for reading a register
  1002. * from an MMD on a given PHY.
  1003. */
  1004. int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
  1005. /**
  1006. * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a
  1007. * condition is met or a timeout occurs
  1008. *
  1009. * @phydev: The phy_device struct
  1010. * @devaddr: The MMD to read from
  1011. * @regnum: The register on the MMD to read
  1012. * @val: Variable to read the register into
  1013. * @cond: Break condition (usually involving @val)
  1014. * @sleep_us: Maximum time to sleep between reads in us (0
  1015. * tight-loops). Should be less than ~20ms since usleep_range
  1016. * is used (see Documentation/timers/timers-howto.rst).
  1017. * @timeout_us: Timeout in us, 0 means never timeout
  1018. * @sleep_before_read: if it is true, sleep @sleep_us before read.
  1019. * Returns 0 on success and -ETIMEDOUT upon a timeout. In either
  1020. * case, the last read value at @args is stored in @val. Must not
  1021. * be called from atomic context if sleep_us or timeout_us are used.
  1022. */
  1023. #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \
  1024. sleep_us, timeout_us, sleep_before_read) \
  1025. ({ \
  1026. int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \
  1027. sleep_us, timeout_us, sleep_before_read, \
  1028. phydev, devaddr, regnum); \
  1029. if (val < 0) \
  1030. __ret = val; \
  1031. if (__ret) \
  1032. phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
  1033. __ret; \
  1034. })
  1035. /*
  1036. * __phy_read_mmd - Convenience function for reading a register
  1037. * from an MMD on a given PHY.
  1038. */
  1039. int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
  1040. /*
  1041. * phy_write_mmd - Convenience function for writing a register
  1042. * on an MMD on a given PHY.
  1043. */
  1044. int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
  1045. /*
  1046. * __phy_write_mmd - Convenience function for writing a register
  1047. * on an MMD on a given PHY.
  1048. */
  1049. int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
  1050. int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
  1051. u16 set);
  1052. int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
  1053. u16 set);
  1054. int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
  1055. int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
  1056. int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
  1057. u16 mask, u16 set);
  1058. int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
  1059. u16 mask, u16 set);
  1060. int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
  1061. u16 mask, u16 set);
  1062. int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
  1063. u16 mask, u16 set);
  1064. /**
  1065. * __phy_set_bits - Convenience function for setting bits in a PHY register
  1066. * @phydev: the phy_device struct
  1067. * @regnum: register number to write
  1068. * @val: bits to set
  1069. *
  1070. * The caller must have taken the MDIO bus lock.
  1071. */
  1072. static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
  1073. {
  1074. return __phy_modify(phydev, regnum, 0, val);
  1075. }
  1076. /**
  1077. * __phy_clear_bits - Convenience function for clearing bits in a PHY register
  1078. * @phydev: the phy_device struct
  1079. * @regnum: register number to write
  1080. * @val: bits to clear
  1081. *
  1082. * The caller must have taken the MDIO bus lock.
  1083. */
  1084. static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
  1085. u16 val)
  1086. {
  1087. return __phy_modify(phydev, regnum, val, 0);
  1088. }
  1089. /**
  1090. * phy_set_bits - Convenience function for setting bits in a PHY register
  1091. * @phydev: the phy_device struct
  1092. * @regnum: register number to write
  1093. * @val: bits to set
  1094. */
  1095. static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
  1096. {
  1097. return phy_modify(phydev, regnum, 0, val);
  1098. }
  1099. /**
  1100. * phy_clear_bits - Convenience function for clearing bits in a PHY register
  1101. * @phydev: the phy_device struct
  1102. * @regnum: register number to write
  1103. * @val: bits to clear
  1104. */
  1105. static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
  1106. {
  1107. return phy_modify(phydev, regnum, val, 0);
  1108. }
  1109. /**
  1110. * __phy_set_bits_mmd - Convenience function for setting bits in a register
  1111. * on MMD
  1112. * @phydev: the phy_device struct
  1113. * @devad: the MMD containing register to modify
  1114. * @regnum: register number to modify
  1115. * @val: bits to set
  1116. *
  1117. * The caller must have taken the MDIO bus lock.
  1118. */
  1119. static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad,
  1120. u32 regnum, u16 val)
  1121. {
  1122. return __phy_modify_mmd(phydev, devad, regnum, 0, val);
  1123. }
  1124. /**
  1125. * __phy_clear_bits_mmd - Convenience function for clearing bits in a register
  1126. * on MMD
  1127. * @phydev: the phy_device struct
  1128. * @devad: the MMD containing register to modify
  1129. * @regnum: register number to modify
  1130. * @val: bits to clear
  1131. *
  1132. * The caller must have taken the MDIO bus lock.
  1133. */
  1134. static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad,
  1135. u32 regnum, u16 val)
  1136. {
  1137. return __phy_modify_mmd(phydev, devad, regnum, val, 0);
  1138. }
  1139. /**
  1140. * phy_set_bits_mmd - Convenience function for setting bits in a register
  1141. * on MMD
  1142. * @phydev: the phy_device struct
  1143. * @devad: the MMD containing register to modify
  1144. * @regnum: register number to modify
  1145. * @val: bits to set
  1146. */
  1147. static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
  1148. u32 regnum, u16 val)
  1149. {
  1150. return phy_modify_mmd(phydev, devad, regnum, 0, val);
  1151. }
  1152. /**
  1153. * phy_clear_bits_mmd - Convenience function for clearing bits in a register
  1154. * on MMD
  1155. * @phydev: the phy_device struct
  1156. * @devad: the MMD containing register to modify
  1157. * @regnum: register number to modify
  1158. * @val: bits to clear
  1159. */
  1160. static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
  1161. u32 regnum, u16 val)
  1162. {
  1163. return phy_modify_mmd(phydev, devad, regnum, val, 0);
  1164. }
  1165. /**
  1166. * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
  1167. * @phydev: the phy_device struct
  1168. *
  1169. * NOTE: must be kept in sync with addition/removal of PHY_POLL and
  1170. * PHY_MAC_INTERRUPT
  1171. */
  1172. static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
  1173. {
  1174. return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT;
  1175. }
  1176. /**
  1177. * phy_polling_mode - Convenience function for testing whether polling is
  1178. * used to detect PHY status changes
  1179. * @phydev: the phy_device struct
  1180. */
  1181. static inline bool phy_polling_mode(struct phy_device *phydev)
  1182. {
  1183. if (phydev->state == PHY_CABLETEST)
  1184. if (phydev->drv->flags & PHY_POLL_CABLE_TEST)
  1185. return true;
  1186. return phydev->irq == PHY_POLL;
  1187. }
  1188. /**
  1189. * phy_has_hwtstamp - Tests whether a PHY time stamp configuration.
  1190. * @phydev: the phy_device struct
  1191. */
  1192. static inline bool phy_has_hwtstamp(struct phy_device *phydev)
  1193. {
  1194. return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp;
  1195. }
  1196. /**
  1197. * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping.
  1198. * @phydev: the phy_device struct
  1199. */
  1200. static inline bool phy_has_rxtstamp(struct phy_device *phydev)
  1201. {
  1202. return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp;
  1203. }
  1204. /**
  1205. * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or
  1206. * PTP hardware clock capabilities.
  1207. * @phydev: the phy_device struct
  1208. */
  1209. static inline bool phy_has_tsinfo(struct phy_device *phydev)
  1210. {
  1211. return phydev && phydev->mii_ts && phydev->mii_ts->ts_info;
  1212. }
  1213. /**
  1214. * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping.
  1215. * @phydev: the phy_device struct
  1216. */
  1217. static inline bool phy_has_txtstamp(struct phy_device *phydev)
  1218. {
  1219. return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp;
  1220. }
  1221. static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr)
  1222. {
  1223. return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr);
  1224. }
  1225. static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb,
  1226. int type)
  1227. {
  1228. return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type);
  1229. }
  1230. static inline int phy_ts_info(struct phy_device *phydev,
  1231. struct ethtool_ts_info *tsinfo)
  1232. {
  1233. return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo);
  1234. }
  1235. static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb,
  1236. int type)
  1237. {
  1238. phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type);
  1239. }
  1240. /**
  1241. * phy_is_internal - Convenience function for testing if a PHY is internal
  1242. * @phydev: the phy_device struct
  1243. */
  1244. static inline bool phy_is_internal(struct phy_device *phydev)
  1245. {
  1246. return phydev->is_internal;
  1247. }
  1248. /**
  1249. * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module
  1250. * @phydev: the phy_device struct
  1251. */
  1252. static inline bool phy_on_sfp(struct phy_device *phydev)
  1253. {
  1254. return phydev->is_on_sfp_module;
  1255. }
  1256. /**
  1257. * phy_interface_mode_is_rgmii - Convenience function for testing if a
  1258. * PHY interface mode is RGMII (all variants)
  1259. * @mode: the &phy_interface_t enum
  1260. */
  1261. static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
  1262. {
  1263. return mode >= PHY_INTERFACE_MODE_RGMII &&
  1264. mode <= PHY_INTERFACE_MODE_RGMII_TXID;
  1265. };
  1266. /**
  1267. * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z
  1268. * negotiation
  1269. * @mode: one of &enum phy_interface_t
  1270. *
  1271. * Returns true if the PHY interface mode uses the 16-bit negotiation
  1272. * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
  1273. */
  1274. static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
  1275. {
  1276. return mode == PHY_INTERFACE_MODE_1000BASEX ||
  1277. mode == PHY_INTERFACE_MODE_2500BASEX;
  1278. }
  1279. /**
  1280. * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
  1281. * is RGMII (all variants)
  1282. * @phydev: the phy_device struct
  1283. */
  1284. static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
  1285. {
  1286. return phy_interface_mode_is_rgmii(phydev->interface);
  1287. };
  1288. /**
  1289. * phy_is_pseudo_fixed_link - Convenience function for testing if this
  1290. * PHY is the CPU port facing side of an Ethernet switch, or similar.
  1291. * @phydev: the phy_device struct
  1292. */
  1293. static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
  1294. {
  1295. return phydev->is_pseudo_fixed_link;
  1296. }
  1297. int phy_save_page(struct phy_device *phydev);
  1298. int phy_select_page(struct phy_device *phydev, int page);
  1299. int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
  1300. int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
  1301. int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
  1302. int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
  1303. u16 mask, u16 set);
  1304. int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
  1305. u16 mask, u16 set);
  1306. struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id,
  1307. bool is_c45,
  1308. struct phy_c45_device_ids *c45_ids);
  1309. #if IS_ENABLED(CONFIG_PHYLIB)
  1310. int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id);
  1311. struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode);
  1312. struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode);
  1313. struct phy_device *device_phy_find_device(struct device *dev);
  1314. struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode);
  1315. struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
  1316. int phy_device_register(struct phy_device *phy);
  1317. void phy_device_free(struct phy_device *phydev);
  1318. #else
  1319. static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id)
  1320. {
  1321. return 0;
  1322. }
  1323. static inline
  1324. struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode)
  1325. {
  1326. return 0;
  1327. }
  1328. static inline
  1329. struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode)
  1330. {
  1331. return NULL;
  1332. }
  1333. static inline struct phy_device *device_phy_find_device(struct device *dev)
  1334. {
  1335. return NULL;
  1336. }
  1337. static inline
  1338. struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode)
  1339. {
  1340. return NULL;
  1341. }
  1342. static inline
  1343. struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
  1344. {
  1345. return NULL;
  1346. }
  1347. static inline int phy_device_register(struct phy_device *phy)
  1348. {
  1349. return 0;
  1350. }
  1351. static inline void phy_device_free(struct phy_device *phydev) { }
  1352. #endif /* CONFIG_PHYLIB */
  1353. void phy_device_remove(struct phy_device *phydev);
  1354. int phy_get_c45_ids(struct phy_device *phydev);
  1355. int phy_init_hw(struct phy_device *phydev);
  1356. int phy_suspend(struct phy_device *phydev);
  1357. int phy_resume(struct phy_device *phydev);
  1358. int __phy_resume(struct phy_device *phydev);
  1359. int phy_loopback(struct phy_device *phydev, bool enable);
  1360. void phy_sfp_attach(void *upstream, struct sfp_bus *bus);
  1361. void phy_sfp_detach(void *upstream, struct sfp_bus *bus);
  1362. int phy_sfp_probe(struct phy_device *phydev,
  1363. const struct sfp_upstream_ops *ops);
  1364. struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
  1365. phy_interface_t interface);
  1366. struct phy_device *phy_find_first(struct mii_bus *bus);
  1367. int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
  1368. u32 flags, phy_interface_t interface);
  1369. int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
  1370. void (*handler)(struct net_device *),
  1371. phy_interface_t interface);
  1372. struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
  1373. void (*handler)(struct net_device *),
  1374. phy_interface_t interface);
  1375. void phy_disconnect(struct phy_device *phydev);
  1376. void phy_detach(struct phy_device *phydev);
  1377. void phy_start(struct phy_device *phydev);
  1378. void phy_stop(struct phy_device *phydev);
  1379. int phy_config_aneg(struct phy_device *phydev);
  1380. int phy_start_aneg(struct phy_device *phydev);
  1381. int phy_aneg_done(struct phy_device *phydev);
  1382. int phy_speed_down(struct phy_device *phydev, bool sync);
  1383. int phy_speed_up(struct phy_device *phydev);
  1384. int phy_restart_aneg(struct phy_device *phydev);
  1385. int phy_reset_after_clk_enable(struct phy_device *phydev);
  1386. #if IS_ENABLED(CONFIG_PHYLIB)
  1387. int phy_start_cable_test(struct phy_device *phydev,
  1388. struct netlink_ext_ack *extack);
  1389. int phy_start_cable_test_tdr(struct phy_device *phydev,
  1390. struct netlink_ext_ack *extack,
  1391. const struct phy_tdr_config *config);
  1392. #else
  1393. static inline
  1394. int phy_start_cable_test(struct phy_device *phydev,
  1395. struct netlink_ext_ack *extack)
  1396. {
  1397. NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
  1398. return -EOPNOTSUPP;
  1399. }
  1400. static inline
  1401. int phy_start_cable_test_tdr(struct phy_device *phydev,
  1402. struct netlink_ext_ack *extack,
  1403. const struct phy_tdr_config *config)
  1404. {
  1405. NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
  1406. return -EOPNOTSUPP;
  1407. }
  1408. #endif
  1409. int phy_cable_test_result(struct phy_device *phydev, u8 pair, u16 result);
  1410. int phy_cable_test_fault_length(struct phy_device *phydev, u8 pair,
  1411. u16 cm);
  1412. static inline void phy_device_reset(struct phy_device *phydev, int value)
  1413. {
  1414. mdio_device_reset(&phydev->mdio, value);
  1415. }
  1416. #define phydev_err(_phydev, format, args...) \
  1417. dev_err(&_phydev->mdio.dev, format, ##args)
  1418. #define phydev_err_probe(_phydev, err, format, args...) \
  1419. dev_err_probe(&_phydev->mdio.dev, err, format, ##args)
  1420. #define phydev_info(_phydev, format, args...) \
  1421. dev_info(&_phydev->mdio.dev, format, ##args)
  1422. #define phydev_warn(_phydev, format, args...) \
  1423. dev_warn(&_phydev->mdio.dev, format, ##args)
  1424. #define phydev_dbg(_phydev, format, args...) \
  1425. dev_dbg(&_phydev->mdio.dev, format, ##args)
  1426. static inline const char *phydev_name(const struct phy_device *phydev)
  1427. {
  1428. return dev_name(&phydev->mdio.dev);
  1429. }
  1430. static inline void phy_lock_mdio_bus(struct phy_device *phydev)
  1431. {
  1432. mutex_lock(&phydev->mdio.bus->mdio_lock);
  1433. }
  1434. static inline void phy_unlock_mdio_bus(struct phy_device *phydev)
  1435. {
  1436. mutex_unlock(&phydev->mdio.bus->mdio_lock);
  1437. }
  1438. void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
  1439. __printf(2, 3);
  1440. char *phy_attached_info_irq(struct phy_device *phydev)
  1441. __malloc;
  1442. void phy_attached_info(struct phy_device *phydev);
  1443. /* Clause 22 PHY */
  1444. int genphy_read_abilities(struct phy_device *phydev);
  1445. int genphy_setup_forced(struct phy_device *phydev);
  1446. int genphy_restart_aneg(struct phy_device *phydev);
  1447. int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart);
  1448. int genphy_config_eee_advert(struct phy_device *phydev);
  1449. int __genphy_config_aneg(struct phy_device *phydev, bool changed);
  1450. int genphy_aneg_done(struct phy_device *phydev);
  1451. int genphy_update_link(struct phy_device *phydev);
  1452. int genphy_read_lpa(struct phy_device *phydev);
  1453. int genphy_read_status_fixed(struct phy_device *phydev);
  1454. int genphy_read_status(struct phy_device *phydev);
  1455. int genphy_read_master_slave(struct phy_device *phydev);
  1456. int genphy_suspend(struct phy_device *phydev);
  1457. int genphy_resume(struct phy_device *phydev);
  1458. int genphy_loopback(struct phy_device *phydev, bool enable);
  1459. int genphy_soft_reset(struct phy_device *phydev);
  1460. irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev);
  1461. static inline int genphy_config_aneg(struct phy_device *phydev)
  1462. {
  1463. return __genphy_config_aneg(phydev, false);
  1464. }
  1465. static inline int genphy_no_config_intr(struct phy_device *phydev)
  1466. {
  1467. return 0;
  1468. }
  1469. int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
  1470. u16 regnum);
  1471. int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
  1472. u16 regnum, u16 val);
  1473. /* Clause 37 */
  1474. int genphy_c37_config_aneg(struct phy_device *phydev);
  1475. int genphy_c37_read_status(struct phy_device *phydev);
  1476. /* Clause 45 PHY */
  1477. int genphy_c45_restart_aneg(struct phy_device *phydev);
  1478. int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
  1479. int genphy_c45_aneg_done(struct phy_device *phydev);
  1480. int genphy_c45_read_link(struct phy_device *phydev);
  1481. int genphy_c45_read_lpa(struct phy_device *phydev);
  1482. int genphy_c45_read_pma(struct phy_device *phydev);
  1483. int genphy_c45_pma_setup_forced(struct phy_device *phydev);
  1484. int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev);
  1485. int genphy_c45_an_config_aneg(struct phy_device *phydev);
  1486. int genphy_c45_an_disable_aneg(struct phy_device *phydev);
  1487. int genphy_c45_read_mdix(struct phy_device *phydev);
  1488. int genphy_c45_pma_read_abilities(struct phy_device *phydev);
  1489. int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev);
  1490. int genphy_c45_read_status(struct phy_device *phydev);
  1491. int genphy_c45_baset1_read_status(struct phy_device *phydev);
  1492. int genphy_c45_config_aneg(struct phy_device *phydev);
  1493. int genphy_c45_loopback(struct phy_device *phydev, bool enable);
  1494. int genphy_c45_pma_resume(struct phy_device *phydev);
  1495. int genphy_c45_pma_suspend(struct phy_device *phydev);
  1496. int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable);
  1497. /* Generic C45 PHY driver */
  1498. extern struct phy_driver genphy_c45_driver;
  1499. /* The gen10g_* functions are the old Clause 45 stub */
  1500. int gen10g_config_aneg(struct phy_device *phydev);
  1501. static inline int phy_read_status(struct phy_device *phydev)
  1502. {
  1503. if (!phydev->drv)
  1504. return -EIO;
  1505. if (phydev->drv->read_status)
  1506. return phydev->drv->read_status(phydev);
  1507. else
  1508. return genphy_read_status(phydev);
  1509. }
  1510. void phy_driver_unregister(struct phy_driver *drv);
  1511. void phy_drivers_unregister(struct phy_driver *drv, int n);
  1512. int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
  1513. int phy_drivers_register(struct phy_driver *new_driver, int n,
  1514. struct module *owner);
  1515. void phy_error(struct phy_device *phydev);
  1516. void phy_state_machine(struct work_struct *work);
  1517. void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies);
  1518. void phy_trigger_machine(struct phy_device *phydev);
  1519. void phy_mac_interrupt(struct phy_device *phydev);
  1520. void phy_start_machine(struct phy_device *phydev);
  1521. void phy_stop_machine(struct phy_device *phydev);
  1522. void phy_ethtool_ksettings_get(struct phy_device *phydev,
  1523. struct ethtool_link_ksettings *cmd);
  1524. int phy_ethtool_ksettings_set(struct phy_device *phydev,
  1525. const struct ethtool_link_ksettings *cmd);
  1526. int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
  1527. int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
  1528. int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd);
  1529. int phy_disable_interrupts(struct phy_device *phydev);
  1530. void phy_request_interrupt(struct phy_device *phydev);
  1531. void phy_free_interrupt(struct phy_device *phydev);
  1532. void phy_print_status(struct phy_device *phydev);
  1533. int phy_get_rate_matching(struct phy_device *phydev,
  1534. phy_interface_t iface);
  1535. void phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
  1536. void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
  1537. void phy_advertise_supported(struct phy_device *phydev);
  1538. void phy_support_sym_pause(struct phy_device *phydev);
  1539. void phy_support_asym_pause(struct phy_device *phydev);
  1540. void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
  1541. bool autoneg);
  1542. void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
  1543. bool phy_validate_pause(struct phy_device *phydev,
  1544. struct ethtool_pauseparam *pp);
  1545. void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause);
  1546. s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev,
  1547. const int *delay_values, int size, bool is_rx);
  1548. void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv,
  1549. bool *tx_pause, bool *rx_pause);
  1550. int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
  1551. int (*run)(struct phy_device *));
  1552. int phy_register_fixup_for_id(const char *bus_id,
  1553. int (*run)(struct phy_device *));
  1554. int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
  1555. int (*run)(struct phy_device *));
  1556. int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
  1557. int phy_unregister_fixup_for_id(const char *bus_id);
  1558. int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
  1559. int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
  1560. int phy_get_eee_err(struct phy_device *phydev);
  1561. int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
  1562. int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
  1563. int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
  1564. void phy_ethtool_get_wol(struct phy_device *phydev,
  1565. struct ethtool_wolinfo *wol);
  1566. int phy_ethtool_get_link_ksettings(struct net_device *ndev,
  1567. struct ethtool_link_ksettings *cmd);
  1568. int phy_ethtool_set_link_ksettings(struct net_device *ndev,
  1569. const struct ethtool_link_ksettings *cmd);
  1570. int phy_ethtool_nway_reset(struct net_device *ndev);
  1571. int phy_package_join(struct phy_device *phydev, int addr, size_t priv_size);
  1572. void phy_package_leave(struct phy_device *phydev);
  1573. int devm_phy_package_join(struct device *dev, struct phy_device *phydev,
  1574. int addr, size_t priv_size);
  1575. #if IS_ENABLED(CONFIG_PHYLIB)
  1576. int __init mdio_bus_init(void);
  1577. void mdio_bus_exit(void);
  1578. #endif
  1579. int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data);
  1580. int phy_ethtool_get_sset_count(struct phy_device *phydev);
  1581. int phy_ethtool_get_stats(struct phy_device *phydev,
  1582. struct ethtool_stats *stats, u64 *data);
  1583. static inline int phy_package_read(struct phy_device *phydev, u32 regnum)
  1584. {
  1585. struct phy_package_shared *shared = phydev->shared;
  1586. if (!shared)
  1587. return -EIO;
  1588. return mdiobus_read(phydev->mdio.bus, shared->addr, regnum);
  1589. }
  1590. static inline int __phy_package_read(struct phy_device *phydev, u32 regnum)
  1591. {
  1592. struct phy_package_shared *shared = phydev->shared;
  1593. if (!shared)
  1594. return -EIO;
  1595. return __mdiobus_read(phydev->mdio.bus, shared->addr, regnum);
  1596. }
  1597. static inline int phy_package_write(struct phy_device *phydev,
  1598. u32 regnum, u16 val)
  1599. {
  1600. struct phy_package_shared *shared = phydev->shared;
  1601. if (!shared)
  1602. return -EIO;
  1603. return mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val);
  1604. }
  1605. static inline int __phy_package_write(struct phy_device *phydev,
  1606. u32 regnum, u16 val)
  1607. {
  1608. struct phy_package_shared *shared = phydev->shared;
  1609. if (!shared)
  1610. return -EIO;
  1611. return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val);
  1612. }
  1613. static inline bool __phy_package_set_once(struct phy_device *phydev,
  1614. unsigned int b)
  1615. {
  1616. struct phy_package_shared *shared = phydev->shared;
  1617. if (!shared)
  1618. return false;
  1619. return !test_and_set_bit(b, &shared->flags);
  1620. }
  1621. static inline bool phy_package_init_once(struct phy_device *phydev)
  1622. {
  1623. return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE);
  1624. }
  1625. static inline bool phy_package_probe_once(struct phy_device *phydev)
  1626. {
  1627. return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE);
  1628. }
  1629. extern struct bus_type mdio_bus_type;
  1630. struct mdio_board_info {
  1631. const char *bus_id;
  1632. char modalias[MDIO_NAME_SIZE];
  1633. int mdio_addr;
  1634. const void *platform_data;
  1635. };
  1636. #if IS_ENABLED(CONFIG_MDIO_DEVICE)
  1637. int mdiobus_register_board_info(const struct mdio_board_info *info,
  1638. unsigned int n);
  1639. #else
  1640. static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
  1641. unsigned int n)
  1642. {
  1643. return 0;
  1644. }
  1645. #endif
  1646. /**
  1647. * phy_module_driver() - Helper macro for registering PHY drivers
  1648. * @__phy_drivers: array of PHY drivers to register
  1649. * @__count: Numbers of members in array
  1650. *
  1651. * Helper macro for PHY drivers which do not do anything special in module
  1652. * init/exit. Each module may only use this macro once, and calling it
  1653. * replaces module_init() and module_exit().
  1654. */
  1655. #define phy_module_driver(__phy_drivers, __count) \
  1656. static int __init phy_module_init(void) \
  1657. { \
  1658. return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
  1659. } \
  1660. module_init(phy_module_init); \
  1661. static void __exit phy_module_exit(void) \
  1662. { \
  1663. phy_drivers_unregister(__phy_drivers, __count); \
  1664. } \
  1665. module_exit(phy_module_exit)
  1666. #define module_phy_driver(__phy_drivers) \
  1667. phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
  1668. bool phy_driver_is_genphy(struct phy_device *phydev);
  1669. bool phy_driver_is_genphy_10g(struct phy_device *phydev);
  1670. #endif /* __PHY_H */