rk808.h 23 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Register definitions for Rockchip's RK808/RK818 PMIC
  4. *
  5. * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
  6. *
  7. * Author: Chris Zhong <[email protected]>
  8. * Author: Zhang Qing <[email protected]>
  9. *
  10. * Copyright (C) 2016 PHYTEC Messtechnik GmbH
  11. *
  12. * Author: Wadim Egorov <[email protected]>
  13. */
  14. #ifndef __LINUX_REGULATOR_RK808_H
  15. #define __LINUX_REGULATOR_RK808_H
  16. #include <linux/regulator/machine.h>
  17. #include <linux/regmap.h>
  18. /*
  19. * rk808 Global Register Map.
  20. */
  21. #define RK808_DCDC1 0 /* (0+RK808_START) */
  22. #define RK808_LDO1 4 /* (4+RK808_START) */
  23. #define RK808_NUM_REGULATORS 14
  24. enum rk808_reg {
  25. RK808_ID_DCDC1,
  26. RK808_ID_DCDC2,
  27. RK808_ID_DCDC3,
  28. RK808_ID_DCDC4,
  29. RK808_ID_LDO1,
  30. RK808_ID_LDO2,
  31. RK808_ID_LDO3,
  32. RK808_ID_LDO4,
  33. RK808_ID_LDO5,
  34. RK808_ID_LDO6,
  35. RK808_ID_LDO7,
  36. RK808_ID_LDO8,
  37. RK808_ID_SWITCH1,
  38. RK808_ID_SWITCH2,
  39. };
  40. #define RK808_SECONDS_REG 0x00
  41. #define RK808_MINUTES_REG 0x01
  42. #define RK808_HOURS_REG 0x02
  43. #define RK808_DAYS_REG 0x03
  44. #define RK808_MONTHS_REG 0x04
  45. #define RK808_YEARS_REG 0x05
  46. #define RK808_WEEKS_REG 0x06
  47. #define RK808_ALARM_SECONDS_REG 0x08
  48. #define RK808_ALARM_MINUTES_REG 0x09
  49. #define RK808_ALARM_HOURS_REG 0x0a
  50. #define RK808_ALARM_DAYS_REG 0x0b
  51. #define RK808_ALARM_MONTHS_REG 0x0c
  52. #define RK808_ALARM_YEARS_REG 0x0d
  53. #define RK808_RTC_CTRL_REG 0x10
  54. #define RK808_RTC_STATUS_REG 0x11
  55. #define RK808_RTC_INT_REG 0x12
  56. #define RK808_RTC_COMP_LSB_REG 0x13
  57. #define RK808_RTC_COMP_MSB_REG 0x14
  58. #define RK808_ID_MSB 0x17
  59. #define RK808_ID_LSB 0x18
  60. #define RK808_CLK32OUT_REG 0x20
  61. #define RK808_VB_MON_REG 0x21
  62. #define RK808_THERMAL_REG 0x22
  63. #define RK808_DCDC_EN_REG 0x23
  64. #define RK808_LDO_EN_REG 0x24
  65. #define RK808_SLEEP_SET_OFF_REG1 0x25
  66. #define RK808_SLEEP_SET_OFF_REG2 0x26
  67. #define RK808_DCDC_UV_STS_REG 0x27
  68. #define RK808_DCDC_UV_ACT_REG 0x28
  69. #define RK808_LDO_UV_STS_REG 0x29
  70. #define RK808_LDO_UV_ACT_REG 0x2a
  71. #define RK808_DCDC_PG_REG 0x2b
  72. #define RK808_LDO_PG_REG 0x2c
  73. #define RK808_VOUT_MON_TDB_REG 0x2d
  74. #define RK808_BUCK1_CONFIG_REG 0x2e
  75. #define RK808_BUCK1_ON_VSEL_REG 0x2f
  76. #define RK808_BUCK1_SLP_VSEL_REG 0x30
  77. #define RK808_BUCK1_DVS_VSEL_REG 0x31
  78. #define RK808_BUCK2_CONFIG_REG 0x32
  79. #define RK808_BUCK2_ON_VSEL_REG 0x33
  80. #define RK808_BUCK2_SLP_VSEL_REG 0x34
  81. #define RK808_BUCK2_DVS_VSEL_REG 0x35
  82. #define RK808_BUCK3_CONFIG_REG 0x36
  83. #define RK808_BUCK4_CONFIG_REG 0x37
  84. #define RK808_BUCK4_ON_VSEL_REG 0x38
  85. #define RK808_BUCK4_SLP_VSEL_REG 0x39
  86. #define RK808_BOOST_CONFIG_REG 0x3a
  87. #define RK808_LDO1_ON_VSEL_REG 0x3b
  88. #define RK808_LDO1_SLP_VSEL_REG 0x3c
  89. #define RK808_LDO2_ON_VSEL_REG 0x3d
  90. #define RK808_LDO2_SLP_VSEL_REG 0x3e
  91. #define RK808_LDO3_ON_VSEL_REG 0x3f
  92. #define RK808_LDO3_SLP_VSEL_REG 0x40
  93. #define RK808_LDO4_ON_VSEL_REG 0x41
  94. #define RK808_LDO4_SLP_VSEL_REG 0x42
  95. #define RK808_LDO5_ON_VSEL_REG 0x43
  96. #define RK808_LDO5_SLP_VSEL_REG 0x44
  97. #define RK808_LDO6_ON_VSEL_REG 0x45
  98. #define RK808_LDO6_SLP_VSEL_REG 0x46
  99. #define RK808_LDO7_ON_VSEL_REG 0x47
  100. #define RK808_LDO7_SLP_VSEL_REG 0x48
  101. #define RK808_LDO8_ON_VSEL_REG 0x49
  102. #define RK808_LDO8_SLP_VSEL_REG 0x4a
  103. #define RK808_DEVCTRL_REG 0x4b
  104. #define RK808_INT_STS_REG1 0x4c
  105. #define RK808_INT_STS_MSK_REG1 0x4d
  106. #define RK808_INT_STS_REG2 0x4e
  107. #define RK808_INT_STS_MSK_REG2 0x4f
  108. #define RK808_IO_POL_REG 0x50
  109. /* RK818 */
  110. #define RK818_DCDC1 0
  111. #define RK818_LDO1 4
  112. #define RK818_NUM_REGULATORS 17
  113. enum rk818_reg {
  114. RK818_ID_DCDC1,
  115. RK818_ID_DCDC2,
  116. RK818_ID_DCDC3,
  117. RK818_ID_DCDC4,
  118. RK818_ID_BOOST,
  119. RK818_ID_LDO1,
  120. RK818_ID_LDO2,
  121. RK818_ID_LDO3,
  122. RK818_ID_LDO4,
  123. RK818_ID_LDO5,
  124. RK818_ID_LDO6,
  125. RK818_ID_LDO7,
  126. RK818_ID_LDO8,
  127. RK818_ID_LDO9,
  128. RK818_ID_SWITCH,
  129. RK818_ID_HDMI_SWITCH,
  130. RK818_ID_OTG_SWITCH,
  131. };
  132. #define RK818_DCDC_EN_REG 0x23
  133. #define RK818_LDO_EN_REG 0x24
  134. #define RK818_SLEEP_SET_OFF_REG1 0x25
  135. #define RK818_SLEEP_SET_OFF_REG2 0x26
  136. #define RK818_DCDC_UV_STS_REG 0x27
  137. #define RK818_DCDC_UV_ACT_REG 0x28
  138. #define RK818_LDO_UV_STS_REG 0x29
  139. #define RK818_LDO_UV_ACT_REG 0x2a
  140. #define RK818_DCDC_PG_REG 0x2b
  141. #define RK818_LDO_PG_REG 0x2c
  142. #define RK818_VOUT_MON_TDB_REG 0x2d
  143. #define RK818_BUCK1_CONFIG_REG 0x2e
  144. #define RK818_BUCK1_ON_VSEL_REG 0x2f
  145. #define RK818_BUCK1_SLP_VSEL_REG 0x30
  146. #define RK818_BUCK2_CONFIG_REG 0x32
  147. #define RK818_BUCK2_ON_VSEL_REG 0x33
  148. #define RK818_BUCK2_SLP_VSEL_REG 0x34
  149. #define RK818_BUCK3_CONFIG_REG 0x36
  150. #define RK818_BUCK4_CONFIG_REG 0x37
  151. #define RK818_BUCK4_ON_VSEL_REG 0x38
  152. #define RK818_BUCK4_SLP_VSEL_REG 0x39
  153. #define RK818_BOOST_CONFIG_REG 0x3a
  154. #define RK818_LDO1_ON_VSEL_REG 0x3b
  155. #define RK818_LDO1_SLP_VSEL_REG 0x3c
  156. #define RK818_LDO2_ON_VSEL_REG 0x3d
  157. #define RK818_LDO2_SLP_VSEL_REG 0x3e
  158. #define RK818_LDO3_ON_VSEL_REG 0x3f
  159. #define RK818_LDO3_SLP_VSEL_REG 0x40
  160. #define RK818_LDO4_ON_VSEL_REG 0x41
  161. #define RK818_LDO4_SLP_VSEL_REG 0x42
  162. #define RK818_LDO5_ON_VSEL_REG 0x43
  163. #define RK818_LDO5_SLP_VSEL_REG 0x44
  164. #define RK818_LDO6_ON_VSEL_REG 0x45
  165. #define RK818_LDO6_SLP_VSEL_REG 0x46
  166. #define RK818_LDO7_ON_VSEL_REG 0x47
  167. #define RK818_LDO7_SLP_VSEL_REG 0x48
  168. #define RK818_LDO8_ON_VSEL_REG 0x49
  169. #define RK818_LDO8_SLP_VSEL_REG 0x4a
  170. #define RK818_BOOST_LDO9_ON_VSEL_REG 0x54
  171. #define RK818_BOOST_LDO9_SLP_VSEL_REG 0x55
  172. #define RK818_DEVCTRL_REG 0x4b
  173. #define RK818_INT_STS_REG1 0X4c
  174. #define RK818_INT_STS_MSK_REG1 0x4d
  175. #define RK818_INT_STS_REG2 0x4e
  176. #define RK818_INT_STS_MSK_REG2 0x4f
  177. #define RK818_IO_POL_REG 0x50
  178. #define RK818_H5V_EN_REG 0x52
  179. #define RK818_SLEEP_SET_OFF_REG3 0x53
  180. #define RK818_BOOST_LDO9_ON_VSEL_REG 0x54
  181. #define RK818_BOOST_LDO9_SLP_VSEL_REG 0x55
  182. #define RK818_BOOST_CTRL_REG 0x56
  183. #define RK818_DCDC_ILMAX 0x90
  184. #define RK818_USB_CTRL_REG 0xa1
  185. #define RK818_H5V_EN BIT(0)
  186. #define RK818_REF_RDY_CTRL BIT(1)
  187. #define RK818_USB_ILIM_SEL_MASK 0xf
  188. #define RK818_USB_ILMIN_2000MA 0x7
  189. #define RK818_USB_CHG_SD_VSEL_MASK 0x70
  190. /* RK805 */
  191. enum rk805_reg {
  192. RK805_ID_DCDC1,
  193. RK805_ID_DCDC2,
  194. RK805_ID_DCDC3,
  195. RK805_ID_DCDC4,
  196. RK805_ID_LDO1,
  197. RK805_ID_LDO2,
  198. RK805_ID_LDO3,
  199. };
  200. /* CONFIG REGISTER */
  201. #define RK805_VB_MON_REG 0x21
  202. #define RK805_THERMAL_REG 0x22
  203. /* POWER CHANNELS ENABLE REGISTER */
  204. #define RK805_DCDC_EN_REG 0x23
  205. #define RK805_SLP_DCDC_EN_REG 0x25
  206. #define RK805_SLP_LDO_EN_REG 0x26
  207. #define RK805_LDO_EN_REG 0x27
  208. /* BUCK AND LDO CONFIG REGISTER */
  209. #define RK805_BUCK_LDO_SLP_LP_EN_REG 0x2A
  210. #define RK805_BUCK1_CONFIG_REG 0x2E
  211. #define RK805_BUCK1_ON_VSEL_REG 0x2F
  212. #define RK805_BUCK1_SLP_VSEL_REG 0x30
  213. #define RK805_BUCK2_CONFIG_REG 0x32
  214. #define RK805_BUCK2_ON_VSEL_REG 0x33
  215. #define RK805_BUCK2_SLP_VSEL_REG 0x34
  216. #define RK805_BUCK3_CONFIG_REG 0x36
  217. #define RK805_BUCK4_CONFIG_REG 0x37
  218. #define RK805_BUCK4_ON_VSEL_REG 0x38
  219. #define RK805_BUCK4_SLP_VSEL_REG 0x39
  220. #define RK805_LDO1_ON_VSEL_REG 0x3B
  221. #define RK805_LDO1_SLP_VSEL_REG 0x3C
  222. #define RK805_LDO2_ON_VSEL_REG 0x3D
  223. #define RK805_LDO2_SLP_VSEL_REG 0x3E
  224. #define RK805_LDO3_ON_VSEL_REG 0x3F
  225. #define RK805_LDO3_SLP_VSEL_REG 0x40
  226. /* INTERRUPT REGISTER */
  227. #define RK805_PWRON_LP_INT_TIME_REG 0x47
  228. #define RK805_PWRON_DB_REG 0x48
  229. #define RK805_DEV_CTRL_REG 0x4B
  230. #define RK805_INT_STS_REG 0x4C
  231. #define RK805_INT_STS_MSK_REG 0x4D
  232. #define RK805_GPIO_IO_POL_REG 0x50
  233. #define RK805_OUT_REG 0x52
  234. #define RK805_ON_SOURCE_REG 0xAE
  235. #define RK805_OFF_SOURCE_REG 0xAF
  236. #define RK805_NUM_REGULATORS 7
  237. #define RK805_PWRON_FALL_RISE_INT_EN 0x0
  238. #define RK805_PWRON_FALL_RISE_INT_MSK 0x81
  239. /* RK805 IRQ Definitions */
  240. #define RK805_IRQ_PWRON_RISE 0
  241. #define RK805_IRQ_VB_LOW 1
  242. #define RK805_IRQ_PWRON 2
  243. #define RK805_IRQ_PWRON_LP 3
  244. #define RK805_IRQ_HOTDIE 4
  245. #define RK805_IRQ_RTC_ALARM 5
  246. #define RK805_IRQ_RTC_PERIOD 6
  247. #define RK805_IRQ_PWRON_FALL 7
  248. #define RK805_IRQ_PWRON_RISE_MSK BIT(0)
  249. #define RK805_IRQ_VB_LOW_MSK BIT(1)
  250. #define RK805_IRQ_PWRON_MSK BIT(2)
  251. #define RK805_IRQ_PWRON_LP_MSK BIT(3)
  252. #define RK805_IRQ_HOTDIE_MSK BIT(4)
  253. #define RK805_IRQ_RTC_ALARM_MSK BIT(5)
  254. #define RK805_IRQ_RTC_PERIOD_MSK BIT(6)
  255. #define RK805_IRQ_PWRON_FALL_MSK BIT(7)
  256. #define RK805_PWR_RISE_INT_STATUS BIT(0)
  257. #define RK805_VB_LOW_INT_STATUS BIT(1)
  258. #define RK805_PWRON_INT_STATUS BIT(2)
  259. #define RK805_PWRON_LP_INT_STATUS BIT(3)
  260. #define RK805_HOTDIE_INT_STATUS BIT(4)
  261. #define RK805_ALARM_INT_STATUS BIT(5)
  262. #define RK805_PERIOD_INT_STATUS BIT(6)
  263. #define RK805_PWR_FALL_INT_STATUS BIT(7)
  264. #define RK805_BUCK1_2_ILMAX_MASK (3 << 6)
  265. #define RK805_BUCK3_4_ILMAX_MASK (3 << 3)
  266. #define RK805_RTC_PERIOD_INT_MASK (1 << 6)
  267. #define RK805_RTC_ALARM_INT_MASK (1 << 5)
  268. #define RK805_INT_ALARM_EN (1 << 3)
  269. #define RK805_INT_TIMER_EN (1 << 2)
  270. /* RK808 IRQ Definitions */
  271. #define RK808_IRQ_VOUT_LO 0
  272. #define RK808_IRQ_VB_LO 1
  273. #define RK808_IRQ_PWRON 2
  274. #define RK808_IRQ_PWRON_LP 3
  275. #define RK808_IRQ_HOTDIE 4
  276. #define RK808_IRQ_RTC_ALARM 5
  277. #define RK808_IRQ_RTC_PERIOD 6
  278. #define RK808_IRQ_PLUG_IN_INT 7
  279. #define RK808_IRQ_PLUG_OUT_INT 8
  280. #define RK808_NUM_IRQ 9
  281. #define RK808_IRQ_VOUT_LO_MSK BIT(0)
  282. #define RK808_IRQ_VB_LO_MSK BIT(1)
  283. #define RK808_IRQ_PWRON_MSK BIT(2)
  284. #define RK808_IRQ_PWRON_LP_MSK BIT(3)
  285. #define RK808_IRQ_HOTDIE_MSK BIT(4)
  286. #define RK808_IRQ_RTC_ALARM_MSK BIT(5)
  287. #define RK808_IRQ_RTC_PERIOD_MSK BIT(6)
  288. #define RK808_IRQ_PLUG_IN_INT_MSK BIT(0)
  289. #define RK808_IRQ_PLUG_OUT_INT_MSK BIT(1)
  290. /* RK818 IRQ Definitions */
  291. #define RK818_IRQ_VOUT_LO 0
  292. #define RK818_IRQ_VB_LO 1
  293. #define RK818_IRQ_PWRON 2
  294. #define RK818_IRQ_PWRON_LP 3
  295. #define RK818_IRQ_HOTDIE 4
  296. #define RK818_IRQ_RTC_ALARM 5
  297. #define RK818_IRQ_RTC_PERIOD 6
  298. #define RK818_IRQ_USB_OV 7
  299. #define RK818_IRQ_PLUG_IN 8
  300. #define RK818_IRQ_PLUG_OUT 9
  301. #define RK818_IRQ_CHG_OK 10
  302. #define RK818_IRQ_CHG_TE 11
  303. #define RK818_IRQ_CHG_TS1 12
  304. #define RK818_IRQ_TS2 13
  305. #define RK818_IRQ_CHG_CVTLIM 14
  306. #define RK818_IRQ_DISCHG_ILIM 15
  307. #define RK818_IRQ_VOUT_LO_MSK BIT(0)
  308. #define RK818_IRQ_VB_LO_MSK BIT(1)
  309. #define RK818_IRQ_PWRON_MSK BIT(2)
  310. #define RK818_IRQ_PWRON_LP_MSK BIT(3)
  311. #define RK818_IRQ_HOTDIE_MSK BIT(4)
  312. #define RK818_IRQ_RTC_ALARM_MSK BIT(5)
  313. #define RK818_IRQ_RTC_PERIOD_MSK BIT(6)
  314. #define RK818_IRQ_USB_OV_MSK BIT(7)
  315. #define RK818_IRQ_PLUG_IN_MSK BIT(0)
  316. #define RK818_IRQ_PLUG_OUT_MSK BIT(1)
  317. #define RK818_IRQ_CHG_OK_MSK BIT(2)
  318. #define RK818_IRQ_CHG_TE_MSK BIT(3)
  319. #define RK818_IRQ_CHG_TS1_MSK BIT(4)
  320. #define RK818_IRQ_TS2_MSK BIT(5)
  321. #define RK818_IRQ_CHG_CVTLIM_MSK BIT(6)
  322. #define RK818_IRQ_DISCHG_ILIM_MSK BIT(7)
  323. #define RK818_NUM_IRQ 16
  324. #define RK808_VBAT_LOW_2V8 0x00
  325. #define RK808_VBAT_LOW_2V9 0x01
  326. #define RK808_VBAT_LOW_3V0 0x02
  327. #define RK808_VBAT_LOW_3V1 0x03
  328. #define RK808_VBAT_LOW_3V2 0x04
  329. #define RK808_VBAT_LOW_3V3 0x05
  330. #define RK808_VBAT_LOW_3V4 0x06
  331. #define RK808_VBAT_LOW_3V5 0x07
  332. #define VBAT_LOW_VOL_MASK (0x07 << 0)
  333. #define EN_VABT_LOW_SHUT_DOWN (0x00 << 4)
  334. #define EN_VBAT_LOW_IRQ (0x1 << 4)
  335. #define VBAT_LOW_ACT_MASK (0x1 << 4)
  336. #define BUCK_ILMIN_MASK (7 << 0)
  337. #define BOOST_ILMIN_MASK (7 << 0)
  338. #define BUCK1_RATE_MASK (3 << 3)
  339. #define BUCK2_RATE_MASK (3 << 3)
  340. #define MASK_ALL 0xff
  341. #define BUCK_UV_ACT_MASK 0x0f
  342. #define BUCK_UV_ACT_DISABLE 0
  343. #define SWITCH2_EN BIT(6)
  344. #define SWITCH1_EN BIT(5)
  345. #define DEV_OFF_RST BIT(3)
  346. #define DEV_RST BIT(2)
  347. #define DEV_OFF BIT(0)
  348. #define RTC_STOP BIT(0)
  349. #define VB_LO_ACT BIT(4)
  350. #define VB_LO_SEL_3500MV (7 << 0)
  351. #define VOUT_LO_INT BIT(0)
  352. #define CLK32KOUT2_EN BIT(0)
  353. #define TEMP115C 0x0c
  354. #define TEMP_HOTDIE_MSK 0x0c
  355. #define SLP_SD_MSK (0x3 << 2)
  356. #define SHUTDOWN_FUN (0x2 << 2)
  357. #define SLEEP_FUN (0x1 << 2)
  358. #define RK8XX_ID_MSK 0xfff0
  359. #define PWM_MODE_MSK BIT(7)
  360. #define FPWM_MODE BIT(7)
  361. #define AUTO_PWM_MODE 0
  362. enum rk817_reg_id {
  363. RK817_ID_DCDC1 = 0,
  364. RK817_ID_DCDC2,
  365. RK817_ID_DCDC3,
  366. RK817_ID_DCDC4,
  367. RK817_ID_LDO1,
  368. RK817_ID_LDO2,
  369. RK817_ID_LDO3,
  370. RK817_ID_LDO4,
  371. RK817_ID_LDO5,
  372. RK817_ID_LDO6,
  373. RK817_ID_LDO7,
  374. RK817_ID_LDO8,
  375. RK817_ID_LDO9,
  376. RK817_ID_BOOST,
  377. RK817_ID_BOOST_OTG_SW,
  378. RK817_NUM_REGULATORS
  379. };
  380. enum rk809_reg_id {
  381. RK809_ID_DCDC5 = RK817_ID_BOOST,
  382. RK809_ID_SW1,
  383. RK809_ID_SW2,
  384. RK809_NUM_REGULATORS
  385. };
  386. #define RK817_SECONDS_REG 0x00
  387. #define RK817_MINUTES_REG 0x01
  388. #define RK817_HOURS_REG 0x02
  389. #define RK817_DAYS_REG 0x03
  390. #define RK817_MONTHS_REG 0x04
  391. #define RK817_YEARS_REG 0x05
  392. #define RK817_WEEKS_REG 0x06
  393. #define RK817_ALARM_SECONDS_REG 0x07
  394. #define RK817_ALARM_MINUTES_REG 0x08
  395. #define RK817_ALARM_HOURS_REG 0x09
  396. #define RK817_ALARM_DAYS_REG 0x0a
  397. #define RK817_ALARM_MONTHS_REG 0x0b
  398. #define RK817_ALARM_YEARS_REG 0x0c
  399. #define RK817_RTC_CTRL_REG 0xd
  400. #define RK817_RTC_STATUS_REG 0xe
  401. #define RK817_RTC_INT_REG 0xf
  402. #define RK817_RTC_COMP_LSB_REG 0x10
  403. #define RK817_RTC_COMP_MSB_REG 0x11
  404. /* RK817 Codec Registers */
  405. #define RK817_CODEC_DTOP_VUCTL 0x12
  406. #define RK817_CODEC_DTOP_VUCTIME 0x13
  407. #define RK817_CODEC_DTOP_LPT_SRST 0x14
  408. #define RK817_CODEC_DTOP_DIGEN_CLKE 0x15
  409. #define RK817_CODEC_AREF_RTCFG0 0x16
  410. #define RK817_CODEC_AREF_RTCFG1 0x17
  411. #define RK817_CODEC_AADC_CFG0 0x18
  412. #define RK817_CODEC_AADC_CFG1 0x19
  413. #define RK817_CODEC_DADC_VOLL 0x1a
  414. #define RK817_CODEC_DADC_VOLR 0x1b
  415. #define RK817_CODEC_DADC_SR_ACL0 0x1e
  416. #define RK817_CODEC_DADC_ALC1 0x1f
  417. #define RK817_CODEC_DADC_ALC2 0x20
  418. #define RK817_CODEC_DADC_NG 0x21
  419. #define RK817_CODEC_DADC_HPF 0x22
  420. #define RK817_CODEC_DADC_RVOLL 0x23
  421. #define RK817_CODEC_DADC_RVOLR 0x24
  422. #define RK817_CODEC_AMIC_CFG0 0x27
  423. #define RK817_CODEC_AMIC_CFG1 0x28
  424. #define RK817_CODEC_DMIC_PGA_GAIN 0x29
  425. #define RK817_CODEC_DMIC_LMT1 0x2a
  426. #define RK817_CODEC_DMIC_LMT2 0x2b
  427. #define RK817_CODEC_DMIC_NG1 0x2c
  428. #define RK817_CODEC_DMIC_NG2 0x2d
  429. #define RK817_CODEC_ADAC_CFG0 0x2e
  430. #define RK817_CODEC_ADAC_CFG1 0x2f
  431. #define RK817_CODEC_DDAC_POPD_DACST 0x30
  432. #define RK817_CODEC_DDAC_VOLL 0x31
  433. #define RK817_CODEC_DDAC_VOLR 0x32
  434. #define RK817_CODEC_DDAC_SR_LMT0 0x35
  435. #define RK817_CODEC_DDAC_LMT1 0x36
  436. #define RK817_CODEC_DDAC_LMT2 0x37
  437. #define RK817_CODEC_DDAC_MUTE_MIXCTL 0x38
  438. #define RK817_CODEC_DDAC_RVOLL 0x39
  439. #define RK817_CODEC_DDAC_RVOLR 0x3a
  440. #define RK817_CODEC_AHP_ANTI0 0x3b
  441. #define RK817_CODEC_AHP_ANTI1 0x3c
  442. #define RK817_CODEC_AHP_CFG0 0x3d
  443. #define RK817_CODEC_AHP_CFG1 0x3e
  444. #define RK817_CODEC_AHP_CP 0x3f
  445. #define RK817_CODEC_ACLASSD_CFG1 0x40
  446. #define RK817_CODEC_ACLASSD_CFG2 0x41
  447. #define RK817_CODEC_APLL_CFG0 0x42
  448. #define RK817_CODEC_APLL_CFG1 0x43
  449. #define RK817_CODEC_APLL_CFG2 0x44
  450. #define RK817_CODEC_APLL_CFG3 0x45
  451. #define RK817_CODEC_APLL_CFG4 0x46
  452. #define RK817_CODEC_APLL_CFG5 0x47
  453. #define RK817_CODEC_DI2S_CKM 0x48
  454. #define RK817_CODEC_DI2S_RSD 0x49
  455. #define RK817_CODEC_DI2S_RXCR1 0x4a
  456. #define RK817_CODEC_DI2S_RXCR2 0x4b
  457. #define RK817_CODEC_DI2S_RXCMD_TSD 0x4c
  458. #define RK817_CODEC_DI2S_TXCR1 0x4d
  459. #define RK817_CODEC_DI2S_TXCR2 0x4e
  460. #define RK817_CODEC_DI2S_TXCR3_TXCMD 0x4f
  461. /* RK817_CODEC_DI2S_CKM */
  462. #define RK817_I2S_MODE_MASK (0x1 << 0)
  463. #define RK817_I2S_MODE_MST (0x1 << 0)
  464. #define RK817_I2S_MODE_SLV (0x0 << 0)
  465. /* RK817_CODEC_DDAC_MUTE_MIXCTL */
  466. #define DACMT_MASK (0x1 << 0)
  467. #define DACMT_ENABLE (0x1 << 0)
  468. #define DACMT_DISABLE (0x0 << 0)
  469. /* RK817_CODEC_DI2S_RXCR2 */
  470. #define VDW_RX_24BITS (0x17)
  471. #define VDW_RX_16BITS (0x0f)
  472. /* RK817_CODEC_DI2S_TXCR2 */
  473. #define VDW_TX_24BITS (0x17)
  474. #define VDW_TX_16BITS (0x0f)
  475. /* RK817_CODEC_AMIC_CFG0 */
  476. #define MIC_DIFF_MASK (0x1 << 7)
  477. #define MIC_DIFF_DIS (0x0 << 7)
  478. #define MIC_DIFF_EN (0x1 << 7)
  479. /* RK817 Battery Registers */
  480. #define RK817_GAS_GAUGE_ADC_CONFIG0 0x50
  481. #define RK817_GG_EN (0x1 << 7)
  482. #define RK817_SYS_VOL_ADC_EN (0x1 << 6)
  483. #define RK817_TS_ADC_EN (0x1 << 5)
  484. #define RK817_USB_VOL_ADC_EN (0x1 << 4)
  485. #define RK817_BAT_VOL_ADC_EN (0x1 << 3)
  486. #define RK817_BAT_CUR_ADC_EN (0x1 << 2)
  487. #define RK817_GAS_GAUGE_ADC_CONFIG1 0x55
  488. #define RK817_VOL_CUR_CALIB_UPD BIT(7)
  489. #define RK817_GAS_GAUGE_GG_CON 0x56
  490. #define RK817_GAS_GAUGE_GG_STS 0x57
  491. #define RK817_BAT_CON (0x1 << 4)
  492. #define RK817_RELAX_VOL_UPD (0x3 << 2)
  493. #define RK817_RELAX_STS (0x1 << 1)
  494. #define RK817_GAS_GAUGE_RELAX_THRE_H 0x58
  495. #define RK817_GAS_GAUGE_RELAX_THRE_L 0x59
  496. #define RK817_GAS_GAUGE_OCV_THRE_VOL 0x62
  497. #define RK817_GAS_GAUGE_OCV_VOL_H 0x63
  498. #define RK817_GAS_GAUGE_OCV_VOL_L 0x64
  499. #define RK817_GAS_GAUGE_PWRON_VOL_H 0x6b
  500. #define RK817_GAS_GAUGE_PWRON_VOL_L 0x6c
  501. #define RK817_GAS_GAUGE_PWRON_CUR_H 0x6d
  502. #define RK817_GAS_GAUGE_PWRON_CUR_L 0x6e
  503. #define RK817_GAS_GAUGE_OFF_CNT 0x6f
  504. #define RK817_GAS_GAUGE_Q_INIT_H3 0x70
  505. #define RK817_GAS_GAUGE_Q_INIT_H2 0x71
  506. #define RK817_GAS_GAUGE_Q_INIT_L1 0x72
  507. #define RK817_GAS_GAUGE_Q_INIT_L0 0x73
  508. #define RK817_GAS_GAUGE_Q_PRES_H3 0x74
  509. #define RK817_GAS_GAUGE_Q_PRES_H2 0x75
  510. #define RK817_GAS_GAUGE_Q_PRES_L1 0x76
  511. #define RK817_GAS_GAUGE_Q_PRES_L0 0x77
  512. #define RK817_GAS_GAUGE_BAT_VOL_H 0x78
  513. #define RK817_GAS_GAUGE_BAT_VOL_L 0x79
  514. #define RK817_GAS_GAUGE_BAT_CUR_H 0x7a
  515. #define RK817_GAS_GAUGE_BAT_CUR_L 0x7b
  516. #define RK817_GAS_GAUGE_USB_VOL_H 0x7e
  517. #define RK817_GAS_GAUGE_USB_VOL_L 0x7f
  518. #define RK817_GAS_GAUGE_SYS_VOL_H 0x80
  519. #define RK817_GAS_GAUGE_SYS_VOL_L 0x81
  520. #define RK817_GAS_GAUGE_Q_MAX_H3 0x82
  521. #define RK817_GAS_GAUGE_Q_MAX_H2 0x83
  522. #define RK817_GAS_GAUGE_Q_MAX_L1 0x84
  523. #define RK817_GAS_GAUGE_Q_MAX_L0 0x85
  524. #define RK817_GAS_GAUGE_SLEEP_CON_SAMP_CUR_H 0x8f
  525. #define RK817_GAS_GAUGE_SLEEP_CON_SAMP_CUR_L 0x90
  526. #define RK817_GAS_GAUGE_CAL_OFFSET_H 0x91
  527. #define RK817_GAS_GAUGE_CAL_OFFSET_L 0x92
  528. #define RK817_GAS_GAUGE_VCALIB0_H 0x93
  529. #define RK817_GAS_GAUGE_VCALIB0_L 0x94
  530. #define RK817_GAS_GAUGE_VCALIB1_H 0x95
  531. #define RK817_GAS_GAUGE_VCALIB1_L 0x96
  532. #define RK817_GAS_GAUGE_IOFFSET_H 0x97
  533. #define RK817_GAS_GAUGE_IOFFSET_L 0x98
  534. #define RK817_GAS_GAUGE_BAT_R1 0x9a
  535. #define RK817_GAS_GAUGE_BAT_R2 0x9b
  536. #define RK817_GAS_GAUGE_BAT_R3 0x9c
  537. #define RK817_GAS_GAUGE_DATA0 0x9d
  538. #define RK817_GAS_GAUGE_DATA1 0x9e
  539. #define RK817_GAS_GAUGE_DATA2 0x9f
  540. #define RK817_GAS_GAUGE_DATA3 0xa0
  541. #define RK817_GAS_GAUGE_DATA4 0xa1
  542. #define RK817_GAS_GAUGE_DATA5 0xa2
  543. #define RK817_GAS_GAUGE_CUR_ADC_K0 0xb0
  544. #define RK817_POWER_EN_REG(i) (0xb1 + (i))
  545. #define RK817_POWER_SLP_EN_REG(i) (0xb5 + (i))
  546. #define RK817_POWER_CONFIG (0xb9)
  547. #define RK817_BUCK_CONFIG_REG(i) (0xba + (i) * 3)
  548. #define RK817_BUCK1_ON_VSEL_REG 0xBB
  549. #define RK817_BUCK1_SLP_VSEL_REG 0xBC
  550. #define RK817_BUCK2_CONFIG_REG 0xBD
  551. #define RK817_BUCK2_ON_VSEL_REG 0xBE
  552. #define RK817_BUCK2_SLP_VSEL_REG 0xBF
  553. #define RK817_BUCK3_CONFIG_REG 0xC0
  554. #define RK817_BUCK3_ON_VSEL_REG 0xC1
  555. #define RK817_BUCK3_SLP_VSEL_REG 0xC2
  556. #define RK817_BUCK4_CONFIG_REG 0xC3
  557. #define RK817_BUCK4_ON_VSEL_REG 0xC4
  558. #define RK817_BUCK4_SLP_VSEL_REG 0xC5
  559. #define RK817_LDO_ON_VSEL_REG(idx) (0xcc + (idx) * 2)
  560. #define RK817_BOOST_OTG_CFG (0xde)
  561. #define RK817_PMIC_CHRG_OUT 0xe4
  562. #define RK817_CHRG_VOL_SEL (0x07 << 4)
  563. #define RK817_CHRG_CUR_SEL (0x07 << 0)
  564. #define RK817_PMIC_CHRG_IN 0xe5
  565. #define RK817_USB_VLIM_EN (0x01 << 7)
  566. #define RK817_USB_VLIM_SEL (0x07 << 4)
  567. #define RK817_USB_ILIM_EN (0x01 << 3)
  568. #define RK817_USB_ILIM_SEL (0x07 << 0)
  569. #define RK817_PMIC_CHRG_TERM 0xe6
  570. #define RK817_CHRG_TERM_ANA_DIG (0x01 << 2)
  571. #define RK817_CHRG_TERM_ANA_SEL (0x03 << 0)
  572. #define RK817_CHRG_EN (0x01 << 6)
  573. #define RK817_PMIC_CHRG_STS 0xeb
  574. #define RK817_BAT_EXS BIT(7)
  575. #define RK817_CHG_STS (0x07 << 4)
  576. #define RK817_ID_MSB 0xed
  577. #define RK817_ID_LSB 0xee
  578. #define RK817_SYS_STS 0xf0
  579. #define RK817_PLUG_IN_STS (0x1 << 6)
  580. #define RK817_SYS_CFG(i) (0xf1 + (i))
  581. #define RK817_ON_SOURCE_REG 0xf5
  582. #define RK817_OFF_SOURCE_REG 0xf6
  583. /* INTERRUPT REGISTER */
  584. #define RK817_INT_STS_REG0 0xf8
  585. #define RK817_INT_STS_MSK_REG0 0xf9
  586. #define RK817_INT_STS_REG1 0xfa
  587. #define RK817_INT_STS_MSK_REG1 0xfb
  588. #define RK817_INT_STS_REG2 0xfc
  589. #define RK817_INT_STS_MSK_REG2 0xfd
  590. #define RK817_GPIO_INT_CFG 0xfe
  591. /* IRQ Definitions */
  592. #define RK817_IRQ_PWRON_FALL 0
  593. #define RK817_IRQ_PWRON_RISE 1
  594. #define RK817_IRQ_PWRON 2
  595. #define RK817_IRQ_PWMON_LP 3
  596. #define RK817_IRQ_HOTDIE 4
  597. #define RK817_IRQ_RTC_ALARM 5
  598. #define RK817_IRQ_RTC_PERIOD 6
  599. #define RK817_IRQ_VB_LO 7
  600. #define RK817_IRQ_PLUG_IN 8
  601. #define RK817_IRQ_PLUG_OUT 9
  602. #define RK817_IRQ_CHRG_TERM 10
  603. #define RK817_IRQ_CHRG_TIME 11
  604. #define RK817_IRQ_CHRG_TS 12
  605. #define RK817_IRQ_USB_OV 13
  606. #define RK817_IRQ_CHRG_IN_CLMP 14
  607. #define RK817_IRQ_BAT_DIS_ILIM 15
  608. #define RK817_IRQ_GATE_GPIO 16
  609. #define RK817_IRQ_TS_GPIO 17
  610. #define RK817_IRQ_CODEC_PD 18
  611. #define RK817_IRQ_CODEC_PO 19
  612. #define RK817_IRQ_CLASSD_MUTE_DONE 20
  613. #define RK817_IRQ_CLASSD_OCP 21
  614. #define RK817_IRQ_BAT_OVP 22
  615. #define RK817_IRQ_CHRG_BAT_HI 23
  616. #define RK817_IRQ_END (RK817_IRQ_CHRG_BAT_HI + 1)
  617. /*
  618. * rtc_ctrl 0xd
  619. * same as 808, except bit4
  620. */
  621. #define RK817_RTC_CTRL_RSV4 BIT(4)
  622. /* power config 0xb9 */
  623. #define RK817_BUCK3_FB_RES_MSK BIT(6)
  624. #define RK817_BUCK3_FB_RES_INTER BIT(6)
  625. #define RK817_BUCK3_FB_RES_EXT 0
  626. /* buck config 0xba */
  627. #define RK817_RAMP_RATE_OFFSET 6
  628. #define RK817_RAMP_RATE_MASK (0x3 << RK817_RAMP_RATE_OFFSET)
  629. #define RK817_RAMP_RATE_3MV_PER_US (0x0 << RK817_RAMP_RATE_OFFSET)
  630. #define RK817_RAMP_RATE_6_3MV_PER_US (0x1 << RK817_RAMP_RATE_OFFSET)
  631. #define RK817_RAMP_RATE_12_5MV_PER_US (0x2 << RK817_RAMP_RATE_OFFSET)
  632. #define RK817_RAMP_RATE_25MV_PER_US (0x3 << RK817_RAMP_RATE_OFFSET)
  633. /* sys_cfg1 0xf2 */
  634. #define RK817_HOTDIE_TEMP_MSK (0x3 << 4)
  635. #define RK817_HOTDIE_85 (0x0 << 4)
  636. #define RK817_HOTDIE_95 (0x1 << 4)
  637. #define RK817_HOTDIE_105 (0x2 << 4)
  638. #define RK817_HOTDIE_115 (0x3 << 4)
  639. #define RK817_TSD_TEMP_MSK BIT(6)
  640. #define RK817_TSD_140 0
  641. #define RK817_TSD_160 BIT(6)
  642. #define RK817_CLK32KOUT2_EN BIT(7)
  643. /* sys_cfg3 0xf4 */
  644. #define RK817_SLPPIN_FUNC_MSK (0x3 << 3)
  645. #define SLPPIN_NULL_FUN (0x0 << 3)
  646. #define SLPPIN_SLP_FUN (0x1 << 3)
  647. #define SLPPIN_DN_FUN (0x2 << 3)
  648. #define SLPPIN_RST_FUN (0x3 << 3)
  649. #define RK817_RST_FUNC_MSK (0x3 << 6)
  650. #define RK817_RST_FUNC_SFT (6)
  651. #define RK817_RST_FUNC_CNT (3)
  652. #define RK817_RST_FUNC_DEV (0) /* reset the dev */
  653. #define RK817_RST_FUNC_REG (0x1 << 6) /* reset the reg only */
  654. #define RK817_SLPPOL_MSK BIT(5)
  655. #define RK817_SLPPOL_H BIT(5)
  656. #define RK817_SLPPOL_L (0)
  657. /* gpio&int 0xfe */
  658. #define RK817_INT_POL_MSK BIT(1)
  659. #define RK817_INT_POL_H BIT(1)
  660. #define RK817_INT_POL_L 0
  661. #define RK809_BUCK5_CONFIG(i) (RK817_BOOST_OTG_CFG + (i) * 1)
  662. enum {
  663. BUCK_ILMIN_50MA,
  664. BUCK_ILMIN_100MA,
  665. BUCK_ILMIN_150MA,
  666. BUCK_ILMIN_200MA,
  667. BUCK_ILMIN_250MA,
  668. BUCK_ILMIN_300MA,
  669. BUCK_ILMIN_350MA,
  670. BUCK_ILMIN_400MA,
  671. };
  672. enum {
  673. BOOST_ILMIN_75MA,
  674. BOOST_ILMIN_100MA,
  675. BOOST_ILMIN_125MA,
  676. BOOST_ILMIN_150MA,
  677. BOOST_ILMIN_175MA,
  678. BOOST_ILMIN_200MA,
  679. BOOST_ILMIN_225MA,
  680. BOOST_ILMIN_250MA,
  681. };
  682. enum {
  683. RK805_BUCK1_2_ILMAX_2500MA,
  684. RK805_BUCK1_2_ILMAX_3000MA,
  685. RK805_BUCK1_2_ILMAX_3500MA,
  686. RK805_BUCK1_2_ILMAX_4000MA,
  687. };
  688. enum {
  689. RK805_BUCK3_ILMAX_1500MA,
  690. RK805_BUCK3_ILMAX_2000MA,
  691. RK805_BUCK3_ILMAX_2500MA,
  692. RK805_BUCK3_ILMAX_3000MA,
  693. };
  694. enum {
  695. RK805_BUCK4_ILMAX_2000MA,
  696. RK805_BUCK4_ILMAX_2500MA,
  697. RK805_BUCK4_ILMAX_3000MA,
  698. RK805_BUCK4_ILMAX_3500MA,
  699. };
  700. enum {
  701. RK805_ID = 0x8050,
  702. RK808_ID = 0x0000,
  703. RK809_ID = 0x8090,
  704. RK817_ID = 0x8170,
  705. RK818_ID = 0x8180,
  706. };
  707. struct rk808 {
  708. struct i2c_client *i2c;
  709. struct regmap_irq_chip_data *irq_data;
  710. struct regmap *regmap;
  711. long variant;
  712. const struct regmap_config *regmap_cfg;
  713. const struct regmap_irq_chip *regmap_irq_chip;
  714. };
  715. #endif /* __LINUX_REGULATOR_RK808_H */