arm-smccc.h 20 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2015, Linaro Limited
  4. */
  5. #ifndef __LINUX_ARM_SMCCC_H
  6. #define __LINUX_ARM_SMCCC_H
  7. #include <linux/init.h>
  8. #include <uapi/linux/const.h>
  9. /*
  10. * This file provides common defines for ARM SMC Calling Convention as
  11. * specified in
  12. * https://developer.arm.com/docs/den0028/latest
  13. *
  14. * This code is up-to-date with version DEN 0028 C
  15. */
  16. #define ARM_SMCCC_STD_CALL _AC(0,U)
  17. #define ARM_SMCCC_FAST_CALL _AC(1,U)
  18. #define ARM_SMCCC_TYPE_SHIFT 31
  19. #define ARM_SMCCC_SMC_32 0
  20. #define ARM_SMCCC_SMC_64 1
  21. #define ARM_SMCCC_CALL_CONV_SHIFT 30
  22. #define ARM_SMCCC_OWNER_MASK 0x3F
  23. #define ARM_SMCCC_OWNER_SHIFT 24
  24. #define ARM_SMCCC_FUNC_MASK 0xFFFF
  25. #define ARM_SMCCC_IS_FAST_CALL(smc_val) \
  26. ((smc_val) & (ARM_SMCCC_FAST_CALL << ARM_SMCCC_TYPE_SHIFT))
  27. #define ARM_SMCCC_IS_64(smc_val) \
  28. ((smc_val) & (ARM_SMCCC_SMC_64 << ARM_SMCCC_CALL_CONV_SHIFT))
  29. #define ARM_SMCCC_FUNC_NUM(smc_val) ((smc_val) & ARM_SMCCC_FUNC_MASK)
  30. #define ARM_SMCCC_OWNER_NUM(smc_val) \
  31. (((smc_val) >> ARM_SMCCC_OWNER_SHIFT) & ARM_SMCCC_OWNER_MASK)
  32. #define ARM_SMCCC_CALL_VAL(type, calling_convention, owner, func_num) \
  33. (((type) << ARM_SMCCC_TYPE_SHIFT) | \
  34. ((calling_convention) << ARM_SMCCC_CALL_CONV_SHIFT) | \
  35. (((owner) & ARM_SMCCC_OWNER_MASK) << ARM_SMCCC_OWNER_SHIFT) | \
  36. ((func_num) & ARM_SMCCC_FUNC_MASK))
  37. #define ARM_SMCCC_OWNER_ARCH 0
  38. #define ARM_SMCCC_OWNER_CPU 1
  39. #define ARM_SMCCC_OWNER_SIP 2
  40. #define ARM_SMCCC_OWNER_OEM 3
  41. #define ARM_SMCCC_OWNER_STANDARD 4
  42. #define ARM_SMCCC_OWNER_STANDARD_HYP 5
  43. #define ARM_SMCCC_OWNER_VENDOR_HYP 6
  44. #define ARM_SMCCC_OWNER_TRUSTED_APP 48
  45. #define ARM_SMCCC_OWNER_TRUSTED_APP_END 49
  46. #define ARM_SMCCC_OWNER_TRUSTED_OS 50
  47. #define ARM_SMCCC_OWNER_TRUSTED_OS_END 63
  48. #define ARM_SMCCC_FUNC_QUERY_CALL_UID 0xff01
  49. #define ARM_SMCCC_QUIRK_NONE 0
  50. #define ARM_SMCCC_QUIRK_QCOM_A6 1 /* Save/restore register a6 */
  51. #define ARM_SMCCC_VERSION_1_0 0x10000
  52. #define ARM_SMCCC_VERSION_1_1 0x10001
  53. #define ARM_SMCCC_VERSION_1_2 0x10002
  54. #define ARM_SMCCC_VERSION_1_3 0x10003
  55. #define ARM_SMCCC_1_3_SVE_HINT 0x10000
  56. #define ARM_SMCCC_VERSION_FUNC_ID \
  57. ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
  58. ARM_SMCCC_SMC_32, \
  59. 0, 0)
  60. #define ARM_SMCCC_ARCH_FEATURES_FUNC_ID \
  61. ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
  62. ARM_SMCCC_SMC_32, \
  63. 0, 1)
  64. #define ARM_SMCCC_ARCH_SOC_ID \
  65. ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
  66. ARM_SMCCC_SMC_32, \
  67. 0, 2)
  68. #define ARM_SMCCC_ARCH_WORKAROUND_1 \
  69. ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
  70. ARM_SMCCC_SMC_32, \
  71. 0, 0x8000)
  72. #define ARM_SMCCC_ARCH_WORKAROUND_2 \
  73. ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
  74. ARM_SMCCC_SMC_32, \
  75. 0, 0x7fff)
  76. #define ARM_SMCCC_ARCH_WORKAROUND_3 \
  77. ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
  78. ARM_SMCCC_SMC_32, \
  79. 0, 0x3fff)
  80. #define ARM_SMCCC_VENDOR_HYP_CALL_UID_FUNC_ID \
  81. ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
  82. ARM_SMCCC_SMC_32, \
  83. ARM_SMCCC_OWNER_VENDOR_HYP, \
  84. ARM_SMCCC_FUNC_QUERY_CALL_UID)
  85. /* KVM UID value: 28b46fb6-2ec5-11e9-a9ca-4b564d003a74 */
  86. #define ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_0 0xb66fb428U
  87. #define ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_1 0xe911c52eU
  88. #define ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_2 0x564bcaa9U
  89. #define ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_3 0x743a004dU
  90. /* KVM "vendor specific" services */
  91. #define ARM_SMCCC_KVM_FUNC_FEATURES 0
  92. #define ARM_SMCCC_KVM_FUNC_PTP 1
  93. #define ARM_SMCCC_KVM_FUNC_HYP_MEMINFO 2
  94. #define ARM_SMCCC_KVM_FUNC_MEM_SHARE 3
  95. #define ARM_SMCCC_KVM_FUNC_MEM_UNSHARE 4
  96. #define ARM_SMCCC_KVM_FUNC_MMIO_GUARD_INFO 5
  97. #define ARM_SMCCC_KVM_FUNC_MMIO_GUARD_ENROLL 6
  98. #define ARM_SMCCC_KVM_FUNC_MMIO_GUARD_MAP 7
  99. #define ARM_SMCCC_KVM_FUNC_MMIO_GUARD_UNMAP 8
  100. #define ARM_SMCCC_KVM_FUNC_MEM_RELINQUISH 9
  101. #define ARM_SMCCC_KVM_FUNC_FEATURES_2 127
  102. #define ARM_SMCCC_KVM_NUM_FUNCS 128
  103. #define ARM_SMCCC_VENDOR_HYP_KVM_FEATURES_FUNC_ID \
  104. ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
  105. ARM_SMCCC_SMC_32, \
  106. ARM_SMCCC_OWNER_VENDOR_HYP, \
  107. ARM_SMCCC_KVM_FUNC_FEATURES)
  108. #define SMCCC_ARCH_WORKAROUND_RET_UNAFFECTED 1
  109. /*
  110. * ptp_kvm is a feature used for time sync between vm and host.
  111. * ptp_kvm module in guest kernel will get service from host using
  112. * this hypercall ID.
  113. */
  114. #define ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID \
  115. ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
  116. ARM_SMCCC_SMC_32, \
  117. ARM_SMCCC_OWNER_VENDOR_HYP, \
  118. ARM_SMCCC_KVM_FUNC_PTP)
  119. #define ARM_SMCCC_VENDOR_HYP_KVM_HYP_MEMINFO_FUNC_ID \
  120. ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
  121. ARM_SMCCC_SMC_64, \
  122. ARM_SMCCC_OWNER_VENDOR_HYP, \
  123. ARM_SMCCC_KVM_FUNC_HYP_MEMINFO)
  124. #define ARM_SMCCC_VENDOR_HYP_KVM_MEM_SHARE_FUNC_ID \
  125. ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
  126. ARM_SMCCC_SMC_64, \
  127. ARM_SMCCC_OWNER_VENDOR_HYP, \
  128. ARM_SMCCC_KVM_FUNC_MEM_SHARE)
  129. #define ARM_SMCCC_VENDOR_HYP_KVM_MEM_UNSHARE_FUNC_ID \
  130. ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
  131. ARM_SMCCC_SMC_64, \
  132. ARM_SMCCC_OWNER_VENDOR_HYP, \
  133. ARM_SMCCC_KVM_FUNC_MEM_UNSHARE)
  134. #define ARM_SMCCC_VENDOR_HYP_KVM_MEM_RELINQUISH_FUNC_ID \
  135. ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
  136. ARM_SMCCC_SMC_64, \
  137. ARM_SMCCC_OWNER_VENDOR_HYP, \
  138. ARM_SMCCC_KVM_FUNC_MEM_RELINQUISH)
  139. /* ptp_kvm counter type ID */
  140. #define KVM_PTP_VIRT_COUNTER 0
  141. #define KVM_PTP_PHYS_COUNTER 1
  142. #define ARM_SMCCC_VENDOR_HYP_KVM_MMIO_GUARD_INFO_FUNC_ID \
  143. ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
  144. ARM_SMCCC_SMC_64, \
  145. ARM_SMCCC_OWNER_VENDOR_HYP, \
  146. ARM_SMCCC_KVM_FUNC_MMIO_GUARD_INFO)
  147. #define ARM_SMCCC_VENDOR_HYP_KVM_MMIO_GUARD_ENROLL_FUNC_ID \
  148. ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
  149. ARM_SMCCC_SMC_64, \
  150. ARM_SMCCC_OWNER_VENDOR_HYP, \
  151. ARM_SMCCC_KVM_FUNC_MMIO_GUARD_ENROLL)
  152. #define ARM_SMCCC_VENDOR_HYP_KVM_MMIO_GUARD_MAP_FUNC_ID \
  153. ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
  154. ARM_SMCCC_SMC_64, \
  155. ARM_SMCCC_OWNER_VENDOR_HYP, \
  156. ARM_SMCCC_KVM_FUNC_MMIO_GUARD_MAP)
  157. #define ARM_SMCCC_VENDOR_HYP_KVM_MMIO_GUARD_UNMAP_FUNC_ID \
  158. ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
  159. ARM_SMCCC_SMC_64, \
  160. ARM_SMCCC_OWNER_VENDOR_HYP, \
  161. ARM_SMCCC_KVM_FUNC_MMIO_GUARD_UNMAP)
  162. /* Paravirtualised time calls (defined by ARM DEN0057A) */
  163. #define ARM_SMCCC_HV_PV_TIME_FEATURES \
  164. ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
  165. ARM_SMCCC_SMC_64, \
  166. ARM_SMCCC_OWNER_STANDARD_HYP, \
  167. 0x20)
  168. #define ARM_SMCCC_HV_PV_TIME_ST \
  169. ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
  170. ARM_SMCCC_SMC_64, \
  171. ARM_SMCCC_OWNER_STANDARD_HYP, \
  172. 0x21)
  173. /* TRNG entropy source calls (defined by ARM DEN0098) */
  174. #define ARM_SMCCC_TRNG_VERSION \
  175. ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
  176. ARM_SMCCC_SMC_32, \
  177. ARM_SMCCC_OWNER_STANDARD, \
  178. 0x50)
  179. #define ARM_SMCCC_TRNG_FEATURES \
  180. ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
  181. ARM_SMCCC_SMC_32, \
  182. ARM_SMCCC_OWNER_STANDARD, \
  183. 0x51)
  184. #define ARM_SMCCC_TRNG_GET_UUID \
  185. ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
  186. ARM_SMCCC_SMC_32, \
  187. ARM_SMCCC_OWNER_STANDARD, \
  188. 0x52)
  189. #define ARM_SMCCC_TRNG_RND32 \
  190. ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
  191. ARM_SMCCC_SMC_32, \
  192. ARM_SMCCC_OWNER_STANDARD, \
  193. 0x53)
  194. #define ARM_SMCCC_TRNG_RND64 \
  195. ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
  196. ARM_SMCCC_SMC_64, \
  197. ARM_SMCCC_OWNER_STANDARD, \
  198. 0x53)
  199. /*
  200. * Return codes defined in ARM DEN 0070A
  201. * ARM DEN 0070A is now merged/consolidated into ARM DEN 0028 C
  202. */
  203. #define SMCCC_RET_SUCCESS 0
  204. #define SMCCC_RET_NOT_SUPPORTED -1
  205. #define SMCCC_RET_NOT_REQUIRED -2
  206. #define SMCCC_RET_INVALID_PARAMETER -3
  207. #ifndef __ASSEMBLY__
  208. #include <linux/linkage.h>
  209. #include <linux/types.h>
  210. enum arm_smccc_conduit {
  211. SMCCC_CONDUIT_NONE,
  212. SMCCC_CONDUIT_SMC,
  213. SMCCC_CONDUIT_HVC,
  214. };
  215. /**
  216. * arm_smccc_1_1_get_conduit()
  217. *
  218. * Returns the conduit to be used for SMCCCv1.1 or later.
  219. *
  220. * When SMCCCv1.1 is not present, returns SMCCC_CONDUIT_NONE.
  221. */
  222. enum arm_smccc_conduit arm_smccc_1_1_get_conduit(void);
  223. /**
  224. * arm_smccc_get_version()
  225. *
  226. * Returns the version to be used for SMCCCv1.1 or later.
  227. *
  228. * When SMCCCv1.1 or above is not present, returns SMCCCv1.0, but this
  229. * does not imply the presence of firmware or a valid conduit. Caller
  230. * handling SMCCCv1.0 must determine the conduit by other means.
  231. */
  232. u32 arm_smccc_get_version(void);
  233. void __init arm_smccc_version_init(u32 version, enum arm_smccc_conduit conduit);
  234. extern u64 smccc_has_sve_hint;
  235. /**
  236. * struct arm_smccc_res - Result from SMC/HVC call
  237. * @a0-a3 result values from registers 0 to 3
  238. */
  239. struct arm_smccc_res {
  240. unsigned long a0;
  241. unsigned long a1;
  242. unsigned long a2;
  243. unsigned long a3;
  244. };
  245. #ifdef CONFIG_ARM64
  246. /**
  247. * struct arm_smccc_1_2_regs - Arguments for or Results from SMC/HVC call
  248. * @a0-a17 argument values from registers 0 to 17
  249. */
  250. struct arm_smccc_1_2_regs {
  251. unsigned long a0;
  252. unsigned long a1;
  253. unsigned long a2;
  254. unsigned long a3;
  255. unsigned long a4;
  256. unsigned long a5;
  257. unsigned long a6;
  258. unsigned long a7;
  259. unsigned long a8;
  260. unsigned long a9;
  261. unsigned long a10;
  262. unsigned long a11;
  263. unsigned long a12;
  264. unsigned long a13;
  265. unsigned long a14;
  266. unsigned long a15;
  267. unsigned long a16;
  268. unsigned long a17;
  269. };
  270. /**
  271. * arm_smccc_1_2_hvc() - make HVC calls
  272. * @args: arguments passed via struct arm_smccc_1_2_regs
  273. * @res: result values via struct arm_smccc_1_2_regs
  274. *
  275. * This function is used to make HVC calls following SMC Calling Convention
  276. * v1.2 or above. The content of the supplied param are copied from the
  277. * structure to registers prior to the HVC instruction. The return values
  278. * are updated with the content from registers on return from the HVC
  279. * instruction.
  280. */
  281. asmlinkage void arm_smccc_1_2_hvc(const struct arm_smccc_1_2_regs *args,
  282. struct arm_smccc_1_2_regs *res);
  283. /**
  284. * arm_smccc_1_2_smc() - make SMC calls
  285. * @args: arguments passed via struct arm_smccc_1_2_regs
  286. * @res: result values via struct arm_smccc_1_2_regs
  287. *
  288. * This function is used to make SMC calls following SMC Calling Convention
  289. * v1.2 or above. The content of the supplied param are copied from the
  290. * structure to registers prior to the SMC instruction. The return values
  291. * are updated with the content from registers on return from the SMC
  292. * instruction.
  293. */
  294. asmlinkage void arm_smccc_1_2_smc(const struct arm_smccc_1_2_regs *args,
  295. struct arm_smccc_1_2_regs *res);
  296. #endif
  297. /**
  298. * struct arm_smccc_quirk - Contains quirk information
  299. * @id: quirk identification
  300. * @state: quirk specific information
  301. * @a6: Qualcomm quirk entry for returning post-smc call contents of a6
  302. */
  303. struct arm_smccc_quirk {
  304. int id;
  305. union {
  306. unsigned long a6;
  307. } state;
  308. };
  309. /**
  310. * __arm_smccc_sve_check() - Set the SVE hint bit when doing SMC calls
  311. *
  312. * Sets the SMCCC hint bit to indicate if there is live state in the SVE
  313. * registers, this modifies x0 in place and should never be called from C
  314. * code.
  315. */
  316. asmlinkage unsigned long __arm_smccc_sve_check(unsigned long x0);
  317. /**
  318. * __arm_smccc_smc() - make SMC calls
  319. * @a0-a7: arguments passed in registers 0 to 7
  320. * @res: result values from registers 0 to 3
  321. * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required.
  322. *
  323. * This function is used to make SMC calls following SMC Calling Convention.
  324. * The content of the supplied param are copied to registers 0 to 7 prior
  325. * to the SMC instruction. The return values are updated with the content
  326. * from register 0 to 3 on return from the SMC instruction. An optional
  327. * quirk structure provides vendor specific behavior.
  328. */
  329. #ifdef CONFIG_HAVE_ARM_SMCCC
  330. asmlinkage void __arm_smccc_smc(unsigned long a0, unsigned long a1,
  331. unsigned long a2, unsigned long a3, unsigned long a4,
  332. unsigned long a5, unsigned long a6, unsigned long a7,
  333. struct arm_smccc_res *res, struct arm_smccc_quirk *quirk);
  334. #else
  335. static inline void __arm_smccc_smc(unsigned long a0, unsigned long a1,
  336. unsigned long a2, unsigned long a3, unsigned long a4,
  337. unsigned long a5, unsigned long a6, unsigned long a7,
  338. struct arm_smccc_res *res, struct arm_smccc_quirk *quirk)
  339. {
  340. *res = (struct arm_smccc_res){};
  341. }
  342. #endif
  343. /**
  344. * __arm_smccc_hvc() - make HVC calls
  345. * @a0-a7: arguments passed in registers 0 to 7
  346. * @res: result values from registers 0 to 3
  347. * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required.
  348. *
  349. * This function is used to make HVC calls following SMC Calling
  350. * Convention. The content of the supplied param are copied to registers 0
  351. * to 7 prior to the HVC instruction. The return values are updated with
  352. * the content from register 0 to 3 on return from the HVC instruction. An
  353. * optional quirk structure provides vendor specific behavior.
  354. */
  355. asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
  356. unsigned long a2, unsigned long a3, unsigned long a4,
  357. unsigned long a5, unsigned long a6, unsigned long a7,
  358. struct arm_smccc_res *res, struct arm_smccc_quirk *quirk);
  359. #define arm_smccc_smc(...) __arm_smccc_smc(__VA_ARGS__, NULL)
  360. #define arm_smccc_smc_quirk(...) __arm_smccc_smc(__VA_ARGS__)
  361. #define arm_smccc_hvc(...) __arm_smccc_hvc(__VA_ARGS__, NULL)
  362. #define arm_smccc_hvc_quirk(...) __arm_smccc_hvc(__VA_ARGS__)
  363. /* SMCCC v1.1 implementation madness follows */
  364. #ifdef CONFIG_ARM64
  365. #define SMCCC_SMC_INST "smc #0"
  366. #define SMCCC_HVC_INST "hvc #0"
  367. #elif defined(CONFIG_ARM)
  368. #include <asm/opcodes-sec.h>
  369. #include <asm/opcodes-virt.h>
  370. #define SMCCC_SMC_INST __SMC(0)
  371. #define SMCCC_HVC_INST __HVC(0)
  372. #endif
  373. /* nVHE hypervisor doesn't have a current thread so needs separate checks */
  374. #if defined(CONFIG_ARM64_SVE) && !defined(__KVM_NVHE_HYPERVISOR__)
  375. #define SMCCC_SVE_CHECK ALTERNATIVE("nop \n", "bl __arm_smccc_sve_check \n", \
  376. ARM64_SVE)
  377. #define smccc_sve_clobbers "x16", "x30", "cc",
  378. #else
  379. #define SMCCC_SVE_CHECK
  380. #define smccc_sve_clobbers
  381. #endif
  382. #define ___count_args(_0, _1, _2, _3, _4, _5, _6, _7, _8, x, ...) x
  383. #define __count_args(...) \
  384. ___count_args(__VA_ARGS__, 7, 6, 5, 4, 3, 2, 1, 0)
  385. #define __constraint_read_0 "r" (arg0)
  386. #define __constraint_read_1 __constraint_read_0, "r" (arg1)
  387. #define __constraint_read_2 __constraint_read_1, "r" (arg2)
  388. #define __constraint_read_3 __constraint_read_2, "r" (arg3)
  389. #define __constraint_read_4 __constraint_read_3, "r" (arg4)
  390. #define __constraint_read_5 __constraint_read_4, "r" (arg5)
  391. #define __constraint_read_6 __constraint_read_5, "r" (arg6)
  392. #define __constraint_read_7 __constraint_read_6, "r" (arg7)
  393. #define __declare_arg_0(a0, res) \
  394. struct arm_smccc_res *___res = res; \
  395. register unsigned long arg0 asm("r0") = (u32)a0
  396. #define __declare_arg_1(a0, a1, res) \
  397. typeof(a1) __a1 = a1; \
  398. struct arm_smccc_res *___res = res; \
  399. register unsigned long arg0 asm("r0") = (u32)a0; \
  400. register typeof(a1) arg1 asm("r1") = __a1
  401. #define __declare_arg_2(a0, a1, a2, res) \
  402. typeof(a1) __a1 = a1; \
  403. typeof(a2) __a2 = a2; \
  404. struct arm_smccc_res *___res = res; \
  405. register unsigned long arg0 asm("r0") = (u32)a0; \
  406. register typeof(a1) arg1 asm("r1") = __a1; \
  407. register typeof(a2) arg2 asm("r2") = __a2
  408. #define __declare_arg_3(a0, a1, a2, a3, res) \
  409. typeof(a1) __a1 = a1; \
  410. typeof(a2) __a2 = a2; \
  411. typeof(a3) __a3 = a3; \
  412. struct arm_smccc_res *___res = res; \
  413. register unsigned long arg0 asm("r0") = (u32)a0; \
  414. register typeof(a1) arg1 asm("r1") = __a1; \
  415. register typeof(a2) arg2 asm("r2") = __a2; \
  416. register typeof(a3) arg3 asm("r3") = __a3
  417. #define __declare_arg_4(a0, a1, a2, a3, a4, res) \
  418. typeof(a4) __a4 = a4; \
  419. __declare_arg_3(a0, a1, a2, a3, res); \
  420. register typeof(a4) arg4 asm("r4") = __a4
  421. #define __declare_arg_5(a0, a1, a2, a3, a4, a5, res) \
  422. typeof(a5) __a5 = a5; \
  423. __declare_arg_4(a0, a1, a2, a3, a4, res); \
  424. register typeof(a5) arg5 asm("r5") = __a5
  425. #define __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res) \
  426. typeof(a6) __a6 = a6; \
  427. __declare_arg_5(a0, a1, a2, a3, a4, a5, res); \
  428. register typeof(a6) arg6 asm("r6") = __a6
  429. #define __declare_arg_7(a0, a1, a2, a3, a4, a5, a6, a7, res) \
  430. typeof(a7) __a7 = a7; \
  431. __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res); \
  432. register typeof(a7) arg7 asm("r7") = __a7
  433. #define ___declare_args(count, ...) __declare_arg_ ## count(__VA_ARGS__)
  434. #define __declare_args(count, ...) ___declare_args(count, __VA_ARGS__)
  435. #define ___constraints(count) \
  436. : __constraint_read_ ## count \
  437. : smccc_sve_clobbers "memory"
  438. #define __constraints(count) ___constraints(count)
  439. /*
  440. * We have an output list that is not necessarily used, and GCC feels
  441. * entitled to optimise the whole sequence away. "volatile" is what
  442. * makes it stick.
  443. */
  444. #define __arm_smccc_1_1(inst, ...) \
  445. do { \
  446. register unsigned long r0 asm("r0"); \
  447. register unsigned long r1 asm("r1"); \
  448. register unsigned long r2 asm("r2"); \
  449. register unsigned long r3 asm("r3"); \
  450. __declare_args(__count_args(__VA_ARGS__), __VA_ARGS__); \
  451. asm volatile(SMCCC_SVE_CHECK \
  452. inst "\n" : \
  453. "=r" (r0), "=r" (r1), "=r" (r2), "=r" (r3) \
  454. __constraints(__count_args(__VA_ARGS__))); \
  455. if (___res) \
  456. *___res = (typeof(*___res)){r0, r1, r2, r3}; \
  457. } while (0)
  458. /*
  459. * arm_smccc_1_1_smc() - make an SMCCC v1.1 compliant SMC call
  460. *
  461. * This is a variadic macro taking one to eight source arguments, and
  462. * an optional return structure.
  463. *
  464. * @a0-a7: arguments passed in registers 0 to 7
  465. * @res: result values from registers 0 to 3
  466. *
  467. * This macro is used to make SMC calls following SMC Calling Convention v1.1.
  468. * The content of the supplied param are copied to registers 0 to 7 prior
  469. * to the SMC instruction. The return values are updated with the content
  470. * from register 0 to 3 on return from the SMC instruction if not NULL.
  471. */
  472. #define arm_smccc_1_1_smc(...) __arm_smccc_1_1(SMCCC_SMC_INST, __VA_ARGS__)
  473. /*
  474. * arm_smccc_1_1_hvc() - make an SMCCC v1.1 compliant HVC call
  475. *
  476. * This is a variadic macro taking one to eight source arguments, and
  477. * an optional return structure.
  478. *
  479. * @a0-a7: arguments passed in registers 0 to 7
  480. * @res: result values from registers 0 to 3
  481. *
  482. * This macro is used to make HVC calls following SMC Calling Convention v1.1.
  483. * The content of the supplied param are copied to registers 0 to 7 prior
  484. * to the HVC instruction. The return values are updated with the content
  485. * from register 0 to 3 on return from the HVC instruction if not NULL.
  486. */
  487. #define arm_smccc_1_1_hvc(...) __arm_smccc_1_1(SMCCC_HVC_INST, __VA_ARGS__)
  488. /*
  489. * Like arm_smccc_1_1* but always returns SMCCC_RET_NOT_SUPPORTED.
  490. * Used when the SMCCC conduit is not defined. The empty asm statement
  491. * avoids compiler warnings about unused variables.
  492. */
  493. #define __fail_smccc_1_1(...) \
  494. do { \
  495. __declare_args(__count_args(__VA_ARGS__), __VA_ARGS__); \
  496. asm ("" : __constraints(__count_args(__VA_ARGS__))); \
  497. if (___res) \
  498. ___res->a0 = SMCCC_RET_NOT_SUPPORTED; \
  499. } while (0)
  500. /*
  501. * arm_smccc_1_1_invoke() - make an SMCCC v1.1 compliant call
  502. *
  503. * This is a variadic macro taking one to eight source arguments, and
  504. * an optional return structure.
  505. *
  506. * @a0-a7: arguments passed in registers 0 to 7
  507. * @res: result values from registers 0 to 3
  508. *
  509. * This macro will make either an HVC call or an SMC call depending on the
  510. * current SMCCC conduit. If no valid conduit is available then -1
  511. * (SMCCC_RET_NOT_SUPPORTED) is returned in @res.a0 (if supplied).
  512. *
  513. * The return value also provides the conduit that was used.
  514. */
  515. #define arm_smccc_1_1_invoke(...) ({ \
  516. int method = arm_smccc_1_1_get_conduit(); \
  517. switch (method) { \
  518. case SMCCC_CONDUIT_HVC: \
  519. arm_smccc_1_1_hvc(__VA_ARGS__); \
  520. break; \
  521. case SMCCC_CONDUIT_SMC: \
  522. arm_smccc_1_1_smc(__VA_ARGS__); \
  523. break; \
  524. default: \
  525. __fail_smccc_1_1(__VA_ARGS__); \
  526. method = SMCCC_CONDUIT_NONE; \
  527. break; \
  528. } \
  529. method; \
  530. })
  531. #endif /*__ASSEMBLY__*/
  532. #endif /*__LINUX_ARM_SMCCC_H*/