tegra124-mc.h 3.8 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. #ifndef DT_BINDINGS_MEMORY_TEGRA124_MC_H
  3. #define DT_BINDINGS_MEMORY_TEGRA124_MC_H
  4. #define TEGRA_SWGROUP_PTC 0
  5. #define TEGRA_SWGROUP_DC 1
  6. #define TEGRA_SWGROUP_DCB 2
  7. #define TEGRA_SWGROUP_AFI 3
  8. #define TEGRA_SWGROUP_AVPC 4
  9. #define TEGRA_SWGROUP_HDA 5
  10. #define TEGRA_SWGROUP_HC 6
  11. #define TEGRA_SWGROUP_MSENC 7
  12. #define TEGRA_SWGROUP_PPCS 8
  13. #define TEGRA_SWGROUP_SATA 9
  14. #define TEGRA_SWGROUP_VDE 10
  15. #define TEGRA_SWGROUP_MPCORELP 11
  16. #define TEGRA_SWGROUP_MPCORE 12
  17. #define TEGRA_SWGROUP_ISP2 13
  18. #define TEGRA_SWGROUP_XUSB_HOST 14
  19. #define TEGRA_SWGROUP_XUSB_DEV 15
  20. #define TEGRA_SWGROUP_ISP2B 16
  21. #define TEGRA_SWGROUP_TSEC 17
  22. #define TEGRA_SWGROUP_A9AVP 18
  23. #define TEGRA_SWGROUP_GPU 19
  24. #define TEGRA_SWGROUP_SDMMC1A 20
  25. #define TEGRA_SWGROUP_SDMMC2A 21
  26. #define TEGRA_SWGROUP_SDMMC3A 22
  27. #define TEGRA_SWGROUP_SDMMC4A 23
  28. #define TEGRA_SWGROUP_VIC 24
  29. #define TEGRA_SWGROUP_VI 25
  30. #define TEGRA124_MC_RESET_AFI 0
  31. #define TEGRA124_MC_RESET_AVPC 1
  32. #define TEGRA124_MC_RESET_DC 2
  33. #define TEGRA124_MC_RESET_DCB 3
  34. #define TEGRA124_MC_RESET_HC 4
  35. #define TEGRA124_MC_RESET_HDA 5
  36. #define TEGRA124_MC_RESET_ISP2 6
  37. #define TEGRA124_MC_RESET_MPCORE 7
  38. #define TEGRA124_MC_RESET_MPCORELP 8
  39. #define TEGRA124_MC_RESET_MSENC 9
  40. #define TEGRA124_MC_RESET_PPCS 10
  41. #define TEGRA124_MC_RESET_SATA 11
  42. #define TEGRA124_MC_RESET_VDE 12
  43. #define TEGRA124_MC_RESET_VI 13
  44. #define TEGRA124_MC_RESET_VIC 14
  45. #define TEGRA124_MC_RESET_XUSB_HOST 15
  46. #define TEGRA124_MC_RESET_XUSB_DEV 16
  47. #define TEGRA124_MC_RESET_TSEC 17
  48. #define TEGRA124_MC_RESET_SDMMC1 18
  49. #define TEGRA124_MC_RESET_SDMMC2 19
  50. #define TEGRA124_MC_RESET_SDMMC3 20
  51. #define TEGRA124_MC_RESET_SDMMC4 21
  52. #define TEGRA124_MC_RESET_ISP2B 22
  53. #define TEGRA124_MC_RESET_GPU 23
  54. #define TEGRA124_MC_PTCR 0
  55. #define TEGRA124_MC_DISPLAY0A 1
  56. #define TEGRA124_MC_DISPLAY0AB 2
  57. #define TEGRA124_MC_DISPLAY0B 3
  58. #define TEGRA124_MC_DISPLAY0BB 4
  59. #define TEGRA124_MC_DISPLAY0C 5
  60. #define TEGRA124_MC_DISPLAY0CB 6
  61. #define TEGRA124_MC_AFIR 14
  62. #define TEGRA124_MC_AVPCARM7R 15
  63. #define TEGRA124_MC_DISPLAYHC 16
  64. #define TEGRA124_MC_DISPLAYHCB 17
  65. #define TEGRA124_MC_HDAR 21
  66. #define TEGRA124_MC_HOST1XDMAR 22
  67. #define TEGRA124_MC_HOST1XR 23
  68. #define TEGRA124_MC_MSENCSRD 28
  69. #define TEGRA124_MC_PPCSAHBDMAR 29
  70. #define TEGRA124_MC_PPCSAHBSLVR 30
  71. #define TEGRA124_MC_SATAR 31
  72. #define TEGRA124_MC_VDEBSEVR 34
  73. #define TEGRA124_MC_VDEMBER 35
  74. #define TEGRA124_MC_VDEMCER 36
  75. #define TEGRA124_MC_VDETPER 37
  76. #define TEGRA124_MC_MPCORELPR 38
  77. #define TEGRA124_MC_MPCORER 39
  78. #define TEGRA124_MC_MSENCSWR 43
  79. #define TEGRA124_MC_AFIW 49
  80. #define TEGRA124_MC_AVPCARM7W 50
  81. #define TEGRA124_MC_HDAW 53
  82. #define TEGRA124_MC_HOST1XW 54
  83. #define TEGRA124_MC_MPCORELPW 56
  84. #define TEGRA124_MC_MPCOREW 57
  85. #define TEGRA124_MC_PPCSAHBDMAW 59
  86. #define TEGRA124_MC_PPCSAHBSLVW 60
  87. #define TEGRA124_MC_SATAW 61
  88. #define TEGRA124_MC_VDEBSEVW 62
  89. #define TEGRA124_MC_VDEDBGW 63
  90. #define TEGRA124_MC_VDEMBEW 64
  91. #define TEGRA124_MC_VDETPMW 65
  92. #define TEGRA124_MC_ISPRA 68
  93. #define TEGRA124_MC_ISPWA 70
  94. #define TEGRA124_MC_ISPWB 71
  95. #define TEGRA124_MC_XUSB_HOSTR 74
  96. #define TEGRA124_MC_XUSB_HOSTW 75
  97. #define TEGRA124_MC_XUSB_DEVR 76
  98. #define TEGRA124_MC_XUSB_DEVW 77
  99. #define TEGRA124_MC_ISPRAB 78
  100. #define TEGRA124_MC_ISPWAB 80
  101. #define TEGRA124_MC_ISPWBB 81
  102. #define TEGRA124_MC_TSECSRD 84
  103. #define TEGRA124_MC_TSECSWR 85
  104. #define TEGRA124_MC_A9AVPSCR 86
  105. #define TEGRA124_MC_A9AVPSCW 87
  106. #define TEGRA124_MC_GPUSRD 88
  107. #define TEGRA124_MC_GPUSWR 89
  108. #define TEGRA124_MC_DISPLAYT 90
  109. #define TEGRA124_MC_SDMMCRA 96
  110. #define TEGRA124_MC_SDMMCRAA 97
  111. #define TEGRA124_MC_SDMMCR 98
  112. #define TEGRA124_MC_SDMMCRAB 99
  113. #define TEGRA124_MC_SDMMCWA 100
  114. #define TEGRA124_MC_SDMMCWAA 101
  115. #define TEGRA124_MC_SDMMCW 102
  116. #define TEGRA124_MC_SDMMCWAB 103
  117. #define TEGRA124_MC_VICSRD 108
  118. #define TEGRA124_MC_VICSWR 109
  119. #define TEGRA124_MC_VIW 114
  120. #define TEGRA124_MC_DISPLAYD 115
  121. #endif