qcom,pitti.h 2.8 KB

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  1. /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
  2. /*
  3. * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
  4. */
  5. #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_PITTI_H
  6. #define __DT_BINDINGS_INTERCONNECT_QCOM_PITTI_H
  7. /*
  8. * ID's used in RPM messages
  9. */
  10. #define MASTER_AMPSS_M0 0
  11. #define MASTER_SNOC_BIMC_RT 1
  12. #define MASTER_SNOC_BIMC_NRT 2
  13. #define SNOC_BIMC_MAS 3
  14. #define MASTER_GRAPHICS_3D 4
  15. #define MASTER_TCU_0 5
  16. #define MASTER_QUP_CORE_0 6
  17. #define MASTER_QUP_CORE_1 7
  18. #define SNOC_CNOC_MAS 8
  19. #define MASTER_QDSS_DAP 9
  20. #define MASTER_CAMNOC_SF 10
  21. #define MASTER_VIDEO_P0 11
  22. #define MASTER_VIDEO_PROC 12
  23. #define MASTER_CAMNOC_HF 13
  24. #define MASTER_MDP_PORT0 14
  25. #define MASTER_TIC 15
  26. #define A0NOC_SNOC_MAS 16
  27. #define BIMC_SNOC_MAS 17
  28. #define MASTER_PIMEM 18
  29. #define MASTER_QUP_0 19
  30. #define MASTER_QUP_1 20
  31. #define MASTER_CRYPTO_CORE0 21
  32. #define MASTER_IPA 22
  33. #define MASTER_QDSS_ETR 23
  34. #define MASTER_SDCC_1 24
  35. #define MASTER_SDCC_2 25
  36. #define MASTER_UFS_MEM 26
  37. #define MASTER_USB3 27
  38. #define SLAVE_EBI_CH0 512
  39. #define BIMC_SNOC_SLV 513
  40. #define SLAVE_QUP_CORE_0 514
  41. #define SLAVE_QUP_CORE_1 515
  42. #define SLAVE_AHB2PHY_USB 516
  43. #define SLAVE_BIMC_CFG 517
  44. #define SLAVE_BOOT_ROM 518
  45. #define SLAVE_CAMERA_NRT_THROTTLE_CFG 519
  46. #define SLAVE_CAMERA_RT_THROTTLE_CFG 520
  47. #define SLAVE_CAMERA_CFG 521
  48. #define SLAVE_CLK_CTL 522
  49. #define SLAVE_RBCPR_CX_CFG 523
  50. #define SLAVE_RBCPR_MX_CFG 524
  51. #define SLAVE_CRYPTO_0_CFG 525
  52. #define SLAVE_DDR_PHY_CFG 526
  53. #define SLAVE_DDR_SS_CFG 527
  54. #define SLAVE_DISPLAY_CFG 528
  55. #define SLAVE_DISPLAY_THROTTLE_CFG 529
  56. #define SLAVE_GPU_CFG 530
  57. #define SLAVE_IMEM_CFG 531
  58. #define SLAVE_IPA_CFG 532
  59. #define SLAVE_MAPSS 533
  60. #define SLAVE_MDSP_MPU_CFG 534
  61. #define SLAVE_MESSAGE_RAM 535
  62. #define SLAVE_CNOC_MSS 536
  63. #define SLAVE_PDM 537
  64. #define SLAVE_PIMEM_CFG 538
  65. #define SLAVE_PMIC_ARB 539
  66. #define SLAVE_PRNG 540
  67. #define SLAVE_QDSS_CFG 541
  68. #define SLAVE_QM_CFG 542
  69. #define SLAVE_QM_MPU_CFG 543
  70. #define SLAVE_QUP_0 544
  71. #define SLAVE_RPM 545
  72. #define SLAVE_SDCC_1 546
  73. #define SLAVE_SDCC_2 547
  74. #define SLAVE_SECURITY 548
  75. #define SLAVE_TCSR 549
  76. #define SLAVE_UFS_MEM_CFG 550
  77. #define SLAVE_USB3 551
  78. #define SLAVE_VENUS_CFG 552
  79. #define SLAVE_VENUS_THROTTLE_CFG 553
  80. #define SLAVE_VSENSE_CTRL_CFG 554
  81. #define SLAVE_MCDMA_MPU_CFG 555
  82. #define SLAVE_LPASS 556
  83. #define DDRSS_THROTTLE_CFG 557
  84. #define SLAVE_SERVICE_CNOC 558
  85. #define SLAVE_QUP_1 559
  86. #define SLAVE_SNOC_BIMC_NRT 560
  87. #define SLAVE_SNOC_BIMC_RT 561
  88. #define SLAVE_APPSS 562
  89. #define SNOC_CNOC_SLV 563
  90. #define SLAVE_OCIMEM 564
  91. #define SLAVE_PIMEM 565
  92. #define SNOC_BIMC_SLV 566
  93. #define SLAVE_QDSS_STM 567
  94. #define SLAVE_TCU 568
  95. #define A0NOC_SNOC_SLV 569
  96. #endif