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- /* SPDX-License-Identifier: GPL-2.0-only */
- /*
- * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
- */
- #ifndef _DT_BINDINGS_CLK_QCOM_SCC_SM6150_H
- #define _DT_BINDINGS_CLK_QCOM_SCC_SM6150_H
- /* SCC clocks */
- #define SCC_CDIV_QUPV3_2XCORE_DIV_CLK_SRC 0
- #define SCC_CDIV_QUPV3_CORE_DIV_CLK_SRC 1
- #define SCC_MAIN_RCG_CDIV_BUS_DIV_CLK_SRC 2
- #define SCC_MAIN_RCG_CLK_SRC 3
- #define SCC_QUPV3_2XCORE_CLK 4
- #define SCC_QUPV3_CORE_CLK 5
- #define SCC_QUPV3_M_HCLK_CLK 6
- #define SCC_QUPV3_S_HCLK_CLK 7
- #define SCC_QUPV3_SE0_CLK 8
- #define SCC_QUPV3_SE0_CLK_SRC 9
- #define SCC_QUPV3_SE1_CLK 10
- #define SCC_QUPV3_SE1_CLK_SRC 11
- #define SCC_QUPV3_SE2_CLK 12
- #define SCC_QUPV3_SE2_CLK_SRC 13
- #define SCC_QUPV3_SE3_CLK 14
- #define SCC_QUPV3_SE3_CLK_SRC 15
- #define SCC_QUPV3_SE4_CLK 16
- #define SCC_QUPV3_SE4_CLK_SRC 17
- #define SCC_QUPV3_SE5_CLK 18
- #define SCC_QUPV3_SE5_CLK_SRC 19
- #endif
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