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- /* SPDX-License-Identifier: GPL-2.0-or-later */
- /*
- * Copyright (c) 2015 HiSilicon Technologies Co., Ltd.
- */
- #ifndef __DTS_HI3519_CLOCK_H
- #define __DTS_HI3519_CLOCK_H
- #define HI3519_FMC_CLK 1
- #define HI3519_SPI0_CLK 2
- #define HI3519_SPI1_CLK 3
- #define HI3519_SPI2_CLK 4
- #define HI3519_UART0_CLK 5
- #define HI3519_UART1_CLK 6
- #define HI3519_UART2_CLK 7
- #define HI3519_UART3_CLK 8
- #define HI3519_UART4_CLK 9
- #define HI3519_PWM_CLK 10
- #define HI3519_DMA_CLK 11
- #define HI3519_IR_CLK 12
- #define HI3519_ETH_PHY_CLK 13
- #define HI3519_ETH_MAC_CLK 14
- #define HI3519_ETH_MACIF_CLK 15
- #define HI3519_USB2_BUS_CLK 16
- #define HI3519_USB2_PORT_CLK 17
- #define HI3519_USB3_CLK 18
- #endif /* __DTS_HI3519_CLOCK_H */
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