drm_dsc.h 16 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605
  1. /* SPDX-License-Identifier: MIT
  2. * Copyright (C) 2018 Intel Corp.
  3. *
  4. * Authors:
  5. * Manasi Navare <[email protected]>
  6. */
  7. #ifndef DRM_DSC_H_
  8. #define DRM_DSC_H_
  9. #include <drm/display/drm_dp.h>
  10. /* VESA Display Stream Compression DSC 1.2 constants */
  11. #define DSC_NUM_BUF_RANGES 15
  12. #define DSC_MUX_WORD_SIZE_8_10_BPC 48
  13. #define DSC_MUX_WORD_SIZE_12_BPC 64
  14. #define DSC_RC_PIXELS_PER_GROUP 3
  15. #define DSC_SCALE_DECREMENT_INTERVAL_MAX 4095
  16. #define DSC_RANGE_BPG_OFFSET_MASK 0x3f
  17. /* DSC Rate Control Constants */
  18. #define DSC_RC_MODEL_SIZE_CONST 8192
  19. #define DSC_RC_EDGE_FACTOR_CONST 6
  20. #define DSC_RC_TGT_OFFSET_HI_CONST 3
  21. #define DSC_RC_TGT_OFFSET_LO_CONST 3
  22. /* DSC PPS constants and macros */
  23. #define DSC_PPS_VERSION_MAJOR_SHIFT 4
  24. #define DSC_PPS_BPC_SHIFT 4
  25. #define DSC_PPS_MSB_SHIFT 8
  26. #define DSC_PPS_LSB_MASK (0xFF << 0)
  27. #define DSC_PPS_BPP_HIGH_MASK (0x3 << 8)
  28. #define DSC_PPS_VBR_EN_SHIFT 2
  29. #define DSC_PPS_SIMPLE422_SHIFT 3
  30. #define DSC_PPS_CONVERT_RGB_SHIFT 4
  31. #define DSC_PPS_BLOCK_PRED_EN_SHIFT 5
  32. #define DSC_PPS_INIT_XMIT_DELAY_HIGH_MASK (0x3 << 8)
  33. #define DSC_PPS_SCALE_DEC_INT_HIGH_MASK (0xF << 8)
  34. #define DSC_PPS_RC_TGT_OFFSET_HI_SHIFT 4
  35. #define DSC_PPS_RC_RANGE_MINQP_SHIFT 11
  36. #define DSC_PPS_RC_RANGE_MAXQP_SHIFT 6
  37. #define DSC_PPS_NATIVE_420_SHIFT 1
  38. #define DSC_1_2_MAX_LINEBUF_DEPTH_BITS 16
  39. #define DSC_1_2_MAX_LINEBUF_DEPTH_VAL 0
  40. #define DSC_1_1_MAX_LINEBUF_DEPTH_BITS 13
  41. /**
  42. * struct drm_dsc_rc_range_parameters - DSC Rate Control range parameters
  43. *
  44. * This defines different rate control parameters used by the DSC engine
  45. * to compress the frame.
  46. */
  47. struct drm_dsc_rc_range_parameters {
  48. /**
  49. * @range_min_qp: Min Quantization Parameters allowed for this range
  50. */
  51. u8 range_min_qp;
  52. /**
  53. * @range_max_qp: Max Quantization Parameters allowed for this range
  54. */
  55. u8 range_max_qp;
  56. /**
  57. * @range_bpg_offset:
  58. * Bits/group offset to apply to target for this group
  59. */
  60. u8 range_bpg_offset;
  61. };
  62. /**
  63. * struct drm_dsc_config - Parameters required to configure DSC
  64. *
  65. * Driver populates this structure with all the parameters required
  66. * to configure the display stream compression on the source.
  67. */
  68. struct drm_dsc_config {
  69. /**
  70. * @line_buf_depth:
  71. * Bits per component for previous reconstructed line buffer
  72. */
  73. u8 line_buf_depth;
  74. /**
  75. * @bits_per_component: Bits per component to code (8/10/12)
  76. */
  77. u8 bits_per_component;
  78. /**
  79. * @convert_rgb:
  80. * Flag to indicate if RGB - YCoCg conversion is needed
  81. * True if RGB input, False if YCoCg input
  82. */
  83. bool convert_rgb;
  84. /**
  85. * @slice_count: Number fo slices per line used by the DSC encoder
  86. */
  87. u8 slice_count;
  88. /**
  89. * @slice_width: Width of each slice in pixels
  90. */
  91. u16 slice_width;
  92. /**
  93. * @slice_height: Slice height in pixels
  94. */
  95. u16 slice_height;
  96. /**
  97. * @simple_422: True if simple 4_2_2 mode is enabled else False
  98. */
  99. bool simple_422;
  100. /**
  101. * @pic_width: Width of the input display frame in pixels
  102. */
  103. u16 pic_width;
  104. /**
  105. * @pic_height: Vertical height of the input display frame
  106. */
  107. u16 pic_height;
  108. /**
  109. * @rc_tgt_offset_high:
  110. * Offset to bits/group used by RC to determine QP adjustment
  111. */
  112. u8 rc_tgt_offset_high;
  113. /**
  114. * @rc_tgt_offset_low:
  115. * Offset to bits/group used by RC to determine QP adjustment
  116. */
  117. u8 rc_tgt_offset_low;
  118. /**
  119. * @bits_per_pixel:
  120. * Target bits per pixel with 4 fractional bits, bits_per_pixel << 4
  121. */
  122. u16 bits_per_pixel;
  123. /**
  124. * @rc_edge_factor:
  125. * Factor to determine if an edge is present based on the bits produced
  126. */
  127. u8 rc_edge_factor;
  128. /**
  129. * @rc_quant_incr_limit1:
  130. * Slow down incrementing once the range reaches this value
  131. */
  132. u8 rc_quant_incr_limit1;
  133. /**
  134. * @rc_quant_incr_limit0:
  135. * Slow down incrementing once the range reaches this value
  136. */
  137. u8 rc_quant_incr_limit0;
  138. /**
  139. * @initial_xmit_delay:
  140. * Number of pixels to delay the initial transmission
  141. */
  142. u16 initial_xmit_delay;
  143. /**
  144. * @initial_dec_delay:
  145. * Initial decoder delay, number of pixel times that the decoder
  146. * accumulates data in its rate buffer before starting to decode
  147. * and output pixels.
  148. */
  149. u16 initial_dec_delay;
  150. /**
  151. * @block_pred_enable:
  152. * True if block prediction is used to code any groups within the
  153. * picture. False if BP not used
  154. */
  155. bool block_pred_enable;
  156. /**
  157. * @first_line_bpg_offset:
  158. * Number of additional bits allocated for each group on the first
  159. * line of slice.
  160. */
  161. u8 first_line_bpg_offset;
  162. /**
  163. * @initial_offset: Value to use for RC model offset at slice start
  164. */
  165. u16 initial_offset;
  166. /**
  167. * @rc_buf_thresh: Thresholds defining each of the buffer ranges
  168. */
  169. u16 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1];
  170. /**
  171. * @rc_range_params:
  172. * Parameters for each of the RC ranges defined in
  173. * &struct drm_dsc_rc_range_parameters
  174. */
  175. struct drm_dsc_rc_range_parameters rc_range_params[DSC_NUM_BUF_RANGES];
  176. /**
  177. * @rc_model_size: Total size of RC model
  178. */
  179. u16 rc_model_size;
  180. /**
  181. * @flatness_min_qp: Minimum QP where flatness information is sent
  182. */
  183. u8 flatness_min_qp;
  184. /**
  185. * @flatness_max_qp: Maximum QP where flatness information is sent
  186. */
  187. u8 flatness_max_qp;
  188. /**
  189. * @initial_scale_value: Initial value for the scale factor
  190. */
  191. u8 initial_scale_value;
  192. /**
  193. * @scale_decrement_interval:
  194. * Specifies number of group times between decrementing the scale factor
  195. * at beginning of a slice.
  196. */
  197. u16 scale_decrement_interval;
  198. /**
  199. * @scale_increment_interval:
  200. * Number of group times between incrementing the scale factor value
  201. * used at the beginning of a slice.
  202. */
  203. u16 scale_increment_interval;
  204. /**
  205. * @nfl_bpg_offset: Non first line BPG offset to be used
  206. */
  207. u16 nfl_bpg_offset;
  208. /**
  209. * @slice_bpg_offset: BPG offset used to enforce slice bit
  210. */
  211. u16 slice_bpg_offset;
  212. /**
  213. * @final_offset: Final RC linear transformation offset value
  214. */
  215. u16 final_offset;
  216. /**
  217. * @vbr_enable: True if VBR mode is enabled, false if disabled
  218. */
  219. bool vbr_enable;
  220. /**
  221. * @mux_word_size: Mux word size (in bits) for SSM mode
  222. */
  223. u8 mux_word_size;
  224. /**
  225. * @slice_chunk_size:
  226. * The (max) size in bytes of the "chunks" that are used in slice
  227. * multiplexing.
  228. */
  229. u16 slice_chunk_size;
  230. /**
  231. * @rc_bits: Rate control buffer size in bits
  232. */
  233. u16 rc_bits;
  234. /**
  235. * @dsc_version_minor: DSC minor version
  236. */
  237. u8 dsc_version_minor;
  238. /**
  239. * @dsc_version_major: DSC major version
  240. */
  241. u8 dsc_version_major;
  242. /**
  243. * @native_422: True if Native 4:2:2 supported, else false
  244. */
  245. bool native_422;
  246. /**
  247. * @native_420: True if Native 4:2:0 supported else false.
  248. */
  249. bool native_420;
  250. /**
  251. * @second_line_bpg_offset:
  252. * Additional bits/grp for seconnd line of slice for native 4:2:0
  253. */
  254. u8 second_line_bpg_offset;
  255. /**
  256. * @nsl_bpg_offset:
  257. * Num of bits deallocated for each grp that is not in second line of
  258. * slice
  259. */
  260. u16 nsl_bpg_offset;
  261. /**
  262. * @second_line_offset_adj:
  263. * Offset adjustment for second line in Native 4:2:0 mode
  264. */
  265. u16 second_line_offset_adj;
  266. };
  267. /**
  268. * struct drm_dsc_picture_parameter_set - Represents 128 bytes of
  269. * Picture Parameter Set
  270. *
  271. * The VESA DSC standard defines picture parameter set (PPS) which display
  272. * stream compression encoders must communicate to decoders.
  273. * The PPS is encapsulated in 128 bytes (PPS 0 through PPS 127). The fields in
  274. * this structure are as per Table 4.1 in Vesa DSC specification v1.1/v1.2.
  275. * The PPS fields that span over more than a byte should be stored in Big Endian
  276. * format.
  277. */
  278. struct drm_dsc_picture_parameter_set {
  279. /**
  280. * @dsc_version:
  281. * PPS0[3:0] - dsc_version_minor: Contains Minor version of DSC
  282. * PPS0[7:4] - dsc_version_major: Contains major version of DSC
  283. */
  284. u8 dsc_version;
  285. /**
  286. * @pps_identifier:
  287. * PPS1[7:0] - Application specific identifier that can be
  288. * used to differentiate between different PPS tables.
  289. */
  290. u8 pps_identifier;
  291. /**
  292. * @pps_reserved:
  293. * PPS2[7:0]- RESERVED Byte
  294. */
  295. u8 pps_reserved;
  296. /**
  297. * @pps_3:
  298. * PPS3[3:0] - linebuf_depth: Contains linebuffer bit depth used to
  299. * generate the bitstream. (0x0 - 16 bits for DSC 1.2, 0x8 - 8 bits,
  300. * 0xA - 10 bits, 0xB - 11 bits, 0xC - 12 bits, 0xD - 13 bits,
  301. * 0xE - 14 bits for DSC1.2, 0xF - 14 bits for DSC 1.2.
  302. * PPS3[7:4] - bits_per_component: Bits per component for the original
  303. * pixels of the encoded picture.
  304. * 0x0 = 16bpc (allowed only when dsc_version_minor = 0x2)
  305. * 0x8 = 8bpc, 0xA = 10bpc, 0xC = 12bpc, 0xE = 14bpc (also
  306. * allowed only when dsc_minor_version = 0x2)
  307. */
  308. u8 pps_3;
  309. /**
  310. * @pps_4:
  311. * PPS4[1:0] -These are the most significant 2 bits of
  312. * compressed BPP bits_per_pixel[9:0] syntax element.
  313. * PPS4[2] - vbr_enable: 0 = VBR disabled, 1 = VBR enabled
  314. * PPS4[3] - simple_422: Indicates if decoder drops samples to
  315. * reconstruct the 4:2:2 picture.
  316. * PPS4[4] - Convert_rgb: Indicates if DSC color space conversion is
  317. * active.
  318. * PPS4[5] - blobk_pred_enable: Indicates if BP is used to code any
  319. * groups in picture
  320. * PPS4[7:6] - Reseved bits
  321. */
  322. u8 pps_4;
  323. /**
  324. * @bits_per_pixel_low:
  325. * PPS5[7:0] - This indicates the lower significant 8 bits of
  326. * the compressed BPP bits_per_pixel[9:0] element.
  327. */
  328. u8 bits_per_pixel_low;
  329. /**
  330. * @pic_height:
  331. * PPS6[7:0], PPS7[7:0] -pic_height: Specifies the number of pixel rows
  332. * within the raster.
  333. */
  334. __be16 pic_height;
  335. /**
  336. * @pic_width:
  337. * PPS8[7:0], PPS9[7:0] - pic_width: Number of pixel columns within
  338. * the raster.
  339. */
  340. __be16 pic_width;
  341. /**
  342. * @slice_height:
  343. * PPS10[7:0], PPS11[7:0] - Slice height in units of pixels.
  344. */
  345. __be16 slice_height;
  346. /**
  347. * @slice_width:
  348. * PPS12[7:0], PPS13[7:0] - Slice width in terms of pixels.
  349. */
  350. __be16 slice_width;
  351. /**
  352. * @chunk_size:
  353. * PPS14[7:0], PPS15[7:0] - Size in units of bytes of the chunks
  354. * that are used for slice multiplexing.
  355. */
  356. __be16 chunk_size;
  357. /**
  358. * @initial_xmit_delay_high:
  359. * PPS16[1:0] - Most Significant two bits of initial transmission delay.
  360. * It specifies the number of pixel times that the encoder waits before
  361. * transmitting data from its rate buffer.
  362. * PPS16[7:2] - Reserved
  363. */
  364. u8 initial_xmit_delay_high;
  365. /**
  366. * @initial_xmit_delay_low:
  367. * PPS17[7:0] - Least significant 8 bits of initial transmission delay.
  368. */
  369. u8 initial_xmit_delay_low;
  370. /**
  371. * @initial_dec_delay:
  372. *
  373. * PPS18[7:0], PPS19[7:0] - Initial decoding delay which is the number
  374. * of pixel times that the decoder accumulates data in its rate buffer
  375. * before starting to decode and output pixels.
  376. */
  377. __be16 initial_dec_delay;
  378. /**
  379. * @pps20_reserved:
  380. *
  381. * PPS20[7:0] - Reserved
  382. */
  383. u8 pps20_reserved;
  384. /**
  385. * @initial_scale_value:
  386. * PPS21[5:0] - Initial rcXformScale factor used at beginning
  387. * of a slice.
  388. * PPS21[7:6] - Reserved
  389. */
  390. u8 initial_scale_value;
  391. /**
  392. * @scale_increment_interval:
  393. * PPS22[7:0], PPS23[7:0] - Number of group times between incrementing
  394. * the rcXformScale factor at end of a slice.
  395. */
  396. __be16 scale_increment_interval;
  397. /**
  398. * @scale_decrement_interval_high:
  399. * PPS24[3:0] - Higher 4 bits indicating number of group times between
  400. * decrementing the rcXformScale factor at beginning of a slice.
  401. * PPS24[7:4] - Reserved
  402. */
  403. u8 scale_decrement_interval_high;
  404. /**
  405. * @scale_decrement_interval_low:
  406. * PPS25[7:0] - Lower 8 bits of scale decrement interval
  407. */
  408. u8 scale_decrement_interval_low;
  409. /**
  410. * @pps26_reserved:
  411. * PPS26[7:0]
  412. */
  413. u8 pps26_reserved;
  414. /**
  415. * @first_line_bpg_offset:
  416. * PPS27[4:0] - Number of additional bits that are allocated
  417. * for each group on first line of a slice.
  418. * PPS27[7:5] - Reserved
  419. */
  420. u8 first_line_bpg_offset;
  421. /**
  422. * @nfl_bpg_offset:
  423. * PPS28[7:0], PPS29[7:0] - Number of bits including frac bits
  424. * deallocated for each group for groups after the first line of slice.
  425. */
  426. __be16 nfl_bpg_offset;
  427. /**
  428. * @slice_bpg_offset:
  429. * PPS30, PPS31[7:0] - Number of bits that are deallocated for each
  430. * group to enforce the slice constraint.
  431. */
  432. __be16 slice_bpg_offset;
  433. /**
  434. * @initial_offset:
  435. * PPS32,33[7:0] - Initial value for rcXformOffset
  436. */
  437. __be16 initial_offset;
  438. /**
  439. * @final_offset:
  440. * PPS34,35[7:0] - Maximum end-of-slice value for rcXformOffset
  441. */
  442. __be16 final_offset;
  443. /**
  444. * @flatness_min_qp:
  445. * PPS36[4:0] - Minimum QP at which flatness is signaled and
  446. * flatness QP adjustment is made.
  447. * PPS36[7:5] - Reserved
  448. */
  449. u8 flatness_min_qp;
  450. /**
  451. * @flatness_max_qp:
  452. * PPS37[4:0] - Max QP at which flatness is signalled and
  453. * the flatness adjustment is made.
  454. * PPS37[7:5] - Reserved
  455. */
  456. u8 flatness_max_qp;
  457. /**
  458. * @rc_model_size:
  459. * PPS38,39[7:0] - Number of bits within RC Model.
  460. */
  461. __be16 rc_model_size;
  462. /**
  463. * @rc_edge_factor:
  464. * PPS40[3:0] - Ratio of current activity vs, previous
  465. * activity to determine presence of edge.
  466. * PPS40[7:4] - Reserved
  467. */
  468. u8 rc_edge_factor;
  469. /**
  470. * @rc_quant_incr_limit0:
  471. * PPS41[4:0] - QP threshold used in short term RC
  472. * PPS41[7:5] - Reserved
  473. */
  474. u8 rc_quant_incr_limit0;
  475. /**
  476. * @rc_quant_incr_limit1:
  477. * PPS42[4:0] - QP threshold used in short term RC
  478. * PPS42[7:5] - Reserved
  479. */
  480. u8 rc_quant_incr_limit1;
  481. /**
  482. * @rc_tgt_offset:
  483. * PPS43[3:0] - Lower end of the variability range around the target
  484. * bits per group that is allowed by short term RC.
  485. * PPS43[7:4]- Upper end of the variability range around the target
  486. * bits per group that i allowed by short term rc.
  487. */
  488. u8 rc_tgt_offset;
  489. /**
  490. * @rc_buf_thresh:
  491. * PPS44[7:0] - PPS57[7:0] - Specifies the thresholds in RC model for
  492. * the 15 ranges defined by 14 thresholds.
  493. */
  494. u8 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1];
  495. /**
  496. * @rc_range_parameters:
  497. * PPS58[7:0] - PPS87[7:0]
  498. * Parameters that correspond to each of the 15 ranges.
  499. */
  500. __be16 rc_range_parameters[DSC_NUM_BUF_RANGES];
  501. /**
  502. * @native_422_420:
  503. * PPS88[0] - 0 = Native 4:2:2 not used
  504. * 1 = Native 4:2:2 used
  505. * PPS88[1] - 0 = Native 4:2:0 not use
  506. * 1 = Native 4:2:0 used
  507. * PPS88[7:2] - Reserved 6 bits
  508. */
  509. u8 native_422_420;
  510. /**
  511. * @second_line_bpg_offset:
  512. * PPS89[4:0] - Additional bits/group budget for the
  513. * second line of a slice in Native 4:2:0 mode.
  514. * Set to 0 if DSC minor version is 1 or native420 is 0.
  515. * PPS89[7:5] - Reserved
  516. */
  517. u8 second_line_bpg_offset;
  518. /**
  519. * @nsl_bpg_offset:
  520. * PPS90[7:0], PPS91[7:0] - Number of bits that are deallocated
  521. * for each group that is not in the second line of a slice.
  522. */
  523. __be16 nsl_bpg_offset;
  524. /**
  525. * @second_line_offset_adj:
  526. * PPS92[7:0], PPS93[7:0] - Used as offset adjustment for the second
  527. * line in Native 4:2:0 mode.
  528. */
  529. __be16 second_line_offset_adj;
  530. /**
  531. * @pps_long_94_reserved:
  532. * PPS 94, 95, 96, 97 - Reserved
  533. */
  534. u32 pps_long_94_reserved;
  535. /**
  536. * @pps_long_98_reserved:
  537. * PPS 98, 99, 100, 101 - Reserved
  538. */
  539. u32 pps_long_98_reserved;
  540. /**
  541. * @pps_long_102_reserved:
  542. * PPS 102, 103, 104, 105 - Reserved
  543. */
  544. u32 pps_long_102_reserved;
  545. /**
  546. * @pps_long_106_reserved:
  547. * PPS 106, 107, 108, 109 - reserved
  548. */
  549. u32 pps_long_106_reserved;
  550. /**
  551. * @pps_long_110_reserved:
  552. * PPS 110, 111, 112, 113 - reserved
  553. */
  554. u32 pps_long_110_reserved;
  555. /**
  556. * @pps_long_114_reserved:
  557. * PPS 114 - 117 - reserved
  558. */
  559. u32 pps_long_114_reserved;
  560. /**
  561. * @pps_long_118_reserved:
  562. * PPS 118 - 121 - reserved
  563. */
  564. u32 pps_long_118_reserved;
  565. /**
  566. * @pps_long_122_reserved:
  567. * PPS 122- 125 - reserved
  568. */
  569. u32 pps_long_122_reserved;
  570. /**
  571. * @pps_short_126_reserved:
  572. * PPS 126, 127 - reserved
  573. */
  574. __be16 pps_short_126_reserved;
  575. } __packed;
  576. /**
  577. * struct drm_dsc_pps_infoframe - DSC infoframe carrying the Picture Parameter
  578. * Set Metadata
  579. *
  580. * This structure represents the DSC PPS infoframe required to send the Picture
  581. * Parameter Set metadata required before enabling VESA Display Stream
  582. * Compression. This is based on the DP Secondary Data Packet structure and
  583. * comprises of SDP Header as defined &struct dp_sdp_header in drm_dp_helper.h
  584. * and PPS payload defined in &struct drm_dsc_picture_parameter_set.
  585. *
  586. * @pps_header: Header for PPS as per DP SDP header format of type
  587. * &struct dp_sdp_header
  588. * @pps_payload: PPS payload fields as per DSC specification Table 4-1
  589. * as represented in &struct drm_dsc_picture_parameter_set
  590. */
  591. struct drm_dsc_pps_infoframe {
  592. struct dp_sdp_header pps_header;
  593. struct drm_dsc_picture_parameter_set pps_payload;
  594. } __packed;
  595. #endif /* _DRM_DSC_H_ */