gxp-wdt.c 4.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /* Copyright (C) 2022 Hewlett-Packard Enterprise Development Company, L.P. */
  3. #include <linux/delay.h>
  4. #include <linux/io.h>
  5. #include <linux/module.h>
  6. #include <linux/platform_device.h>
  7. #include <linux/types.h>
  8. #include <linux/watchdog.h>
  9. #define MASK_WDGCS_ENABLE 0x01
  10. #define MASK_WDGCS_RELOAD 0x04
  11. #define MASK_WDGCS_NMIEN 0x08
  12. #define MASK_WDGCS_WARN 0x80
  13. #define WDT_MAX_TIMEOUT_MS 655350
  14. #define WDT_DEFAULT_TIMEOUT 30
  15. #define SECS_TO_WDOG_TICKS(x) ((x) * 100)
  16. #define WDOG_TICKS_TO_SECS(x) ((x) / 100)
  17. #define GXP_WDT_CNT_OFS 0x10
  18. #define GXP_WDT_CTRL_OFS 0x16
  19. struct gxp_wdt {
  20. void __iomem *base;
  21. struct watchdog_device wdd;
  22. };
  23. static void gxp_wdt_enable_reload(struct gxp_wdt *drvdata)
  24. {
  25. u8 val;
  26. val = readb(drvdata->base + GXP_WDT_CTRL_OFS);
  27. val |= (MASK_WDGCS_ENABLE | MASK_WDGCS_RELOAD);
  28. writeb(val, drvdata->base + GXP_WDT_CTRL_OFS);
  29. }
  30. static int gxp_wdt_start(struct watchdog_device *wdd)
  31. {
  32. struct gxp_wdt *drvdata = watchdog_get_drvdata(wdd);
  33. writew(SECS_TO_WDOG_TICKS(wdd->timeout), drvdata->base + GXP_WDT_CNT_OFS);
  34. gxp_wdt_enable_reload(drvdata);
  35. return 0;
  36. }
  37. static int gxp_wdt_stop(struct watchdog_device *wdd)
  38. {
  39. struct gxp_wdt *drvdata = watchdog_get_drvdata(wdd);
  40. u8 val;
  41. val = readb_relaxed(drvdata->base + GXP_WDT_CTRL_OFS);
  42. val &= ~MASK_WDGCS_ENABLE;
  43. writeb(val, drvdata->base + GXP_WDT_CTRL_OFS);
  44. return 0;
  45. }
  46. static int gxp_wdt_set_timeout(struct watchdog_device *wdd,
  47. unsigned int timeout)
  48. {
  49. struct gxp_wdt *drvdata = watchdog_get_drvdata(wdd);
  50. u32 actual;
  51. wdd->timeout = timeout;
  52. actual = min(timeout * 100, wdd->max_hw_heartbeat_ms / 10);
  53. writew(actual, drvdata->base + GXP_WDT_CNT_OFS);
  54. return 0;
  55. }
  56. static unsigned int gxp_wdt_get_timeleft(struct watchdog_device *wdd)
  57. {
  58. struct gxp_wdt *drvdata = watchdog_get_drvdata(wdd);
  59. u32 val = readw(drvdata->base + GXP_WDT_CNT_OFS);
  60. return WDOG_TICKS_TO_SECS(val);
  61. }
  62. static int gxp_wdt_ping(struct watchdog_device *wdd)
  63. {
  64. struct gxp_wdt *drvdata = watchdog_get_drvdata(wdd);
  65. gxp_wdt_enable_reload(drvdata);
  66. return 0;
  67. }
  68. static int gxp_restart(struct watchdog_device *wdd, unsigned long action,
  69. void *data)
  70. {
  71. struct gxp_wdt *drvdata = watchdog_get_drvdata(wdd);
  72. writew(1, drvdata->base + GXP_WDT_CNT_OFS);
  73. gxp_wdt_enable_reload(drvdata);
  74. mdelay(100);
  75. return 0;
  76. }
  77. static const struct watchdog_ops gxp_wdt_ops = {
  78. .owner = THIS_MODULE,
  79. .start = gxp_wdt_start,
  80. .stop = gxp_wdt_stop,
  81. .ping = gxp_wdt_ping,
  82. .set_timeout = gxp_wdt_set_timeout,
  83. .get_timeleft = gxp_wdt_get_timeleft,
  84. .restart = gxp_restart,
  85. };
  86. static const struct watchdog_info gxp_wdt_info = {
  87. .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
  88. .identity = "HPE GXP Watchdog timer",
  89. };
  90. static int gxp_wdt_probe(struct platform_device *pdev)
  91. {
  92. struct device *dev = &pdev->dev;
  93. struct gxp_wdt *drvdata;
  94. int err;
  95. u8 val;
  96. drvdata = devm_kzalloc(dev, sizeof(struct gxp_wdt), GFP_KERNEL);
  97. if (!drvdata)
  98. return -ENOMEM;
  99. /*
  100. * The register area where the timer and watchdog reside is disarranged.
  101. * Hence mapping individual register blocks for the timer and watchdog
  102. * is not recommended as they would have access to each others
  103. * registers. Based on feedback the watchdog is no longer part of the
  104. * device tree file and the timer driver now creates the watchdog as a
  105. * child device. During the watchdogs creation, the timer driver passes
  106. * the base address to the watchdog over the private interface.
  107. */
  108. drvdata->base = (void __iomem *)dev->platform_data;
  109. drvdata->wdd.info = &gxp_wdt_info;
  110. drvdata->wdd.ops = &gxp_wdt_ops;
  111. drvdata->wdd.max_hw_heartbeat_ms = WDT_MAX_TIMEOUT_MS;
  112. drvdata->wdd.parent = dev;
  113. drvdata->wdd.timeout = WDT_DEFAULT_TIMEOUT;
  114. watchdog_set_drvdata(&drvdata->wdd, drvdata);
  115. watchdog_set_nowayout(&drvdata->wdd, WATCHDOG_NOWAYOUT);
  116. val = readb(drvdata->base + GXP_WDT_CTRL_OFS);
  117. if (val & MASK_WDGCS_ENABLE)
  118. set_bit(WDOG_HW_RUNNING, &drvdata->wdd.status);
  119. watchdog_set_restart_priority(&drvdata->wdd, 128);
  120. watchdog_stop_on_reboot(&drvdata->wdd);
  121. err = devm_watchdog_register_device(dev, &drvdata->wdd);
  122. if (err) {
  123. dev_err(dev, "Failed to register watchdog device");
  124. return err;
  125. }
  126. dev_info(dev, "HPE GXP watchdog timer");
  127. return 0;
  128. }
  129. static struct platform_driver gxp_wdt_driver = {
  130. .probe = gxp_wdt_probe,
  131. .driver = {
  132. .name = "gxp-wdt",
  133. },
  134. };
  135. module_platform_driver(gxp_wdt_driver);
  136. MODULE_AUTHOR("Nick Hawkins <[email protected]>");
  137. MODULE_AUTHOR("Jean-Marie Verdun <[email protected]>");
  138. MODULE_DESCRIPTION("Driver for GXP watchdog timer");
  139. MODULE_LICENSE("GPL");