matroxfb_accel.c 15 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. *
  4. * Hardware accelerated Matrox Millennium I, II, Mystique, G100, G200 and G400
  5. *
  6. * (c) 1998-2002 Petr Vandrovec <[email protected]>
  7. *
  8. * Version: 1.65 2002/08/14
  9. *
  10. * MTRR stuff: 1998 Tom Rini <[email protected]>
  11. *
  12. * Contributors: "menion?" <[email protected]>
  13. * Betatesting, fixes, ideas
  14. *
  15. * "Kurt Garloff" <[email protected]>
  16. * Betatesting, fixes, ideas, videomodes, videomodes timmings
  17. *
  18. * "Tom Rini" <[email protected]>
  19. * MTRR stuff, PPC cleanups, betatesting, fixes, ideas
  20. *
  21. * "Bibek Sahu" <[email protected]>
  22. * Access device through readb|w|l and write b|w|l
  23. * Extensive debugging stuff
  24. *
  25. * "Daniel Haun" <[email protected]>
  26. * Testing, hardware cursor fixes
  27. *
  28. * "Scott Wood" <[email protected]>
  29. * Fixes
  30. *
  31. * "Gerd Knorr" <[email protected]>
  32. * Betatesting
  33. *
  34. * "Kelly French" <[email protected]>
  35. * "Fernando Herrera" <[email protected]>
  36. * Betatesting, bug reporting
  37. *
  38. * "Pablo Bianucci" <[email protected]>
  39. * Fixes, ideas, betatesting
  40. *
  41. * "Inaky Perez Gonzalez" <[email protected]>
  42. * Fixes, enhandcements, ideas, betatesting
  43. *
  44. * "Ryuichi Oikawa" <[email protected]>
  45. * PPC betatesting, PPC support, backward compatibility
  46. *
  47. * "Paul Womar" <[email protected]>
  48. * "Owen Waller" <[email protected]>
  49. * PPC betatesting
  50. *
  51. * "Thomas Pornin" <[email protected]>
  52. * Alpha betatesting
  53. *
  54. * "Pieter van Leuven" <[email protected]>
  55. * "Ulf Jaenicke-Roessler" <[email protected]>
  56. * G100 testing
  57. *
  58. * "H. Peter Arvin" <[email protected]>
  59. * Ideas
  60. *
  61. * "Cort Dougan" <[email protected]>
  62. * CHRP fixes and PReP cleanup
  63. *
  64. * "Mark Vojkovich" <[email protected]>
  65. * G400 support
  66. *
  67. * (following author is not in any relation with this code, but his code
  68. * is included in this driver)
  69. *
  70. * Based on framebuffer driver for VBE 2.0 compliant graphic boards
  71. * (c) 1998 Gerd Knorr <[email protected]>
  72. *
  73. * (following author is not in any relation with this code, but his ideas
  74. * were used when writing this driver)
  75. *
  76. * FreeVBE/AF (Matrox), "Shawn Hargreaves" <[email protected]>
  77. *
  78. */
  79. #include "matroxfb_accel.h"
  80. #include "matroxfb_DAC1064.h"
  81. #include "matroxfb_Ti3026.h"
  82. #include "matroxfb_misc.h"
  83. #define curr_ydstorg(x) ((x)->curr.ydstorg.pixels)
  84. #define mga_ydstlen(y,l) mga_outl(M_YDSTLEN | M_EXEC, ((y) << 16) | (l))
  85. static inline void matrox_cfb4_pal(u_int32_t* pal) {
  86. unsigned int i;
  87. for (i = 0; i < 16; i++) {
  88. pal[i] = i * 0x11111111U;
  89. }
  90. }
  91. static inline void matrox_cfb8_pal(u_int32_t* pal) {
  92. unsigned int i;
  93. for (i = 0; i < 16; i++) {
  94. pal[i] = i * 0x01010101U;
  95. }
  96. }
  97. static void matroxfb_copyarea(struct fb_info* info, const struct fb_copyarea* area);
  98. static void matroxfb_fillrect(struct fb_info* info, const struct fb_fillrect* rect);
  99. static void matroxfb_imageblit(struct fb_info* info, const struct fb_image* image);
  100. static void matroxfb_cfb4_fillrect(struct fb_info* info, const struct fb_fillrect* rect);
  101. static void matroxfb_cfb4_copyarea(struct fb_info* info, const struct fb_copyarea* area);
  102. void matrox_cfbX_init(struct matrox_fb_info *minfo)
  103. {
  104. u_int32_t maccess;
  105. u_int32_t mpitch;
  106. u_int32_t mopmode;
  107. int accel;
  108. DBG(__func__)
  109. mpitch = minfo->fbcon.var.xres_virtual;
  110. minfo->fbops.fb_copyarea = cfb_copyarea;
  111. minfo->fbops.fb_fillrect = cfb_fillrect;
  112. minfo->fbops.fb_imageblit = cfb_imageblit;
  113. minfo->fbops.fb_cursor = NULL;
  114. accel = (minfo->fbcon.var.accel_flags & FB_ACCELF_TEXT) == FB_ACCELF_TEXT;
  115. switch (minfo->fbcon.var.bits_per_pixel) {
  116. case 4: maccess = 0x00000000; /* accelerate as 8bpp video */
  117. mpitch = (mpitch >> 1) | 0x8000; /* disable linearization */
  118. mopmode = M_OPMODE_4BPP;
  119. matrox_cfb4_pal(minfo->cmap);
  120. if (accel && !(mpitch & 1)) {
  121. minfo->fbops.fb_copyarea = matroxfb_cfb4_copyarea;
  122. minfo->fbops.fb_fillrect = matroxfb_cfb4_fillrect;
  123. }
  124. break;
  125. case 8: maccess = 0x00000000;
  126. mopmode = M_OPMODE_8BPP;
  127. matrox_cfb8_pal(minfo->cmap);
  128. if (accel) {
  129. minfo->fbops.fb_copyarea = matroxfb_copyarea;
  130. minfo->fbops.fb_fillrect = matroxfb_fillrect;
  131. minfo->fbops.fb_imageblit = matroxfb_imageblit;
  132. }
  133. break;
  134. case 16: if (minfo->fbcon.var.green.length == 5)
  135. maccess = 0xC0000001;
  136. else
  137. maccess = 0x40000001;
  138. mopmode = M_OPMODE_16BPP;
  139. if (accel) {
  140. minfo->fbops.fb_copyarea = matroxfb_copyarea;
  141. minfo->fbops.fb_fillrect = matroxfb_fillrect;
  142. minfo->fbops.fb_imageblit = matroxfb_imageblit;
  143. }
  144. break;
  145. case 24: maccess = 0x00000003;
  146. mopmode = M_OPMODE_24BPP;
  147. if (accel) {
  148. minfo->fbops.fb_copyarea = matroxfb_copyarea;
  149. minfo->fbops.fb_fillrect = matroxfb_fillrect;
  150. minfo->fbops.fb_imageblit = matroxfb_imageblit;
  151. }
  152. break;
  153. case 32: maccess = 0x00000002;
  154. mopmode = M_OPMODE_32BPP;
  155. if (accel) {
  156. minfo->fbops.fb_copyarea = matroxfb_copyarea;
  157. minfo->fbops.fb_fillrect = matroxfb_fillrect;
  158. minfo->fbops.fb_imageblit = matroxfb_imageblit;
  159. }
  160. break;
  161. default: maccess = 0x00000000;
  162. mopmode = 0x00000000;
  163. break; /* turn off acceleration!!! */
  164. }
  165. mga_fifo(8);
  166. mga_outl(M_PITCH, mpitch);
  167. mga_outl(M_YDSTORG, curr_ydstorg(minfo));
  168. if (minfo->capable.plnwt)
  169. mga_outl(M_PLNWT, -1);
  170. if (minfo->capable.srcorg) {
  171. mga_outl(M_SRCORG, 0);
  172. mga_outl(M_DSTORG, 0);
  173. }
  174. mga_outl(M_OPMODE, mopmode);
  175. mga_outl(M_CXBNDRY, 0xFFFF0000);
  176. mga_outl(M_YTOP, 0);
  177. mga_outl(M_YBOT, 0x01FFFFFF);
  178. mga_outl(M_MACCESS, maccess);
  179. minfo->accel.m_dwg_rect = M_DWG_TRAP | M_DWG_SOLID | M_DWG_ARZERO | M_DWG_SGNZERO | M_DWG_SHIFTZERO;
  180. if (isMilleniumII(minfo)) minfo->accel.m_dwg_rect |= M_DWG_TRANSC;
  181. minfo->accel.m_opmode = mopmode;
  182. minfo->accel.m_access = maccess;
  183. minfo->accel.m_pitch = mpitch;
  184. }
  185. EXPORT_SYMBOL(matrox_cfbX_init);
  186. static void matrox_accel_restore_maccess(struct matrox_fb_info *minfo)
  187. {
  188. mga_outl(M_MACCESS, minfo->accel.m_access);
  189. mga_outl(M_PITCH, minfo->accel.m_pitch);
  190. }
  191. static void matrox_accel_bmove(struct matrox_fb_info *minfo, int vxres, int sy,
  192. int sx, int dy, int dx, int height, int width)
  193. {
  194. int start, end;
  195. CRITFLAGS
  196. DBG(__func__)
  197. CRITBEGIN
  198. if ((dy < sy) || ((dy == sy) && (dx <= sx))) {
  199. mga_fifo(4);
  200. matrox_accel_restore_maccess(minfo);
  201. mga_outl(M_DWGCTL, M_DWG_BITBLT | M_DWG_SHIFTZERO | M_DWG_SGNZERO |
  202. M_DWG_BFCOL | M_DWG_REPLACE);
  203. mga_outl(M_AR5, vxres);
  204. width--;
  205. start = sy*vxres+sx+curr_ydstorg(minfo);
  206. end = start+width;
  207. } else {
  208. mga_fifo(5);
  209. matrox_accel_restore_maccess(minfo);
  210. mga_outl(M_DWGCTL, M_DWG_BITBLT | M_DWG_SHIFTZERO | M_DWG_BFCOL | M_DWG_REPLACE);
  211. mga_outl(M_SGN, 5);
  212. mga_outl(M_AR5, -vxres);
  213. width--;
  214. end = (sy+height-1)*vxres+sx+curr_ydstorg(minfo);
  215. start = end+width;
  216. dy += height-1;
  217. }
  218. mga_fifo(6);
  219. matrox_accel_restore_maccess(minfo);
  220. mga_outl(M_AR0, end);
  221. mga_outl(M_AR3, start);
  222. mga_outl(M_FXBNDRY, ((dx+width)<<16) | dx);
  223. mga_ydstlen(dy, height);
  224. WaitTillIdle();
  225. CRITEND
  226. }
  227. static void matrox_accel_bmove_lin(struct matrox_fb_info *minfo, int vxres,
  228. int sy, int sx, int dy, int dx, int height,
  229. int width)
  230. {
  231. int start, end;
  232. CRITFLAGS
  233. DBG(__func__)
  234. CRITBEGIN
  235. if ((dy < sy) || ((dy == sy) && (dx <= sx))) {
  236. mga_fifo(4);
  237. matrox_accel_restore_maccess(minfo);
  238. mga_outl(M_DWGCTL, M_DWG_BITBLT | M_DWG_SHIFTZERO | M_DWG_SGNZERO |
  239. M_DWG_BFCOL | M_DWG_REPLACE);
  240. mga_outl(M_AR5, vxres);
  241. width--;
  242. start = sy*vxres+sx+curr_ydstorg(minfo);
  243. end = start+width;
  244. } else {
  245. mga_fifo(5);
  246. matrox_accel_restore_maccess(minfo);
  247. mga_outl(M_DWGCTL, M_DWG_BITBLT | M_DWG_SHIFTZERO | M_DWG_BFCOL | M_DWG_REPLACE);
  248. mga_outl(M_SGN, 5);
  249. mga_outl(M_AR5, -vxres);
  250. width--;
  251. end = (sy+height-1)*vxres+sx+curr_ydstorg(minfo);
  252. start = end+width;
  253. dy += height-1;
  254. }
  255. mga_fifo(7);
  256. matrox_accel_restore_maccess(minfo);
  257. mga_outl(M_AR0, end);
  258. mga_outl(M_AR3, start);
  259. mga_outl(M_FXBNDRY, ((dx+width)<<16) | dx);
  260. mga_outl(M_YDST, dy*vxres >> 5);
  261. mga_outl(M_LEN | M_EXEC, height);
  262. WaitTillIdle();
  263. CRITEND
  264. }
  265. static void matroxfb_cfb4_copyarea(struct fb_info* info, const struct fb_copyarea* area) {
  266. struct matrox_fb_info *minfo = info2minfo(info);
  267. if ((area->sx | area->dx | area->width) & 1)
  268. cfb_copyarea(info, area);
  269. else
  270. matrox_accel_bmove_lin(minfo, minfo->fbcon.var.xres_virtual >> 1, area->sy, area->sx >> 1, area->dy, area->dx >> 1, area->height, area->width >> 1);
  271. }
  272. static void matroxfb_copyarea(struct fb_info* info, const struct fb_copyarea* area) {
  273. struct matrox_fb_info *minfo = info2minfo(info);
  274. matrox_accel_bmove(minfo, minfo->fbcon.var.xres_virtual, area->sy, area->sx, area->dy, area->dx, area->height, area->width);
  275. }
  276. static void matroxfb_accel_clear(struct matrox_fb_info *minfo, u_int32_t color,
  277. int sy, int sx, int height, int width)
  278. {
  279. CRITFLAGS
  280. DBG(__func__)
  281. CRITBEGIN
  282. mga_fifo(7);
  283. matrox_accel_restore_maccess(minfo);
  284. mga_outl(M_DWGCTL, minfo->accel.m_dwg_rect | M_DWG_REPLACE);
  285. mga_outl(M_FCOL, color);
  286. mga_outl(M_FXBNDRY, ((sx + width) << 16) | sx);
  287. mga_ydstlen(sy, height);
  288. WaitTillIdle();
  289. CRITEND
  290. }
  291. static void matroxfb_fillrect(struct fb_info* info, const struct fb_fillrect* rect) {
  292. struct matrox_fb_info *minfo = info2minfo(info);
  293. switch (rect->rop) {
  294. case ROP_COPY:
  295. matroxfb_accel_clear(minfo, ((u_int32_t *)info->pseudo_palette)[rect->color], rect->dy, rect->dx, rect->height, rect->width);
  296. break;
  297. }
  298. }
  299. static void matroxfb_cfb4_clear(struct matrox_fb_info *minfo, u_int32_t bgx,
  300. int sy, int sx, int height, int width)
  301. {
  302. int whattodo;
  303. CRITFLAGS
  304. DBG(__func__)
  305. CRITBEGIN
  306. whattodo = 0;
  307. if (sx & 1) {
  308. sx ++;
  309. if (!width) return;
  310. width --;
  311. whattodo = 1;
  312. }
  313. if (width & 1) {
  314. whattodo |= 2;
  315. }
  316. width >>= 1;
  317. sx >>= 1;
  318. if (width) {
  319. mga_fifo(7);
  320. matrox_accel_restore_maccess(minfo);
  321. mga_outl(M_DWGCTL, minfo->accel.m_dwg_rect | M_DWG_REPLACE2);
  322. mga_outl(M_FCOL, bgx);
  323. mga_outl(M_FXBNDRY, ((sx + width) << 16) | sx);
  324. mga_outl(M_YDST, sy * minfo->fbcon.var.xres_virtual >> 6);
  325. mga_outl(M_LEN | M_EXEC, height);
  326. WaitTillIdle();
  327. }
  328. if (whattodo) {
  329. u_int32_t step = minfo->fbcon.var.xres_virtual >> 1;
  330. vaddr_t vbase = minfo->video.vbase;
  331. if (whattodo & 1) {
  332. unsigned int uaddr = sy * step + sx - 1;
  333. u_int32_t loop;
  334. u_int8_t bgx2 = bgx & 0xF0;
  335. for (loop = height; loop > 0; loop --) {
  336. mga_writeb(vbase, uaddr, (mga_readb(vbase, uaddr) & 0x0F) | bgx2);
  337. uaddr += step;
  338. }
  339. }
  340. if (whattodo & 2) {
  341. unsigned int uaddr = sy * step + sx + width;
  342. u_int32_t loop;
  343. u_int8_t bgx2 = bgx & 0x0F;
  344. for (loop = height; loop > 0; loop --) {
  345. mga_writeb(vbase, uaddr, (mga_readb(vbase, uaddr) & 0xF0) | bgx2);
  346. uaddr += step;
  347. }
  348. }
  349. }
  350. CRITEND
  351. }
  352. static void matroxfb_cfb4_fillrect(struct fb_info* info, const struct fb_fillrect* rect) {
  353. struct matrox_fb_info *minfo = info2minfo(info);
  354. switch (rect->rop) {
  355. case ROP_COPY:
  356. matroxfb_cfb4_clear(minfo, ((u_int32_t *)info->pseudo_palette)[rect->color], rect->dy, rect->dx, rect->height, rect->width);
  357. break;
  358. }
  359. }
  360. static void matroxfb_1bpp_imageblit(struct matrox_fb_info *minfo, u_int32_t fgx,
  361. u_int32_t bgx, const u_int8_t *chardata,
  362. int width, int height, int yy, int xx)
  363. {
  364. u_int32_t step;
  365. u_int32_t ydstlen;
  366. u_int32_t xlen;
  367. u_int32_t ar0;
  368. u_int32_t charcell;
  369. u_int32_t fxbndry;
  370. vaddr_t mmio;
  371. int easy;
  372. CRITFLAGS
  373. DBG_HEAVY(__func__);
  374. step = (width + 7) >> 3;
  375. charcell = height * step;
  376. xlen = (charcell + 3) & ~3;
  377. ydstlen = (yy << 16) | height;
  378. if (width == step << 3) {
  379. ar0 = height * width - 1;
  380. easy = 1;
  381. } else {
  382. ar0 = width - 1;
  383. easy = 0;
  384. }
  385. CRITBEGIN
  386. mga_fifo(5);
  387. matrox_accel_restore_maccess(minfo);
  388. if (easy)
  389. mga_outl(M_DWGCTL, M_DWG_ILOAD | M_DWG_SGNZERO | M_DWG_SHIFTZERO | M_DWG_BMONOWF | M_DWG_LINEAR | M_DWG_REPLACE);
  390. else
  391. mga_outl(M_DWGCTL, M_DWG_ILOAD | M_DWG_SGNZERO | M_DWG_SHIFTZERO | M_DWG_BMONOWF | M_DWG_REPLACE);
  392. mga_outl(M_FCOL, fgx);
  393. mga_outl(M_BCOL, bgx);
  394. fxbndry = ((xx + width - 1) << 16) | xx;
  395. mmio = minfo->mmio.vbase;
  396. mga_fifo(8);
  397. matrox_accel_restore_maccess(minfo);
  398. mga_writel(mmio, M_FXBNDRY, fxbndry);
  399. mga_writel(mmio, M_AR0, ar0);
  400. mga_writel(mmio, M_AR3, 0);
  401. if (easy) {
  402. mga_writel(mmio, M_YDSTLEN | M_EXEC, ydstlen);
  403. mga_memcpy_toio(mmio, chardata, xlen);
  404. } else {
  405. mga_writel(mmio, M_AR5, 0);
  406. mga_writel(mmio, M_YDSTLEN | M_EXEC, ydstlen);
  407. if ((step & 3) == 0) {
  408. /* Great. Source has 32bit aligned lines, so we can feed them
  409. directly to the accelerator. */
  410. mga_memcpy_toio(mmio, chardata, charcell);
  411. } else if (step == 1) {
  412. /* Special case for 1..8bit widths */
  413. while (height--) {
  414. #if defined(__BIG_ENDIAN)
  415. fb_writel((*chardata) << 24, mmio.vaddr);
  416. #else
  417. fb_writel(*chardata, mmio.vaddr);
  418. #endif
  419. chardata++;
  420. }
  421. } else if (step == 2) {
  422. /* Special case for 9..15bit widths */
  423. while (height--) {
  424. #if defined(__BIG_ENDIAN)
  425. fb_writel((*(u_int16_t*)chardata) << 16, mmio.vaddr);
  426. #else
  427. fb_writel(*(u_int16_t*)chardata, mmio.vaddr);
  428. #endif
  429. chardata += 2;
  430. }
  431. } else {
  432. /* Tell... well, why bother... */
  433. while (height--) {
  434. size_t i;
  435. for (i = 0; i < step; i += 4) {
  436. /* Hope that there are at least three readable bytes beyond the end of bitmap */
  437. fb_writel(get_unaligned((u_int32_t*)(chardata + i)),mmio.vaddr);
  438. }
  439. chardata += step;
  440. }
  441. }
  442. }
  443. WaitTillIdle();
  444. CRITEND
  445. }
  446. static void matroxfb_imageblit(struct fb_info* info, const struct fb_image* image) {
  447. struct matrox_fb_info *minfo = info2minfo(info);
  448. DBG_HEAVY(__func__);
  449. if (image->depth == 1) {
  450. u_int32_t fgx, bgx;
  451. fgx = ((u_int32_t*)info->pseudo_palette)[image->fg_color];
  452. bgx = ((u_int32_t*)info->pseudo_palette)[image->bg_color];
  453. matroxfb_1bpp_imageblit(minfo, fgx, bgx, image->data, image->width, image->height, image->dy, image->dx);
  454. } else {
  455. /* Danger! image->depth is useless: logo painting code always
  456. passes framebuffer color depth here, although logo data are
  457. always 8bpp and info->pseudo_palette is changed to contain
  458. logo palette to be used (but only for true/direct-color... sic...).
  459. So do it completely in software... */
  460. cfb_imageblit(info, image);
  461. }
  462. }
  463. MODULE_LICENSE("GPL");