atmel_lcdfb.c 36 KB

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  1. /*
  2. * Driver for AT91 LCD Controller
  3. *
  4. * Copyright (C) 2007 Atmel Corporation
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file COPYING in the main directory of this archive for
  8. * more details.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/dma-mapping.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/clk.h>
  15. #include <linux/fb.h>
  16. #include <linux/init.h>
  17. #include <linux/delay.h>
  18. #include <linux/backlight.h>
  19. #include <linux/gfp.h>
  20. #include <linux/gpio/consumer.h>
  21. #include <linux/module.h>
  22. #include <linux/of.h>
  23. #include <linux/of_device.h>
  24. #include <video/of_videomode.h>
  25. #include <video/of_display_timing.h>
  26. #include <linux/regulator/consumer.h>
  27. #include <video/videomode.h>
  28. #include <video/atmel_lcdc.h>
  29. struct atmel_lcdfb_config {
  30. bool have_alt_pixclock;
  31. bool have_hozval;
  32. bool have_intensity_bit;
  33. };
  34. /* LCD Controller info data structure, stored in device platform_data */
  35. struct atmel_lcdfb_info {
  36. spinlock_t lock;
  37. struct fb_info *info;
  38. void __iomem *mmio;
  39. int irq_base;
  40. struct work_struct task;
  41. unsigned int smem_len;
  42. struct platform_device *pdev;
  43. struct clk *bus_clk;
  44. struct clk *lcdc_clk;
  45. struct backlight_device *backlight;
  46. u8 bl_power;
  47. u8 saved_lcdcon;
  48. u32 pseudo_palette[16];
  49. bool have_intensity_bit;
  50. struct atmel_lcdfb_pdata pdata;
  51. struct atmel_lcdfb_config *config;
  52. struct regulator *reg_lcd;
  53. };
  54. struct atmel_lcdfb_power_ctrl_gpio {
  55. struct gpio_desc *gpiod;
  56. struct list_head list;
  57. };
  58. #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
  59. #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
  60. /* configurable parameters */
  61. #define ATMEL_LCDC_CVAL_DEFAULT 0xc8
  62. #define ATMEL_LCDC_DMA_BURST_LEN 8 /* words */
  63. #define ATMEL_LCDC_FIFO_SIZE 512 /* words */
  64. static struct atmel_lcdfb_config at91sam9261_config = {
  65. .have_hozval = true,
  66. .have_intensity_bit = true,
  67. };
  68. static struct atmel_lcdfb_config at91sam9263_config = {
  69. .have_intensity_bit = true,
  70. };
  71. static struct atmel_lcdfb_config at91sam9g10_config = {
  72. .have_hozval = true,
  73. };
  74. static struct atmel_lcdfb_config at91sam9g45_config = {
  75. .have_alt_pixclock = true,
  76. };
  77. static struct atmel_lcdfb_config at91sam9g45es_config = {
  78. };
  79. static struct atmel_lcdfb_config at91sam9rl_config = {
  80. .have_intensity_bit = true,
  81. };
  82. static u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
  83. | ATMEL_LCDC_POL_POSITIVE
  84. | ATMEL_LCDC_ENA_PWMENABLE;
  85. #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
  86. /* some bl->props field just changed */
  87. static int atmel_bl_update_status(struct backlight_device *bl)
  88. {
  89. struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
  90. int power = sinfo->bl_power;
  91. int brightness = bl->props.brightness;
  92. /* REVISIT there may be a meaningful difference between
  93. * fb_blank and power ... there seem to be some cases
  94. * this doesn't handle correctly.
  95. */
  96. if (bl->props.fb_blank != sinfo->bl_power)
  97. power = bl->props.fb_blank;
  98. else if (bl->props.power != sinfo->bl_power)
  99. power = bl->props.power;
  100. if (brightness < 0 && power == FB_BLANK_UNBLANK)
  101. brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
  102. else if (power != FB_BLANK_UNBLANK)
  103. brightness = 0;
  104. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
  105. if (contrast_ctr & ATMEL_LCDC_POL_POSITIVE)
  106. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
  107. brightness ? contrast_ctr : 0);
  108. else
  109. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
  110. bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
  111. return 0;
  112. }
  113. static int atmel_bl_get_brightness(struct backlight_device *bl)
  114. {
  115. struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
  116. return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
  117. }
  118. static const struct backlight_ops atmel_lcdc_bl_ops = {
  119. .update_status = atmel_bl_update_status,
  120. .get_brightness = atmel_bl_get_brightness,
  121. };
  122. static void init_backlight(struct atmel_lcdfb_info *sinfo)
  123. {
  124. struct backlight_properties props;
  125. struct backlight_device *bl;
  126. sinfo->bl_power = FB_BLANK_UNBLANK;
  127. if (sinfo->backlight)
  128. return;
  129. memset(&props, 0, sizeof(struct backlight_properties));
  130. props.type = BACKLIGHT_RAW;
  131. props.max_brightness = 0xff;
  132. bl = backlight_device_register("backlight", &sinfo->pdev->dev, sinfo,
  133. &atmel_lcdc_bl_ops, &props);
  134. if (IS_ERR(bl)) {
  135. dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
  136. PTR_ERR(bl));
  137. return;
  138. }
  139. sinfo->backlight = bl;
  140. bl->props.power = FB_BLANK_UNBLANK;
  141. bl->props.fb_blank = FB_BLANK_UNBLANK;
  142. bl->props.brightness = atmel_bl_get_brightness(bl);
  143. }
  144. static void exit_backlight(struct atmel_lcdfb_info *sinfo)
  145. {
  146. if (!sinfo->backlight)
  147. return;
  148. if (sinfo->backlight->ops) {
  149. sinfo->backlight->props.power = FB_BLANK_POWERDOWN;
  150. sinfo->backlight->ops->update_status(sinfo->backlight);
  151. }
  152. backlight_device_unregister(sinfo->backlight);
  153. }
  154. #else
  155. static void init_backlight(struct atmel_lcdfb_info *sinfo)
  156. {
  157. dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
  158. }
  159. static void exit_backlight(struct atmel_lcdfb_info *sinfo)
  160. {
  161. }
  162. #endif
  163. static void init_contrast(struct atmel_lcdfb_info *sinfo)
  164. {
  165. struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
  166. /* contrast pwm can be 'inverted' */
  167. if (pdata->lcdcon_pol_negative)
  168. contrast_ctr &= ~(ATMEL_LCDC_POL_POSITIVE);
  169. /* have some default contrast/backlight settings */
  170. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
  171. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
  172. if (pdata->lcdcon_is_backlight)
  173. init_backlight(sinfo);
  174. }
  175. static inline void atmel_lcdfb_power_control(struct atmel_lcdfb_info *sinfo, int on)
  176. {
  177. int ret;
  178. struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
  179. if (pdata->atmel_lcdfb_power_control)
  180. pdata->atmel_lcdfb_power_control(pdata, on);
  181. else if (sinfo->reg_lcd) {
  182. if (on) {
  183. ret = regulator_enable(sinfo->reg_lcd);
  184. if (ret)
  185. dev_err(&sinfo->pdev->dev,
  186. "lcd regulator enable failed: %d\n", ret);
  187. } else {
  188. ret = regulator_disable(sinfo->reg_lcd);
  189. if (ret)
  190. dev_err(&sinfo->pdev->dev,
  191. "lcd regulator disable failed: %d\n", ret);
  192. }
  193. }
  194. }
  195. static const struct fb_fix_screeninfo atmel_lcdfb_fix __initconst = {
  196. .type = FB_TYPE_PACKED_PIXELS,
  197. .visual = FB_VISUAL_TRUECOLOR,
  198. .xpanstep = 0,
  199. .ypanstep = 1,
  200. .ywrapstep = 0,
  201. .accel = FB_ACCEL_NONE,
  202. };
  203. static unsigned long compute_hozval(struct atmel_lcdfb_info *sinfo,
  204. unsigned long xres)
  205. {
  206. unsigned long lcdcon2;
  207. unsigned long value;
  208. if (!sinfo->config->have_hozval)
  209. return xres;
  210. lcdcon2 = lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2);
  211. value = xres;
  212. if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
  213. /* STN display */
  214. if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
  215. value *= 3;
  216. }
  217. if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
  218. || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
  219. && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
  220. value = DIV_ROUND_UP(value, 4);
  221. else
  222. value = DIV_ROUND_UP(value, 8);
  223. }
  224. return value;
  225. }
  226. static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo)
  227. {
  228. struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
  229. /* Turn off the LCD controller and the DMA controller */
  230. lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
  231. pdata->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
  232. /* Wait for the LCDC core to become idle */
  233. while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
  234. msleep(10);
  235. lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
  236. }
  237. static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo)
  238. {
  239. atmel_lcdfb_stop_nowait(sinfo);
  240. /* Wait for DMA engine to become idle... */
  241. while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
  242. msleep(10);
  243. }
  244. static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo)
  245. {
  246. struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
  247. lcdc_writel(sinfo, ATMEL_LCDC_DMACON, pdata->default_dmacon);
  248. lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
  249. (pdata->guard_time << ATMEL_LCDC_GUARDT_OFFSET)
  250. | ATMEL_LCDC_PWR);
  251. }
  252. static void atmel_lcdfb_update_dma(struct fb_info *info,
  253. struct fb_var_screeninfo *var)
  254. {
  255. struct atmel_lcdfb_info *sinfo = info->par;
  256. struct fb_fix_screeninfo *fix = &info->fix;
  257. unsigned long dma_addr;
  258. dma_addr = (fix->smem_start + var->yoffset * fix->line_length
  259. + var->xoffset * info->var.bits_per_pixel / 8);
  260. dma_addr &= ~3UL;
  261. /* Set framebuffer DMA base address and pixel offset */
  262. lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
  263. }
  264. static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
  265. {
  266. struct fb_info *info = sinfo->info;
  267. dma_free_wc(info->device, info->fix.smem_len, info->screen_base,
  268. info->fix.smem_start);
  269. }
  270. /**
  271. * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
  272. * @sinfo: the frame buffer to allocate memory for
  273. *
  274. * This function is called only from the atmel_lcdfb_probe()
  275. * so no locking by fb_info->mm_lock around smem_len setting is needed.
  276. */
  277. static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
  278. {
  279. struct fb_info *info = sinfo->info;
  280. struct fb_var_screeninfo *var = &info->var;
  281. unsigned int smem_len;
  282. smem_len = (var->xres_virtual * var->yres_virtual
  283. * ((var->bits_per_pixel + 7) / 8));
  284. info->fix.smem_len = max(smem_len, sinfo->smem_len);
  285. info->screen_base = dma_alloc_wc(info->device, info->fix.smem_len,
  286. (dma_addr_t *)&info->fix.smem_start,
  287. GFP_KERNEL);
  288. if (!info->screen_base) {
  289. return -ENOMEM;
  290. }
  291. memset(info->screen_base, 0, info->fix.smem_len);
  292. return 0;
  293. }
  294. static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var,
  295. struct fb_info *info)
  296. {
  297. struct fb_videomode varfbmode;
  298. const struct fb_videomode *fbmode = NULL;
  299. fb_var_to_videomode(&varfbmode, var);
  300. fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist);
  301. if (fbmode)
  302. fb_videomode_to_var(var, fbmode);
  303. return fbmode;
  304. }
  305. /**
  306. * atmel_lcdfb_check_var - Validates a var passed in.
  307. * @var: frame buffer variable screen structure
  308. * @info: frame buffer structure that represents a single frame buffer
  309. *
  310. * Checks to see if the hardware supports the state requested by
  311. * var passed in. This function does not alter the hardware
  312. * state!!! This means the data stored in struct fb_info and
  313. * struct atmel_lcdfb_info do not change. This includes the var
  314. * inside of struct fb_info. Do NOT change these. This function
  315. * can be called on its own if we intent to only test a mode and
  316. * not actually set it. The stuff in modedb.c is a example of
  317. * this. If the var passed in is slightly off by what the
  318. * hardware can support then we alter the var PASSED in to what
  319. * we can do. If the hardware doesn't support mode change a
  320. * -EINVAL will be returned by the upper layers. You don't need
  321. * to implement this function then. If you hardware doesn't
  322. * support changing the resolution then this function is not
  323. * needed. In this case the driver would just provide a var that
  324. * represents the static state the screen is in.
  325. *
  326. * Returns negative errno on error, or zero on success.
  327. */
  328. static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
  329. struct fb_info *info)
  330. {
  331. struct device *dev = info->device;
  332. struct atmel_lcdfb_info *sinfo = info->par;
  333. struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
  334. unsigned long clk_value_khz;
  335. clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
  336. dev_dbg(dev, "%s:\n", __func__);
  337. if (!(var->pixclock && var->bits_per_pixel)) {
  338. /* choose a suitable mode if possible */
  339. if (!atmel_lcdfb_choose_mode(var, info)) {
  340. dev_err(dev, "needed value not specified\n");
  341. return -EINVAL;
  342. }
  343. }
  344. dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres);
  345. dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock));
  346. dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel);
  347. dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz);
  348. if (PICOS2KHZ(var->pixclock) > clk_value_khz) {
  349. dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
  350. return -EINVAL;
  351. }
  352. /* Do not allow to have real resoulution larger than virtual */
  353. if (var->xres > var->xres_virtual)
  354. var->xres_virtual = var->xres;
  355. if (var->yres > var->yres_virtual)
  356. var->yres_virtual = var->yres;
  357. /* Force same alignment for each line */
  358. var->xres = (var->xres + 3) & ~3UL;
  359. var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
  360. var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
  361. var->transp.msb_right = 0;
  362. var->transp.offset = var->transp.length = 0;
  363. var->xoffset = var->yoffset = 0;
  364. if (info->fix.smem_len) {
  365. unsigned int smem_len = (var->xres_virtual * var->yres_virtual
  366. * ((var->bits_per_pixel + 7) / 8));
  367. if (smem_len > info->fix.smem_len) {
  368. dev_err(dev, "Frame buffer is too small (%u) for screen size (need at least %u)\n",
  369. info->fix.smem_len, smem_len);
  370. return -EINVAL;
  371. }
  372. }
  373. /* Saturate vertical and horizontal timings at maximum values */
  374. var->vsync_len = min_t(u32, var->vsync_len,
  375. (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
  376. var->upper_margin = min_t(u32, var->upper_margin,
  377. ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
  378. var->lower_margin = min_t(u32, var->lower_margin,
  379. ATMEL_LCDC_VFP);
  380. var->right_margin = min_t(u32, var->right_margin,
  381. (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
  382. var->hsync_len = min_t(u32, var->hsync_len,
  383. (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
  384. var->left_margin = min_t(u32, var->left_margin,
  385. ATMEL_LCDC_HBP + 1);
  386. /* Some parameters can't be zero */
  387. var->vsync_len = max_t(u32, var->vsync_len, 1);
  388. var->right_margin = max_t(u32, var->right_margin, 1);
  389. var->hsync_len = max_t(u32, var->hsync_len, 1);
  390. var->left_margin = max_t(u32, var->left_margin, 1);
  391. switch (var->bits_per_pixel) {
  392. case 1:
  393. case 2:
  394. case 4:
  395. case 8:
  396. var->red.offset = var->green.offset = var->blue.offset = 0;
  397. var->red.length = var->green.length = var->blue.length
  398. = var->bits_per_pixel;
  399. break;
  400. case 16:
  401. /* Older SOCs use IBGR:555 rather than BGR:565. */
  402. if (sinfo->config->have_intensity_bit)
  403. var->green.length = 5;
  404. else
  405. var->green.length = 6;
  406. if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
  407. /* RGB:5X5 mode */
  408. var->red.offset = var->green.length + 5;
  409. var->blue.offset = 0;
  410. } else {
  411. /* BGR:5X5 mode */
  412. var->red.offset = 0;
  413. var->blue.offset = var->green.length + 5;
  414. }
  415. var->green.offset = 5;
  416. var->red.length = var->blue.length = 5;
  417. break;
  418. case 32:
  419. var->transp.offset = 24;
  420. var->transp.length = 8;
  421. fallthrough;
  422. case 24:
  423. if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
  424. /* RGB:888 mode */
  425. var->red.offset = 16;
  426. var->blue.offset = 0;
  427. } else {
  428. /* BGR:888 mode */
  429. var->red.offset = 0;
  430. var->blue.offset = 16;
  431. }
  432. var->green.offset = 8;
  433. var->red.length = var->green.length = var->blue.length = 8;
  434. break;
  435. default:
  436. dev_err(dev, "color depth %d not supported\n",
  437. var->bits_per_pixel);
  438. return -EINVAL;
  439. }
  440. return 0;
  441. }
  442. /*
  443. * LCD reset sequence
  444. */
  445. static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
  446. {
  447. might_sleep();
  448. atmel_lcdfb_stop(sinfo);
  449. atmel_lcdfb_start(sinfo);
  450. }
  451. /**
  452. * atmel_lcdfb_set_par - Alters the hardware state.
  453. * @info: frame buffer structure that represents a single frame buffer
  454. *
  455. * Using the fb_var_screeninfo in fb_info we set the resolution
  456. * of the this particular framebuffer. This function alters the
  457. * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
  458. * not alter var in fb_info since we are using that data. This
  459. * means we depend on the data in var inside fb_info to be
  460. * supported by the hardware. atmel_lcdfb_check_var is always called
  461. * before atmel_lcdfb_set_par to ensure this. Again if you can't
  462. * change the resolution you don't need this function.
  463. *
  464. */
  465. static int atmel_lcdfb_set_par(struct fb_info *info)
  466. {
  467. struct atmel_lcdfb_info *sinfo = info->par;
  468. struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
  469. unsigned long hozval_linesz;
  470. unsigned long value;
  471. unsigned long clk_value_khz;
  472. unsigned long bits_per_line;
  473. unsigned long pix_factor = 2;
  474. might_sleep();
  475. dev_dbg(info->device, "%s:\n", __func__);
  476. dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n",
  477. info->var.xres, info->var.yres,
  478. info->var.xres_virtual, info->var.yres_virtual);
  479. atmel_lcdfb_stop_nowait(sinfo);
  480. if (info->var.bits_per_pixel == 1)
  481. info->fix.visual = FB_VISUAL_MONO01;
  482. else if (info->var.bits_per_pixel <= 8)
  483. info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
  484. else
  485. info->fix.visual = FB_VISUAL_TRUECOLOR;
  486. bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
  487. info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
  488. /* Re-initialize the DMA engine... */
  489. dev_dbg(info->device, " * update DMA engine\n");
  490. atmel_lcdfb_update_dma(info, &info->var);
  491. /* ...set frame size and burst length = 8 words (?) */
  492. value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
  493. value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
  494. lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
  495. /* Now, the LCDC core... */
  496. /* Set pixel clock */
  497. if (sinfo->config->have_alt_pixclock)
  498. pix_factor = 1;
  499. clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
  500. value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
  501. if (value < pix_factor) {
  502. dev_notice(info->device, "Bypassing pixel clock divider\n");
  503. lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
  504. } else {
  505. value = (value / pix_factor) - 1;
  506. dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n",
  507. value);
  508. lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
  509. value << ATMEL_LCDC_CLKVAL_OFFSET);
  510. info->var.pixclock =
  511. KHZ2PICOS(clk_value_khz / (pix_factor * (value + 1)));
  512. dev_dbg(info->device, " updated pixclk: %lu KHz\n",
  513. PICOS2KHZ(info->var.pixclock));
  514. }
  515. /* Initialize control register 2 */
  516. value = pdata->default_lcdcon2;
  517. if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
  518. value |= ATMEL_LCDC_INVLINE_INVERTED;
  519. if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
  520. value |= ATMEL_LCDC_INVFRAME_INVERTED;
  521. switch (info->var.bits_per_pixel) {
  522. case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
  523. case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
  524. case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
  525. case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
  526. case 15: fallthrough;
  527. case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
  528. case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
  529. case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
  530. default: BUG(); break;
  531. }
  532. dev_dbg(info->device, " * LCDCON2 = %08lx\n", value);
  533. lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
  534. /* Vertical timing */
  535. value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
  536. value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
  537. value |= info->var.lower_margin;
  538. dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value);
  539. lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
  540. /* Horizontal timing */
  541. value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
  542. value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
  543. value |= (info->var.left_margin - 1);
  544. dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);
  545. lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
  546. /* Horizontal value (aka line size) */
  547. hozval_linesz = compute_hozval(sinfo, info->var.xres);
  548. /* Display size */
  549. value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
  550. value |= info->var.yres - 1;
  551. dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value);
  552. lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
  553. /* FIFO Threshold: Use formula from data sheet */
  554. value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
  555. lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
  556. /* Toggle LCD_MODE every frame */
  557. lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
  558. /* Disable all interrupts */
  559. lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0U);
  560. /* Enable FIFO & DMA errors */
  561. lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
  562. /* ...wait for DMA engine to become idle... */
  563. while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
  564. msleep(10);
  565. atmel_lcdfb_start(sinfo);
  566. dev_dbg(info->device, " * DONE\n");
  567. return 0;
  568. }
  569. static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
  570. {
  571. chan &= 0xffff;
  572. chan >>= 16 - bf->length;
  573. return chan << bf->offset;
  574. }
  575. /**
  576. * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
  577. * @regno: Which register in the CLUT we are programming
  578. * @red: The red value which can be up to 16 bits wide
  579. * @green: The green value which can be up to 16 bits wide
  580. * @blue: The blue value which can be up to 16 bits wide.
  581. * @transp: If supported the alpha value which can be up to 16 bits wide.
  582. * @info: frame buffer info structure
  583. *
  584. * Set a single color register. The values supplied have a 16 bit
  585. * magnitude which needs to be scaled in this function for the hardware.
  586. * Things to take into consideration are how many color registers, if
  587. * any, are supported with the current color visual. With truecolor mode
  588. * no color palettes are supported. Here a pseudo palette is created
  589. * which we store the value in pseudo_palette in struct fb_info. For
  590. * pseudocolor mode we have a limited color palette. To deal with this
  591. * we can program what color is displayed for a particular pixel value.
  592. * DirectColor is similar in that we can program each color field. If
  593. * we have a static colormap we don't need to implement this function.
  594. *
  595. * Returns negative errno on error, or zero on success. In an
  596. * ideal world, this would have been the case, but as it turns
  597. * out, the other drivers return 1 on failure, so that's what
  598. * we're going to do.
  599. */
  600. static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
  601. unsigned int green, unsigned int blue,
  602. unsigned int transp, struct fb_info *info)
  603. {
  604. struct atmel_lcdfb_info *sinfo = info->par;
  605. struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
  606. unsigned int val;
  607. u32 *pal;
  608. int ret = 1;
  609. if (info->var.grayscale)
  610. red = green = blue = (19595 * red + 38470 * green
  611. + 7471 * blue) >> 16;
  612. switch (info->fix.visual) {
  613. case FB_VISUAL_TRUECOLOR:
  614. if (regno < 16) {
  615. pal = info->pseudo_palette;
  616. val = chan_to_field(red, &info->var.red);
  617. val |= chan_to_field(green, &info->var.green);
  618. val |= chan_to_field(blue, &info->var.blue);
  619. pal[regno] = val;
  620. ret = 0;
  621. }
  622. break;
  623. case FB_VISUAL_PSEUDOCOLOR:
  624. if (regno < 256) {
  625. if (sinfo->config->have_intensity_bit) {
  626. /* old style I+BGR:555 */
  627. val = ((red >> 11) & 0x001f);
  628. val |= ((green >> 6) & 0x03e0);
  629. val |= ((blue >> 1) & 0x7c00);
  630. /*
  631. * TODO: intensity bit. Maybe something like
  632. * ~(red[10] ^ green[10] ^ blue[10]) & 1
  633. */
  634. } else {
  635. /* new style BGR:565 / RGB:565 */
  636. if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
  637. val = ((blue >> 11) & 0x001f);
  638. val |= ((red >> 0) & 0xf800);
  639. } else {
  640. val = ((red >> 11) & 0x001f);
  641. val |= ((blue >> 0) & 0xf800);
  642. }
  643. val |= ((green >> 5) & 0x07e0);
  644. }
  645. lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
  646. ret = 0;
  647. }
  648. break;
  649. case FB_VISUAL_MONO01:
  650. if (regno < 2) {
  651. val = (regno == 0) ? 0x00 : 0x1F;
  652. lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
  653. ret = 0;
  654. }
  655. break;
  656. }
  657. return ret;
  658. }
  659. static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
  660. struct fb_info *info)
  661. {
  662. dev_dbg(info->device, "%s\n", __func__);
  663. atmel_lcdfb_update_dma(info, var);
  664. return 0;
  665. }
  666. static int atmel_lcdfb_blank(int blank_mode, struct fb_info *info)
  667. {
  668. struct atmel_lcdfb_info *sinfo = info->par;
  669. switch (blank_mode) {
  670. case FB_BLANK_UNBLANK:
  671. case FB_BLANK_NORMAL:
  672. atmel_lcdfb_start(sinfo);
  673. break;
  674. case FB_BLANK_VSYNC_SUSPEND:
  675. case FB_BLANK_HSYNC_SUSPEND:
  676. break;
  677. case FB_BLANK_POWERDOWN:
  678. atmel_lcdfb_stop(sinfo);
  679. break;
  680. default:
  681. return -EINVAL;
  682. }
  683. /* let fbcon do a soft blank for us */
  684. return ((blank_mode == FB_BLANK_NORMAL) ? 1 : 0);
  685. }
  686. static const struct fb_ops atmel_lcdfb_ops = {
  687. .owner = THIS_MODULE,
  688. .fb_check_var = atmel_lcdfb_check_var,
  689. .fb_set_par = atmel_lcdfb_set_par,
  690. .fb_setcolreg = atmel_lcdfb_setcolreg,
  691. .fb_blank = atmel_lcdfb_blank,
  692. .fb_pan_display = atmel_lcdfb_pan_display,
  693. .fb_fillrect = cfb_fillrect,
  694. .fb_copyarea = cfb_copyarea,
  695. .fb_imageblit = cfb_imageblit,
  696. };
  697. static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
  698. {
  699. struct fb_info *info = dev_id;
  700. struct atmel_lcdfb_info *sinfo = info->par;
  701. u32 status;
  702. status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
  703. if (status & ATMEL_LCDC_UFLWI) {
  704. dev_warn(info->device, "FIFO underflow %#x\n", status);
  705. /* reset DMA and FIFO to avoid screen shifting */
  706. schedule_work(&sinfo->task);
  707. }
  708. lcdc_writel(sinfo, ATMEL_LCDC_ICR, status);
  709. return IRQ_HANDLED;
  710. }
  711. /*
  712. * LCD controller task (to reset the LCD)
  713. */
  714. static void atmel_lcdfb_task(struct work_struct *work)
  715. {
  716. struct atmel_lcdfb_info *sinfo =
  717. container_of(work, struct atmel_lcdfb_info, task);
  718. atmel_lcdfb_reset(sinfo);
  719. }
  720. static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
  721. {
  722. struct fb_info *info = sinfo->info;
  723. int ret = 0;
  724. info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
  725. dev_info(info->device,
  726. "%luKiB frame buffer at %08lx (mapped at %p)\n",
  727. (unsigned long)info->fix.smem_len / 1024,
  728. (unsigned long)info->fix.smem_start,
  729. info->screen_base);
  730. /* Allocate colormap */
  731. ret = fb_alloc_cmap(&info->cmap, 256, 0);
  732. if (ret < 0)
  733. dev_err(info->device, "Alloc color map failed\n");
  734. return ret;
  735. }
  736. static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
  737. {
  738. clk_prepare_enable(sinfo->bus_clk);
  739. clk_prepare_enable(sinfo->lcdc_clk);
  740. }
  741. static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
  742. {
  743. clk_disable_unprepare(sinfo->bus_clk);
  744. clk_disable_unprepare(sinfo->lcdc_clk);
  745. }
  746. static const struct of_device_id atmel_lcdfb_dt_ids[] = {
  747. { .compatible = "atmel,at91sam9261-lcdc" , .data = &at91sam9261_config, },
  748. { .compatible = "atmel,at91sam9263-lcdc" , .data = &at91sam9263_config, },
  749. { .compatible = "atmel,at91sam9g10-lcdc" , .data = &at91sam9g10_config, },
  750. { .compatible = "atmel,at91sam9g45-lcdc" , .data = &at91sam9g45_config, },
  751. { .compatible = "atmel,at91sam9g45es-lcdc" , .data = &at91sam9g45es_config, },
  752. { .compatible = "atmel,at91sam9rl-lcdc" , .data = &at91sam9rl_config, },
  753. { /* sentinel */ }
  754. };
  755. MODULE_DEVICE_TABLE(of, atmel_lcdfb_dt_ids);
  756. static const char *atmel_lcdfb_wiring_modes[] = {
  757. [ATMEL_LCDC_WIRING_BGR] = "BRG",
  758. [ATMEL_LCDC_WIRING_RGB] = "RGB",
  759. };
  760. static int atmel_lcdfb_get_of_wiring_modes(struct device_node *np)
  761. {
  762. const char *mode;
  763. int err, i;
  764. err = of_property_read_string(np, "atmel,lcd-wiring-mode", &mode);
  765. if (err < 0)
  766. return ATMEL_LCDC_WIRING_BGR;
  767. for (i = 0; i < ARRAY_SIZE(atmel_lcdfb_wiring_modes); i++)
  768. if (!strcasecmp(mode, atmel_lcdfb_wiring_modes[i]))
  769. return i;
  770. return -ENODEV;
  771. }
  772. static void atmel_lcdfb_power_control_gpio(struct atmel_lcdfb_pdata *pdata, int on)
  773. {
  774. struct atmel_lcdfb_power_ctrl_gpio *og;
  775. list_for_each_entry(og, &pdata->pwr_gpios, list)
  776. gpiod_set_value(og->gpiod, on);
  777. }
  778. static int atmel_lcdfb_of_init(struct atmel_lcdfb_info *sinfo)
  779. {
  780. struct fb_info *info = sinfo->info;
  781. struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
  782. struct fb_var_screeninfo *var = &info->var;
  783. struct device *dev = &sinfo->pdev->dev;
  784. struct device_node *np =dev->of_node;
  785. struct device_node *display_np;
  786. struct atmel_lcdfb_power_ctrl_gpio *og;
  787. bool is_gpio_power = false;
  788. struct fb_videomode fb_vm;
  789. struct gpio_desc *gpiod;
  790. struct videomode vm;
  791. int ret;
  792. int i;
  793. sinfo->config = (struct atmel_lcdfb_config*)
  794. of_match_device(atmel_lcdfb_dt_ids, dev)->data;
  795. display_np = of_parse_phandle(np, "display", 0);
  796. if (!display_np) {
  797. dev_err(dev, "failed to find display phandle\n");
  798. return -ENOENT;
  799. }
  800. ret = of_property_read_u32(display_np, "bits-per-pixel", &var->bits_per_pixel);
  801. if (ret < 0) {
  802. dev_err(dev, "failed to get property bits-per-pixel\n");
  803. goto put_display_node;
  804. }
  805. ret = of_property_read_u32(display_np, "atmel,guard-time", &pdata->guard_time);
  806. if (ret < 0) {
  807. dev_err(dev, "failed to get property atmel,guard-time\n");
  808. goto put_display_node;
  809. }
  810. ret = of_property_read_u32(display_np, "atmel,lcdcon2", &pdata->default_lcdcon2);
  811. if (ret < 0) {
  812. dev_err(dev, "failed to get property atmel,lcdcon2\n");
  813. goto put_display_node;
  814. }
  815. ret = of_property_read_u32(display_np, "atmel,dmacon", &pdata->default_dmacon);
  816. if (ret < 0) {
  817. dev_err(dev, "failed to get property bits-per-pixel\n");
  818. goto put_display_node;
  819. }
  820. INIT_LIST_HEAD(&pdata->pwr_gpios);
  821. for (i = 0; i < gpiod_count(dev, "atmel,power-control"); i++) {
  822. ret = -ENOMEM;
  823. gpiod = devm_gpiod_get_index(dev, "atmel,power-control",
  824. i, GPIOD_ASIS);
  825. if (IS_ERR(gpiod))
  826. continue;
  827. og = devm_kzalloc(dev, sizeof(*og), GFP_KERNEL);
  828. if (!og)
  829. goto put_display_node;
  830. og->gpiod = gpiod;
  831. is_gpio_power = true;
  832. ret = gpiod_direction_output(gpiod, gpiod_is_active_low(gpiod));
  833. if (ret) {
  834. dev_err(dev, "set direction output gpio atmel,power-control[%d] failed\n", i);
  835. goto put_display_node;
  836. }
  837. list_add(&og->list, &pdata->pwr_gpios);
  838. }
  839. if (is_gpio_power)
  840. pdata->atmel_lcdfb_power_control = atmel_lcdfb_power_control_gpio;
  841. ret = atmel_lcdfb_get_of_wiring_modes(display_np);
  842. if (ret < 0) {
  843. dev_err(dev, "invalid atmel,lcd-wiring-mode\n");
  844. goto put_display_node;
  845. }
  846. pdata->lcd_wiring_mode = ret;
  847. pdata->lcdcon_is_backlight = of_property_read_bool(display_np, "atmel,lcdcon-backlight");
  848. pdata->lcdcon_pol_negative = of_property_read_bool(display_np, "atmel,lcdcon-backlight-inverted");
  849. ret = of_get_videomode(display_np, &vm, OF_USE_NATIVE_MODE);
  850. if (ret) {
  851. dev_err(dev, "failed to get videomode from DT\n");
  852. goto put_display_node;
  853. }
  854. ret = fb_videomode_from_videomode(&vm, &fb_vm);
  855. if (ret < 0)
  856. goto put_display_node;
  857. fb_add_videomode(&fb_vm, &info->modelist);
  858. put_display_node:
  859. of_node_put(display_np);
  860. return ret;
  861. }
  862. static int __init atmel_lcdfb_probe(struct platform_device *pdev)
  863. {
  864. struct device *dev = &pdev->dev;
  865. struct fb_info *info;
  866. struct atmel_lcdfb_info *sinfo;
  867. struct resource *regs = NULL;
  868. struct resource *map = NULL;
  869. struct fb_modelist *modelist;
  870. int ret;
  871. dev_dbg(dev, "%s BEGIN\n", __func__);
  872. ret = -ENOMEM;
  873. info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
  874. if (!info)
  875. goto out;
  876. sinfo = info->par;
  877. sinfo->pdev = pdev;
  878. sinfo->info = info;
  879. INIT_LIST_HEAD(&info->modelist);
  880. if (!pdev->dev.of_node) {
  881. dev_err(dev, "cannot get default configuration\n");
  882. goto free_info;
  883. }
  884. ret = atmel_lcdfb_of_init(sinfo);
  885. if (ret)
  886. goto free_info;
  887. ret = -ENODEV;
  888. if (!sinfo->config)
  889. goto free_info;
  890. sinfo->reg_lcd = devm_regulator_get(&pdev->dev, "lcd");
  891. if (IS_ERR(sinfo->reg_lcd))
  892. sinfo->reg_lcd = NULL;
  893. info->flags = FBINFO_DEFAULT | FBINFO_PARTIAL_PAN_OK |
  894. FBINFO_HWACCEL_YPAN;
  895. info->pseudo_palette = sinfo->pseudo_palette;
  896. info->fbops = &atmel_lcdfb_ops;
  897. info->fix = atmel_lcdfb_fix;
  898. strcpy(info->fix.id, sinfo->pdev->name);
  899. /* Enable LCDC Clocks */
  900. sinfo->bus_clk = clk_get(dev, "hclk");
  901. if (IS_ERR(sinfo->bus_clk)) {
  902. ret = PTR_ERR(sinfo->bus_clk);
  903. goto free_info;
  904. }
  905. sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
  906. if (IS_ERR(sinfo->lcdc_clk)) {
  907. ret = PTR_ERR(sinfo->lcdc_clk);
  908. goto put_bus_clk;
  909. }
  910. atmel_lcdfb_start_clock(sinfo);
  911. modelist = list_first_entry(&info->modelist,
  912. struct fb_modelist, list);
  913. fb_videomode_to_var(&info->var, &modelist->mode);
  914. atmel_lcdfb_check_var(&info->var, info);
  915. regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  916. if (!regs) {
  917. dev_err(dev, "resources unusable\n");
  918. ret = -ENXIO;
  919. goto stop_clk;
  920. }
  921. sinfo->irq_base = platform_get_irq(pdev, 0);
  922. if (sinfo->irq_base < 0) {
  923. ret = sinfo->irq_base;
  924. goto stop_clk;
  925. }
  926. /* Initialize video memory */
  927. map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  928. if (map) {
  929. /* use a pre-allocated memory buffer */
  930. info->fix.smem_start = map->start;
  931. info->fix.smem_len = resource_size(map);
  932. if (!request_mem_region(info->fix.smem_start,
  933. info->fix.smem_len, pdev->name)) {
  934. ret = -EBUSY;
  935. goto stop_clk;
  936. }
  937. info->screen_base = ioremap_wc(info->fix.smem_start,
  938. info->fix.smem_len);
  939. if (!info->screen_base) {
  940. ret = -ENOMEM;
  941. goto release_intmem;
  942. }
  943. /*
  944. * Don't clear the framebuffer -- someone may have set
  945. * up a splash image.
  946. */
  947. } else {
  948. /* allocate memory buffer */
  949. ret = atmel_lcdfb_alloc_video_memory(sinfo);
  950. if (ret < 0) {
  951. dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
  952. goto stop_clk;
  953. }
  954. }
  955. /* LCDC registers */
  956. info->fix.mmio_start = regs->start;
  957. info->fix.mmio_len = resource_size(regs);
  958. if (!request_mem_region(info->fix.mmio_start,
  959. info->fix.mmio_len, pdev->name)) {
  960. ret = -EBUSY;
  961. goto free_fb;
  962. }
  963. sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
  964. if (!sinfo->mmio) {
  965. dev_err(dev, "cannot map LCDC registers\n");
  966. ret = -ENOMEM;
  967. goto release_mem;
  968. }
  969. /* Initialize PWM for contrast or backlight ("off") */
  970. init_contrast(sinfo);
  971. /* interrupt */
  972. ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
  973. if (ret) {
  974. dev_err(dev, "request_irq failed: %d\n", ret);
  975. goto unmap_mmio;
  976. }
  977. /* Some operations on the LCDC might sleep and
  978. * require a preemptible task context */
  979. INIT_WORK(&sinfo->task, atmel_lcdfb_task);
  980. ret = atmel_lcdfb_init_fbinfo(sinfo);
  981. if (ret < 0) {
  982. dev_err(dev, "init fbinfo failed: %d\n", ret);
  983. goto unregister_irqs;
  984. }
  985. ret = atmel_lcdfb_set_par(info);
  986. if (ret < 0) {
  987. dev_err(dev, "set par failed: %d\n", ret);
  988. goto unregister_irqs;
  989. }
  990. dev_set_drvdata(dev, info);
  991. /*
  992. * Tell the world that we're ready to go
  993. */
  994. ret = register_framebuffer(info);
  995. if (ret < 0) {
  996. dev_err(dev, "failed to register framebuffer device: %d\n", ret);
  997. goto reset_drvdata;
  998. }
  999. /* Power up the LCDC screen */
  1000. atmel_lcdfb_power_control(sinfo, 1);
  1001. dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %d\n",
  1002. info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
  1003. return 0;
  1004. reset_drvdata:
  1005. dev_set_drvdata(dev, NULL);
  1006. fb_dealloc_cmap(&info->cmap);
  1007. unregister_irqs:
  1008. cancel_work_sync(&sinfo->task);
  1009. free_irq(sinfo->irq_base, info);
  1010. unmap_mmio:
  1011. exit_backlight(sinfo);
  1012. iounmap(sinfo->mmio);
  1013. release_mem:
  1014. release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
  1015. free_fb:
  1016. if (map)
  1017. iounmap(info->screen_base);
  1018. else
  1019. atmel_lcdfb_free_video_memory(sinfo);
  1020. release_intmem:
  1021. if (map)
  1022. release_mem_region(info->fix.smem_start, info->fix.smem_len);
  1023. stop_clk:
  1024. atmel_lcdfb_stop_clock(sinfo);
  1025. clk_put(sinfo->lcdc_clk);
  1026. put_bus_clk:
  1027. clk_put(sinfo->bus_clk);
  1028. free_info:
  1029. framebuffer_release(info);
  1030. out:
  1031. dev_dbg(dev, "%s FAILED\n", __func__);
  1032. return ret;
  1033. }
  1034. static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
  1035. {
  1036. struct device *dev = &pdev->dev;
  1037. struct fb_info *info = dev_get_drvdata(dev);
  1038. struct atmel_lcdfb_info *sinfo;
  1039. if (!info || !info->par)
  1040. return 0;
  1041. sinfo = info->par;
  1042. cancel_work_sync(&sinfo->task);
  1043. exit_backlight(sinfo);
  1044. atmel_lcdfb_power_control(sinfo, 0);
  1045. unregister_framebuffer(info);
  1046. atmel_lcdfb_stop_clock(sinfo);
  1047. clk_put(sinfo->lcdc_clk);
  1048. clk_put(sinfo->bus_clk);
  1049. fb_dealloc_cmap(&info->cmap);
  1050. free_irq(sinfo->irq_base, info);
  1051. iounmap(sinfo->mmio);
  1052. release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
  1053. if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
  1054. iounmap(info->screen_base);
  1055. release_mem_region(info->fix.smem_start, info->fix.smem_len);
  1056. } else {
  1057. atmel_lcdfb_free_video_memory(sinfo);
  1058. }
  1059. framebuffer_release(info);
  1060. return 0;
  1061. }
  1062. #ifdef CONFIG_PM
  1063. static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
  1064. {
  1065. struct fb_info *info = platform_get_drvdata(pdev);
  1066. struct atmel_lcdfb_info *sinfo = info->par;
  1067. /*
  1068. * We don't want to handle interrupts while the clock is
  1069. * stopped. It may take forever.
  1070. */
  1071. lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0U);
  1072. sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_CTR);
  1073. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
  1074. atmel_lcdfb_power_control(sinfo, 0);
  1075. atmel_lcdfb_stop(sinfo);
  1076. atmel_lcdfb_stop_clock(sinfo);
  1077. return 0;
  1078. }
  1079. static int atmel_lcdfb_resume(struct platform_device *pdev)
  1080. {
  1081. struct fb_info *info = platform_get_drvdata(pdev);
  1082. struct atmel_lcdfb_info *sinfo = info->par;
  1083. atmel_lcdfb_start_clock(sinfo);
  1084. atmel_lcdfb_start(sinfo);
  1085. atmel_lcdfb_power_control(sinfo, 1);
  1086. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
  1087. /* Enable FIFO & DMA errors */
  1088. lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI
  1089. | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
  1090. return 0;
  1091. }
  1092. #else
  1093. #define atmel_lcdfb_suspend NULL
  1094. #define atmel_lcdfb_resume NULL
  1095. #endif
  1096. static struct platform_driver atmel_lcdfb_driver = {
  1097. .remove = __exit_p(atmel_lcdfb_remove),
  1098. .suspend = atmel_lcdfb_suspend,
  1099. .resume = atmel_lcdfb_resume,
  1100. .driver = {
  1101. .name = "atmel_lcdfb",
  1102. .of_match_table = of_match_ptr(atmel_lcdfb_dt_ids),
  1103. },
  1104. };
  1105. module_platform_driver_probe(atmel_lcdfb_driver, atmel_lcdfb_probe);
  1106. MODULE_DESCRIPTION("AT91 LCD Controller framebuffer driver");
  1107. MODULE_AUTHOR("Nicolas Ferre <[email protected]>");
  1108. MODULE_LICENSE("GPL");