otg.c 5.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * otg.c - ChipIdea USB IP core OTG driver
  4. *
  5. * Copyright (C) 2013 Freescale Semiconductor, Inc.
  6. *
  7. * Author: Peter Chen
  8. */
  9. /*
  10. * This file mainly handles otgsc register, OTG fsm operations for HNP and SRP
  11. * are also included.
  12. */
  13. #include <linux/usb/otg.h>
  14. #include <linux/usb/gadget.h>
  15. #include <linux/usb/chipidea.h>
  16. #include "ci.h"
  17. #include "bits.h"
  18. #include "otg.h"
  19. #include "otg_fsm.h"
  20. /**
  21. * hw_read_otgsc - returns otgsc register bits value.
  22. * @ci: the controller
  23. * @mask: bitfield mask
  24. */
  25. u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
  26. {
  27. struct ci_hdrc_cable *cable;
  28. u32 val = hw_read(ci, OP_OTGSC, mask);
  29. /*
  30. * If using extcon framework for VBUS and/or ID signal
  31. * detection overwrite OTGSC register value
  32. */
  33. cable = &ci->platdata->vbus_extcon;
  34. if (!IS_ERR(cable->edev) || ci->role_switch) {
  35. if (cable->changed)
  36. val |= OTGSC_BSVIS;
  37. else
  38. val &= ~OTGSC_BSVIS;
  39. if (cable->connected)
  40. val |= OTGSC_BSV;
  41. else
  42. val &= ~OTGSC_BSV;
  43. if (cable->enabled)
  44. val |= OTGSC_BSVIE;
  45. else
  46. val &= ~OTGSC_BSVIE;
  47. }
  48. cable = &ci->platdata->id_extcon;
  49. if (!IS_ERR(cable->edev) || ci->role_switch) {
  50. if (cable->changed)
  51. val |= OTGSC_IDIS;
  52. else
  53. val &= ~OTGSC_IDIS;
  54. if (cable->connected)
  55. val &= ~OTGSC_ID; /* host */
  56. else
  57. val |= OTGSC_ID; /* device */
  58. if (cable->enabled)
  59. val |= OTGSC_IDIE;
  60. else
  61. val &= ~OTGSC_IDIE;
  62. }
  63. return val & mask;
  64. }
  65. /**
  66. * hw_write_otgsc - updates target bits of OTGSC register.
  67. * @ci: the controller
  68. * @mask: bitfield mask
  69. * @data: to be written
  70. */
  71. void hw_write_otgsc(struct ci_hdrc *ci, u32 mask, u32 data)
  72. {
  73. struct ci_hdrc_cable *cable;
  74. cable = &ci->platdata->vbus_extcon;
  75. if (!IS_ERR(cable->edev) || ci->role_switch) {
  76. if (data & mask & OTGSC_BSVIS)
  77. cable->changed = false;
  78. /* Don't enable vbus interrupt if using external notifier */
  79. if (data & mask & OTGSC_BSVIE) {
  80. cable->enabled = true;
  81. data &= ~OTGSC_BSVIE;
  82. } else if (mask & OTGSC_BSVIE) {
  83. cable->enabled = false;
  84. }
  85. }
  86. cable = &ci->platdata->id_extcon;
  87. if (!IS_ERR(cable->edev) || ci->role_switch) {
  88. if (data & mask & OTGSC_IDIS)
  89. cable->changed = false;
  90. /* Don't enable id interrupt if using external notifier */
  91. if (data & mask & OTGSC_IDIE) {
  92. cable->enabled = true;
  93. data &= ~OTGSC_IDIE;
  94. } else if (mask & OTGSC_IDIE) {
  95. cable->enabled = false;
  96. }
  97. }
  98. hw_write(ci, OP_OTGSC, mask | OTGSC_INT_STATUS_BITS, data);
  99. }
  100. /**
  101. * ci_otg_role - pick role based on ID pin state
  102. * @ci: the controller
  103. */
  104. enum ci_role ci_otg_role(struct ci_hdrc *ci)
  105. {
  106. enum ci_role role = hw_read_otgsc(ci, OTGSC_ID)
  107. ? CI_ROLE_GADGET
  108. : CI_ROLE_HOST;
  109. return role;
  110. }
  111. void ci_handle_vbus_change(struct ci_hdrc *ci)
  112. {
  113. if (!ci->is_otg)
  114. return;
  115. if (hw_read_otgsc(ci, OTGSC_BSV) && !ci->vbus_active)
  116. usb_gadget_vbus_connect(&ci->gadget);
  117. else if (!hw_read_otgsc(ci, OTGSC_BSV) && ci->vbus_active)
  118. usb_gadget_vbus_disconnect(&ci->gadget);
  119. }
  120. /**
  121. * hw_wait_vbus_lower_bsv - When we switch to device mode, the vbus value
  122. * should be lower than OTGSC_BSV before connecting
  123. * to host.
  124. *
  125. * @ci: the controller
  126. *
  127. * This function returns an error code if timeout
  128. */
  129. static int hw_wait_vbus_lower_bsv(struct ci_hdrc *ci)
  130. {
  131. unsigned long elapse = jiffies + msecs_to_jiffies(5000);
  132. u32 mask = OTGSC_BSV;
  133. while (hw_read_otgsc(ci, mask)) {
  134. if (time_after(jiffies, elapse)) {
  135. dev_err(ci->dev, "timeout waiting for %08x in OTGSC\n",
  136. mask);
  137. return -ETIMEDOUT;
  138. }
  139. msleep(20);
  140. }
  141. return 0;
  142. }
  143. static void ci_handle_id_switch(struct ci_hdrc *ci)
  144. {
  145. enum ci_role role;
  146. mutex_lock(&ci->mutex);
  147. role = ci_otg_role(ci);
  148. if (role != ci->role) {
  149. dev_dbg(ci->dev, "switching from %s to %s\n",
  150. ci_role(ci)->name, ci->roles[role]->name);
  151. if (ci->vbus_active && ci->role == CI_ROLE_GADGET)
  152. /*
  153. * vbus disconnect event is lost due to role
  154. * switch occurs during system suspend.
  155. */
  156. usb_gadget_vbus_disconnect(&ci->gadget);
  157. ci_role_stop(ci);
  158. if (role == CI_ROLE_GADGET &&
  159. IS_ERR(ci->platdata->vbus_extcon.edev))
  160. /*
  161. * Wait vbus lower than OTGSC_BSV before connecting
  162. * to host. If connecting status is from an external
  163. * connector instead of register, we don't need to
  164. * care vbus on the board, since it will not affect
  165. * external connector status.
  166. */
  167. hw_wait_vbus_lower_bsv(ci);
  168. ci_role_start(ci, role);
  169. /* vbus change may have already occurred */
  170. if (role == CI_ROLE_GADGET)
  171. ci_handle_vbus_change(ci);
  172. }
  173. mutex_unlock(&ci->mutex);
  174. }
  175. /**
  176. * ci_otg_work - perform otg (vbus/id) event handle
  177. * @work: work struct
  178. */
  179. static void ci_otg_work(struct work_struct *work)
  180. {
  181. struct ci_hdrc *ci = container_of(work, struct ci_hdrc, work);
  182. if (ci_otg_is_fsm_mode(ci) && !ci_otg_fsm_work(ci)) {
  183. enable_irq(ci->irq);
  184. return;
  185. }
  186. pm_runtime_get_sync(ci->dev);
  187. if (ci->id_event) {
  188. ci->id_event = false;
  189. ci_handle_id_switch(ci);
  190. }
  191. if (ci->b_sess_valid_event) {
  192. ci->b_sess_valid_event = false;
  193. ci_handle_vbus_change(ci);
  194. }
  195. pm_runtime_put_sync(ci->dev);
  196. enable_irq(ci->irq);
  197. }
  198. /**
  199. * ci_hdrc_otg_init - initialize otg struct
  200. * @ci: the controller
  201. */
  202. int ci_hdrc_otg_init(struct ci_hdrc *ci)
  203. {
  204. INIT_WORK(&ci->work, ci_otg_work);
  205. ci->wq = create_freezable_workqueue("ci_otg");
  206. if (!ci->wq) {
  207. dev_err(ci->dev, "can't create workqueue\n");
  208. return -ENODEV;
  209. }
  210. if (ci_otg_is_fsm_mode(ci))
  211. return ci_hdrc_otg_fsm_init(ci);
  212. return 0;
  213. }
  214. /**
  215. * ci_hdrc_otg_destroy - destroy otg struct
  216. * @ci: the controller
  217. */
  218. void ci_hdrc_otg_destroy(struct ci_hdrc *ci)
  219. {
  220. if (ci->wq)
  221. destroy_workqueue(ci->wq);
  222. /* Disable all OTG irq and clear status */
  223. hw_write_otgsc(ci, OTGSC_INT_EN_BITS | OTGSC_INT_STATUS_BITS,
  224. OTGSC_INT_STATUS_BITS);
  225. if (ci_otg_is_fsm_mode(ci))
  226. ci_hdrc_otg_fsm_remove(ci);
  227. }