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tsens-v2.c

tsens-v2.c 4.4 KB
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  1. // SPDX-License-Identifier: GPL-2.0
    2. 

  2. /*
    3. 

  3.  * Copyright (c) 2015, The Linux Foundation. All rights reserved.
    4. 

  4.  * Copyright (c) 2018, Linaro Limited
    5. 

  5.  * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved.
    6. 

  6.  */
    7. 

  7. 

  8. #include <linux/bitops.h>
    9. 

  9. #include <linux/regmap.h>
    10. 

  10. #include "tsens.h"
    11. 

  11. 

  12. /* ----- SROT ------ */
    13. 

  13. #define SROT_HW_VER_OFF	0x0000
    14. 

  14. #define SROT_CTRL_OFF		0x0004
    15. 

  15. 

  16. /* ----- TM ------ */
    17. 

  17. #define TM_INT_EN_OFF			0x0004
    18. 

  18. #define TM_UPPER_LOWER_INT_STATUS_OFF	0x0008
    19. 

  19. #define TM_UPPER_LOWER_INT_CLEAR_OFF	0x000c
    20. 

  20. #define TM_UPPER_LOWER_INT_MASK_OFF	0x0010
    21. 

  21. #define TM_CRITICAL_INT_STATUS_OFF	0x0014
    22. 

  22. #define TM_CRITICAL_INT_CLEAR_OFF	0x0018
    23. 

  23. #define TM_CRITICAL_INT_MASK_OFF	0x001c
    24. 

  24. #define TM_Sn_UPPER_LOWER_THRESHOLD_OFF 0x0020
    25. 

  25. #define TM_Sn_CRITICAL_THRESHOLD_OFF	0x0060
    26. 

  26. #define TM_Sn_STATUS_OFF		0x00a0
    27. 

  27. #define TM_TRDY_OFF			0x00e4
    28. 

  28. #define TM_COLD_INT_STATUS_OFF		0x00e0
    29. 

  29. #define TM_WDOG_LOG_OFF		0x013c
    30. 

  30. 

  31. /* v2.x: 8996, 8998, sdm845 */
    32. 

  32. 

  33. static struct tsens_features tsens_v2_feat = {
    34. 

  34. 	.ver_major	= VER_2_X,
    35. 

  35. 	.crit_int	= 1,
    36. 

  36. 	.adc		= 0,
    37. 

  37. 	.srot_split	= 1,
    38. 

  38. 	.max_sensors	= 16,
    39. 

  39. };
    40. 

  40. 

  41. static const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = {
    42. 

  42. 	/* ----- SROT ------ */
    43. 

  43. 	/* VERSION */
    44. 

  44. 	[VER_MAJOR] = REG_FIELD(SROT_HW_VER_OFF, 28, 31),
    45. 

  45. 	[VER_MINOR] = REG_FIELD(SROT_HW_VER_OFF, 16, 27),
    46. 

  46. 	[VER_STEP]  = REG_FIELD(SROT_HW_VER_OFF,  0, 15),
    47. 

  47. 	/* CTRL_OFF */
    48. 

  48. 	[TSENS_EN]     = REG_FIELD(SROT_CTRL_OFF,    0,  0),
    49. 

  49. 	[TSENS_SW_RST] = REG_FIELD(SROT_CTRL_OFF,    1,  1),
    50. 

  50. 

  51. 	/* ----- TM ------ */
    52. 

  52. 	/* INTERRUPT ENABLE */
    53. 

  53. 	/* v2 has separate enables for UPPER/LOWER/CRITICAL interrupts */
    54. 

  54. 	[INT_EN]  = REG_FIELD(TM_INT_EN_OFF, 0, 2),
    55. 

  55. 

  56. 	/* TEMPERATURE THRESHOLDS */
    57. 

  57. 	REG_FIELD_FOR_EACH_SENSOR16(LOW_THRESH,  TM_Sn_UPPER_LOWER_THRESHOLD_OFF,  0,  11),
    58. 

  58. 	REG_FIELD_FOR_EACH_SENSOR16(UP_THRESH,   TM_Sn_UPPER_LOWER_THRESHOLD_OFF, 12,  23),
    59. 

  59. 	REG_FIELD_FOR_EACH_SENSOR16(CRIT_THRESH, TM_Sn_CRITICAL_THRESHOLD_OFF,     0,  11),
    60. 

  60. 

  61. 	/* INTERRUPTS [CLEAR/STATUS/MASK] */
    62. 

  62. 	REG_FIELD_SPLIT_BITS_0_15(LOW_INT_STATUS,  TM_UPPER_LOWER_INT_STATUS_OFF),
    63. 

  63. 	REG_FIELD_SPLIT_BITS_0_15(LOW_INT_CLEAR,   TM_UPPER_LOWER_INT_CLEAR_OFF),
    64. 

  64. 	REG_FIELD_SPLIT_BITS_0_15(LOW_INT_MASK,    TM_UPPER_LOWER_INT_MASK_OFF),
    65. 

  65. 	REG_FIELD_SPLIT_BITS_16_31(UP_INT_STATUS,  TM_UPPER_LOWER_INT_STATUS_OFF),
    66. 

  66. 	REG_FIELD_SPLIT_BITS_16_31(UP_INT_CLEAR,   TM_UPPER_LOWER_INT_CLEAR_OFF),
    67. 

  67. 	REG_FIELD_SPLIT_BITS_16_31(UP_INT_MASK,    TM_UPPER_LOWER_INT_MASK_OFF),
    68. 

  68. 	REG_FIELD_SPLIT_BITS_0_15(CRIT_INT_STATUS, TM_CRITICAL_INT_STATUS_OFF),
    69. 

  69. 	REG_FIELD_SPLIT_BITS_0_15(CRIT_INT_CLEAR,  TM_CRITICAL_INT_CLEAR_OFF),
    70. 

  70. 	REG_FIELD_SPLIT_BITS_0_15(CRIT_INT_MASK,   TM_CRITICAL_INT_MASK_OFF),
    71. 

  71. 

  72. 	/* WATCHDOG on v2.3 or later */
    73. 

  73. 	[WDOG_BARK_STATUS] = REG_FIELD(TM_CRITICAL_INT_STATUS_OFF, 31, 31),
    74. 

  74. 	[WDOG_BARK_CLEAR]  = REG_FIELD(TM_CRITICAL_INT_CLEAR_OFF,  31, 31),
    75. 

  75. 	[WDOG_BARK_MASK]   = REG_FIELD(TM_CRITICAL_INT_MASK_OFF,   31, 31),
    76. 

  76. 	[CC_MON_STATUS]    = REG_FIELD(TM_CRITICAL_INT_STATUS_OFF, 30, 30),
    77. 

  77. 	[CC_MON_CLEAR]     = REG_FIELD(TM_CRITICAL_INT_CLEAR_OFF,  30, 30),
    78. 

  78. 	[CC_MON_MASK]      = REG_FIELD(TM_CRITICAL_INT_MASK_OFF,   30, 30),
    79. 

  79. 	[WDOG_BARK_COUNT]  = REG_FIELD(TM_WDOG_LOG_OFF,             0,  7),
    80. 

  80. 

  81. 	/* Sn_STATUS */
    82. 

  82. 	REG_FIELD_FOR_EACH_SENSOR16(LAST_TEMP,       TM_Sn_STATUS_OFF,  0,  11),
    83. 

  83. 	REG_FIELD_FOR_EACH_SENSOR16(VALID,           TM_Sn_STATUS_OFF, 21,  21),
    84. 

  84. 	/* xxx_STATUS bits: 1 == threshold violated */
    85. 

  85. 	REG_FIELD_FOR_EACH_SENSOR16(MIN_STATUS,      TM_Sn_STATUS_OFF, 16,  16),
    86. 

  86. 	REG_FIELD_FOR_EACH_SENSOR16(LOWER_STATUS,    TM_Sn_STATUS_OFF, 17,  17),
    87. 

  87. 	REG_FIELD_FOR_EACH_SENSOR16(UPPER_STATUS,    TM_Sn_STATUS_OFF, 18,  18),
    88. 

  88. 	REG_FIELD_FOR_EACH_SENSOR16(CRITICAL_STATUS, TM_Sn_STATUS_OFF, 19,  19),
    89. 

  89. 	REG_FIELD_FOR_EACH_SENSOR16(MAX_STATUS,      TM_Sn_STATUS_OFF, 20,  20),
    90. 

  90. 	/* COLD INTERRUPT STATUS */
    91. 

  91. 	[COLD_STATUS] = REG_FIELD(TM_COLD_INT_STATUS_OFF, 0, 0),
    92. 

  92. 	/* TRDY: 1=ready, 0=in progress */
    93. 

  93. 	[TRDY] = REG_FIELD(TM_TRDY_OFF, 0, 0),
    94. 

  94. };
    95. 

  95. 

  96. static const struct tsens_ops ops_generic_v2 = {
    97. 

  97. 	.init		= init_common,
    98. 

  98. 	.get_temp	= get_temp_tsens_valid,
    99. 

  99. 	.suspend = tsens_v2_tsens_suspend,
    100. 

  100. 	.resume = tsens_v2_tsens_resume,
    101. 

  101. 	.get_cold_status  = get_cold_int_status,
    102. 

  102. };
    103. 

  103. 

  104. struct tsens_plat_data data_tsens_v2 = {
    105. 

  105. 	.ops		= &ops_generic_v2,
    106. 

  106. 	.feat		= &tsens_v2_feat,
    107. 

  107. 	.fields	= tsens_v2_regfields,
    108. 

  108. };
    109. 

  109. 

  110. /* Kept around for backward compatibility with old msm8996.dtsi */
    111. 

  111. struct tsens_plat_data data_8996 = {
    112. 

  112. 	.num_sensors	= 13,
    113. 

  113. 	.ops		= &ops_generic_v2,
    114. 

  114. 	.feat		= &tsens_v2_feat,
    115. 

  115. 	.fields	= tsens_v2_regfields,
    116. 

  116. };
    117.