cx_ipeak_cdev.c 6.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2018-2019, 2021 The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2023, Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "%s:%s " fmt, KBUILD_MODNAME, __func__
  7. #include <linux/module.h>
  8. #include <linux/platform_device.h>
  9. #include <linux/thermal.h>
  10. #include <linux/err.h>
  11. #include <linux/slab.h>
  12. #include <linux/io.h>
  13. #define CXIP_LM_CDEV_DRIVER "cx-ipeak-cooling-device"
  14. #define CXIP_LM_CDEV_MAX_STATE 1
  15. #define CXIP_LM_VOTE_STATUS 0x0
  16. #define CXIP_LM_BYPASS 0x4
  17. #define CXIP_LM_VOTE_CLEAR 0x8
  18. #define CXIP_LM_VOTE_SET 0xc
  19. #define CXIP_LM_FEATURE_EN 0x10
  20. #define CXIP_LM_BYPASS_VAL 0xff20
  21. #define CXIP_LM_THERM_VOTE_VAL 0x80
  22. #define CXIP_LM_FEATURE_EN_VAL 0x1
  23. struct cxip_lm_cooling_device {
  24. struct thermal_cooling_device *cool_dev;
  25. char cdev_name[THERMAL_NAME_LENGTH];
  26. void *cx_ip_reg_base;
  27. unsigned int therm_clnt;
  28. unsigned int *bypass_clnts;
  29. unsigned int bypass_clnt_cnt;
  30. bool state;
  31. };
  32. static void cxip_lm_therm_vote_apply(struct cxip_lm_cooling_device *cxip_dev,
  33. bool vote)
  34. {
  35. int vote_offset = 0, val = 0, sts_offset = 0;
  36. if (!cxip_dev->therm_clnt) {
  37. vote_offset = vote ? CXIP_LM_VOTE_SET : CXIP_LM_VOTE_CLEAR;
  38. val = CXIP_LM_THERM_VOTE_VAL;
  39. sts_offset = CXIP_LM_VOTE_STATUS;
  40. } else {
  41. vote_offset = cxip_dev->therm_clnt;
  42. val = vote ? 0x1 : 0x0;
  43. sts_offset = vote_offset;
  44. }
  45. writel_relaxed(val, cxip_dev->cx_ip_reg_base + vote_offset);
  46. pr_debug("%s vote for cxip_lm. vote:0x%x\n",
  47. vote ? "Applied" : "Cleared",
  48. readl_relaxed(cxip_dev->cx_ip_reg_base + sts_offset));
  49. }
  50. static void cxip_lm_initialize_cxip_hw(struct cxip_lm_cooling_device *cxip_dev)
  51. {
  52. int i = 0;
  53. /* Set CXIP LM proxy vote for clients who are not participating */
  54. if (cxip_dev->bypass_clnt_cnt)
  55. for (i = 0; i < cxip_dev->bypass_clnt_cnt; i++)
  56. writel_relaxed(0x1, cxip_dev->cx_ip_reg_base +
  57. cxip_dev->bypass_clnts[i]);
  58. else if (!cxip_dev->therm_clnt)
  59. writel_relaxed(CXIP_LM_BYPASS_VAL,
  60. cxip_dev->cx_ip_reg_base + CXIP_LM_BYPASS);
  61. /* Enable CXIP LM HW */
  62. writel_relaxed(CXIP_LM_FEATURE_EN_VAL, cxip_dev->cx_ip_reg_base +
  63. CXIP_LM_FEATURE_EN);
  64. }
  65. static int cxip_lm_get_max_state(struct thermal_cooling_device *cdev,
  66. unsigned long *state)
  67. {
  68. *state = CXIP_LM_CDEV_MAX_STATE;
  69. return 0;
  70. }
  71. static int cxip_lm_set_cur_state(struct thermal_cooling_device *cdev,
  72. unsigned long state)
  73. {
  74. struct cxip_lm_cooling_device *cxip_dev = cdev->devdata;
  75. int ret = 0;
  76. if (state > CXIP_LM_CDEV_MAX_STATE)
  77. return -EINVAL;
  78. if (cxip_dev->state == state)
  79. return 0;
  80. cxip_lm_therm_vote_apply(cxip_dev, state);
  81. cxip_dev->state = state;
  82. return ret;
  83. }
  84. static int cxip_lm_get_cur_state(struct thermal_cooling_device *cdev,
  85. unsigned long *state)
  86. {
  87. struct cxip_lm_cooling_device *cxip_dev = cdev->devdata;
  88. *state = cxip_dev->state;
  89. return 0;
  90. }
  91. static struct thermal_cooling_device_ops cxip_lm_device_ops = {
  92. .get_max_state = cxip_lm_get_max_state,
  93. .get_cur_state = cxip_lm_get_cur_state,
  94. .set_cur_state = cxip_lm_set_cur_state,
  95. };
  96. static int cxip_lm_cdev_remove(struct platform_device *pdev)
  97. {
  98. struct cxip_lm_cooling_device *cxip_dev =
  99. (struct cxip_lm_cooling_device *)dev_get_drvdata(&pdev->dev);
  100. if (cxip_dev) {
  101. if (cxip_dev->cool_dev) {
  102. thermal_cooling_device_unregister(cxip_dev->cool_dev);
  103. cxip_dev->cool_dev = NULL;
  104. }
  105. if (cxip_dev->cx_ip_reg_base)
  106. cxip_lm_therm_vote_apply(cxip_dev->cx_ip_reg_base,
  107. false);
  108. }
  109. return 0;
  110. }
  111. static int cxip_lm_get_devicetree_data(struct platform_device *pdev,
  112. struct cxip_lm_cooling_device *cxip_dev,
  113. struct device_node *np)
  114. {
  115. int ret = 0;
  116. ret = of_property_read_u32(np, "qcom,thermal-client-offset",
  117. &cxip_dev->therm_clnt);
  118. if (ret) {
  119. dev_dbg(&pdev->dev,
  120. "error for qcom,thermal-client-offset. ret:%d\n",
  121. ret);
  122. cxip_dev->therm_clnt = 0;
  123. ret = 0;
  124. return ret;
  125. }
  126. ret = of_property_count_u32_elems(np, "qcom,bypass-client-list");
  127. if (ret <= 0) {
  128. dev_dbg(&pdev->dev, "Invalid number of clients err:%d\n", ret);
  129. ret = 0;
  130. return ret;
  131. }
  132. cxip_dev->bypass_clnt_cnt = ret;
  133. cxip_dev->bypass_clnts = devm_kcalloc(&pdev->dev,
  134. cxip_dev->bypass_clnt_cnt,
  135. sizeof(*cxip_dev->bypass_clnts), GFP_KERNEL);
  136. if (!cxip_dev->bypass_clnts)
  137. return -ENOMEM;
  138. ret = of_property_read_u32_array(np, "qcom,bypass-client-list",
  139. cxip_dev->bypass_clnts, cxip_dev->bypass_clnt_cnt);
  140. if (ret) {
  141. dev_dbg(&pdev->dev, "bypass client list err:%d, cnt:%d\n",
  142. ret, cxip_dev->bypass_clnt_cnt);
  143. cxip_dev->bypass_clnt_cnt = 0;
  144. ret = 0;
  145. }
  146. return ret;
  147. }
  148. static int cxip_lm_cdev_probe(struct platform_device *pdev)
  149. {
  150. struct cxip_lm_cooling_device *cxip_dev = NULL;
  151. int ret = 0;
  152. struct device_node *np;
  153. struct resource *res = NULL;
  154. np = dev_of_node(&pdev->dev);
  155. if (!np) {
  156. dev_err(&pdev->dev,
  157. "of node not available for cxip_lm cdev\n");
  158. return -EINVAL;
  159. }
  160. cxip_dev = devm_kzalloc(&pdev->dev, sizeof(*cxip_dev), GFP_KERNEL);
  161. if (!cxip_dev)
  162. return -ENOMEM;
  163. ret = cxip_lm_get_devicetree_data(pdev, cxip_dev, np);
  164. if (ret)
  165. return ret;
  166. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  167. if (!res) {
  168. dev_err(&pdev->dev,
  169. "cxip_lm platform get resource failed\n");
  170. return -ENODEV;
  171. }
  172. cxip_dev->cx_ip_reg_base = devm_ioremap(&pdev->dev, res->start,
  173. resource_size(res));
  174. if (!cxip_dev->cx_ip_reg_base) {
  175. dev_err(&pdev->dev, "cxip_lm reg remap failed\n");
  176. return -ENOMEM;
  177. }
  178. cxip_lm_initialize_cxip_hw(cxip_dev);
  179. /* Set thermal vote till we get first vote from TF */
  180. cxip_dev->state = true;
  181. cxip_lm_therm_vote_apply(cxip_dev, cxip_dev->state);
  182. strscpy(cxip_dev->cdev_name, np->name, THERMAL_NAME_LENGTH);
  183. cxip_dev->cool_dev = thermal_of_cooling_device_register(
  184. np, cxip_dev->cdev_name, cxip_dev,
  185. &cxip_lm_device_ops);
  186. if (IS_ERR(cxip_dev->cool_dev)) {
  187. ret = PTR_ERR(cxip_dev->cool_dev);
  188. dev_err(&pdev->dev, "cxip_lm cdev register err:%d\n",
  189. ret);
  190. cxip_dev->cool_dev = NULL;
  191. cxip_lm_therm_vote_apply(cxip_dev->cx_ip_reg_base,
  192. false);
  193. return ret;
  194. }
  195. dev_set_drvdata(&pdev->dev, cxip_dev);
  196. return ret;
  197. }
  198. static const struct of_device_id cxip_lm_cdev_of_match[] = {
  199. {.compatible = "qcom,cxip-lm-cooling-device", },
  200. {}
  201. };
  202. static struct platform_driver cxip_lm_cdev_driver = {
  203. .driver = {
  204. .name = CXIP_LM_CDEV_DRIVER,
  205. .of_match_table = cxip_lm_cdev_of_match,
  206. },
  207. .probe = cxip_lm_cdev_probe,
  208. .remove = cxip_lm_cdev_remove,
  209. };
  210. module_platform_driver(cxip_lm_cdev_driver);
  211. MODULE_DESCRIPTION("CX IPEAK cooling device driver");
  212. MODULE_LICENSE("GPL");