bwmon.h 6.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2014-2020, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #ifndef _QCOM_BWMON_H
  7. #define _QCOM_BWMON_H
  8. #include <linux/kernel.h>
  9. #include <soc/qcom/dcvs.h>
  10. #define NUM_MBPS_ZONES 10
  11. #define UP_WAKE 1
  12. #define DOWN_WAKE 2
  13. #define MBYTE (1ULL << 20)
  14. #define MBPS_TO_KHZ(mbps, w) (mult_frac(mbps, MBYTE, w * 1000ULL))
  15. #define KHZ_TO_MBPS(khz, w) (mult_frac(w * 1000ULL, khz, MBYTE))
  16. #define to_bwmon(ptr) container_of(ptr, struct bwmon, hw)
  17. enum mon_reg_type {
  18. MON1,
  19. MON2,
  20. MON3,
  21. };
  22. struct bwmon_spec {
  23. bool wrap_on_thres;
  24. bool overflow;
  25. bool throt_adj;
  26. bool hw_sampling;
  27. bool has_global_base;
  28. enum mon_reg_type reg_type;
  29. };
  30. struct bwmon_second_map {
  31. u32 src_freq;
  32. u32 dst_freq;
  33. };
  34. /**
  35. * struct bw_hwmon - dev BW HW monitor info
  36. * @start_hwmon: Start the HW monitoring of the dev BW
  37. * @stop_hwmon: Stop the HW monitoring of dev BW
  38. * @set_thres: Set the count threshold to generate an IRQ
  39. * @set_hw_events: Set hw settings for up/down wake events
  40. * @get_bytes_and_clear: Get the bytes transferred since the last call
  41. * and reset the counter to start over.
  42. * @set_throttle_adj: Set throttle adjust field to the given value
  43. * @get_throttle_adj: Get the value written to throttle adjust field
  44. * @dev: Pointer to device tied to this HW monitor
  45. * @dcvs_hw: DCVS HW type that this HW is monitoring for
  46. * @dcvs_path: DCVS Path type that this monitor votes on
  47. * @node: Pointer to hwmon node that contains tunables
  48. * @last_update_ts: Time that the last bwmon work was queued
  49. * @work: bwmon monitor work
  50. * @is_active: Toggled when HW monitor is started/stopped
  51. * @up_wake_mbps: Setting for HW monitor to send IRQ for up wake
  52. * @down_wake_mbps: Setting for HW monitor to send IRQ fow down wake
  53. * @down_cnt: Setting for down sample count needed for wake
  54. */
  55. struct bw_hwmon {
  56. int (*start_hwmon)(struct bw_hwmon *hw,
  57. unsigned long mbps);
  58. void (*stop_hwmon)(struct bw_hwmon *hw);
  59. unsigned long (*set_thres)(struct bw_hwmon *hw,
  60. unsigned long bytes);
  61. unsigned long (*set_hw_events)(struct bw_hwmon *hw,
  62. unsigned int sample_ms);
  63. unsigned long (*get_bytes_and_clear)(struct bw_hwmon *hw);
  64. int (*set_throttle_adj)(struct bw_hwmon *hw,
  65. uint adj);
  66. u32 (*get_throttle_adj)(struct bw_hwmon *hw);
  67. struct device *dev;
  68. enum dcvs_hw_type dcvs_hw;
  69. enum dcvs_path_type dcvs_path;
  70. u32 dcvs_width;
  71. enum dcvs_hw_type second_dcvs_hw;
  72. u32 second_dcvs_width;
  73. bool second_vote_supported;
  74. u32 second_vote_limit;
  75. struct bwmon_second_map *second_map;
  76. struct hwmon_node *node;
  77. ktime_t last_update_ts;
  78. struct work_struct work;
  79. bool is_active;
  80. unsigned long up_wake_mbps;
  81. unsigned long down_wake_mbps;
  82. unsigned int down_cnt;
  83. };
  84. struct bwmon {
  85. void __iomem *base;
  86. void __iomem *global_base;
  87. unsigned int mport;
  88. int irq;
  89. const struct bwmon_spec *spec;
  90. struct device *dev;
  91. struct bw_hwmon hw;
  92. u32 hw_timer_hz;
  93. u32 throttle_adj;
  94. u32 sample_size_ms;
  95. u32 intr_status;
  96. u8 count_shift;
  97. u32 thres_lim;
  98. u32 byte_mask;
  99. u32 byte_match;
  100. };
  101. struct hwmon_node {
  102. u32 hw_min_freq;
  103. u32 hw_max_freq;
  104. u32 min_freq;
  105. u32 max_freq;
  106. struct dcvs_freq cur_freqs[2];
  107. u32 window_ms;
  108. unsigned int guard_band_mbps;
  109. unsigned int decay_rate;
  110. unsigned int io_percent;
  111. unsigned int bw_step;
  112. unsigned int sample_ms;
  113. unsigned int up_scale;
  114. unsigned int up_thres;
  115. unsigned int down_thres;
  116. unsigned int down_count;
  117. unsigned int hist_memory;
  118. unsigned int hyst_trigger_count;
  119. unsigned int hyst_length;
  120. unsigned int idle_length;
  121. unsigned int idle_mbps;
  122. unsigned int ab_scale;
  123. unsigned int mbps_zones[NUM_MBPS_ZONES];
  124. unsigned long prev_ab;
  125. unsigned long bytes;
  126. unsigned long max_mbps;
  127. unsigned long hist_max_mbps;
  128. unsigned long hist_mem;
  129. unsigned long hyst_peak;
  130. unsigned long hyst_mbps;
  131. unsigned long hyst_trig_win;
  132. unsigned long hyst_en;
  133. unsigned long idle_en;
  134. unsigned long prev_req;
  135. unsigned int wake;
  136. unsigned int down_cnt;
  137. ktime_t prev_ts;
  138. ktime_t hist_max_ts;
  139. bool sampled;
  140. bool mon_started;
  141. struct list_head list;
  142. struct bw_hwmon *hw;
  143. struct kobject kobj;
  144. struct mutex mon_lock;
  145. struct mutex update_lock;
  146. };
  147. /* BWMON register offsets */
  148. #define GLB_INT_STATUS(m) ((m)->global_base + 0x100)
  149. #define GLB_INT_CLR(m) ((m)->global_base + 0x108)
  150. #define GLB_INT_EN(m) ((m)->global_base + 0x10C)
  151. #define MON_INT_STATUS(m) ((m)->base + 0x100)
  152. #define MON_INT_STATUS_MASK 0x03
  153. #define MON2_INT_STATUS_MASK 0xF0
  154. #define MON2_INT_STATUS_SHIFT 4
  155. #define MON_INT_CLR(m) ((m)->base + 0x108)
  156. #define MON_INT_EN(m) ((m)->base + 0x10C)
  157. #define MON_INT_ENABLE 0x1
  158. #define MON_EN(m) ((m)->base + 0x280)
  159. #define MON_CLEAR(m) ((m)->base + 0x284)
  160. #define MON_CNT(m) ((m)->base + 0x288)
  161. #define MON_THRES(m) ((m)->base + 0x290)
  162. #define MON_MASK(m) ((m)->base + 0x298)
  163. #define MON_MATCH(m) ((m)->base + 0x29C)
  164. #define MON2_EN(m) ((m)->base + 0x2A0)
  165. #define MON2_CLEAR(m) ((m)->base + 0x2A4)
  166. #define MON2_SW(m) ((m)->base + 0x2A8)
  167. #define MON2_THRES_HI(m) ((m)->base + 0x2AC)
  168. #define MON2_THRES_MED(m) ((m)->base + 0x2B0)
  169. #define MON2_THRES_LO(m) ((m)->base + 0x2B4)
  170. #define MON2_ZONE_ACTIONS(m) ((m)->base + 0x2B8)
  171. #define MON2_ZONE_CNT_THRES(m) ((m)->base + 0x2BC)
  172. #define MON2_BYTE_CNT(m) ((m)->base + 0x2D0)
  173. #define MON2_WIN_TIMER(m) ((m)->base + 0x2D4)
  174. #define MON2_ZONE_CNT(m) ((m)->base + 0x2D8)
  175. #define MON2_ZONE_MAX(m, zone) ((m)->base + 0x2E0 + 0x4 * zone)
  176. #define MON3_INT_STATUS(m) ((m)->base + 0x00)
  177. #define MON3_INT_CLR(m) ((m)->base + 0x08)
  178. #define MON3_INT_EN(m) ((m)->base + 0x0C)
  179. #define MON3_INT_STATUS_MASK 0x0F
  180. #define MON3_EN(m) ((m)->base + 0x10)
  181. #define MON3_CLEAR(m) ((m)->base + 0x14)
  182. #define MON3_MASK(m) ((m)->base + 0x18)
  183. #define MON3_MATCH(m) ((m)->base + 0x1C)
  184. #define MON3_SW(m) ((m)->base + 0x20)
  185. #define MON3_THRES_HI(m) ((m)->base + 0x24)
  186. #define MON3_THRES_MED(m) ((m)->base + 0x28)
  187. #define MON3_THRES_LO(m) ((m)->base + 0x2C)
  188. #define MON3_ZONE_ACTIONS(m) ((m)->base + 0x30)
  189. #define MON3_ZONE_CNT_THRES(m) ((m)->base + 0x34)
  190. #define MON3_BYTE_CNT(m) ((m)->base + 0x38)
  191. #define MON3_WIN_TIMER(m) ((m)->base + 0x3C)
  192. #define MON3_ZONE_CNT(m) ((m)->base + 0x40)
  193. #define MON3_ZONE_MAX(m, zone) ((m)->base + 0x44 + 0x4 * zone)
  194. #endif /* _QCOM_BWMON_H */