soc-imx.c 4.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright 2020 NXP
  4. */
  5. #include <linux/mfd/syscon.h>
  6. #include <linux/of.h>
  7. #include <linux/of_address.h>
  8. #include <linux/regmap.h>
  9. #include <linux/slab.h>
  10. #include <linux/sys_soc.h>
  11. #include <soc/imx/cpu.h>
  12. #include <soc/imx/revision.h>
  13. #define IIM_UID 0x820
  14. #define OCOTP_UID_H 0x420
  15. #define OCOTP_UID_L 0x410
  16. #define OCOTP_ULP_UID_1 0x4b0
  17. #define OCOTP_ULP_UID_2 0x4c0
  18. #define OCOTP_ULP_UID_3 0x4d0
  19. #define OCOTP_ULP_UID_4 0x4e0
  20. static int __init imx_soc_device_init(void)
  21. {
  22. struct soc_device_attribute *soc_dev_attr;
  23. const char *ocotp_compat = NULL;
  24. struct soc_device *soc_dev;
  25. struct device_node *root;
  26. struct regmap *ocotp = NULL;
  27. const char *soc_id;
  28. u64 soc_uid = 0;
  29. u32 val;
  30. int ret;
  31. int i;
  32. /* Return early if this is running on devices with different SoCs */
  33. if (!__mxc_cpu_type)
  34. return 0;
  35. soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
  36. if (!soc_dev_attr)
  37. return -ENOMEM;
  38. soc_dev_attr->family = "Freescale i.MX";
  39. root = of_find_node_by_path("/");
  40. ret = of_property_read_string(root, "model", &soc_dev_attr->machine);
  41. of_node_put(root);
  42. if (ret)
  43. goto free_soc;
  44. switch (__mxc_cpu_type) {
  45. case MXC_CPU_MX1:
  46. soc_id = "i.MX1";
  47. break;
  48. case MXC_CPU_MX21:
  49. soc_id = "i.MX21";
  50. break;
  51. case MXC_CPU_MX25:
  52. soc_id = "i.MX25";
  53. break;
  54. case MXC_CPU_MX27:
  55. soc_id = "i.MX27";
  56. break;
  57. case MXC_CPU_MX31:
  58. soc_id = "i.MX31";
  59. break;
  60. case MXC_CPU_MX35:
  61. soc_id = "i.MX35";
  62. break;
  63. case MXC_CPU_MX50:
  64. soc_id = "i.MX50";
  65. break;
  66. case MXC_CPU_MX51:
  67. ocotp_compat = "fsl,imx51-iim";
  68. soc_id = "i.MX51";
  69. break;
  70. case MXC_CPU_MX53:
  71. ocotp_compat = "fsl,imx53-iim";
  72. soc_id = "i.MX53";
  73. break;
  74. case MXC_CPU_IMX6SL:
  75. ocotp_compat = "fsl,imx6sl-ocotp";
  76. soc_id = "i.MX6SL";
  77. break;
  78. case MXC_CPU_IMX6DL:
  79. ocotp_compat = "fsl,imx6q-ocotp";
  80. soc_id = "i.MX6DL";
  81. break;
  82. case MXC_CPU_IMX6SX:
  83. ocotp_compat = "fsl,imx6sx-ocotp";
  84. soc_id = "i.MX6SX";
  85. break;
  86. case MXC_CPU_IMX6Q:
  87. ocotp_compat = "fsl,imx6q-ocotp";
  88. soc_id = "i.MX6Q";
  89. break;
  90. case MXC_CPU_IMX6UL:
  91. ocotp_compat = "fsl,imx6ul-ocotp";
  92. soc_id = "i.MX6UL";
  93. break;
  94. case MXC_CPU_IMX6ULL:
  95. ocotp_compat = "fsl,imx6ull-ocotp";
  96. soc_id = "i.MX6ULL";
  97. break;
  98. case MXC_CPU_IMX6ULZ:
  99. ocotp_compat = "fsl,imx6ull-ocotp";
  100. soc_id = "i.MX6ULZ";
  101. break;
  102. case MXC_CPU_IMX6SLL:
  103. ocotp_compat = "fsl,imx6sll-ocotp";
  104. soc_id = "i.MX6SLL";
  105. break;
  106. case MXC_CPU_IMX7D:
  107. ocotp_compat = "fsl,imx7d-ocotp";
  108. soc_id = "i.MX7D";
  109. break;
  110. case MXC_CPU_IMX7ULP:
  111. ocotp_compat = "fsl,imx7ulp-ocotp";
  112. soc_id = "i.MX7ULP";
  113. break;
  114. case MXC_CPU_VF500:
  115. ocotp_compat = "fsl,vf610-ocotp";
  116. soc_id = "VF500";
  117. break;
  118. case MXC_CPU_VF510:
  119. ocotp_compat = "fsl,vf610-ocotp";
  120. soc_id = "VF510";
  121. break;
  122. case MXC_CPU_VF600:
  123. ocotp_compat = "fsl,vf610-ocotp";
  124. soc_id = "VF600";
  125. break;
  126. case MXC_CPU_VF610:
  127. ocotp_compat = "fsl,vf610-ocotp";
  128. soc_id = "VF610";
  129. break;
  130. default:
  131. soc_id = "Unknown";
  132. }
  133. soc_dev_attr->soc_id = soc_id;
  134. if (ocotp_compat) {
  135. ocotp = syscon_regmap_lookup_by_compatible(ocotp_compat);
  136. if (IS_ERR(ocotp))
  137. pr_err("%s: failed to find %s regmap!\n", __func__, ocotp_compat);
  138. }
  139. if (!IS_ERR_OR_NULL(ocotp)) {
  140. if (__mxc_cpu_type == MXC_CPU_IMX7ULP) {
  141. regmap_read(ocotp, OCOTP_ULP_UID_4, &val);
  142. soc_uid = val & 0xffff;
  143. regmap_read(ocotp, OCOTP_ULP_UID_3, &val);
  144. soc_uid <<= 16;
  145. soc_uid |= val & 0xffff;
  146. regmap_read(ocotp, OCOTP_ULP_UID_2, &val);
  147. soc_uid <<= 16;
  148. soc_uid |= val & 0xffff;
  149. regmap_read(ocotp, OCOTP_ULP_UID_1, &val);
  150. soc_uid <<= 16;
  151. soc_uid |= val & 0xffff;
  152. } else if (__mxc_cpu_type == MXC_CPU_MX51 ||
  153. __mxc_cpu_type == MXC_CPU_MX53) {
  154. for (i=0; i < 8; i++) {
  155. regmap_read(ocotp, IIM_UID + i*4, &val);
  156. soc_uid <<= 8;
  157. soc_uid |= (val & 0xff);
  158. }
  159. } else {
  160. regmap_read(ocotp, OCOTP_UID_H, &val);
  161. soc_uid = val;
  162. regmap_read(ocotp, OCOTP_UID_L, &val);
  163. soc_uid <<= 32;
  164. soc_uid |= val;
  165. }
  166. }
  167. soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d.%d",
  168. (imx_get_soc_revision() >> 4) & 0xf,
  169. imx_get_soc_revision() & 0xf);
  170. if (!soc_dev_attr->revision) {
  171. ret = -ENOMEM;
  172. goto free_soc;
  173. }
  174. soc_dev_attr->serial_number = kasprintf(GFP_KERNEL, "%016llX", soc_uid);
  175. if (!soc_dev_attr->serial_number) {
  176. ret = -ENOMEM;
  177. goto free_rev;
  178. }
  179. soc_dev = soc_device_register(soc_dev_attr);
  180. if (IS_ERR(soc_dev)) {
  181. ret = PTR_ERR(soc_dev);
  182. goto free_serial_number;
  183. }
  184. return 0;
  185. free_serial_number:
  186. kfree(soc_dev_attr->serial_number);
  187. free_rev:
  188. kfree(soc_dev_attr->revision);
  189. free_soc:
  190. kfree(soc_dev_attr);
  191. return ret;
  192. }
  193. device_initcall(imx_soc_device_init);