imx93-pd.c 4.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright 2022 NXP
  4. */
  5. #include <linux/clk.h>
  6. #include <linux/delay.h>
  7. #include <linux/of_device.h>
  8. #include <linux/iopoll.h>
  9. #include <linux/module.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/pm_domain.h>
  12. #define MIX_SLICE_SW_CTRL_OFF 0x20
  13. #define SLICE_SW_CTRL_PSW_CTRL_OFF_MASK BIT(4)
  14. #define SLICE_SW_CTRL_PDN_SOFT_MASK BIT(31)
  15. #define MIX_FUNC_STAT_OFF 0xB4
  16. #define FUNC_STAT_PSW_STAT_MASK BIT(0)
  17. #define FUNC_STAT_RST_STAT_MASK BIT(2)
  18. #define FUNC_STAT_ISO_STAT_MASK BIT(4)
  19. struct imx93_power_domain {
  20. struct generic_pm_domain genpd;
  21. struct device *dev;
  22. void __iomem *addr;
  23. struct clk_bulk_data *clks;
  24. int num_clks;
  25. bool init_off;
  26. };
  27. #define to_imx93_pd(_genpd) container_of(_genpd, struct imx93_power_domain, genpd)
  28. static int imx93_pd_on(struct generic_pm_domain *genpd)
  29. {
  30. struct imx93_power_domain *domain = to_imx93_pd(genpd);
  31. void __iomem *addr = domain->addr;
  32. u32 val;
  33. int ret;
  34. ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks);
  35. if (ret) {
  36. dev_err(domain->dev, "failed to enable clocks for domain: %s\n", genpd->name);
  37. return ret;
  38. }
  39. val = readl(addr + MIX_SLICE_SW_CTRL_OFF);
  40. val &= ~SLICE_SW_CTRL_PDN_SOFT_MASK;
  41. writel(val, addr + MIX_SLICE_SW_CTRL_OFF);
  42. ret = readl_poll_timeout(addr + MIX_FUNC_STAT_OFF, val,
  43. !(val & FUNC_STAT_ISO_STAT_MASK), 1, 10000);
  44. if (ret) {
  45. dev_err(domain->dev, "pd_on timeout: name: %s, stat: %x\n", genpd->name, val);
  46. return ret;
  47. }
  48. return 0;
  49. }
  50. static int imx93_pd_off(struct generic_pm_domain *genpd)
  51. {
  52. struct imx93_power_domain *domain = to_imx93_pd(genpd);
  53. void __iomem *addr = domain->addr;
  54. int ret;
  55. u32 val;
  56. /* Power off MIX */
  57. val = readl(addr + MIX_SLICE_SW_CTRL_OFF);
  58. val |= SLICE_SW_CTRL_PDN_SOFT_MASK;
  59. writel(val, addr + MIX_SLICE_SW_CTRL_OFF);
  60. ret = readl_poll_timeout(addr + MIX_FUNC_STAT_OFF, val,
  61. val & FUNC_STAT_PSW_STAT_MASK, 1, 1000);
  62. if (ret) {
  63. dev_err(domain->dev, "pd_off timeout: name: %s, stat: %x\n", genpd->name, val);
  64. return ret;
  65. }
  66. clk_bulk_disable_unprepare(domain->num_clks, domain->clks);
  67. return 0;
  68. };
  69. static int imx93_pd_remove(struct platform_device *pdev)
  70. {
  71. struct imx93_power_domain *domain = platform_get_drvdata(pdev);
  72. struct device *dev = &pdev->dev;
  73. struct device_node *np = dev->of_node;
  74. if (!domain->init_off)
  75. clk_bulk_disable_unprepare(domain->num_clks, domain->clks);
  76. of_genpd_del_provider(np);
  77. pm_genpd_remove(&domain->genpd);
  78. return 0;
  79. }
  80. static int imx93_pd_probe(struct platform_device *pdev)
  81. {
  82. struct device *dev = &pdev->dev;
  83. struct device_node *np = dev->of_node;
  84. struct imx93_power_domain *domain;
  85. int ret;
  86. domain = devm_kzalloc(dev, sizeof(*domain), GFP_KERNEL);
  87. if (!domain)
  88. return -ENOMEM;
  89. domain->addr = devm_platform_ioremap_resource(pdev, 0);
  90. if (IS_ERR(domain->addr))
  91. return PTR_ERR(domain->addr);
  92. domain->num_clks = devm_clk_bulk_get_all(dev, &domain->clks);
  93. if (domain->num_clks < 0)
  94. return dev_err_probe(dev, domain->num_clks, "Failed to get domain's clocks\n");
  95. domain->genpd.name = dev_name(dev);
  96. domain->genpd.power_off = imx93_pd_off;
  97. domain->genpd.power_on = imx93_pd_on;
  98. domain->dev = dev;
  99. domain->init_off = readl(domain->addr + MIX_FUNC_STAT_OFF) & FUNC_STAT_ISO_STAT_MASK;
  100. /* Just to sync the status of hardware */
  101. if (!domain->init_off) {
  102. ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks);
  103. if (ret) {
  104. dev_err(domain->dev, "failed to enable clocks for domain: %s\n",
  105. domain->genpd.name);
  106. return ret;
  107. }
  108. }
  109. ret = pm_genpd_init(&domain->genpd, NULL, domain->init_off);
  110. if (ret)
  111. goto err_clk_unprepare;
  112. platform_set_drvdata(pdev, domain);
  113. ret = of_genpd_add_provider_simple(np, &domain->genpd);
  114. if (ret)
  115. goto err_genpd_remove;
  116. return 0;
  117. err_genpd_remove:
  118. pm_genpd_remove(&domain->genpd);
  119. err_clk_unprepare:
  120. if (!domain->init_off)
  121. clk_bulk_disable_unprepare(domain->num_clks, domain->clks);
  122. return ret;
  123. }
  124. static const struct of_device_id imx93_pd_ids[] = {
  125. { .compatible = "fsl,imx93-src-slice" },
  126. { }
  127. };
  128. MODULE_DEVICE_TABLE(of, imx93_pd_ids);
  129. static struct platform_driver imx93_power_domain_driver = {
  130. .driver = {
  131. .name = "imx93_power_domain",
  132. .owner = THIS_MODULE,
  133. .of_match_table = imx93_pd_ids,
  134. },
  135. .probe = imx93_pd_probe,
  136. .remove = imx93_pd_remove,
  137. };
  138. module_platform_driver(imx93_power_domain_driver);
  139. MODULE_AUTHOR("Peng Fan <[email protected]>");
  140. MODULE_DESCRIPTION("NXP i.MX93 power domain driver");
  141. MODULE_LICENSE("GPL");