guts.c 6.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279
  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Freescale QorIQ Platforms GUTS Driver
  4. *
  5. * Copyright (C) 2016 Freescale Semiconductor, Inc.
  6. */
  7. #include <linux/io.h>
  8. #include <linux/slab.h>
  9. #include <linux/module.h>
  10. #include <linux/of_fdt.h>
  11. #include <linux/sys_soc.h>
  12. #include <linux/of_address.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/fsl/guts.h>
  15. struct fsl_soc_die_attr {
  16. char *die;
  17. u32 svr;
  18. u32 mask;
  19. };
  20. struct fsl_soc_data {
  21. const char *sfp_compat;
  22. u32 uid_offset;
  23. };
  24. /* SoC die attribute definition for QorIQ platform */
  25. static const struct fsl_soc_die_attr fsl_soc_die[] = {
  26. /*
  27. * Power Architecture-based SoCs T Series
  28. */
  29. /* Die: T4240, SoC: T4240/T4160/T4080 */
  30. { .die = "T4240",
  31. .svr = 0x82400000,
  32. .mask = 0xfff00000,
  33. },
  34. /* Die: T1040, SoC: T1040/T1020/T1042/T1022 */
  35. { .die = "T1040",
  36. .svr = 0x85200000,
  37. .mask = 0xfff00000,
  38. },
  39. /* Die: T2080, SoC: T2080/T2081 */
  40. { .die = "T2080",
  41. .svr = 0x85300000,
  42. .mask = 0xfff00000,
  43. },
  44. /* Die: T1024, SoC: T1024/T1014/T1023/T1013 */
  45. { .die = "T1024",
  46. .svr = 0x85400000,
  47. .mask = 0xfff00000,
  48. },
  49. /*
  50. * ARM-based SoCs LS Series
  51. */
  52. /* Die: LS1043A, SoC: LS1043A/LS1023A */
  53. { .die = "LS1043A",
  54. .svr = 0x87920000,
  55. .mask = 0xffff0000,
  56. },
  57. /* Die: LS2080A, SoC: LS2080A/LS2040A/LS2085A */
  58. { .die = "LS2080A",
  59. .svr = 0x87010000,
  60. .mask = 0xff3f0000,
  61. },
  62. /* Die: LS1088A, SoC: LS1088A/LS1048A/LS1084A/LS1044A */
  63. { .die = "LS1088A",
  64. .svr = 0x87030000,
  65. .mask = 0xff3f0000,
  66. },
  67. /* Die: LS1012A, SoC: LS1012A */
  68. { .die = "LS1012A",
  69. .svr = 0x87040000,
  70. .mask = 0xffff0000,
  71. },
  72. /* Die: LS1046A, SoC: LS1046A/LS1026A */
  73. { .die = "LS1046A",
  74. .svr = 0x87070000,
  75. .mask = 0xffff0000,
  76. },
  77. /* Die: LS2088A, SoC: LS2088A/LS2048A/LS2084A/LS2044A */
  78. { .die = "LS2088A",
  79. .svr = 0x87090000,
  80. .mask = 0xff3f0000,
  81. },
  82. /* Die: LS1021A, SoC: LS1021A/LS1020A/LS1022A */
  83. { .die = "LS1021A",
  84. .svr = 0x87000000,
  85. .mask = 0xfff70000,
  86. },
  87. /* Die: LX2160A, SoC: LX2160A/LX2120A/LX2080A */
  88. { .die = "LX2160A",
  89. .svr = 0x87360000,
  90. .mask = 0xff3f0000,
  91. },
  92. /* Die: LS1028A, SoC: LS1028A */
  93. { .die = "LS1028A",
  94. .svr = 0x870b0000,
  95. .mask = 0xff3f0000,
  96. },
  97. { },
  98. };
  99. static const struct fsl_soc_die_attr *fsl_soc_die_match(
  100. u32 svr, const struct fsl_soc_die_attr *matches)
  101. {
  102. while (matches->svr) {
  103. if (matches->svr == (svr & matches->mask))
  104. return matches;
  105. matches++;
  106. }
  107. return NULL;
  108. }
  109. static u64 fsl_guts_get_soc_uid(const char *compat, unsigned int offset)
  110. {
  111. struct device_node *np;
  112. void __iomem *sfp_base;
  113. u64 uid;
  114. np = of_find_compatible_node(NULL, NULL, compat);
  115. if (!np)
  116. return 0;
  117. sfp_base = of_iomap(np, 0);
  118. if (!sfp_base) {
  119. of_node_put(np);
  120. return 0;
  121. }
  122. uid = ioread32(sfp_base + offset);
  123. uid <<= 32;
  124. uid |= ioread32(sfp_base + offset + 4);
  125. iounmap(sfp_base);
  126. of_node_put(np);
  127. return uid;
  128. }
  129. static const struct fsl_soc_data ls1028a_data = {
  130. .sfp_compat = "fsl,ls1028a-sfp",
  131. .uid_offset = 0x21c,
  132. };
  133. /*
  134. * Table for matching compatible strings, for device tree
  135. * guts node, for Freescale QorIQ SOCs.
  136. */
  137. static const struct of_device_id fsl_guts_of_match[] = {
  138. { .compatible = "fsl,qoriq-device-config-1.0", },
  139. { .compatible = "fsl,qoriq-device-config-2.0", },
  140. { .compatible = "fsl,p1010-guts", },
  141. { .compatible = "fsl,p1020-guts", },
  142. { .compatible = "fsl,p1021-guts", },
  143. { .compatible = "fsl,p1022-guts", },
  144. { .compatible = "fsl,p1023-guts", },
  145. { .compatible = "fsl,p2020-guts", },
  146. { .compatible = "fsl,bsc9131-guts", },
  147. { .compatible = "fsl,bsc9132-guts", },
  148. { .compatible = "fsl,mpc8536-guts", },
  149. { .compatible = "fsl,mpc8544-guts", },
  150. { .compatible = "fsl,mpc8548-guts", },
  151. { .compatible = "fsl,mpc8568-guts", },
  152. { .compatible = "fsl,mpc8569-guts", },
  153. { .compatible = "fsl,mpc8572-guts", },
  154. { .compatible = "fsl,ls1021a-dcfg", },
  155. { .compatible = "fsl,ls1043a-dcfg", },
  156. { .compatible = "fsl,ls2080a-dcfg", },
  157. { .compatible = "fsl,ls1088a-dcfg", },
  158. { .compatible = "fsl,ls1012a-dcfg", },
  159. { .compatible = "fsl,ls1046a-dcfg", },
  160. { .compatible = "fsl,lx2160a-dcfg", },
  161. { .compatible = "fsl,ls1028a-dcfg", .data = &ls1028a_data},
  162. {}
  163. };
  164. static int __init fsl_guts_init(void)
  165. {
  166. struct soc_device_attribute *soc_dev_attr;
  167. static struct soc_device *soc_dev;
  168. const struct fsl_soc_die_attr *soc_die;
  169. const struct fsl_soc_data *soc_data;
  170. const struct of_device_id *match;
  171. struct ccsr_guts __iomem *regs;
  172. const char *machine = NULL;
  173. struct device_node *np;
  174. bool little_endian;
  175. u64 soc_uid = 0;
  176. u32 svr;
  177. int ret;
  178. np = of_find_matching_node_and_match(NULL, fsl_guts_of_match, &match);
  179. if (!np)
  180. return 0;
  181. soc_data = match->data;
  182. regs = of_iomap(np, 0);
  183. if (!regs) {
  184. of_node_put(np);
  185. return -ENOMEM;
  186. }
  187. little_endian = of_property_read_bool(np, "little-endian");
  188. if (little_endian)
  189. svr = ioread32(&regs->svr);
  190. else
  191. svr = ioread32be(&regs->svr);
  192. iounmap(regs);
  193. of_node_put(np);
  194. /* Register soc device */
  195. soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
  196. if (!soc_dev_attr)
  197. return -ENOMEM;
  198. if (of_property_read_string(of_root, "model", &machine))
  199. of_property_read_string_index(of_root, "compatible", 0, &machine);
  200. if (machine) {
  201. soc_dev_attr->machine = kstrdup(machine, GFP_KERNEL);
  202. if (!soc_dev_attr->machine)
  203. goto err_nomem;
  204. }
  205. soc_die = fsl_soc_die_match(svr, fsl_soc_die);
  206. if (soc_die) {
  207. soc_dev_attr->family = kasprintf(GFP_KERNEL, "QorIQ %s",
  208. soc_die->die);
  209. } else {
  210. soc_dev_attr->family = kasprintf(GFP_KERNEL, "QorIQ");
  211. }
  212. if (!soc_dev_attr->family)
  213. goto err_nomem;
  214. soc_dev_attr->soc_id = kasprintf(GFP_KERNEL, "svr:0x%08x", svr);
  215. if (!soc_dev_attr->soc_id)
  216. goto err_nomem;
  217. soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d.%d",
  218. (svr >> 4) & 0xf, svr & 0xf);
  219. if (!soc_dev_attr->revision)
  220. goto err_nomem;
  221. if (soc_data)
  222. soc_uid = fsl_guts_get_soc_uid(soc_data->sfp_compat,
  223. soc_data->uid_offset);
  224. if (soc_uid)
  225. soc_dev_attr->serial_number = kasprintf(GFP_KERNEL, "%016llX",
  226. soc_uid);
  227. soc_dev = soc_device_register(soc_dev_attr);
  228. if (IS_ERR(soc_dev)) {
  229. ret = PTR_ERR(soc_dev);
  230. goto err;
  231. }
  232. pr_info("Machine: %s\n", soc_dev_attr->machine);
  233. pr_info("SoC family: %s\n", soc_dev_attr->family);
  234. pr_info("SoC ID: %s, Revision: %s\n",
  235. soc_dev_attr->soc_id, soc_dev_attr->revision);
  236. return 0;
  237. err_nomem:
  238. ret = -ENOMEM;
  239. err:
  240. kfree(soc_dev_attr->machine);
  241. kfree(soc_dev_attr->family);
  242. kfree(soc_dev_attr->soc_id);
  243. kfree(soc_dev_attr->revision);
  244. kfree(soc_dev_attr->serial_number);
  245. kfree(soc_dev_attr);
  246. return ret;
  247. }
  248. core_initcall(fsl_guts_init);