ql4_nvram.c 6.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * QLogic iSCSI HBA Driver
  4. * Copyright (c) 2003-2013 QLogic Corporation
  5. */
  6. #include "ql4_def.h"
  7. #include "ql4_glbl.h"
  8. #include "ql4_dbg.h"
  9. #include "ql4_inline.h"
  10. static inline void eeprom_cmd(uint32_t cmd, struct scsi_qla_host *ha)
  11. {
  12. writel(cmd, isp_nvram(ha));
  13. readl(isp_nvram(ha));
  14. udelay(1);
  15. }
  16. static inline int eeprom_size(struct scsi_qla_host *ha)
  17. {
  18. return is_qla4010(ha) ? FM93C66A_SIZE_16 : FM93C86A_SIZE_16;
  19. }
  20. static inline int eeprom_no_addr_bits(struct scsi_qla_host *ha)
  21. {
  22. return is_qla4010(ha) ? FM93C56A_NO_ADDR_BITS_16 :
  23. FM93C86A_NO_ADDR_BITS_16 ;
  24. }
  25. static inline int eeprom_no_data_bits(struct scsi_qla_host *ha)
  26. {
  27. return FM93C56A_DATA_BITS_16;
  28. }
  29. static int fm93c56a_select(struct scsi_qla_host * ha)
  30. {
  31. DEBUG5(printk(KERN_ERR "fm93c56a_select:\n"));
  32. ha->eeprom_cmd_data = AUBURN_EEPROM_CS_1 | 0x000f0000;
  33. eeprom_cmd(ha->eeprom_cmd_data, ha);
  34. return 1;
  35. }
  36. static int fm93c56a_cmd(struct scsi_qla_host * ha, int cmd, int addr)
  37. {
  38. int i;
  39. int mask;
  40. int dataBit;
  41. int previousBit;
  42. /* Clock in a zero, then do the start bit. */
  43. eeprom_cmd(ha->eeprom_cmd_data | AUBURN_EEPROM_DO_1, ha);
  44. eeprom_cmd(ha->eeprom_cmd_data | AUBURN_EEPROM_DO_1 |
  45. AUBURN_EEPROM_CLK_RISE, ha);
  46. eeprom_cmd(ha->eeprom_cmd_data | AUBURN_EEPROM_DO_1 |
  47. AUBURN_EEPROM_CLK_FALL, ha);
  48. mask = 1 << (FM93C56A_CMD_BITS - 1);
  49. /* Force the previous data bit to be different. */
  50. previousBit = 0xffff;
  51. for (i = 0; i < FM93C56A_CMD_BITS; i++) {
  52. dataBit =
  53. (cmd & mask) ? AUBURN_EEPROM_DO_1 : AUBURN_EEPROM_DO_0;
  54. if (previousBit != dataBit) {
  55. /*
  56. * If the bit changed, then change the DO state to
  57. * match.
  58. */
  59. eeprom_cmd(ha->eeprom_cmd_data | dataBit, ha);
  60. previousBit = dataBit;
  61. }
  62. eeprom_cmd(ha->eeprom_cmd_data | dataBit |
  63. AUBURN_EEPROM_CLK_RISE, ha);
  64. eeprom_cmd(ha->eeprom_cmd_data | dataBit |
  65. AUBURN_EEPROM_CLK_FALL, ha);
  66. cmd = cmd << 1;
  67. }
  68. mask = 1 << (eeprom_no_addr_bits(ha) - 1);
  69. /* Force the previous data bit to be different. */
  70. previousBit = 0xffff;
  71. for (i = 0; i < eeprom_no_addr_bits(ha); i++) {
  72. dataBit = addr & mask ? AUBURN_EEPROM_DO_1 :
  73. AUBURN_EEPROM_DO_0;
  74. if (previousBit != dataBit) {
  75. /*
  76. * If the bit changed, then change the DO state to
  77. * match.
  78. */
  79. eeprom_cmd(ha->eeprom_cmd_data | dataBit, ha);
  80. previousBit = dataBit;
  81. }
  82. eeprom_cmd(ha->eeprom_cmd_data | dataBit |
  83. AUBURN_EEPROM_CLK_RISE, ha);
  84. eeprom_cmd(ha->eeprom_cmd_data | dataBit |
  85. AUBURN_EEPROM_CLK_FALL, ha);
  86. addr = addr << 1;
  87. }
  88. return 1;
  89. }
  90. static int fm93c56a_deselect(struct scsi_qla_host * ha)
  91. {
  92. ha->eeprom_cmd_data = AUBURN_EEPROM_CS_0 | 0x000f0000;
  93. eeprom_cmd(ha->eeprom_cmd_data, ha);
  94. return 1;
  95. }
  96. static int fm93c56a_datain(struct scsi_qla_host * ha, unsigned short *value)
  97. {
  98. int i;
  99. int data = 0;
  100. int dataBit;
  101. /* Read the data bits
  102. * The first bit is a dummy. Clock right over it. */
  103. for (i = 0; i < eeprom_no_data_bits(ha); i++) {
  104. eeprom_cmd(ha->eeprom_cmd_data |
  105. AUBURN_EEPROM_CLK_RISE, ha);
  106. eeprom_cmd(ha->eeprom_cmd_data |
  107. AUBURN_EEPROM_CLK_FALL, ha);
  108. dataBit = (readw(isp_nvram(ha)) & AUBURN_EEPROM_DI_1) ? 1 : 0;
  109. data = (data << 1) | dataBit;
  110. }
  111. *value = data;
  112. return 1;
  113. }
  114. static int eeprom_readword(int eepromAddr, u16 * value,
  115. struct scsi_qla_host * ha)
  116. {
  117. fm93c56a_select(ha);
  118. fm93c56a_cmd(ha, FM93C56A_READ, eepromAddr);
  119. fm93c56a_datain(ha, value);
  120. fm93c56a_deselect(ha);
  121. return 1;
  122. }
  123. /* Hardware_lock must be set before calling */
  124. u16 rd_nvram_word(struct scsi_qla_host * ha, int offset)
  125. {
  126. u16 val = 0;
  127. /* NOTE: NVRAM uses half-word addresses */
  128. eeprom_readword(offset, &val, ha);
  129. return val;
  130. }
  131. u8 rd_nvram_byte(struct scsi_qla_host *ha, int offset)
  132. {
  133. u16 val = 0;
  134. u8 rval = 0;
  135. int index = 0;
  136. if (offset & 0x1)
  137. index = (offset - 1) / 2;
  138. else
  139. index = offset / 2;
  140. val = le16_to_cpu(rd_nvram_word(ha, index));
  141. if (offset & 0x1)
  142. rval = (u8)((val & 0xff00) >> 8);
  143. else
  144. rval = (u8)((val & 0x00ff));
  145. return rval;
  146. }
  147. int qla4xxx_is_nvram_configuration_valid(struct scsi_qla_host * ha)
  148. {
  149. int status = QLA_ERROR;
  150. uint16_t checksum = 0;
  151. uint32_t index;
  152. unsigned long flags;
  153. spin_lock_irqsave(&ha->hardware_lock, flags);
  154. for (index = 0; index < eeprom_size(ha); index++)
  155. checksum += rd_nvram_word(ha, index);
  156. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  157. if (checksum == 0)
  158. status = QLA_SUCCESS;
  159. return status;
  160. }
  161. /*************************************************************************
  162. *
  163. * Hardware Semaphore routines
  164. *
  165. *************************************************************************/
  166. int ql4xxx_sem_spinlock(struct scsi_qla_host * ha, u32 sem_mask, u32 sem_bits)
  167. {
  168. uint32_t value;
  169. unsigned long flags;
  170. unsigned int seconds = 30;
  171. DEBUG2(printk("scsi%ld : Trying to get SEM lock - mask= 0x%x, code = "
  172. "0x%x\n", ha->host_no, sem_mask, sem_bits));
  173. do {
  174. spin_lock_irqsave(&ha->hardware_lock, flags);
  175. writel((sem_mask | sem_bits), isp_semaphore(ha));
  176. value = readw(isp_semaphore(ha));
  177. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  178. if ((value & (sem_mask >> 16)) == sem_bits) {
  179. DEBUG2(printk("scsi%ld : Got SEM LOCK - mask= 0x%x, "
  180. "code = 0x%x\n", ha->host_no,
  181. sem_mask, sem_bits));
  182. return QLA_SUCCESS;
  183. }
  184. ssleep(1);
  185. } while (--seconds);
  186. return QLA_ERROR;
  187. }
  188. void ql4xxx_sem_unlock(struct scsi_qla_host * ha, u32 sem_mask)
  189. {
  190. unsigned long flags;
  191. spin_lock_irqsave(&ha->hardware_lock, flags);
  192. writel(sem_mask, isp_semaphore(ha));
  193. readl(isp_semaphore(ha));
  194. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  195. DEBUG2(printk("scsi%ld : UNLOCK SEM - mask= 0x%x\n", ha->host_no,
  196. sem_mask));
  197. }
  198. int ql4xxx_sem_lock(struct scsi_qla_host * ha, u32 sem_mask, u32 sem_bits)
  199. {
  200. uint32_t value;
  201. unsigned long flags;
  202. spin_lock_irqsave(&ha->hardware_lock, flags);
  203. writel((sem_mask | sem_bits), isp_semaphore(ha));
  204. value = readw(isp_semaphore(ha));
  205. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  206. if ((value & (sem_mask >> 16)) == sem_bits) {
  207. DEBUG2(printk("scsi%ld : Got SEM LOCK - mask= 0x%x, code = "
  208. "0x%x, sema code=0x%x\n", ha->host_no,
  209. sem_mask, sem_bits, value));
  210. return 1;
  211. }
  212. return 0;
  213. }