commsup.c 68 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Adaptec AAC series RAID controller driver
  4. * (c) Copyright 2001 Red Hat Inc.
  5. *
  6. * based on the old aacraid driver that is..
  7. * Adaptec aacraid device driver for Linux.
  8. *
  9. * Copyright (c) 2000-2010 Adaptec, Inc.
  10. * 2010-2015 PMC-Sierra, Inc. ([email protected])
  11. * 2016-2017 Microsemi Corp. ([email protected])
  12. *
  13. * Module Name:
  14. * commsup.c
  15. *
  16. * Abstract: Contain all routines that are required for FSA host/adapter
  17. * communication.
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/init.h>
  21. #include <linux/crash_dump.h>
  22. #include <linux/types.h>
  23. #include <linux/sched.h>
  24. #include <linux/pci.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/slab.h>
  27. #include <linux/completion.h>
  28. #include <linux/blkdev.h>
  29. #include <linux/delay.h>
  30. #include <linux/kthread.h>
  31. #include <linux/interrupt.h>
  32. #include <linux/bcd.h>
  33. #include <scsi/scsi.h>
  34. #include <scsi/scsi_host.h>
  35. #include <scsi/scsi_device.h>
  36. #include <scsi/scsi_cmnd.h>
  37. #include "aacraid.h"
  38. /**
  39. * fib_map_alloc - allocate the fib objects
  40. * @dev: Adapter to allocate for
  41. *
  42. * Allocate and map the shared PCI space for the FIB blocks used to
  43. * talk to the Adaptec firmware.
  44. */
  45. static int fib_map_alloc(struct aac_dev *dev)
  46. {
  47. if (dev->max_fib_size > AAC_MAX_NATIVE_SIZE)
  48. dev->max_cmd_size = AAC_MAX_NATIVE_SIZE;
  49. else
  50. dev->max_cmd_size = dev->max_fib_size;
  51. if (dev->max_fib_size < AAC_MAX_NATIVE_SIZE) {
  52. dev->max_cmd_size = AAC_MAX_NATIVE_SIZE;
  53. } else {
  54. dev->max_cmd_size = dev->max_fib_size;
  55. }
  56. dprintk((KERN_INFO
  57. "allocate hardware fibs dma_alloc_coherent(%p, %d * (%d + %d), %p)\n",
  58. &dev->pdev->dev, dev->max_cmd_size, dev->scsi_host_ptr->can_queue,
  59. AAC_NUM_MGT_FIB, &dev->hw_fib_pa));
  60. dev->hw_fib_va = dma_alloc_coherent(&dev->pdev->dev,
  61. (dev->max_cmd_size + sizeof(struct aac_fib_xporthdr))
  62. * (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB) + (ALIGN32 - 1),
  63. &dev->hw_fib_pa, GFP_KERNEL);
  64. if (dev->hw_fib_va == NULL)
  65. return -ENOMEM;
  66. return 0;
  67. }
  68. /**
  69. * aac_fib_map_free - free the fib objects
  70. * @dev: Adapter to free
  71. *
  72. * Free the PCI mappings and the memory allocated for FIB blocks
  73. * on this adapter.
  74. */
  75. void aac_fib_map_free(struct aac_dev *dev)
  76. {
  77. size_t alloc_size;
  78. size_t fib_size;
  79. int num_fibs;
  80. if(!dev->hw_fib_va || !dev->max_cmd_size)
  81. return;
  82. num_fibs = dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB;
  83. fib_size = dev->max_fib_size + sizeof(struct aac_fib_xporthdr);
  84. alloc_size = fib_size * num_fibs + ALIGN32 - 1;
  85. dma_free_coherent(&dev->pdev->dev, alloc_size, dev->hw_fib_va,
  86. dev->hw_fib_pa);
  87. dev->hw_fib_va = NULL;
  88. dev->hw_fib_pa = 0;
  89. }
  90. void aac_fib_vector_assign(struct aac_dev *dev)
  91. {
  92. u32 i = 0;
  93. u32 vector = 1;
  94. struct fib *fibptr = NULL;
  95. for (i = 0, fibptr = &dev->fibs[i];
  96. i < (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB);
  97. i++, fibptr++) {
  98. if ((dev->max_msix == 1) ||
  99. (i > ((dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB - 1)
  100. - dev->vector_cap))) {
  101. fibptr->vector_no = 0;
  102. } else {
  103. fibptr->vector_no = vector;
  104. vector++;
  105. if (vector == dev->max_msix)
  106. vector = 1;
  107. }
  108. }
  109. }
  110. /**
  111. * aac_fib_setup - setup the fibs
  112. * @dev: Adapter to set up
  113. *
  114. * Allocate the PCI space for the fibs, map it and then initialise the
  115. * fib area, the unmapped fib data and also the free list
  116. */
  117. int aac_fib_setup(struct aac_dev * dev)
  118. {
  119. struct fib *fibptr;
  120. struct hw_fib *hw_fib;
  121. dma_addr_t hw_fib_pa;
  122. int i;
  123. u32 max_cmds;
  124. while (((i = fib_map_alloc(dev)) == -ENOMEM)
  125. && (dev->scsi_host_ptr->can_queue > (64 - AAC_NUM_MGT_FIB))) {
  126. max_cmds = (dev->scsi_host_ptr->can_queue+AAC_NUM_MGT_FIB) >> 1;
  127. dev->scsi_host_ptr->can_queue = max_cmds - AAC_NUM_MGT_FIB;
  128. if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE3)
  129. dev->init->r7.max_io_commands = cpu_to_le32(max_cmds);
  130. }
  131. if (i<0)
  132. return -ENOMEM;
  133. memset(dev->hw_fib_va, 0,
  134. (dev->max_cmd_size + sizeof(struct aac_fib_xporthdr)) *
  135. (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB));
  136. /* 32 byte alignment for PMC */
  137. hw_fib_pa = (dev->hw_fib_pa + (ALIGN32 - 1)) & ~(ALIGN32 - 1);
  138. hw_fib = (struct hw_fib *)((unsigned char *)dev->hw_fib_va +
  139. (hw_fib_pa - dev->hw_fib_pa));
  140. /* add Xport header */
  141. hw_fib = (struct hw_fib *)((unsigned char *)hw_fib +
  142. sizeof(struct aac_fib_xporthdr));
  143. hw_fib_pa += sizeof(struct aac_fib_xporthdr);
  144. /*
  145. * Initialise the fibs
  146. */
  147. for (i = 0, fibptr = &dev->fibs[i];
  148. i < (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB);
  149. i++, fibptr++)
  150. {
  151. fibptr->flags = 0;
  152. fibptr->size = sizeof(struct fib);
  153. fibptr->dev = dev;
  154. fibptr->hw_fib_va = hw_fib;
  155. fibptr->data = (void *) fibptr->hw_fib_va->data;
  156. fibptr->next = fibptr+1; /* Forward chain the fibs */
  157. init_completion(&fibptr->event_wait);
  158. spin_lock_init(&fibptr->event_lock);
  159. hw_fib->header.XferState = cpu_to_le32(0xffffffff);
  160. hw_fib->header.SenderSize =
  161. cpu_to_le16(dev->max_fib_size); /* ?? max_cmd_size */
  162. fibptr->hw_fib_pa = hw_fib_pa;
  163. fibptr->hw_sgl_pa = hw_fib_pa +
  164. offsetof(struct aac_hba_cmd_req, sge[2]);
  165. /*
  166. * one element is for the ptr to the separate sg list,
  167. * second element for 32 byte alignment
  168. */
  169. fibptr->hw_error_pa = hw_fib_pa +
  170. offsetof(struct aac_native_hba, resp.resp_bytes[0]);
  171. hw_fib = (struct hw_fib *)((unsigned char *)hw_fib +
  172. dev->max_cmd_size + sizeof(struct aac_fib_xporthdr));
  173. hw_fib_pa = hw_fib_pa +
  174. dev->max_cmd_size + sizeof(struct aac_fib_xporthdr);
  175. }
  176. /*
  177. *Assign vector numbers to fibs
  178. */
  179. aac_fib_vector_assign(dev);
  180. /*
  181. * Add the fib chain to the free list
  182. */
  183. dev->fibs[dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB - 1].next = NULL;
  184. /*
  185. * Set 8 fibs aside for management tools
  186. */
  187. dev->free_fib = &dev->fibs[dev->scsi_host_ptr->can_queue];
  188. return 0;
  189. }
  190. /**
  191. * aac_fib_alloc_tag-allocate a fib using tags
  192. * @dev: Adapter to allocate the fib for
  193. * @scmd: SCSI command
  194. *
  195. * Allocate a fib from the adapter fib pool using tags
  196. * from the blk layer.
  197. */
  198. struct fib *aac_fib_alloc_tag(struct aac_dev *dev, struct scsi_cmnd *scmd)
  199. {
  200. struct fib *fibptr;
  201. u32 blk_tag;
  202. int i;
  203. blk_tag = blk_mq_unique_tag(scsi_cmd_to_rq(scmd));
  204. i = blk_mq_unique_tag_to_tag(blk_tag);
  205. fibptr = &dev->fibs[i];
  206. /*
  207. * Null out fields that depend on being zero at the start of
  208. * each I/O
  209. */
  210. fibptr->hw_fib_va->header.XferState = 0;
  211. fibptr->type = FSAFS_NTC_FIB_CONTEXT;
  212. fibptr->callback_data = NULL;
  213. fibptr->callback = NULL;
  214. fibptr->flags = 0;
  215. return fibptr;
  216. }
  217. /**
  218. * aac_fib_alloc - allocate a fib
  219. * @dev: Adapter to allocate the fib for
  220. *
  221. * Allocate a fib from the adapter fib pool. If the pool is empty we
  222. * return NULL.
  223. */
  224. struct fib *aac_fib_alloc(struct aac_dev *dev)
  225. {
  226. struct fib * fibptr;
  227. unsigned long flags;
  228. spin_lock_irqsave(&dev->fib_lock, flags);
  229. fibptr = dev->free_fib;
  230. if(!fibptr){
  231. spin_unlock_irqrestore(&dev->fib_lock, flags);
  232. return fibptr;
  233. }
  234. dev->free_fib = fibptr->next;
  235. spin_unlock_irqrestore(&dev->fib_lock, flags);
  236. /*
  237. * Set the proper node type code and node byte size
  238. */
  239. fibptr->type = FSAFS_NTC_FIB_CONTEXT;
  240. fibptr->size = sizeof(struct fib);
  241. /*
  242. * Null out fields that depend on being zero at the start of
  243. * each I/O
  244. */
  245. fibptr->hw_fib_va->header.XferState = 0;
  246. fibptr->flags = 0;
  247. fibptr->callback = NULL;
  248. fibptr->callback_data = NULL;
  249. return fibptr;
  250. }
  251. /**
  252. * aac_fib_free - free a fib
  253. * @fibptr: fib to free up
  254. *
  255. * Frees up a fib and places it on the appropriate queue
  256. */
  257. void aac_fib_free(struct fib *fibptr)
  258. {
  259. unsigned long flags;
  260. if (fibptr->done == 2)
  261. return;
  262. spin_lock_irqsave(&fibptr->dev->fib_lock, flags);
  263. if (unlikely(fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT))
  264. aac_config.fib_timeouts++;
  265. if (!(fibptr->flags & FIB_CONTEXT_FLAG_NATIVE_HBA) &&
  266. fibptr->hw_fib_va->header.XferState != 0) {
  267. printk(KERN_WARNING "aac_fib_free, XferState != 0, fibptr = 0x%p, XferState = 0x%x\n",
  268. (void*)fibptr,
  269. le32_to_cpu(fibptr->hw_fib_va->header.XferState));
  270. }
  271. fibptr->next = fibptr->dev->free_fib;
  272. fibptr->dev->free_fib = fibptr;
  273. spin_unlock_irqrestore(&fibptr->dev->fib_lock, flags);
  274. }
  275. /**
  276. * aac_fib_init - initialise a fib
  277. * @fibptr: The fib to initialize
  278. *
  279. * Set up the generic fib fields ready for use
  280. */
  281. void aac_fib_init(struct fib *fibptr)
  282. {
  283. struct hw_fib *hw_fib = fibptr->hw_fib_va;
  284. memset(&hw_fib->header, 0, sizeof(struct aac_fibhdr));
  285. hw_fib->header.StructType = FIB_MAGIC;
  286. hw_fib->header.Size = cpu_to_le16(fibptr->dev->max_fib_size);
  287. hw_fib->header.XferState = cpu_to_le32(HostOwned | FibInitialized | FibEmpty | FastResponseCapable);
  288. hw_fib->header.u.ReceiverFibAddress = cpu_to_le32(fibptr->hw_fib_pa);
  289. hw_fib->header.SenderSize = cpu_to_le16(fibptr->dev->max_fib_size);
  290. }
  291. /**
  292. * fib_dealloc - deallocate a fib
  293. * @fibptr: fib to deallocate
  294. *
  295. * Will deallocate and return to the free pool the FIB pointed to by the
  296. * caller.
  297. */
  298. static void fib_dealloc(struct fib * fibptr)
  299. {
  300. struct hw_fib *hw_fib = fibptr->hw_fib_va;
  301. hw_fib->header.XferState = 0;
  302. }
  303. /*
  304. * Commuication primitives define and support the queuing method we use to
  305. * support host to adapter commuication. All queue accesses happen through
  306. * these routines and are the only routines which have a knowledge of the
  307. * how these queues are implemented.
  308. */
  309. /**
  310. * aac_get_entry - get a queue entry
  311. * @dev: Adapter
  312. * @qid: Queue Number
  313. * @entry: Entry return
  314. * @index: Index return
  315. * @nonotify: notification control
  316. *
  317. * With a priority the routine returns a queue entry if the queue has free entries. If the queue
  318. * is full(no free entries) than no entry is returned and the function returns 0 otherwise 1 is
  319. * returned.
  320. */
  321. static int aac_get_entry (struct aac_dev * dev, u32 qid, struct aac_entry **entry, u32 * index, unsigned long *nonotify)
  322. {
  323. struct aac_queue * q;
  324. unsigned long idx;
  325. /*
  326. * All of the queues wrap when they reach the end, so we check
  327. * to see if they have reached the end and if they have we just
  328. * set the index back to zero. This is a wrap. You could or off
  329. * the high bits in all updates but this is a bit faster I think.
  330. */
  331. q = &dev->queues->queue[qid];
  332. idx = *index = le32_to_cpu(*(q->headers.producer));
  333. /* Interrupt Moderation, only interrupt for first two entries */
  334. if (idx != le32_to_cpu(*(q->headers.consumer))) {
  335. if (--idx == 0) {
  336. if (qid == AdapNormCmdQueue)
  337. idx = ADAP_NORM_CMD_ENTRIES;
  338. else
  339. idx = ADAP_NORM_RESP_ENTRIES;
  340. }
  341. if (idx != le32_to_cpu(*(q->headers.consumer)))
  342. *nonotify = 1;
  343. }
  344. if (qid == AdapNormCmdQueue) {
  345. if (*index >= ADAP_NORM_CMD_ENTRIES)
  346. *index = 0; /* Wrap to front of the Producer Queue. */
  347. } else {
  348. if (*index >= ADAP_NORM_RESP_ENTRIES)
  349. *index = 0; /* Wrap to front of the Producer Queue. */
  350. }
  351. /* Queue is full */
  352. if ((*index + 1) == le32_to_cpu(*(q->headers.consumer))) {
  353. printk(KERN_WARNING "Queue %d full, %u outstanding.\n",
  354. qid, atomic_read(&q->numpending));
  355. return 0;
  356. } else {
  357. *entry = q->base + *index;
  358. return 1;
  359. }
  360. }
  361. /**
  362. * aac_queue_get - get the next free QE
  363. * @dev: Adapter
  364. * @index: Returned index
  365. * @qid: Queue number
  366. * @hw_fib: Fib to associate with the queue entry
  367. * @wait: Wait if queue full
  368. * @fibptr: Driver fib object to go with fib
  369. * @nonotify: Don't notify the adapter
  370. *
  371. * Gets the next free QE off the requested priorty adapter command
  372. * queue and associates the Fib with the QE. The QE represented by
  373. * index is ready to insert on the queue when this routine returns
  374. * success.
  375. */
  376. int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * hw_fib, int wait, struct fib * fibptr, unsigned long *nonotify)
  377. {
  378. struct aac_entry * entry = NULL;
  379. int map = 0;
  380. if (qid == AdapNormCmdQueue) {
  381. /* if no entries wait for some if caller wants to */
  382. while (!aac_get_entry(dev, qid, &entry, index, nonotify)) {
  383. printk(KERN_ERR "GetEntries failed\n");
  384. }
  385. /*
  386. * Setup queue entry with a command, status and fib mapped
  387. */
  388. entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size));
  389. map = 1;
  390. } else {
  391. while (!aac_get_entry(dev, qid, &entry, index, nonotify)) {
  392. /* if no entries wait for some if caller wants to */
  393. }
  394. /*
  395. * Setup queue entry with command, status and fib mapped
  396. */
  397. entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size));
  398. entry->addr = hw_fib->header.SenderFibAddress;
  399. /* Restore adapters pointer to the FIB */
  400. hw_fib->header.u.ReceiverFibAddress = hw_fib->header.SenderFibAddress; /* Let the adapter now where to find its data */
  401. map = 0;
  402. }
  403. /*
  404. * If MapFib is true than we need to map the Fib and put pointers
  405. * in the queue entry.
  406. */
  407. if (map)
  408. entry->addr = cpu_to_le32(fibptr->hw_fib_pa);
  409. return 0;
  410. }
  411. /*
  412. * Define the highest level of host to adapter communication routines.
  413. * These routines will support host to adapter FS commuication. These
  414. * routines have no knowledge of the commuication method used. This level
  415. * sends and receives FIBs. This level has no knowledge of how these FIBs
  416. * get passed back and forth.
  417. */
  418. /**
  419. * aac_fib_send - send a fib to the adapter
  420. * @command: Command to send
  421. * @fibptr: The fib
  422. * @size: Size of fib data area
  423. * @priority: Priority of Fib
  424. * @wait: Async/sync select
  425. * @reply: True if a reply is wanted
  426. * @callback: Called with reply
  427. * @callback_data: Passed to callback
  428. *
  429. * Sends the requested FIB to the adapter and optionally will wait for a
  430. * response FIB. If the caller does not wish to wait for a response than
  431. * an event to wait on must be supplied. This event will be set when a
  432. * response FIB is received from the adapter.
  433. */
  434. int aac_fib_send(u16 command, struct fib *fibptr, unsigned long size,
  435. int priority, int wait, int reply, fib_callback callback,
  436. void *callback_data)
  437. {
  438. struct aac_dev * dev = fibptr->dev;
  439. struct hw_fib * hw_fib = fibptr->hw_fib_va;
  440. unsigned long flags = 0;
  441. unsigned long mflags = 0;
  442. unsigned long sflags = 0;
  443. if (!(hw_fib->header.XferState & cpu_to_le32(HostOwned)))
  444. return -EBUSY;
  445. if (hw_fib->header.XferState & cpu_to_le32(AdapterProcessed))
  446. return -EINVAL;
  447. /*
  448. * There are 5 cases with the wait and response requested flags.
  449. * The only invalid cases are if the caller requests to wait and
  450. * does not request a response and if the caller does not want a
  451. * response and the Fib is not allocated from pool. If a response
  452. * is not requested the Fib will just be deallocaed by the DPC
  453. * routine when the response comes back from the adapter. No
  454. * further processing will be done besides deleting the Fib. We
  455. * will have a debug mode where the adapter can notify the host
  456. * it had a problem and the host can log that fact.
  457. */
  458. fibptr->flags = 0;
  459. if (wait && !reply) {
  460. return -EINVAL;
  461. } else if (!wait && reply) {
  462. hw_fib->header.XferState |= cpu_to_le32(Async | ResponseExpected);
  463. FIB_COUNTER_INCREMENT(aac_config.AsyncSent);
  464. } else if (!wait && !reply) {
  465. hw_fib->header.XferState |= cpu_to_le32(NoResponseExpected);
  466. FIB_COUNTER_INCREMENT(aac_config.NoResponseSent);
  467. } else if (wait && reply) {
  468. hw_fib->header.XferState |= cpu_to_le32(ResponseExpected);
  469. FIB_COUNTER_INCREMENT(aac_config.NormalSent);
  470. }
  471. /*
  472. * Map the fib into 32bits by using the fib number
  473. */
  474. hw_fib->header.SenderFibAddress =
  475. cpu_to_le32(((u32)(fibptr - dev->fibs)) << 2);
  476. /* use the same shifted value for handle to be compatible
  477. * with the new native hba command handle
  478. */
  479. hw_fib->header.Handle =
  480. cpu_to_le32((((u32)(fibptr - dev->fibs)) << 2) + 1);
  481. /*
  482. * Set FIB state to indicate where it came from and if we want a
  483. * response from the adapter. Also load the command from the
  484. * caller.
  485. *
  486. * Map the hw fib pointer as a 32bit value
  487. */
  488. hw_fib->header.Command = cpu_to_le16(command);
  489. hw_fib->header.XferState |= cpu_to_le32(SentFromHost);
  490. /*
  491. * Set the size of the Fib we want to send to the adapter
  492. */
  493. hw_fib->header.Size = cpu_to_le16(sizeof(struct aac_fibhdr) + size);
  494. if (le16_to_cpu(hw_fib->header.Size) > le16_to_cpu(hw_fib->header.SenderSize)) {
  495. return -EMSGSIZE;
  496. }
  497. /*
  498. * Get a queue entry connect the FIB to it and send an notify
  499. * the adapter a command is ready.
  500. */
  501. hw_fib->header.XferState |= cpu_to_le32(NormalPriority);
  502. /*
  503. * Fill in the Callback and CallbackContext if we are not
  504. * going to wait.
  505. */
  506. if (!wait) {
  507. fibptr->callback = callback;
  508. fibptr->callback_data = callback_data;
  509. fibptr->flags = FIB_CONTEXT_FLAG;
  510. }
  511. fibptr->done = 0;
  512. FIB_COUNTER_INCREMENT(aac_config.FibsSent);
  513. dprintk((KERN_DEBUG "Fib contents:.\n"));
  514. dprintk((KERN_DEBUG " Command = %d.\n", le32_to_cpu(hw_fib->header.Command)));
  515. dprintk((KERN_DEBUG " SubCommand = %d.\n", le32_to_cpu(((struct aac_query_mount *)fib_data(fibptr))->command)));
  516. dprintk((KERN_DEBUG " XferState = %x.\n", le32_to_cpu(hw_fib->header.XferState)));
  517. dprintk((KERN_DEBUG " hw_fib va being sent=%p\n",fibptr->hw_fib_va));
  518. dprintk((KERN_DEBUG " hw_fib pa being sent=%lx\n",(ulong)fibptr->hw_fib_pa));
  519. dprintk((KERN_DEBUG " fib being sent=%p\n",fibptr));
  520. if (!dev->queues)
  521. return -EBUSY;
  522. if (wait) {
  523. spin_lock_irqsave(&dev->manage_lock, mflags);
  524. if (dev->management_fib_count >= AAC_NUM_MGT_FIB) {
  525. printk(KERN_INFO "No management Fibs Available:%d\n",
  526. dev->management_fib_count);
  527. spin_unlock_irqrestore(&dev->manage_lock, mflags);
  528. return -EBUSY;
  529. }
  530. dev->management_fib_count++;
  531. spin_unlock_irqrestore(&dev->manage_lock, mflags);
  532. spin_lock_irqsave(&fibptr->event_lock, flags);
  533. }
  534. if (dev->sync_mode) {
  535. if (wait)
  536. spin_unlock_irqrestore(&fibptr->event_lock, flags);
  537. spin_lock_irqsave(&dev->sync_lock, sflags);
  538. if (dev->sync_fib) {
  539. list_add_tail(&fibptr->fiblink, &dev->sync_fib_list);
  540. spin_unlock_irqrestore(&dev->sync_lock, sflags);
  541. } else {
  542. dev->sync_fib = fibptr;
  543. spin_unlock_irqrestore(&dev->sync_lock, sflags);
  544. aac_adapter_sync_cmd(dev, SEND_SYNCHRONOUS_FIB,
  545. (u32)fibptr->hw_fib_pa, 0, 0, 0, 0, 0,
  546. NULL, NULL, NULL, NULL, NULL);
  547. }
  548. if (wait) {
  549. fibptr->flags |= FIB_CONTEXT_FLAG_WAIT;
  550. if (wait_for_completion_interruptible(&fibptr->event_wait)) {
  551. fibptr->flags &= ~FIB_CONTEXT_FLAG_WAIT;
  552. return -EFAULT;
  553. }
  554. return 0;
  555. }
  556. return -EINPROGRESS;
  557. }
  558. if (aac_adapter_deliver(fibptr) != 0) {
  559. printk(KERN_ERR "aac_fib_send: returned -EBUSY\n");
  560. if (wait) {
  561. spin_unlock_irqrestore(&fibptr->event_lock, flags);
  562. spin_lock_irqsave(&dev->manage_lock, mflags);
  563. dev->management_fib_count--;
  564. spin_unlock_irqrestore(&dev->manage_lock, mflags);
  565. }
  566. return -EBUSY;
  567. }
  568. /*
  569. * If the caller wanted us to wait for response wait now.
  570. */
  571. if (wait) {
  572. spin_unlock_irqrestore(&fibptr->event_lock, flags);
  573. /* Only set for first known interruptable command */
  574. if (wait < 0) {
  575. /*
  576. * *VERY* Dangerous to time out a command, the
  577. * assumption is made that we have no hope of
  578. * functioning because an interrupt routing or other
  579. * hardware failure has occurred.
  580. */
  581. unsigned long timeout = jiffies + (180 * HZ); /* 3 minutes */
  582. while (!try_wait_for_completion(&fibptr->event_wait)) {
  583. int blink;
  584. if (time_is_before_eq_jiffies(timeout)) {
  585. struct aac_queue * q = &dev->queues->queue[AdapNormCmdQueue];
  586. atomic_dec(&q->numpending);
  587. if (wait == -1) {
  588. printk(KERN_ERR "aacraid: aac_fib_send: first asynchronous command timed out.\n"
  589. "Usually a result of a PCI interrupt routing problem;\n"
  590. "update mother board BIOS or consider utilizing one of\n"
  591. "the SAFE mode kernel options (acpi, apic etc)\n");
  592. }
  593. return -ETIMEDOUT;
  594. }
  595. if (unlikely(aac_pci_offline(dev)))
  596. return -EFAULT;
  597. if ((blink = aac_adapter_check_health(dev)) > 0) {
  598. if (wait == -1) {
  599. printk(KERN_ERR "aacraid: aac_fib_send: adapter blinkLED 0x%x.\n"
  600. "Usually a result of a serious unrecoverable hardware problem\n",
  601. blink);
  602. }
  603. return -EFAULT;
  604. }
  605. /*
  606. * Allow other processes / CPUS to use core
  607. */
  608. schedule();
  609. }
  610. } else if (wait_for_completion_interruptible(&fibptr->event_wait)) {
  611. /* Do nothing ... satisfy
  612. * wait_for_completion_interruptible must_check */
  613. }
  614. spin_lock_irqsave(&fibptr->event_lock, flags);
  615. if (fibptr->done == 0) {
  616. fibptr->done = 2; /* Tell interrupt we aborted */
  617. spin_unlock_irqrestore(&fibptr->event_lock, flags);
  618. return -ERESTARTSYS;
  619. }
  620. spin_unlock_irqrestore(&fibptr->event_lock, flags);
  621. BUG_ON(fibptr->done == 0);
  622. if(unlikely(fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT))
  623. return -ETIMEDOUT;
  624. return 0;
  625. }
  626. /*
  627. * If the user does not want a response than return success otherwise
  628. * return pending
  629. */
  630. if (reply)
  631. return -EINPROGRESS;
  632. else
  633. return 0;
  634. }
  635. int aac_hba_send(u8 command, struct fib *fibptr, fib_callback callback,
  636. void *callback_data)
  637. {
  638. struct aac_dev *dev = fibptr->dev;
  639. int wait;
  640. unsigned long flags = 0;
  641. unsigned long mflags = 0;
  642. struct aac_hba_cmd_req *hbacmd = (struct aac_hba_cmd_req *)
  643. fibptr->hw_fib_va;
  644. fibptr->flags = (FIB_CONTEXT_FLAG | FIB_CONTEXT_FLAG_NATIVE_HBA);
  645. if (callback) {
  646. wait = 0;
  647. fibptr->callback = callback;
  648. fibptr->callback_data = callback_data;
  649. } else
  650. wait = 1;
  651. hbacmd->iu_type = command;
  652. if (command == HBA_IU_TYPE_SCSI_CMD_REQ) {
  653. /* bit1 of request_id must be 0 */
  654. hbacmd->request_id =
  655. cpu_to_le32((((u32)(fibptr - dev->fibs)) << 2) + 1);
  656. fibptr->flags |= FIB_CONTEXT_FLAG_SCSI_CMD;
  657. } else
  658. return -EINVAL;
  659. if (wait) {
  660. spin_lock_irqsave(&dev->manage_lock, mflags);
  661. if (dev->management_fib_count >= AAC_NUM_MGT_FIB) {
  662. spin_unlock_irqrestore(&dev->manage_lock, mflags);
  663. return -EBUSY;
  664. }
  665. dev->management_fib_count++;
  666. spin_unlock_irqrestore(&dev->manage_lock, mflags);
  667. spin_lock_irqsave(&fibptr->event_lock, flags);
  668. }
  669. if (aac_adapter_deliver(fibptr) != 0) {
  670. if (wait) {
  671. spin_unlock_irqrestore(&fibptr->event_lock, flags);
  672. spin_lock_irqsave(&dev->manage_lock, mflags);
  673. dev->management_fib_count--;
  674. spin_unlock_irqrestore(&dev->manage_lock, mflags);
  675. }
  676. return -EBUSY;
  677. }
  678. FIB_COUNTER_INCREMENT(aac_config.NativeSent);
  679. if (wait) {
  680. spin_unlock_irqrestore(&fibptr->event_lock, flags);
  681. if (unlikely(aac_pci_offline(dev)))
  682. return -EFAULT;
  683. fibptr->flags |= FIB_CONTEXT_FLAG_WAIT;
  684. if (wait_for_completion_interruptible(&fibptr->event_wait))
  685. fibptr->done = 2;
  686. fibptr->flags &= ~(FIB_CONTEXT_FLAG_WAIT);
  687. spin_lock_irqsave(&fibptr->event_lock, flags);
  688. if ((fibptr->done == 0) || (fibptr->done == 2)) {
  689. fibptr->done = 2; /* Tell interrupt we aborted */
  690. spin_unlock_irqrestore(&fibptr->event_lock, flags);
  691. return -ERESTARTSYS;
  692. }
  693. spin_unlock_irqrestore(&fibptr->event_lock, flags);
  694. WARN_ON(fibptr->done == 0);
  695. if (unlikely(fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT))
  696. return -ETIMEDOUT;
  697. return 0;
  698. }
  699. return -EINPROGRESS;
  700. }
  701. /**
  702. * aac_consumer_get - get the top of the queue
  703. * @dev: Adapter
  704. * @q: Queue
  705. * @entry: Return entry
  706. *
  707. * Will return a pointer to the entry on the top of the queue requested that
  708. * we are a consumer of, and return the address of the queue entry. It does
  709. * not change the state of the queue.
  710. */
  711. int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry)
  712. {
  713. u32 index;
  714. int status;
  715. if (le32_to_cpu(*q->headers.producer) == le32_to_cpu(*q->headers.consumer)) {
  716. status = 0;
  717. } else {
  718. /*
  719. * The consumer index must be wrapped if we have reached
  720. * the end of the queue, else we just use the entry
  721. * pointed to by the header index
  722. */
  723. if (le32_to_cpu(*q->headers.consumer) >= q->entries)
  724. index = 0;
  725. else
  726. index = le32_to_cpu(*q->headers.consumer);
  727. *entry = q->base + index;
  728. status = 1;
  729. }
  730. return(status);
  731. }
  732. /**
  733. * aac_consumer_free - free consumer entry
  734. * @dev: Adapter
  735. * @q: Queue
  736. * @qid: Queue ident
  737. *
  738. * Frees up the current top of the queue we are a consumer of. If the
  739. * queue was full notify the producer that the queue is no longer full.
  740. */
  741. void aac_consumer_free(struct aac_dev * dev, struct aac_queue *q, u32 qid)
  742. {
  743. int wasfull = 0;
  744. u32 notify;
  745. if ((le32_to_cpu(*q->headers.producer)+1) == le32_to_cpu(*q->headers.consumer))
  746. wasfull = 1;
  747. if (le32_to_cpu(*q->headers.consumer) >= q->entries)
  748. *q->headers.consumer = cpu_to_le32(1);
  749. else
  750. le32_add_cpu(q->headers.consumer, 1);
  751. if (wasfull) {
  752. switch (qid) {
  753. case HostNormCmdQueue:
  754. notify = HostNormCmdNotFull;
  755. break;
  756. case HostNormRespQueue:
  757. notify = HostNormRespNotFull;
  758. break;
  759. default:
  760. BUG();
  761. return;
  762. }
  763. aac_adapter_notify(dev, notify);
  764. }
  765. }
  766. /**
  767. * aac_fib_adapter_complete - complete adapter issued fib
  768. * @fibptr: fib to complete
  769. * @size: size of fib
  770. *
  771. * Will do all necessary work to complete a FIB that was sent from
  772. * the adapter.
  773. */
  774. int aac_fib_adapter_complete(struct fib *fibptr, unsigned short size)
  775. {
  776. struct hw_fib * hw_fib = fibptr->hw_fib_va;
  777. struct aac_dev * dev = fibptr->dev;
  778. struct aac_queue * q;
  779. unsigned long nointr = 0;
  780. unsigned long qflags;
  781. if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE1 ||
  782. dev->comm_interface == AAC_COMM_MESSAGE_TYPE2 ||
  783. dev->comm_interface == AAC_COMM_MESSAGE_TYPE3) {
  784. kfree(hw_fib);
  785. return 0;
  786. }
  787. if (hw_fib->header.XferState == 0) {
  788. if (dev->comm_interface == AAC_COMM_MESSAGE)
  789. kfree(hw_fib);
  790. return 0;
  791. }
  792. /*
  793. * If we plan to do anything check the structure type first.
  794. */
  795. if (hw_fib->header.StructType != FIB_MAGIC &&
  796. hw_fib->header.StructType != FIB_MAGIC2 &&
  797. hw_fib->header.StructType != FIB_MAGIC2_64) {
  798. if (dev->comm_interface == AAC_COMM_MESSAGE)
  799. kfree(hw_fib);
  800. return -EINVAL;
  801. }
  802. /*
  803. * This block handles the case where the adapter had sent us a
  804. * command and we have finished processing the command. We
  805. * call completeFib when we are done processing the command
  806. * and want to send a response back to the adapter. This will
  807. * send the completed cdb to the adapter.
  808. */
  809. if (hw_fib->header.XferState & cpu_to_le32(SentFromAdapter)) {
  810. if (dev->comm_interface == AAC_COMM_MESSAGE) {
  811. kfree (hw_fib);
  812. } else {
  813. u32 index;
  814. hw_fib->header.XferState |= cpu_to_le32(HostProcessed);
  815. if (size) {
  816. size += sizeof(struct aac_fibhdr);
  817. if (size > le16_to_cpu(hw_fib->header.SenderSize))
  818. return -EMSGSIZE;
  819. hw_fib->header.Size = cpu_to_le16(size);
  820. }
  821. q = &dev->queues->queue[AdapNormRespQueue];
  822. spin_lock_irqsave(q->lock, qflags);
  823. aac_queue_get(dev, &index, AdapNormRespQueue, hw_fib, 1, NULL, &nointr);
  824. *(q->headers.producer) = cpu_to_le32(index + 1);
  825. spin_unlock_irqrestore(q->lock, qflags);
  826. if (!(nointr & (int)aac_config.irq_mod))
  827. aac_adapter_notify(dev, AdapNormRespQueue);
  828. }
  829. } else {
  830. printk(KERN_WARNING "aac_fib_adapter_complete: "
  831. "Unknown xferstate detected.\n");
  832. BUG();
  833. }
  834. return 0;
  835. }
  836. /**
  837. * aac_fib_complete - fib completion handler
  838. * @fibptr: FIB to complete
  839. *
  840. * Will do all necessary work to complete a FIB.
  841. */
  842. int aac_fib_complete(struct fib *fibptr)
  843. {
  844. struct hw_fib * hw_fib = fibptr->hw_fib_va;
  845. if (fibptr->flags & FIB_CONTEXT_FLAG_NATIVE_HBA) {
  846. fib_dealloc(fibptr);
  847. return 0;
  848. }
  849. /*
  850. * Check for a fib which has already been completed or with a
  851. * status wait timeout
  852. */
  853. if (hw_fib->header.XferState == 0 || fibptr->done == 2)
  854. return 0;
  855. /*
  856. * If we plan to do anything check the structure type first.
  857. */
  858. if (hw_fib->header.StructType != FIB_MAGIC &&
  859. hw_fib->header.StructType != FIB_MAGIC2 &&
  860. hw_fib->header.StructType != FIB_MAGIC2_64)
  861. return -EINVAL;
  862. /*
  863. * This block completes a cdb which orginated on the host and we
  864. * just need to deallocate the cdb or reinit it. At this point the
  865. * command is complete that we had sent to the adapter and this
  866. * cdb could be reused.
  867. */
  868. if((hw_fib->header.XferState & cpu_to_le32(SentFromHost)) &&
  869. (hw_fib->header.XferState & cpu_to_le32(AdapterProcessed)))
  870. {
  871. fib_dealloc(fibptr);
  872. }
  873. else if(hw_fib->header.XferState & cpu_to_le32(SentFromHost))
  874. {
  875. /*
  876. * This handles the case when the host has aborted the I/O
  877. * to the adapter because the adapter is not responding
  878. */
  879. fib_dealloc(fibptr);
  880. } else if(hw_fib->header.XferState & cpu_to_le32(HostOwned)) {
  881. fib_dealloc(fibptr);
  882. } else {
  883. BUG();
  884. }
  885. return 0;
  886. }
  887. /**
  888. * aac_printf - handle printf from firmware
  889. * @dev: Adapter
  890. * @val: Message info
  891. *
  892. * Print a message passed to us by the controller firmware on the
  893. * Adaptec board
  894. */
  895. void aac_printf(struct aac_dev *dev, u32 val)
  896. {
  897. char *cp = dev->printfbuf;
  898. if (dev->printf_enabled)
  899. {
  900. int length = val & 0xffff;
  901. int level = (val >> 16) & 0xffff;
  902. /*
  903. * The size of the printfbuf is set in port.c
  904. * There is no variable or define for it
  905. */
  906. if (length > 255)
  907. length = 255;
  908. if (cp[length] != 0)
  909. cp[length] = 0;
  910. if (level == LOG_AAC_HIGH_ERROR)
  911. printk(KERN_WARNING "%s:%s", dev->name, cp);
  912. else
  913. printk(KERN_INFO "%s:%s", dev->name, cp);
  914. }
  915. memset(cp, 0, 256);
  916. }
  917. static inline int aac_aif_data(struct aac_aifcmd *aifcmd, uint32_t index)
  918. {
  919. return le32_to_cpu(((__le32 *)aifcmd->data)[index]);
  920. }
  921. static void aac_handle_aif_bu(struct aac_dev *dev, struct aac_aifcmd *aifcmd)
  922. {
  923. switch (aac_aif_data(aifcmd, 1)) {
  924. case AifBuCacheDataLoss:
  925. if (aac_aif_data(aifcmd, 2))
  926. dev_info(&dev->pdev->dev, "Backup unit had cache data loss - [%d]\n",
  927. aac_aif_data(aifcmd, 2));
  928. else
  929. dev_info(&dev->pdev->dev, "Backup Unit had cache data loss\n");
  930. break;
  931. case AifBuCacheDataRecover:
  932. if (aac_aif_data(aifcmd, 2))
  933. dev_info(&dev->pdev->dev, "DDR cache data recovered successfully - [%d]\n",
  934. aac_aif_data(aifcmd, 2));
  935. else
  936. dev_info(&dev->pdev->dev, "DDR cache data recovered successfully\n");
  937. break;
  938. }
  939. }
  940. #define AIF_SNIFF_TIMEOUT (500*HZ)
  941. /**
  942. * aac_handle_aif - Handle a message from the firmware
  943. * @dev: Which adapter this fib is from
  944. * @fibptr: Pointer to fibptr from adapter
  945. *
  946. * This routine handles a driver notify fib from the adapter and
  947. * dispatches it to the appropriate routine for handling.
  948. */
  949. static void aac_handle_aif(struct aac_dev * dev, struct fib * fibptr)
  950. {
  951. struct hw_fib * hw_fib = fibptr->hw_fib_va;
  952. struct aac_aifcmd * aifcmd = (struct aac_aifcmd *)hw_fib->data;
  953. u32 channel, id, lun, container;
  954. struct scsi_device *device;
  955. enum {
  956. NOTHING,
  957. DELETE,
  958. ADD,
  959. CHANGE
  960. } device_config_needed = NOTHING;
  961. /* Sniff for container changes */
  962. if (!dev || !dev->fsa_dev)
  963. return;
  964. container = channel = id = lun = (u32)-1;
  965. /*
  966. * We have set this up to try and minimize the number of
  967. * re-configures that take place. As a result of this when
  968. * certain AIF's come in we will set a flag waiting for another
  969. * type of AIF before setting the re-config flag.
  970. */
  971. switch (le32_to_cpu(aifcmd->command)) {
  972. case AifCmdDriverNotify:
  973. switch (le32_to_cpu(((__le32 *)aifcmd->data)[0])) {
  974. case AifRawDeviceRemove:
  975. container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
  976. if ((container >> 28)) {
  977. container = (u32)-1;
  978. break;
  979. }
  980. channel = (container >> 24) & 0xF;
  981. if (channel >= dev->maximum_num_channels) {
  982. container = (u32)-1;
  983. break;
  984. }
  985. id = container & 0xFFFF;
  986. if (id >= dev->maximum_num_physicals) {
  987. container = (u32)-1;
  988. break;
  989. }
  990. lun = (container >> 16) & 0xFF;
  991. container = (u32)-1;
  992. channel = aac_phys_to_logical(channel);
  993. device_config_needed = DELETE;
  994. break;
  995. /*
  996. * Morph or Expand complete
  997. */
  998. case AifDenMorphComplete:
  999. case AifDenVolumeExtendComplete:
  1000. container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
  1001. if (container >= dev->maximum_num_containers)
  1002. break;
  1003. /*
  1004. * Find the scsi_device associated with the SCSI
  1005. * address. Make sure we have the right array, and if
  1006. * so set the flag to initiate a new re-config once we
  1007. * see an AifEnConfigChange AIF come through.
  1008. */
  1009. if ((dev != NULL) && (dev->scsi_host_ptr != NULL)) {
  1010. device = scsi_device_lookup(dev->scsi_host_ptr,
  1011. CONTAINER_TO_CHANNEL(container),
  1012. CONTAINER_TO_ID(container),
  1013. CONTAINER_TO_LUN(container));
  1014. if (device) {
  1015. dev->fsa_dev[container].config_needed = CHANGE;
  1016. dev->fsa_dev[container].config_waiting_on = AifEnConfigChange;
  1017. dev->fsa_dev[container].config_waiting_stamp = jiffies;
  1018. scsi_device_put(device);
  1019. }
  1020. }
  1021. }
  1022. /*
  1023. * If we are waiting on something and this happens to be
  1024. * that thing then set the re-configure flag.
  1025. */
  1026. if (container != (u32)-1) {
  1027. if (container >= dev->maximum_num_containers)
  1028. break;
  1029. if ((dev->fsa_dev[container].config_waiting_on ==
  1030. le32_to_cpu(*(__le32 *)aifcmd->data)) &&
  1031. time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
  1032. dev->fsa_dev[container].config_waiting_on = 0;
  1033. } else for (container = 0;
  1034. container < dev->maximum_num_containers; ++container) {
  1035. if ((dev->fsa_dev[container].config_waiting_on ==
  1036. le32_to_cpu(*(__le32 *)aifcmd->data)) &&
  1037. time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
  1038. dev->fsa_dev[container].config_waiting_on = 0;
  1039. }
  1040. break;
  1041. case AifCmdEventNotify:
  1042. switch (le32_to_cpu(((__le32 *)aifcmd->data)[0])) {
  1043. case AifEnBatteryEvent:
  1044. dev->cache_protected =
  1045. (((__le32 *)aifcmd->data)[1] == cpu_to_le32(3));
  1046. break;
  1047. /*
  1048. * Add an Array.
  1049. */
  1050. case AifEnAddContainer:
  1051. container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
  1052. if (container >= dev->maximum_num_containers)
  1053. break;
  1054. dev->fsa_dev[container].config_needed = ADD;
  1055. dev->fsa_dev[container].config_waiting_on =
  1056. AifEnConfigChange;
  1057. dev->fsa_dev[container].config_waiting_stamp = jiffies;
  1058. break;
  1059. /*
  1060. * Delete an Array.
  1061. */
  1062. case AifEnDeleteContainer:
  1063. container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
  1064. if (container >= dev->maximum_num_containers)
  1065. break;
  1066. dev->fsa_dev[container].config_needed = DELETE;
  1067. dev->fsa_dev[container].config_waiting_on =
  1068. AifEnConfigChange;
  1069. dev->fsa_dev[container].config_waiting_stamp = jiffies;
  1070. break;
  1071. /*
  1072. * Container change detected. If we currently are not
  1073. * waiting on something else, setup to wait on a Config Change.
  1074. */
  1075. case AifEnContainerChange:
  1076. container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
  1077. if (container >= dev->maximum_num_containers)
  1078. break;
  1079. if (dev->fsa_dev[container].config_waiting_on &&
  1080. time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
  1081. break;
  1082. dev->fsa_dev[container].config_needed = CHANGE;
  1083. dev->fsa_dev[container].config_waiting_on =
  1084. AifEnConfigChange;
  1085. dev->fsa_dev[container].config_waiting_stamp = jiffies;
  1086. break;
  1087. case AifEnConfigChange:
  1088. break;
  1089. case AifEnAddJBOD:
  1090. case AifEnDeleteJBOD:
  1091. container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
  1092. if ((container >> 28)) {
  1093. container = (u32)-1;
  1094. break;
  1095. }
  1096. channel = (container >> 24) & 0xF;
  1097. if (channel >= dev->maximum_num_channels) {
  1098. container = (u32)-1;
  1099. break;
  1100. }
  1101. id = container & 0xFFFF;
  1102. if (id >= dev->maximum_num_physicals) {
  1103. container = (u32)-1;
  1104. break;
  1105. }
  1106. lun = (container >> 16) & 0xFF;
  1107. container = (u32)-1;
  1108. channel = aac_phys_to_logical(channel);
  1109. device_config_needed =
  1110. (((__le32 *)aifcmd->data)[0] ==
  1111. cpu_to_le32(AifEnAddJBOD)) ? ADD : DELETE;
  1112. if (device_config_needed == ADD) {
  1113. device = scsi_device_lookup(dev->scsi_host_ptr,
  1114. channel,
  1115. id,
  1116. lun);
  1117. if (device) {
  1118. scsi_remove_device(device);
  1119. scsi_device_put(device);
  1120. }
  1121. }
  1122. break;
  1123. case AifEnEnclosureManagement:
  1124. /*
  1125. * If in JBOD mode, automatic exposure of new
  1126. * physical target to be suppressed until configured.
  1127. */
  1128. if (dev->jbod)
  1129. break;
  1130. switch (le32_to_cpu(((__le32 *)aifcmd->data)[3])) {
  1131. case EM_DRIVE_INSERTION:
  1132. case EM_DRIVE_REMOVAL:
  1133. case EM_SES_DRIVE_INSERTION:
  1134. case EM_SES_DRIVE_REMOVAL:
  1135. container = le32_to_cpu(
  1136. ((__le32 *)aifcmd->data)[2]);
  1137. if ((container >> 28)) {
  1138. container = (u32)-1;
  1139. break;
  1140. }
  1141. channel = (container >> 24) & 0xF;
  1142. if (channel >= dev->maximum_num_channels) {
  1143. container = (u32)-1;
  1144. break;
  1145. }
  1146. id = container & 0xFFFF;
  1147. lun = (container >> 16) & 0xFF;
  1148. container = (u32)-1;
  1149. if (id >= dev->maximum_num_physicals) {
  1150. /* legacy dev_t ? */
  1151. if ((0x2000 <= id) || lun || channel ||
  1152. ((channel = (id >> 7) & 0x3F) >=
  1153. dev->maximum_num_channels))
  1154. break;
  1155. lun = (id >> 4) & 7;
  1156. id &= 0xF;
  1157. }
  1158. channel = aac_phys_to_logical(channel);
  1159. device_config_needed =
  1160. ((((__le32 *)aifcmd->data)[3]
  1161. == cpu_to_le32(EM_DRIVE_INSERTION)) ||
  1162. (((__le32 *)aifcmd->data)[3]
  1163. == cpu_to_le32(EM_SES_DRIVE_INSERTION))) ?
  1164. ADD : DELETE;
  1165. break;
  1166. }
  1167. break;
  1168. case AifBuManagerEvent:
  1169. aac_handle_aif_bu(dev, aifcmd);
  1170. break;
  1171. }
  1172. /*
  1173. * If we are waiting on something and this happens to be
  1174. * that thing then set the re-configure flag.
  1175. */
  1176. if (container != (u32)-1) {
  1177. if (container >= dev->maximum_num_containers)
  1178. break;
  1179. if ((dev->fsa_dev[container].config_waiting_on ==
  1180. le32_to_cpu(*(__le32 *)aifcmd->data)) &&
  1181. time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
  1182. dev->fsa_dev[container].config_waiting_on = 0;
  1183. } else for (container = 0;
  1184. container < dev->maximum_num_containers; ++container) {
  1185. if ((dev->fsa_dev[container].config_waiting_on ==
  1186. le32_to_cpu(*(__le32 *)aifcmd->data)) &&
  1187. time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
  1188. dev->fsa_dev[container].config_waiting_on = 0;
  1189. }
  1190. break;
  1191. case AifCmdJobProgress:
  1192. /*
  1193. * These are job progress AIF's. When a Clear is being
  1194. * done on a container it is initially created then hidden from
  1195. * the OS. When the clear completes we don't get a config
  1196. * change so we monitor the job status complete on a clear then
  1197. * wait for a container change.
  1198. */
  1199. if (((__le32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero) &&
  1200. (((__le32 *)aifcmd->data)[6] == ((__le32 *)aifcmd->data)[5] ||
  1201. ((__le32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsSuccess))) {
  1202. for (container = 0;
  1203. container < dev->maximum_num_containers;
  1204. ++container) {
  1205. /*
  1206. * Stomp on all config sequencing for all
  1207. * containers?
  1208. */
  1209. dev->fsa_dev[container].config_waiting_on =
  1210. AifEnContainerChange;
  1211. dev->fsa_dev[container].config_needed = ADD;
  1212. dev->fsa_dev[container].config_waiting_stamp =
  1213. jiffies;
  1214. }
  1215. }
  1216. if (((__le32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero) &&
  1217. ((__le32 *)aifcmd->data)[6] == 0 &&
  1218. ((__le32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsRunning)) {
  1219. for (container = 0;
  1220. container < dev->maximum_num_containers;
  1221. ++container) {
  1222. /*
  1223. * Stomp on all config sequencing for all
  1224. * containers?
  1225. */
  1226. dev->fsa_dev[container].config_waiting_on =
  1227. AifEnContainerChange;
  1228. dev->fsa_dev[container].config_needed = DELETE;
  1229. dev->fsa_dev[container].config_waiting_stamp =
  1230. jiffies;
  1231. }
  1232. }
  1233. break;
  1234. }
  1235. container = 0;
  1236. retry_next:
  1237. if (device_config_needed == NOTHING) {
  1238. for (; container < dev->maximum_num_containers; ++container) {
  1239. if ((dev->fsa_dev[container].config_waiting_on == 0) &&
  1240. (dev->fsa_dev[container].config_needed != NOTHING) &&
  1241. time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) {
  1242. device_config_needed =
  1243. dev->fsa_dev[container].config_needed;
  1244. dev->fsa_dev[container].config_needed = NOTHING;
  1245. channel = CONTAINER_TO_CHANNEL(container);
  1246. id = CONTAINER_TO_ID(container);
  1247. lun = CONTAINER_TO_LUN(container);
  1248. break;
  1249. }
  1250. }
  1251. }
  1252. if (device_config_needed == NOTHING)
  1253. return;
  1254. /*
  1255. * If we decided that a re-configuration needs to be done,
  1256. * schedule it here on the way out the door, please close the door
  1257. * behind you.
  1258. */
  1259. /*
  1260. * Find the scsi_device associated with the SCSI address,
  1261. * and mark it as changed, invalidating the cache. This deals
  1262. * with changes to existing device IDs.
  1263. */
  1264. if (!dev || !dev->scsi_host_ptr)
  1265. return;
  1266. /*
  1267. * force reload of disk info via aac_probe_container
  1268. */
  1269. if ((channel == CONTAINER_CHANNEL) &&
  1270. (device_config_needed != NOTHING)) {
  1271. if (dev->fsa_dev[container].valid == 1)
  1272. dev->fsa_dev[container].valid = 2;
  1273. aac_probe_container(dev, container);
  1274. }
  1275. device = scsi_device_lookup(dev->scsi_host_ptr, channel, id, lun);
  1276. if (device) {
  1277. switch (device_config_needed) {
  1278. case DELETE:
  1279. #if (defined(AAC_DEBUG_INSTRUMENT_AIF_DELETE))
  1280. scsi_remove_device(device);
  1281. #else
  1282. if (scsi_device_online(device)) {
  1283. scsi_device_set_state(device, SDEV_OFFLINE);
  1284. sdev_printk(KERN_INFO, device,
  1285. "Device offlined - %s\n",
  1286. (channel == CONTAINER_CHANNEL) ?
  1287. "array deleted" :
  1288. "enclosure services event");
  1289. }
  1290. #endif
  1291. break;
  1292. case ADD:
  1293. if (!scsi_device_online(device)) {
  1294. sdev_printk(KERN_INFO, device,
  1295. "Device online - %s\n",
  1296. (channel == CONTAINER_CHANNEL) ?
  1297. "array created" :
  1298. "enclosure services event");
  1299. scsi_device_set_state(device, SDEV_RUNNING);
  1300. }
  1301. fallthrough;
  1302. case CHANGE:
  1303. if ((channel == CONTAINER_CHANNEL)
  1304. && (!dev->fsa_dev[container].valid)) {
  1305. #if (defined(AAC_DEBUG_INSTRUMENT_AIF_DELETE))
  1306. scsi_remove_device(device);
  1307. #else
  1308. if (!scsi_device_online(device))
  1309. break;
  1310. scsi_device_set_state(device, SDEV_OFFLINE);
  1311. sdev_printk(KERN_INFO, device,
  1312. "Device offlined - %s\n",
  1313. "array failed");
  1314. #endif
  1315. break;
  1316. }
  1317. scsi_rescan_device(device);
  1318. break;
  1319. default:
  1320. break;
  1321. }
  1322. scsi_device_put(device);
  1323. device_config_needed = NOTHING;
  1324. }
  1325. if (device_config_needed == ADD)
  1326. scsi_add_device(dev->scsi_host_ptr, channel, id, lun);
  1327. if (channel == CONTAINER_CHANNEL) {
  1328. container++;
  1329. device_config_needed = NOTHING;
  1330. goto retry_next;
  1331. }
  1332. }
  1333. static void aac_schedule_bus_scan(struct aac_dev *aac)
  1334. {
  1335. if (aac->sa_firmware)
  1336. aac_schedule_safw_scan_worker(aac);
  1337. else
  1338. aac_schedule_src_reinit_aif_worker(aac);
  1339. }
  1340. static int _aac_reset_adapter(struct aac_dev *aac, int forced, u8 reset_type)
  1341. {
  1342. int index, quirks;
  1343. int retval;
  1344. struct Scsi_Host *host = aac->scsi_host_ptr;
  1345. int jafo = 0;
  1346. int bled;
  1347. u64 dmamask;
  1348. int num_of_fibs = 0;
  1349. /*
  1350. * Assumptions:
  1351. * - host is locked, unless called by the aacraid thread.
  1352. * (a matter of convenience, due to legacy issues surrounding
  1353. * eh_host_adapter_reset).
  1354. * - in_reset is asserted, so no new i/o is getting to the
  1355. * card.
  1356. * - The card is dead, or will be very shortly ;-/ so no new
  1357. * commands are completing in the interrupt service.
  1358. */
  1359. aac_adapter_disable_int(aac);
  1360. if (aac->thread && aac->thread->pid != current->pid) {
  1361. spin_unlock_irq(host->host_lock);
  1362. kthread_stop(aac->thread);
  1363. aac->thread = NULL;
  1364. jafo = 1;
  1365. }
  1366. /*
  1367. * If a positive health, means in a known DEAD PANIC
  1368. * state and the adapter could be reset to `try again'.
  1369. */
  1370. bled = forced ? 0 : aac_adapter_check_health(aac);
  1371. retval = aac_adapter_restart(aac, bled, reset_type);
  1372. if (retval)
  1373. goto out;
  1374. /*
  1375. * Loop through the fibs, close the synchronous FIBS
  1376. */
  1377. retval = 1;
  1378. num_of_fibs = aac->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB;
  1379. for (index = 0; index < num_of_fibs; index++) {
  1380. struct fib *fib = &aac->fibs[index];
  1381. __le32 XferState = fib->hw_fib_va->header.XferState;
  1382. bool is_response_expected = false;
  1383. if (!(XferState & cpu_to_le32(NoResponseExpected | Async)) &&
  1384. (XferState & cpu_to_le32(ResponseExpected)))
  1385. is_response_expected = true;
  1386. if (is_response_expected
  1387. || fib->flags & FIB_CONTEXT_FLAG_WAIT) {
  1388. unsigned long flagv;
  1389. spin_lock_irqsave(&fib->event_lock, flagv);
  1390. complete(&fib->event_wait);
  1391. spin_unlock_irqrestore(&fib->event_lock, flagv);
  1392. schedule();
  1393. retval = 0;
  1394. }
  1395. }
  1396. /* Give some extra time for ioctls to complete. */
  1397. if (retval == 0)
  1398. ssleep(2);
  1399. index = aac->cardtype;
  1400. /*
  1401. * Re-initialize the adapter, first free resources, then carefully
  1402. * apply the initialization sequence to come back again. Only risk
  1403. * is a change in Firmware dropping cache, it is assumed the caller
  1404. * will ensure that i/o is queisced and the card is flushed in that
  1405. * case.
  1406. */
  1407. aac_free_irq(aac);
  1408. aac_fib_map_free(aac);
  1409. dma_free_coherent(&aac->pdev->dev, aac->comm_size, aac->comm_addr,
  1410. aac->comm_phys);
  1411. aac_adapter_ioremap(aac, 0);
  1412. aac->comm_addr = NULL;
  1413. aac->comm_phys = 0;
  1414. kfree(aac->queues);
  1415. aac->queues = NULL;
  1416. kfree(aac->fsa_dev);
  1417. aac->fsa_dev = NULL;
  1418. dmamask = DMA_BIT_MASK(32);
  1419. quirks = aac_get_driver_ident(index)->quirks;
  1420. if (quirks & AAC_QUIRK_31BIT)
  1421. retval = dma_set_mask(&aac->pdev->dev, dmamask);
  1422. else if (!(quirks & AAC_QUIRK_SRC))
  1423. retval = dma_set_mask(&aac->pdev->dev, dmamask);
  1424. else
  1425. retval = dma_set_coherent_mask(&aac->pdev->dev, dmamask);
  1426. if (quirks & AAC_QUIRK_31BIT && !retval) {
  1427. dmamask = DMA_BIT_MASK(31);
  1428. retval = dma_set_coherent_mask(&aac->pdev->dev, dmamask);
  1429. }
  1430. if (retval)
  1431. goto out;
  1432. if ((retval = (*(aac_get_driver_ident(index)->init))(aac)))
  1433. goto out;
  1434. if (jafo) {
  1435. aac->thread = kthread_run(aac_command_thread, aac, "%s",
  1436. aac->name);
  1437. if (IS_ERR(aac->thread)) {
  1438. retval = PTR_ERR(aac->thread);
  1439. aac->thread = NULL;
  1440. goto out;
  1441. }
  1442. }
  1443. (void)aac_get_adapter_info(aac);
  1444. if ((quirks & AAC_QUIRK_34SG) && (host->sg_tablesize > 34)) {
  1445. host->sg_tablesize = 34;
  1446. host->max_sectors = (host->sg_tablesize * 8) + 112;
  1447. }
  1448. if ((quirks & AAC_QUIRK_17SG) && (host->sg_tablesize > 17)) {
  1449. host->sg_tablesize = 17;
  1450. host->max_sectors = (host->sg_tablesize * 8) + 112;
  1451. }
  1452. aac_get_config_status(aac, 1);
  1453. aac_get_containers(aac);
  1454. /*
  1455. * This is where the assumption that the Adapter is quiesced
  1456. * is important.
  1457. */
  1458. scsi_host_complete_all_commands(host, DID_RESET);
  1459. retval = 0;
  1460. out:
  1461. aac->in_reset = 0;
  1462. /*
  1463. * Issue bus rescan to catch any configuration that might have
  1464. * occurred
  1465. */
  1466. if (!retval && !is_kdump_kernel()) {
  1467. dev_info(&aac->pdev->dev, "Scheduling bus rescan\n");
  1468. aac_schedule_bus_scan(aac);
  1469. }
  1470. if (jafo) {
  1471. spin_lock_irq(host->host_lock);
  1472. }
  1473. return retval;
  1474. }
  1475. int aac_reset_adapter(struct aac_dev *aac, int forced, u8 reset_type)
  1476. {
  1477. unsigned long flagv = 0;
  1478. int retval, unblock_retval;
  1479. struct Scsi_Host *host = aac->scsi_host_ptr;
  1480. int bled;
  1481. if (spin_trylock_irqsave(&aac->fib_lock, flagv) == 0)
  1482. return -EBUSY;
  1483. if (aac->in_reset) {
  1484. spin_unlock_irqrestore(&aac->fib_lock, flagv);
  1485. return -EBUSY;
  1486. }
  1487. aac->in_reset = 1;
  1488. spin_unlock_irqrestore(&aac->fib_lock, flagv);
  1489. /*
  1490. * Wait for all commands to complete to this specific
  1491. * target (block maximum 60 seconds). Although not necessary,
  1492. * it does make us a good storage citizen.
  1493. */
  1494. scsi_host_block(host);
  1495. /* Quiesce build, flush cache, write through mode */
  1496. if (forced < 2)
  1497. aac_send_shutdown(aac);
  1498. spin_lock_irqsave(host->host_lock, flagv);
  1499. bled = forced ? forced :
  1500. (aac_check_reset != 0 && aac_check_reset != 1);
  1501. retval = _aac_reset_adapter(aac, bled, reset_type);
  1502. spin_unlock_irqrestore(host->host_lock, flagv);
  1503. unblock_retval = scsi_host_unblock(host, SDEV_RUNNING);
  1504. if (!retval)
  1505. retval = unblock_retval;
  1506. if ((forced < 2) && (retval == -ENODEV)) {
  1507. /* Unwind aac_send_shutdown() IOP_RESET unsupported/disabled */
  1508. struct fib * fibctx = aac_fib_alloc(aac);
  1509. if (fibctx) {
  1510. struct aac_pause *cmd;
  1511. int status;
  1512. aac_fib_init(fibctx);
  1513. cmd = (struct aac_pause *) fib_data(fibctx);
  1514. cmd->command = cpu_to_le32(VM_ContainerConfig);
  1515. cmd->type = cpu_to_le32(CT_PAUSE_IO);
  1516. cmd->timeout = cpu_to_le32(1);
  1517. cmd->min = cpu_to_le32(1);
  1518. cmd->noRescan = cpu_to_le32(1);
  1519. cmd->count = cpu_to_le32(0);
  1520. status = aac_fib_send(ContainerCommand,
  1521. fibctx,
  1522. sizeof(struct aac_pause),
  1523. FsaNormal,
  1524. -2 /* Timeout silently */, 1,
  1525. NULL, NULL);
  1526. if (status >= 0)
  1527. aac_fib_complete(fibctx);
  1528. /* FIB should be freed only after getting
  1529. * the response from the F/W */
  1530. if (status != -ERESTARTSYS)
  1531. aac_fib_free(fibctx);
  1532. }
  1533. }
  1534. return retval;
  1535. }
  1536. int aac_check_health(struct aac_dev * aac)
  1537. {
  1538. int BlinkLED;
  1539. unsigned long time_now, flagv = 0;
  1540. struct list_head * entry;
  1541. /* Extending the scope of fib_lock slightly to protect aac->in_reset */
  1542. if (spin_trylock_irqsave(&aac->fib_lock, flagv) == 0)
  1543. return 0;
  1544. if (aac->in_reset || !(BlinkLED = aac_adapter_check_health(aac))) {
  1545. spin_unlock_irqrestore(&aac->fib_lock, flagv);
  1546. return 0; /* OK */
  1547. }
  1548. aac->in_reset = 1;
  1549. /* Fake up an AIF:
  1550. * aac_aifcmd.command = AifCmdEventNotify = 1
  1551. * aac_aifcmd.seqnum = 0xFFFFFFFF
  1552. * aac_aifcmd.data[0] = AifEnExpEvent = 23
  1553. * aac_aifcmd.data[1] = AifExeFirmwarePanic = 3
  1554. * aac.aifcmd.data[2] = AifHighPriority = 3
  1555. * aac.aifcmd.data[3] = BlinkLED
  1556. */
  1557. time_now = jiffies/HZ;
  1558. entry = aac->fib_list.next;
  1559. /*
  1560. * For each Context that is on the
  1561. * fibctxList, make a copy of the
  1562. * fib, and then set the event to wake up the
  1563. * thread that is waiting for it.
  1564. */
  1565. while (entry != &aac->fib_list) {
  1566. /*
  1567. * Extract the fibctx
  1568. */
  1569. struct aac_fib_context *fibctx = list_entry(entry, struct aac_fib_context, next);
  1570. struct hw_fib * hw_fib;
  1571. struct fib * fib;
  1572. /*
  1573. * Check if the queue is getting
  1574. * backlogged
  1575. */
  1576. if (fibctx->count > 20) {
  1577. /*
  1578. * It's *not* jiffies folks,
  1579. * but jiffies / HZ, so do not
  1580. * panic ...
  1581. */
  1582. u32 time_last = fibctx->jiffies;
  1583. /*
  1584. * Has it been > 2 minutes
  1585. * since the last read off
  1586. * the queue?
  1587. */
  1588. if ((time_now - time_last) > aif_timeout) {
  1589. entry = entry->next;
  1590. aac_close_fib_context(aac, fibctx);
  1591. continue;
  1592. }
  1593. }
  1594. /*
  1595. * Warning: no sleep allowed while
  1596. * holding spinlock
  1597. */
  1598. hw_fib = kzalloc(sizeof(struct hw_fib), GFP_ATOMIC);
  1599. fib = kzalloc(sizeof(struct fib), GFP_ATOMIC);
  1600. if (fib && hw_fib) {
  1601. struct aac_aifcmd * aif;
  1602. fib->hw_fib_va = hw_fib;
  1603. fib->dev = aac;
  1604. aac_fib_init(fib);
  1605. fib->type = FSAFS_NTC_FIB_CONTEXT;
  1606. fib->size = sizeof (struct fib);
  1607. fib->data = hw_fib->data;
  1608. aif = (struct aac_aifcmd *)hw_fib->data;
  1609. aif->command = cpu_to_le32(AifCmdEventNotify);
  1610. aif->seqnum = cpu_to_le32(0xFFFFFFFF);
  1611. ((__le32 *)aif->data)[0] = cpu_to_le32(AifEnExpEvent);
  1612. ((__le32 *)aif->data)[1] = cpu_to_le32(AifExeFirmwarePanic);
  1613. ((__le32 *)aif->data)[2] = cpu_to_le32(AifHighPriority);
  1614. ((__le32 *)aif->data)[3] = cpu_to_le32(BlinkLED);
  1615. /*
  1616. * Put the FIB onto the
  1617. * fibctx's fibs
  1618. */
  1619. list_add_tail(&fib->fiblink, &fibctx->fib_list);
  1620. fibctx->count++;
  1621. /*
  1622. * Set the event to wake up the
  1623. * thread that will waiting.
  1624. */
  1625. complete(&fibctx->completion);
  1626. } else {
  1627. printk(KERN_WARNING "aifd: didn't allocate NewFib.\n");
  1628. kfree(fib);
  1629. kfree(hw_fib);
  1630. }
  1631. entry = entry->next;
  1632. }
  1633. spin_unlock_irqrestore(&aac->fib_lock, flagv);
  1634. if (BlinkLED < 0) {
  1635. printk(KERN_ERR "%s: Host adapter is dead (or got a PCI error) %d\n",
  1636. aac->name, BlinkLED);
  1637. goto out;
  1638. }
  1639. printk(KERN_ERR "%s: Host adapter BLINK LED 0x%x\n", aac->name, BlinkLED);
  1640. out:
  1641. aac->in_reset = 0;
  1642. return BlinkLED;
  1643. }
  1644. static inline int is_safw_raid_volume(struct aac_dev *aac, int bus, int target)
  1645. {
  1646. return bus == CONTAINER_CHANNEL && target < aac->maximum_num_containers;
  1647. }
  1648. static struct scsi_device *aac_lookup_safw_scsi_device(struct aac_dev *dev,
  1649. int bus,
  1650. int target)
  1651. {
  1652. if (bus != CONTAINER_CHANNEL)
  1653. bus = aac_phys_to_logical(bus);
  1654. return scsi_device_lookup(dev->scsi_host_ptr, bus, target, 0);
  1655. }
  1656. static int aac_add_safw_device(struct aac_dev *dev, int bus, int target)
  1657. {
  1658. if (bus != CONTAINER_CHANNEL)
  1659. bus = aac_phys_to_logical(bus);
  1660. return scsi_add_device(dev->scsi_host_ptr, bus, target, 0);
  1661. }
  1662. static void aac_put_safw_scsi_device(struct scsi_device *sdev)
  1663. {
  1664. if (sdev)
  1665. scsi_device_put(sdev);
  1666. }
  1667. static void aac_remove_safw_device(struct aac_dev *dev, int bus, int target)
  1668. {
  1669. struct scsi_device *sdev;
  1670. sdev = aac_lookup_safw_scsi_device(dev, bus, target);
  1671. scsi_remove_device(sdev);
  1672. aac_put_safw_scsi_device(sdev);
  1673. }
  1674. static inline int aac_is_safw_scan_count_equal(struct aac_dev *dev,
  1675. int bus, int target)
  1676. {
  1677. return dev->hba_map[bus][target].scan_counter == dev->scan_counter;
  1678. }
  1679. static int aac_is_safw_target_valid(struct aac_dev *dev, int bus, int target)
  1680. {
  1681. if (is_safw_raid_volume(dev, bus, target))
  1682. return dev->fsa_dev[target].valid;
  1683. else
  1684. return aac_is_safw_scan_count_equal(dev, bus, target);
  1685. }
  1686. static int aac_is_safw_device_exposed(struct aac_dev *dev, int bus, int target)
  1687. {
  1688. int is_exposed = 0;
  1689. struct scsi_device *sdev;
  1690. sdev = aac_lookup_safw_scsi_device(dev, bus, target);
  1691. if (sdev)
  1692. is_exposed = 1;
  1693. aac_put_safw_scsi_device(sdev);
  1694. return is_exposed;
  1695. }
  1696. static int aac_update_safw_host_devices(struct aac_dev *dev)
  1697. {
  1698. int i;
  1699. int bus;
  1700. int target;
  1701. int is_exposed = 0;
  1702. int rcode = 0;
  1703. rcode = aac_setup_safw_adapter(dev);
  1704. if (unlikely(rcode < 0)) {
  1705. goto out;
  1706. }
  1707. for (i = 0; i < AAC_BUS_TARGET_LOOP; i++) {
  1708. bus = get_bus_number(i);
  1709. target = get_target_number(i);
  1710. is_exposed = aac_is_safw_device_exposed(dev, bus, target);
  1711. if (aac_is_safw_target_valid(dev, bus, target) && !is_exposed)
  1712. aac_add_safw_device(dev, bus, target);
  1713. else if (!aac_is_safw_target_valid(dev, bus, target) &&
  1714. is_exposed)
  1715. aac_remove_safw_device(dev, bus, target);
  1716. }
  1717. out:
  1718. return rcode;
  1719. }
  1720. static int aac_scan_safw_host(struct aac_dev *dev)
  1721. {
  1722. int rcode = 0;
  1723. rcode = aac_update_safw_host_devices(dev);
  1724. if (rcode)
  1725. aac_schedule_safw_scan_worker(dev);
  1726. return rcode;
  1727. }
  1728. int aac_scan_host(struct aac_dev *dev)
  1729. {
  1730. int rcode = 0;
  1731. mutex_lock(&dev->scan_mutex);
  1732. if (dev->sa_firmware)
  1733. rcode = aac_scan_safw_host(dev);
  1734. else
  1735. scsi_scan_host(dev->scsi_host_ptr);
  1736. mutex_unlock(&dev->scan_mutex);
  1737. return rcode;
  1738. }
  1739. void aac_src_reinit_aif_worker(struct work_struct *work)
  1740. {
  1741. struct aac_dev *dev = container_of(to_delayed_work(work),
  1742. struct aac_dev, src_reinit_aif_worker);
  1743. wait_event(dev->scsi_host_ptr->host_wait,
  1744. !scsi_host_in_recovery(dev->scsi_host_ptr));
  1745. aac_reinit_aif(dev, dev->cardtype);
  1746. }
  1747. /**
  1748. * aac_handle_sa_aif - Handle a message from the firmware
  1749. * @dev: Which adapter this fib is from
  1750. * @fibptr: Pointer to fibptr from adapter
  1751. *
  1752. * This routine handles a driver notify fib from the adapter and
  1753. * dispatches it to the appropriate routine for handling.
  1754. */
  1755. static void aac_handle_sa_aif(struct aac_dev *dev, struct fib *fibptr)
  1756. {
  1757. int i;
  1758. u32 events = 0;
  1759. if (fibptr->hbacmd_size & SA_AIF_HOTPLUG)
  1760. events = SA_AIF_HOTPLUG;
  1761. else if (fibptr->hbacmd_size & SA_AIF_HARDWARE)
  1762. events = SA_AIF_HARDWARE;
  1763. else if (fibptr->hbacmd_size & SA_AIF_PDEV_CHANGE)
  1764. events = SA_AIF_PDEV_CHANGE;
  1765. else if (fibptr->hbacmd_size & SA_AIF_LDEV_CHANGE)
  1766. events = SA_AIF_LDEV_CHANGE;
  1767. else if (fibptr->hbacmd_size & SA_AIF_BPSTAT_CHANGE)
  1768. events = SA_AIF_BPSTAT_CHANGE;
  1769. else if (fibptr->hbacmd_size & SA_AIF_BPCFG_CHANGE)
  1770. events = SA_AIF_BPCFG_CHANGE;
  1771. switch (events) {
  1772. case SA_AIF_HOTPLUG:
  1773. case SA_AIF_HARDWARE:
  1774. case SA_AIF_PDEV_CHANGE:
  1775. case SA_AIF_LDEV_CHANGE:
  1776. case SA_AIF_BPCFG_CHANGE:
  1777. aac_scan_host(dev);
  1778. break;
  1779. case SA_AIF_BPSTAT_CHANGE:
  1780. /* currently do nothing */
  1781. break;
  1782. }
  1783. for (i = 1; i <= 10; ++i) {
  1784. events = src_readl(dev, MUnit.IDR);
  1785. if (events & (1<<23)) {
  1786. pr_warn(" AIF not cleared by firmware - %d/%d)\n",
  1787. i, 10);
  1788. ssleep(1);
  1789. }
  1790. }
  1791. }
  1792. static int get_fib_count(struct aac_dev *dev)
  1793. {
  1794. unsigned int num = 0;
  1795. struct list_head *entry;
  1796. unsigned long flagv;
  1797. /*
  1798. * Warning: no sleep allowed while
  1799. * holding spinlock. We take the estimate
  1800. * and pre-allocate a set of fibs outside the
  1801. * lock.
  1802. */
  1803. num = le32_to_cpu(dev->init->r7.adapter_fibs_size)
  1804. / sizeof(struct hw_fib); /* some extra */
  1805. spin_lock_irqsave(&dev->fib_lock, flagv);
  1806. entry = dev->fib_list.next;
  1807. while (entry != &dev->fib_list) {
  1808. entry = entry->next;
  1809. ++num;
  1810. }
  1811. spin_unlock_irqrestore(&dev->fib_lock, flagv);
  1812. return num;
  1813. }
  1814. static int fillup_pools(struct aac_dev *dev, struct hw_fib **hw_fib_pool,
  1815. struct fib **fib_pool,
  1816. unsigned int num)
  1817. {
  1818. struct hw_fib **hw_fib_p;
  1819. struct fib **fib_p;
  1820. hw_fib_p = hw_fib_pool;
  1821. fib_p = fib_pool;
  1822. while (hw_fib_p < &hw_fib_pool[num]) {
  1823. *(hw_fib_p) = kmalloc(sizeof(struct hw_fib), GFP_KERNEL);
  1824. if (!(*(hw_fib_p++))) {
  1825. --hw_fib_p;
  1826. break;
  1827. }
  1828. *(fib_p) = kmalloc(sizeof(struct fib), GFP_KERNEL);
  1829. if (!(*(fib_p++))) {
  1830. kfree(*(--hw_fib_p));
  1831. break;
  1832. }
  1833. }
  1834. /*
  1835. * Get the actual number of allocated fibs
  1836. */
  1837. num = hw_fib_p - hw_fib_pool;
  1838. return num;
  1839. }
  1840. static void wakeup_fibctx_threads(struct aac_dev *dev,
  1841. struct hw_fib **hw_fib_pool,
  1842. struct fib **fib_pool,
  1843. struct fib *fib,
  1844. struct hw_fib *hw_fib,
  1845. unsigned int num)
  1846. {
  1847. unsigned long flagv;
  1848. struct list_head *entry;
  1849. struct hw_fib **hw_fib_p;
  1850. struct fib **fib_p;
  1851. u32 time_now, time_last;
  1852. struct hw_fib *hw_newfib;
  1853. struct fib *newfib;
  1854. struct aac_fib_context *fibctx;
  1855. time_now = jiffies/HZ;
  1856. spin_lock_irqsave(&dev->fib_lock, flagv);
  1857. entry = dev->fib_list.next;
  1858. /*
  1859. * For each Context that is on the
  1860. * fibctxList, make a copy of the
  1861. * fib, and then set the event to wake up the
  1862. * thread that is waiting for it.
  1863. */
  1864. hw_fib_p = hw_fib_pool;
  1865. fib_p = fib_pool;
  1866. while (entry != &dev->fib_list) {
  1867. /*
  1868. * Extract the fibctx
  1869. */
  1870. fibctx = list_entry(entry, struct aac_fib_context,
  1871. next);
  1872. /*
  1873. * Check if the queue is getting
  1874. * backlogged
  1875. */
  1876. if (fibctx->count > 20) {
  1877. /*
  1878. * It's *not* jiffies folks,
  1879. * but jiffies / HZ so do not
  1880. * panic ...
  1881. */
  1882. time_last = fibctx->jiffies;
  1883. /*
  1884. * Has it been > 2 minutes
  1885. * since the last read off
  1886. * the queue?
  1887. */
  1888. if ((time_now - time_last) > aif_timeout) {
  1889. entry = entry->next;
  1890. aac_close_fib_context(dev, fibctx);
  1891. continue;
  1892. }
  1893. }
  1894. /*
  1895. * Warning: no sleep allowed while
  1896. * holding spinlock
  1897. */
  1898. if (hw_fib_p >= &hw_fib_pool[num]) {
  1899. pr_warn("aifd: didn't allocate NewFib\n");
  1900. entry = entry->next;
  1901. continue;
  1902. }
  1903. hw_newfib = *hw_fib_p;
  1904. *(hw_fib_p++) = NULL;
  1905. newfib = *fib_p;
  1906. *(fib_p++) = NULL;
  1907. /*
  1908. * Make the copy of the FIB
  1909. */
  1910. memcpy(hw_newfib, hw_fib, sizeof(struct hw_fib));
  1911. memcpy(newfib, fib, sizeof(struct fib));
  1912. newfib->hw_fib_va = hw_newfib;
  1913. /*
  1914. * Put the FIB onto the
  1915. * fibctx's fibs
  1916. */
  1917. list_add_tail(&newfib->fiblink, &fibctx->fib_list);
  1918. fibctx->count++;
  1919. /*
  1920. * Set the event to wake up the
  1921. * thread that is waiting.
  1922. */
  1923. complete(&fibctx->completion);
  1924. entry = entry->next;
  1925. }
  1926. /*
  1927. * Set the status of this FIB
  1928. */
  1929. *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK);
  1930. aac_fib_adapter_complete(fib, sizeof(u32));
  1931. spin_unlock_irqrestore(&dev->fib_lock, flagv);
  1932. }
  1933. static void aac_process_events(struct aac_dev *dev)
  1934. {
  1935. struct hw_fib *hw_fib;
  1936. struct fib *fib;
  1937. unsigned long flags;
  1938. spinlock_t *t_lock;
  1939. t_lock = dev->queues->queue[HostNormCmdQueue].lock;
  1940. spin_lock_irqsave(t_lock, flags);
  1941. while (!list_empty(&(dev->queues->queue[HostNormCmdQueue].cmdq))) {
  1942. struct list_head *entry;
  1943. struct aac_aifcmd *aifcmd;
  1944. unsigned int num;
  1945. struct hw_fib **hw_fib_pool, **hw_fib_p;
  1946. struct fib **fib_pool, **fib_p;
  1947. set_current_state(TASK_RUNNING);
  1948. entry = dev->queues->queue[HostNormCmdQueue].cmdq.next;
  1949. list_del(entry);
  1950. t_lock = dev->queues->queue[HostNormCmdQueue].lock;
  1951. spin_unlock_irqrestore(t_lock, flags);
  1952. fib = list_entry(entry, struct fib, fiblink);
  1953. hw_fib = fib->hw_fib_va;
  1954. if (dev->sa_firmware) {
  1955. /* Thor AIF */
  1956. aac_handle_sa_aif(dev, fib);
  1957. aac_fib_adapter_complete(fib, (u16)sizeof(u32));
  1958. goto free_fib;
  1959. }
  1960. /*
  1961. * We will process the FIB here or pass it to a
  1962. * worker thread that is TBD. We Really can't
  1963. * do anything at this point since we don't have
  1964. * anything defined for this thread to do.
  1965. */
  1966. memset(fib, 0, sizeof(struct fib));
  1967. fib->type = FSAFS_NTC_FIB_CONTEXT;
  1968. fib->size = sizeof(struct fib);
  1969. fib->hw_fib_va = hw_fib;
  1970. fib->data = hw_fib->data;
  1971. fib->dev = dev;
  1972. /*
  1973. * We only handle AifRequest fibs from the adapter.
  1974. */
  1975. aifcmd = (struct aac_aifcmd *) hw_fib->data;
  1976. if (aifcmd->command == cpu_to_le32(AifCmdDriverNotify)) {
  1977. /* Handle Driver Notify Events */
  1978. aac_handle_aif(dev, fib);
  1979. *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK);
  1980. aac_fib_adapter_complete(fib, (u16)sizeof(u32));
  1981. goto free_fib;
  1982. }
  1983. /*
  1984. * The u32 here is important and intended. We are using
  1985. * 32bit wrapping time to fit the adapter field
  1986. */
  1987. /* Sniff events */
  1988. if (aifcmd->command == cpu_to_le32(AifCmdEventNotify)
  1989. || aifcmd->command == cpu_to_le32(AifCmdJobProgress)) {
  1990. aac_handle_aif(dev, fib);
  1991. }
  1992. /*
  1993. * get number of fibs to process
  1994. */
  1995. num = get_fib_count(dev);
  1996. if (!num)
  1997. goto free_fib;
  1998. hw_fib_pool = kmalloc_array(num, sizeof(struct hw_fib *),
  1999. GFP_KERNEL);
  2000. if (!hw_fib_pool)
  2001. goto free_fib;
  2002. fib_pool = kmalloc_array(num, sizeof(struct fib *), GFP_KERNEL);
  2003. if (!fib_pool)
  2004. goto free_hw_fib_pool;
  2005. /*
  2006. * Fill up fib pointer pools with actual fibs
  2007. * and hw_fibs
  2008. */
  2009. num = fillup_pools(dev, hw_fib_pool, fib_pool, num);
  2010. if (!num)
  2011. goto free_mem;
  2012. /*
  2013. * wakeup the thread that is waiting for
  2014. * the response from fw (ioctl)
  2015. */
  2016. wakeup_fibctx_threads(dev, hw_fib_pool, fib_pool,
  2017. fib, hw_fib, num);
  2018. free_mem:
  2019. /* Free up the remaining resources */
  2020. hw_fib_p = hw_fib_pool;
  2021. fib_p = fib_pool;
  2022. while (hw_fib_p < &hw_fib_pool[num]) {
  2023. kfree(*hw_fib_p);
  2024. kfree(*fib_p);
  2025. ++fib_p;
  2026. ++hw_fib_p;
  2027. }
  2028. kfree(fib_pool);
  2029. free_hw_fib_pool:
  2030. kfree(hw_fib_pool);
  2031. free_fib:
  2032. kfree(fib);
  2033. t_lock = dev->queues->queue[HostNormCmdQueue].lock;
  2034. spin_lock_irqsave(t_lock, flags);
  2035. }
  2036. /*
  2037. * There are no more AIF's
  2038. */
  2039. t_lock = dev->queues->queue[HostNormCmdQueue].lock;
  2040. spin_unlock_irqrestore(t_lock, flags);
  2041. }
  2042. static int aac_send_wellness_command(struct aac_dev *dev, char *wellness_str,
  2043. u32 datasize)
  2044. {
  2045. struct aac_srb *srbcmd;
  2046. struct sgmap64 *sg64;
  2047. dma_addr_t addr;
  2048. char *dma_buf;
  2049. struct fib *fibptr;
  2050. int ret = -ENOMEM;
  2051. u32 vbus, vid;
  2052. fibptr = aac_fib_alloc(dev);
  2053. if (!fibptr)
  2054. goto out;
  2055. dma_buf = dma_alloc_coherent(&dev->pdev->dev, datasize, &addr,
  2056. GFP_KERNEL);
  2057. if (!dma_buf)
  2058. goto fib_free_out;
  2059. aac_fib_init(fibptr);
  2060. vbus = (u32)le16_to_cpu(dev->supplement_adapter_info.virt_device_bus);
  2061. vid = (u32)le16_to_cpu(dev->supplement_adapter_info.virt_device_target);
  2062. srbcmd = (struct aac_srb *)fib_data(fibptr);
  2063. srbcmd->function = cpu_to_le32(SRBF_ExecuteScsi);
  2064. srbcmd->channel = cpu_to_le32(vbus);
  2065. srbcmd->id = cpu_to_le32(vid);
  2066. srbcmd->lun = 0;
  2067. srbcmd->flags = cpu_to_le32(SRB_DataOut);
  2068. srbcmd->timeout = cpu_to_le32(10);
  2069. srbcmd->retry_limit = 0;
  2070. srbcmd->cdb_size = cpu_to_le32(12);
  2071. srbcmd->count = cpu_to_le32(datasize);
  2072. memset(srbcmd->cdb, 0, sizeof(srbcmd->cdb));
  2073. srbcmd->cdb[0] = BMIC_OUT;
  2074. srbcmd->cdb[6] = WRITE_HOST_WELLNESS;
  2075. memcpy(dma_buf, (char *)wellness_str, datasize);
  2076. sg64 = (struct sgmap64 *)&srbcmd->sg;
  2077. sg64->count = cpu_to_le32(1);
  2078. sg64->sg[0].addr[1] = cpu_to_le32((u32)(((addr) >> 16) >> 16));
  2079. sg64->sg[0].addr[0] = cpu_to_le32((u32)(addr & 0xffffffff));
  2080. sg64->sg[0].count = cpu_to_le32(datasize);
  2081. ret = aac_fib_send(ScsiPortCommand64, fibptr, sizeof(struct aac_srb),
  2082. FsaNormal, 1, 1, NULL, NULL);
  2083. dma_free_coherent(&dev->pdev->dev, datasize, dma_buf, addr);
  2084. /*
  2085. * Do not set XferState to zero unless
  2086. * receives a response from F/W
  2087. */
  2088. if (ret >= 0)
  2089. aac_fib_complete(fibptr);
  2090. /*
  2091. * FIB should be freed only after
  2092. * getting the response from the F/W
  2093. */
  2094. if (ret != -ERESTARTSYS)
  2095. goto fib_free_out;
  2096. out:
  2097. return ret;
  2098. fib_free_out:
  2099. aac_fib_free(fibptr);
  2100. goto out;
  2101. }
  2102. static int aac_send_safw_hostttime(struct aac_dev *dev, struct timespec64 *now)
  2103. {
  2104. struct tm cur_tm;
  2105. char wellness_str[] = "<HW>TD\010\0\0\0\0\0\0\0\0\0DW\0\0ZZ";
  2106. u32 datasize = sizeof(wellness_str);
  2107. time64_t local_time;
  2108. int ret = -ENODEV;
  2109. if (!dev->sa_firmware)
  2110. goto out;
  2111. local_time = (now->tv_sec - (sys_tz.tz_minuteswest * 60));
  2112. time64_to_tm(local_time, 0, &cur_tm);
  2113. cur_tm.tm_mon += 1;
  2114. cur_tm.tm_year += 1900;
  2115. wellness_str[8] = bin2bcd(cur_tm.tm_hour);
  2116. wellness_str[9] = bin2bcd(cur_tm.tm_min);
  2117. wellness_str[10] = bin2bcd(cur_tm.tm_sec);
  2118. wellness_str[12] = bin2bcd(cur_tm.tm_mon);
  2119. wellness_str[13] = bin2bcd(cur_tm.tm_mday);
  2120. wellness_str[14] = bin2bcd(cur_tm.tm_year / 100);
  2121. wellness_str[15] = bin2bcd(cur_tm.tm_year % 100);
  2122. ret = aac_send_wellness_command(dev, wellness_str, datasize);
  2123. out:
  2124. return ret;
  2125. }
  2126. static int aac_send_hosttime(struct aac_dev *dev, struct timespec64 *now)
  2127. {
  2128. int ret = -ENOMEM;
  2129. struct fib *fibptr;
  2130. __le32 *info;
  2131. fibptr = aac_fib_alloc(dev);
  2132. if (!fibptr)
  2133. goto out;
  2134. aac_fib_init(fibptr);
  2135. info = (__le32 *)fib_data(fibptr);
  2136. *info = cpu_to_le32(now->tv_sec); /* overflow in y2106 */
  2137. ret = aac_fib_send(SendHostTime, fibptr, sizeof(*info), FsaNormal,
  2138. 1, 1, NULL, NULL);
  2139. /*
  2140. * Do not set XferState to zero unless
  2141. * receives a response from F/W
  2142. */
  2143. if (ret >= 0)
  2144. aac_fib_complete(fibptr);
  2145. /*
  2146. * FIB should be freed only after
  2147. * getting the response from the F/W
  2148. */
  2149. if (ret != -ERESTARTSYS)
  2150. aac_fib_free(fibptr);
  2151. out:
  2152. return ret;
  2153. }
  2154. /**
  2155. * aac_command_thread - command processing thread
  2156. * @data: Adapter to monitor
  2157. *
  2158. * Waits on the commandready event in it's queue. When the event gets set
  2159. * it will pull FIBs off it's queue. It will continue to pull FIBs off
  2160. * until the queue is empty. When the queue is empty it will wait for
  2161. * more FIBs.
  2162. */
  2163. int aac_command_thread(void *data)
  2164. {
  2165. struct aac_dev *dev = data;
  2166. DECLARE_WAITQUEUE(wait, current);
  2167. unsigned long next_jiffies = jiffies + HZ;
  2168. unsigned long next_check_jiffies = next_jiffies;
  2169. long difference = HZ;
  2170. /*
  2171. * We can only have one thread per adapter for AIF's.
  2172. */
  2173. if (dev->aif_thread)
  2174. return -EINVAL;
  2175. /*
  2176. * Let the DPC know it has a place to send the AIF's to.
  2177. */
  2178. dev->aif_thread = 1;
  2179. add_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait);
  2180. set_current_state(TASK_INTERRUPTIBLE);
  2181. dprintk ((KERN_INFO "aac_command_thread start\n"));
  2182. while (1) {
  2183. aac_process_events(dev);
  2184. /*
  2185. * Background activity
  2186. */
  2187. if ((time_before(next_check_jiffies,next_jiffies))
  2188. && ((difference = next_check_jiffies - jiffies) <= 0)) {
  2189. next_check_jiffies = next_jiffies;
  2190. if (aac_adapter_check_health(dev) == 0) {
  2191. difference = ((long)(unsigned)check_interval)
  2192. * HZ;
  2193. next_check_jiffies = jiffies + difference;
  2194. } else if (!dev->queues)
  2195. break;
  2196. }
  2197. if (!time_before(next_check_jiffies,next_jiffies)
  2198. && ((difference = next_jiffies - jiffies) <= 0)) {
  2199. struct timespec64 now;
  2200. int ret;
  2201. /* Don't even try to talk to adapter if its sick */
  2202. ret = aac_adapter_check_health(dev);
  2203. if (ret || !dev->queues)
  2204. break;
  2205. next_check_jiffies = jiffies
  2206. + ((long)(unsigned)check_interval)
  2207. * HZ;
  2208. ktime_get_real_ts64(&now);
  2209. /* Synchronize our watches */
  2210. if (((NSEC_PER_SEC - (NSEC_PER_SEC / HZ)) > now.tv_nsec)
  2211. && (now.tv_nsec > (NSEC_PER_SEC / HZ)))
  2212. difference = HZ + HZ / 2 -
  2213. now.tv_nsec / (NSEC_PER_SEC / HZ);
  2214. else {
  2215. if (now.tv_nsec > NSEC_PER_SEC / 2)
  2216. ++now.tv_sec;
  2217. if (dev->sa_firmware)
  2218. ret =
  2219. aac_send_safw_hostttime(dev, &now);
  2220. else
  2221. ret = aac_send_hosttime(dev, &now);
  2222. difference = (long)(unsigned)update_interval*HZ;
  2223. }
  2224. next_jiffies = jiffies + difference;
  2225. if (time_before(next_check_jiffies,next_jiffies))
  2226. difference = next_check_jiffies - jiffies;
  2227. }
  2228. if (difference <= 0)
  2229. difference = 1;
  2230. set_current_state(TASK_INTERRUPTIBLE);
  2231. if (kthread_should_stop())
  2232. break;
  2233. /*
  2234. * we probably want usleep_range() here instead of the
  2235. * jiffies computation
  2236. */
  2237. schedule_timeout(difference);
  2238. if (kthread_should_stop())
  2239. break;
  2240. }
  2241. if (dev->queues)
  2242. remove_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait);
  2243. dev->aif_thread = 0;
  2244. return 0;
  2245. }
  2246. int aac_acquire_irq(struct aac_dev *dev)
  2247. {
  2248. int i;
  2249. int j;
  2250. int ret = 0;
  2251. if (!dev->sync_mode && dev->msi_enabled && dev->max_msix > 1) {
  2252. for (i = 0; i < dev->max_msix; i++) {
  2253. dev->aac_msix[i].vector_no = i;
  2254. dev->aac_msix[i].dev = dev;
  2255. if (request_irq(pci_irq_vector(dev->pdev, i),
  2256. dev->a_ops.adapter_intr,
  2257. 0, "aacraid", &(dev->aac_msix[i]))) {
  2258. printk(KERN_ERR "%s%d: Failed to register IRQ for vector %d.\n",
  2259. dev->name, dev->id, i);
  2260. for (j = 0 ; j < i ; j++)
  2261. free_irq(pci_irq_vector(dev->pdev, j),
  2262. &(dev->aac_msix[j]));
  2263. pci_disable_msix(dev->pdev);
  2264. ret = -1;
  2265. }
  2266. }
  2267. } else {
  2268. dev->aac_msix[0].vector_no = 0;
  2269. dev->aac_msix[0].dev = dev;
  2270. if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr,
  2271. IRQF_SHARED, "aacraid",
  2272. &(dev->aac_msix[0])) < 0) {
  2273. if (dev->msi)
  2274. pci_disable_msi(dev->pdev);
  2275. printk(KERN_ERR "%s%d: Interrupt unavailable.\n",
  2276. dev->name, dev->id);
  2277. ret = -1;
  2278. }
  2279. }
  2280. return ret;
  2281. }
  2282. void aac_free_irq(struct aac_dev *dev)
  2283. {
  2284. int i;
  2285. if (aac_is_src(dev)) {
  2286. if (dev->max_msix > 1) {
  2287. for (i = 0; i < dev->max_msix; i++)
  2288. free_irq(pci_irq_vector(dev->pdev, i),
  2289. &(dev->aac_msix[i]));
  2290. } else {
  2291. free_irq(dev->pdev->irq, &(dev->aac_msix[0]));
  2292. }
  2293. } else {
  2294. free_irq(dev->pdev->irq, dev);
  2295. }
  2296. if (dev->msi)
  2297. pci_disable_msi(dev->pdev);
  2298. else if (dev->max_msix > 1)
  2299. pci_disable_msix(dev->pdev);
  2300. }