comminit.c 19 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Adaptec AAC series RAID controller driver
  4. * (c) Copyright 2001 Red Hat Inc.
  5. *
  6. * based on the old aacraid driver that is..
  7. * Adaptec aacraid device driver for Linux.
  8. *
  9. * Copyright (c) 2000-2010 Adaptec, Inc.
  10. * 2010-2015 PMC-Sierra, Inc. ([email protected])
  11. * 2016-2017 Microsemi Corp. ([email protected])
  12. *
  13. * Module Name:
  14. * comminit.c
  15. *
  16. * Abstract: This supports the initialization of the host adapter commuication interface.
  17. * This is a platform dependent module for the pci cyclone board.
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/init.h>
  21. #include <linux/types.h>
  22. #include <linux/pci.h>
  23. #include <linux/spinlock.h>
  24. #include <linux/slab.h>
  25. #include <linux/blkdev.h>
  26. #include <linux/delay.h>
  27. #include <linux/completion.h>
  28. #include <linux/mm.h>
  29. #include <scsi/scsi_host.h>
  30. #include <scsi/scsi_device.h>
  31. #include <scsi/scsi_cmnd.h>
  32. #include "aacraid.h"
  33. struct aac_common aac_config = {
  34. .irq_mod = 1
  35. };
  36. static inline int aac_is_msix_mode(struct aac_dev *dev)
  37. {
  38. u32 status = 0;
  39. if (aac_is_src(dev))
  40. status = src_readl(dev, MUnit.OMR);
  41. return (status & AAC_INT_MODE_MSIX);
  42. }
  43. static inline void aac_change_to_intx(struct aac_dev *dev)
  44. {
  45. aac_src_access_devreg(dev, AAC_DISABLE_MSIX);
  46. aac_src_access_devreg(dev, AAC_ENABLE_INTX);
  47. }
  48. static int aac_alloc_comm(struct aac_dev *dev, void **commaddr, unsigned long commsize, unsigned long commalign)
  49. {
  50. unsigned char *base;
  51. unsigned long size, align;
  52. const unsigned long fibsize = dev->max_fib_size;
  53. const unsigned long printfbufsiz = 256;
  54. unsigned long host_rrq_size, aac_init_size;
  55. union aac_init *init;
  56. dma_addr_t phys;
  57. unsigned long aac_max_hostphysmempages;
  58. if ((dev->comm_interface == AAC_COMM_MESSAGE_TYPE1) ||
  59. (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) ||
  60. (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3 &&
  61. !dev->sa_firmware)) {
  62. host_rrq_size =
  63. (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB)
  64. * sizeof(u32);
  65. aac_init_size = sizeof(union aac_init);
  66. } else if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3 &&
  67. dev->sa_firmware) {
  68. host_rrq_size = (dev->scsi_host_ptr->can_queue
  69. + AAC_NUM_MGT_FIB) * sizeof(u32) * AAC_MAX_MSIX;
  70. aac_init_size = sizeof(union aac_init) +
  71. (AAC_MAX_HRRQ - 1) * sizeof(struct _rrq);
  72. } else {
  73. host_rrq_size = 0;
  74. aac_init_size = sizeof(union aac_init);
  75. }
  76. size = fibsize + aac_init_size + commsize + commalign +
  77. printfbufsiz + host_rrq_size;
  78. base = dma_alloc_coherent(&dev->pdev->dev, size, &phys, GFP_KERNEL);
  79. if (base == NULL) {
  80. printk(KERN_ERR "aacraid: unable to create mapping.\n");
  81. return 0;
  82. }
  83. dev->comm_addr = (void *)base;
  84. dev->comm_phys = phys;
  85. dev->comm_size = size;
  86. if ((dev->comm_interface == AAC_COMM_MESSAGE_TYPE1) ||
  87. (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) ||
  88. (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3)) {
  89. dev->host_rrq = (u32 *)(base + fibsize);
  90. dev->host_rrq_pa = phys + fibsize;
  91. memset(dev->host_rrq, 0, host_rrq_size);
  92. }
  93. dev->init = (union aac_init *)(base + fibsize + host_rrq_size);
  94. dev->init_pa = phys + fibsize + host_rrq_size;
  95. init = dev->init;
  96. if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3) {
  97. int i;
  98. u64 addr;
  99. init->r8.init_struct_revision =
  100. cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_8);
  101. init->r8.init_flags = cpu_to_le32(INITFLAGS_NEW_COMM_SUPPORTED |
  102. INITFLAGS_DRIVER_USES_UTC_TIME |
  103. INITFLAGS_DRIVER_SUPPORTS_PM);
  104. init->r8.init_flags |=
  105. cpu_to_le32(INITFLAGS_DRIVER_SUPPORTS_HBA_MODE);
  106. init->r8.rr_queue_count = cpu_to_le32(dev->max_msix);
  107. init->r8.max_io_size =
  108. cpu_to_le32(dev->scsi_host_ptr->max_sectors << 9);
  109. init->r8.max_num_aif = init->r8.reserved1 =
  110. init->r8.reserved2 = 0;
  111. for (i = 0; i < dev->max_msix; i++) {
  112. addr = (u64)dev->host_rrq_pa + dev->vector_cap * i *
  113. sizeof(u32);
  114. init->r8.rrq[i].host_addr_high = cpu_to_le32(
  115. upper_32_bits(addr));
  116. init->r8.rrq[i].host_addr_low = cpu_to_le32(
  117. lower_32_bits(addr));
  118. init->r8.rrq[i].msix_id = i;
  119. init->r8.rrq[i].element_count = cpu_to_le16(
  120. (u16)dev->vector_cap);
  121. init->r8.rrq[i].comp_thresh =
  122. init->r8.rrq[i].unused = 0;
  123. }
  124. pr_warn("aacraid: Comm Interface type3 enabled\n");
  125. } else {
  126. init->r7.init_struct_revision =
  127. cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION);
  128. if (dev->max_fib_size != sizeof(struct hw_fib))
  129. init->r7.init_struct_revision =
  130. cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_4);
  131. init->r7.no_of_msix_vectors = cpu_to_le32(SA_MINIPORT_REVISION);
  132. init->r7.fsrev = cpu_to_le32(dev->fsrev);
  133. /*
  134. * Adapter Fibs are the first thing allocated so that they
  135. * start page aligned
  136. */
  137. dev->aif_base_va = (struct hw_fib *)base;
  138. init->r7.adapter_fibs_virtual_address = 0;
  139. init->r7.adapter_fibs_physical_address = cpu_to_le32((u32)phys);
  140. init->r7.adapter_fibs_size = cpu_to_le32(fibsize);
  141. init->r7.adapter_fib_align = cpu_to_le32(sizeof(struct hw_fib));
  142. /*
  143. * number of 4k pages of host physical memory. The aacraid fw
  144. * needs this number to be less than 4gb worth of pages. New
  145. * firmware doesn't have any issues with the mapping system, but
  146. * older Firmware did, and had *troubles* dealing with the math
  147. * overloading past 32 bits, thus we must limit this field.
  148. */
  149. aac_max_hostphysmempages =
  150. dma_get_required_mask(&dev->pdev->dev) >> 12;
  151. if (aac_max_hostphysmempages < AAC_MAX_HOSTPHYSMEMPAGES)
  152. init->r7.host_phys_mem_pages =
  153. cpu_to_le32(aac_max_hostphysmempages);
  154. else
  155. init->r7.host_phys_mem_pages =
  156. cpu_to_le32(AAC_MAX_HOSTPHYSMEMPAGES);
  157. init->r7.init_flags =
  158. cpu_to_le32(INITFLAGS_DRIVER_USES_UTC_TIME |
  159. INITFLAGS_DRIVER_SUPPORTS_PM);
  160. init->r7.max_io_commands =
  161. cpu_to_le32(dev->scsi_host_ptr->can_queue +
  162. AAC_NUM_MGT_FIB);
  163. init->r7.max_io_size =
  164. cpu_to_le32(dev->scsi_host_ptr->max_sectors << 9);
  165. init->r7.max_fib_size = cpu_to_le32(dev->max_fib_size);
  166. init->r7.max_num_aif = cpu_to_le32(dev->max_num_aif);
  167. if (dev->comm_interface == AAC_COMM_MESSAGE) {
  168. init->r7.init_flags |=
  169. cpu_to_le32(INITFLAGS_NEW_COMM_SUPPORTED);
  170. pr_warn("aacraid: Comm Interface enabled\n");
  171. } else if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE1) {
  172. init->r7.init_struct_revision =
  173. cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_6);
  174. init->r7.init_flags |=
  175. cpu_to_le32(INITFLAGS_NEW_COMM_SUPPORTED |
  176. INITFLAGS_NEW_COMM_TYPE1_SUPPORTED |
  177. INITFLAGS_FAST_JBOD_SUPPORTED);
  178. init->r7.host_rrq_addr_high =
  179. cpu_to_le32(upper_32_bits(dev->host_rrq_pa));
  180. init->r7.host_rrq_addr_low =
  181. cpu_to_le32(lower_32_bits(dev->host_rrq_pa));
  182. pr_warn("aacraid: Comm Interface type1 enabled\n");
  183. } else if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) {
  184. init->r7.init_struct_revision =
  185. cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_7);
  186. init->r7.init_flags |=
  187. cpu_to_le32(INITFLAGS_NEW_COMM_SUPPORTED |
  188. INITFLAGS_NEW_COMM_TYPE2_SUPPORTED |
  189. INITFLAGS_FAST_JBOD_SUPPORTED);
  190. init->r7.host_rrq_addr_high =
  191. cpu_to_le32(upper_32_bits(dev->host_rrq_pa));
  192. init->r7.host_rrq_addr_low =
  193. cpu_to_le32(lower_32_bits(dev->host_rrq_pa));
  194. init->r7.no_of_msix_vectors =
  195. cpu_to_le32(dev->max_msix);
  196. /* must be the COMM_PREFERRED_SETTINGS values */
  197. pr_warn("aacraid: Comm Interface type2 enabled\n");
  198. }
  199. }
  200. /*
  201. * Increment the base address by the amount already used
  202. */
  203. base = base + fibsize + host_rrq_size + aac_init_size;
  204. phys = (dma_addr_t)((ulong)phys + fibsize + host_rrq_size +
  205. aac_init_size);
  206. /*
  207. * Align the beginning of Headers to commalign
  208. */
  209. align = (commalign - ((uintptr_t)(base) & (commalign - 1)));
  210. base = base + align;
  211. phys = phys + align;
  212. /*
  213. * Fill in addresses of the Comm Area Headers and Queues
  214. */
  215. *commaddr = base;
  216. if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE3)
  217. init->r7.comm_header_address = cpu_to_le32((u32)phys);
  218. /*
  219. * Increment the base address by the size of the CommArea
  220. */
  221. base = base + commsize;
  222. phys = phys + commsize;
  223. /*
  224. * Place the Printf buffer area after the Fast I/O comm area.
  225. */
  226. dev->printfbuf = (void *)base;
  227. if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE3) {
  228. init->r7.printfbuf = cpu_to_le32(phys);
  229. init->r7.printfbufsiz = cpu_to_le32(printfbufsiz);
  230. }
  231. memset(base, 0, printfbufsiz);
  232. return 1;
  233. }
  234. static void aac_queue_init(struct aac_dev * dev, struct aac_queue * q, u32 *mem, int qsize)
  235. {
  236. atomic_set(&q->numpending, 0);
  237. q->dev = dev;
  238. init_waitqueue_head(&q->cmdready);
  239. INIT_LIST_HEAD(&q->cmdq);
  240. init_waitqueue_head(&q->qfull);
  241. spin_lock_init(&q->lockdata);
  242. q->lock = &q->lockdata;
  243. q->headers.producer = (__le32 *)mem;
  244. q->headers.consumer = (__le32 *)(mem+1);
  245. *(q->headers.producer) = cpu_to_le32(qsize);
  246. *(q->headers.consumer) = cpu_to_le32(qsize);
  247. q->entries = qsize;
  248. }
  249. static bool wait_for_io_iter(struct scsi_cmnd *cmd, void *data)
  250. {
  251. int *active = data;
  252. if (aac_priv(cmd)->owner == AAC_OWNER_FIRMWARE)
  253. *active = *active + 1;
  254. return true;
  255. }
  256. static void aac_wait_for_io_completion(struct aac_dev *aac)
  257. {
  258. int i = 0, active;
  259. for (i = 60; i; --i) {
  260. active = 0;
  261. scsi_host_busy_iter(aac->scsi_host_ptr,
  262. wait_for_io_iter, &active);
  263. /*
  264. * We can exit If all the commands are complete
  265. */
  266. if (active == 0)
  267. break;
  268. dev_info(&aac->pdev->dev,
  269. "Wait for %d commands to complete\n", active);
  270. ssleep(1);
  271. }
  272. if (active)
  273. dev_err(&aac->pdev->dev,
  274. "%d outstanding commands during shutdown\n", active);
  275. }
  276. /**
  277. * aac_send_shutdown - shutdown an adapter
  278. * @dev: Adapter to shutdown
  279. *
  280. * This routine will send a VM_CloseAll (shutdown) request to the adapter.
  281. */
  282. int aac_send_shutdown(struct aac_dev * dev)
  283. {
  284. struct fib * fibctx;
  285. struct aac_close *cmd;
  286. int status = 0;
  287. if (aac_adapter_check_health(dev))
  288. return status;
  289. if (!dev->adapter_shutdown) {
  290. mutex_lock(&dev->ioctl_mutex);
  291. dev->adapter_shutdown = 1;
  292. mutex_unlock(&dev->ioctl_mutex);
  293. }
  294. aac_wait_for_io_completion(dev);
  295. fibctx = aac_fib_alloc(dev);
  296. if (!fibctx)
  297. return -ENOMEM;
  298. aac_fib_init(fibctx);
  299. cmd = (struct aac_close *) fib_data(fibctx);
  300. cmd->command = cpu_to_le32(VM_CloseAll);
  301. cmd->cid = cpu_to_le32(0xfffffffe);
  302. status = aac_fib_send(ContainerCommand,
  303. fibctx,
  304. sizeof(struct aac_close),
  305. FsaNormal,
  306. -2 /* Timeout silently */, 1,
  307. NULL, NULL);
  308. if (status >= 0)
  309. aac_fib_complete(fibctx);
  310. /* FIB should be freed only after getting the response from the F/W */
  311. if (status != -ERESTARTSYS)
  312. aac_fib_free(fibctx);
  313. if (aac_is_src(dev) &&
  314. dev->msi_enabled)
  315. aac_set_intx_mode(dev);
  316. return status;
  317. }
  318. /**
  319. * aac_comm_init - Initialise FSA data structures
  320. * @dev: Adapter to initialise
  321. *
  322. * Initializes the data structures that are required for the FSA commuication
  323. * interface to operate.
  324. * Returns
  325. * 1 - if we were able to init the commuication interface.
  326. * 0 - If there were errors initing. This is a fatal error.
  327. */
  328. static int aac_comm_init(struct aac_dev * dev)
  329. {
  330. unsigned long hdrsize = (sizeof(u32) * NUMBER_OF_COMM_QUEUES) * 2;
  331. unsigned long queuesize = sizeof(struct aac_entry) * TOTAL_QUEUE_ENTRIES;
  332. u32 *headers;
  333. struct aac_entry * queues;
  334. unsigned long size;
  335. struct aac_queue_block * comm = dev->queues;
  336. /*
  337. * Now allocate and initialize the zone structures used as our
  338. * pool of FIB context records. The size of the zone is based
  339. * on the system memory size. We also initialize the mutex used
  340. * to protect the zone.
  341. */
  342. spin_lock_init(&dev->fib_lock);
  343. /*
  344. * Allocate the physically contiguous space for the commuication
  345. * queue headers.
  346. */
  347. size = hdrsize + queuesize;
  348. if (!aac_alloc_comm(dev, (void * *)&headers, size, QUEUE_ALIGNMENT))
  349. return -ENOMEM;
  350. queues = (struct aac_entry *)(((ulong)headers) + hdrsize);
  351. /* Adapter to Host normal priority Command queue */
  352. comm->queue[HostNormCmdQueue].base = queues;
  353. aac_queue_init(dev, &comm->queue[HostNormCmdQueue], headers, HOST_NORM_CMD_ENTRIES);
  354. queues += HOST_NORM_CMD_ENTRIES;
  355. headers += 2;
  356. /* Adapter to Host high priority command queue */
  357. comm->queue[HostHighCmdQueue].base = queues;
  358. aac_queue_init(dev, &comm->queue[HostHighCmdQueue], headers, HOST_HIGH_CMD_ENTRIES);
  359. queues += HOST_HIGH_CMD_ENTRIES;
  360. headers +=2;
  361. /* Host to adapter normal priority command queue */
  362. comm->queue[AdapNormCmdQueue].base = queues;
  363. aac_queue_init(dev, &comm->queue[AdapNormCmdQueue], headers, ADAP_NORM_CMD_ENTRIES);
  364. queues += ADAP_NORM_CMD_ENTRIES;
  365. headers += 2;
  366. /* host to adapter high priority command queue */
  367. comm->queue[AdapHighCmdQueue].base = queues;
  368. aac_queue_init(dev, &comm->queue[AdapHighCmdQueue], headers, ADAP_HIGH_CMD_ENTRIES);
  369. queues += ADAP_HIGH_CMD_ENTRIES;
  370. headers += 2;
  371. /* adapter to host normal priority response queue */
  372. comm->queue[HostNormRespQueue].base = queues;
  373. aac_queue_init(dev, &comm->queue[HostNormRespQueue], headers, HOST_NORM_RESP_ENTRIES);
  374. queues += HOST_NORM_RESP_ENTRIES;
  375. headers += 2;
  376. /* adapter to host high priority response queue */
  377. comm->queue[HostHighRespQueue].base = queues;
  378. aac_queue_init(dev, &comm->queue[HostHighRespQueue], headers, HOST_HIGH_RESP_ENTRIES);
  379. queues += HOST_HIGH_RESP_ENTRIES;
  380. headers += 2;
  381. /* host to adapter normal priority response queue */
  382. comm->queue[AdapNormRespQueue].base = queues;
  383. aac_queue_init(dev, &comm->queue[AdapNormRespQueue], headers, ADAP_NORM_RESP_ENTRIES);
  384. queues += ADAP_NORM_RESP_ENTRIES;
  385. headers += 2;
  386. /* host to adapter high priority response queue */
  387. comm->queue[AdapHighRespQueue].base = queues;
  388. aac_queue_init(dev, &comm->queue[AdapHighRespQueue], headers, ADAP_HIGH_RESP_ENTRIES);
  389. comm->queue[AdapNormCmdQueue].lock = comm->queue[HostNormRespQueue].lock;
  390. comm->queue[AdapHighCmdQueue].lock = comm->queue[HostHighRespQueue].lock;
  391. comm->queue[AdapNormRespQueue].lock = comm->queue[HostNormCmdQueue].lock;
  392. comm->queue[AdapHighRespQueue].lock = comm->queue[HostHighCmdQueue].lock;
  393. return 0;
  394. }
  395. void aac_define_int_mode(struct aac_dev *dev)
  396. {
  397. int i, msi_count, min_msix;
  398. msi_count = i = 0;
  399. /* max. vectors from GET_COMM_PREFERRED_SETTINGS */
  400. if (dev->max_msix == 0 ||
  401. dev->pdev->device == PMC_DEVICE_S6 ||
  402. dev->sync_mode) {
  403. dev->max_msix = 1;
  404. dev->vector_cap =
  405. dev->scsi_host_ptr->can_queue +
  406. AAC_NUM_MGT_FIB;
  407. return;
  408. }
  409. /* Don't bother allocating more MSI-X vectors than cpus */
  410. msi_count = min(dev->max_msix,
  411. (unsigned int)num_online_cpus());
  412. dev->max_msix = msi_count;
  413. if (msi_count > AAC_MAX_MSIX)
  414. msi_count = AAC_MAX_MSIX;
  415. if (msi_count > 1 &&
  416. pci_find_capability(dev->pdev, PCI_CAP_ID_MSIX)) {
  417. min_msix = 2;
  418. i = pci_alloc_irq_vectors(dev->pdev,
  419. min_msix, msi_count,
  420. PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
  421. if (i > 0) {
  422. dev->msi_enabled = 1;
  423. msi_count = i;
  424. } else {
  425. dev->msi_enabled = 0;
  426. dev_err(&dev->pdev->dev,
  427. "MSIX not supported!! Will try INTX 0x%x.\n", i);
  428. }
  429. }
  430. if (!dev->msi_enabled)
  431. dev->max_msix = msi_count = 1;
  432. else {
  433. if (dev->max_msix > msi_count)
  434. dev->max_msix = msi_count;
  435. }
  436. if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3 && dev->sa_firmware)
  437. dev->vector_cap = dev->scsi_host_ptr->can_queue +
  438. AAC_NUM_MGT_FIB;
  439. else
  440. dev->vector_cap = (dev->scsi_host_ptr->can_queue +
  441. AAC_NUM_MGT_FIB) / msi_count;
  442. }
  443. struct aac_dev *aac_init_adapter(struct aac_dev *dev)
  444. {
  445. u32 status[5];
  446. struct Scsi_Host * host = dev->scsi_host_ptr;
  447. extern int aac_sync_mode;
  448. /*
  449. * Check the preferred comm settings, defaults from template.
  450. */
  451. dev->management_fib_count = 0;
  452. spin_lock_init(&dev->manage_lock);
  453. spin_lock_init(&dev->sync_lock);
  454. spin_lock_init(&dev->iq_lock);
  455. dev->max_fib_size = sizeof(struct hw_fib);
  456. dev->sg_tablesize = host->sg_tablesize = (dev->max_fib_size
  457. - sizeof(struct aac_fibhdr)
  458. - sizeof(struct aac_write) + sizeof(struct sgentry))
  459. / sizeof(struct sgentry);
  460. dev->comm_interface = AAC_COMM_PRODUCER;
  461. dev->raw_io_interface = dev->raw_io_64 = 0;
  462. /*
  463. * Enable INTX mode, if not done already Enabled
  464. */
  465. if (aac_is_msix_mode(dev)) {
  466. aac_change_to_intx(dev);
  467. dev_info(&dev->pdev->dev, "Changed firmware to INTX mode");
  468. }
  469. if ((!aac_adapter_sync_cmd(dev, GET_ADAPTER_PROPERTIES,
  470. 0, 0, 0, 0, 0, 0,
  471. status+0, status+1, status+2, status+3, status+4)) &&
  472. (status[0] == 0x00000001)) {
  473. dev->doorbell_mask = status[3];
  474. if (status[1] & AAC_OPT_NEW_COMM_64)
  475. dev->raw_io_64 = 1;
  476. dev->sync_mode = aac_sync_mode;
  477. if (dev->a_ops.adapter_comm &&
  478. (status[1] & AAC_OPT_NEW_COMM)) {
  479. dev->comm_interface = AAC_COMM_MESSAGE;
  480. dev->raw_io_interface = 1;
  481. if ((status[1] & AAC_OPT_NEW_COMM_TYPE1)) {
  482. /* driver supports TYPE1 (Tupelo) */
  483. dev->comm_interface = AAC_COMM_MESSAGE_TYPE1;
  484. } else if (status[1] & AAC_OPT_NEW_COMM_TYPE2) {
  485. /* driver supports TYPE2 (Denali, Yosemite) */
  486. dev->comm_interface = AAC_COMM_MESSAGE_TYPE2;
  487. } else if (status[1] & AAC_OPT_NEW_COMM_TYPE3) {
  488. /* driver supports TYPE3 (Yosemite, Thor) */
  489. dev->comm_interface = AAC_COMM_MESSAGE_TYPE3;
  490. } else if (status[1] & AAC_OPT_NEW_COMM_TYPE4) {
  491. /* not supported TYPE - switch to sync. mode */
  492. dev->comm_interface = AAC_COMM_MESSAGE_TYPE2;
  493. dev->sync_mode = 1;
  494. }
  495. }
  496. if ((status[1] & le32_to_cpu(AAC_OPT_EXTENDED)) &&
  497. (status[4] & le32_to_cpu(AAC_EXTOPT_SA_FIRMWARE)))
  498. dev->sa_firmware = 1;
  499. else
  500. dev->sa_firmware = 0;
  501. if (status[4] & le32_to_cpu(AAC_EXTOPT_SOFT_RESET))
  502. dev->soft_reset_support = 1;
  503. else
  504. dev->soft_reset_support = 0;
  505. if ((dev->comm_interface == AAC_COMM_MESSAGE) &&
  506. (status[2] > dev->base_size)) {
  507. aac_adapter_ioremap(dev, 0);
  508. dev->base_size = status[2];
  509. if (aac_adapter_ioremap(dev, status[2])) {
  510. /* remap failed, go back ... */
  511. dev->comm_interface = AAC_COMM_PRODUCER;
  512. if (aac_adapter_ioremap(dev, AAC_MIN_FOOTPRINT_SIZE)) {
  513. printk(KERN_WARNING
  514. "aacraid: unable to map adapter.\n");
  515. return NULL;
  516. }
  517. }
  518. }
  519. }
  520. dev->max_msix = 0;
  521. dev->msi_enabled = 0;
  522. dev->adapter_shutdown = 0;
  523. if ((!aac_adapter_sync_cmd(dev, GET_COMM_PREFERRED_SETTINGS,
  524. 0, 0, 0, 0, 0, 0,
  525. status+0, status+1, status+2, status+3, status+4))
  526. && (status[0] == 0x00000001)) {
  527. /*
  528. * status[1] >> 16 maximum command size in KB
  529. * status[1] & 0xFFFF maximum FIB size
  530. * status[2] >> 16 maximum SG elements to driver
  531. * status[2] & 0xFFFF maximum SG elements from driver
  532. * status[3] & 0xFFFF maximum number FIBs outstanding
  533. */
  534. host->max_sectors = (status[1] >> 16) << 1;
  535. /* Multiple of 32 for PMC */
  536. dev->max_fib_size = status[1] & 0xFFE0;
  537. host->sg_tablesize = status[2] >> 16;
  538. dev->sg_tablesize = status[2] & 0xFFFF;
  539. if (aac_is_src(dev)) {
  540. if (host->can_queue > (status[3] >> 16) -
  541. AAC_NUM_MGT_FIB)
  542. host->can_queue = (status[3] >> 16) -
  543. AAC_NUM_MGT_FIB;
  544. } else if (host->can_queue > (status[3] & 0xFFFF) -
  545. AAC_NUM_MGT_FIB)
  546. host->can_queue = (status[3] & 0xFFFF) -
  547. AAC_NUM_MGT_FIB;
  548. dev->max_num_aif = status[4] & 0xFFFF;
  549. }
  550. if (numacb > 0) {
  551. if (numacb < host->can_queue)
  552. host->can_queue = numacb;
  553. else
  554. pr_warn("numacb=%d ignored\n", numacb);
  555. }
  556. if (aac_is_src(dev))
  557. aac_define_int_mode(dev);
  558. /*
  559. * Ok now init the communication subsystem
  560. */
  561. dev->queues = kzalloc(sizeof(struct aac_queue_block), GFP_KERNEL);
  562. if (dev->queues == NULL) {
  563. printk(KERN_ERR "Error could not allocate comm region.\n");
  564. return NULL;
  565. }
  566. if (aac_comm_init(dev)<0){
  567. kfree(dev->queues);
  568. return NULL;
  569. }
  570. /*
  571. * Initialize the list of fibs
  572. */
  573. if (aac_fib_setup(dev) < 0) {
  574. kfree(dev->queues);
  575. return NULL;
  576. }
  577. INIT_LIST_HEAD(&dev->fib_list);
  578. INIT_LIST_HEAD(&dev->sync_fib_list);
  579. return dev;
  580. }