rtq6752-regulator.c 7.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. #include <linux/bitops.h>
  3. #include <linux/delay.h>
  4. #include <linux/gpio/consumer.h>
  5. #include <linux/i2c.h>
  6. #include <linux/kernel.h>
  7. #include <linux/module.h>
  8. #include <linux/mutex.h>
  9. #include <linux/regmap.h>
  10. #include <linux/regulator/driver.h>
  11. enum {
  12. RTQ6752_IDX_PAVDD = 0,
  13. RTQ6752_IDX_NAVDD = 1,
  14. RTQ6752_IDX_MAX
  15. };
  16. #define RTQ6752_REG_PAVDD 0x00
  17. #define RTQ6752_REG_NAVDD 0x01
  18. #define RTQ6752_REG_PAVDDONDLY 0x07
  19. #define RTQ6752_REG_PAVDDSSTIME 0x08
  20. #define RTQ6752_REG_NAVDDONDLY 0x0D
  21. #define RTQ6752_REG_NAVDDSSTIME 0x0E
  22. #define RTQ6752_REG_OPTION1 0x12
  23. #define RTQ6752_REG_CHSWITCH 0x16
  24. #define RTQ6752_REG_FAULT 0x1D
  25. #define RTQ6752_VOUT_MASK GENMASK(5, 0)
  26. #define RTQ6752_NAVDDEN_MASK BIT(3)
  27. #define RTQ6752_PAVDDEN_MASK BIT(0)
  28. #define RTQ6752_PAVDDAD_MASK BIT(4)
  29. #define RTQ6752_NAVDDAD_MASK BIT(3)
  30. #define RTQ6752_PAVDDF_MASK BIT(3)
  31. #define RTQ6752_NAVDDF_MASK BIT(0)
  32. #define RTQ6752_ENABLE_MASK (BIT(RTQ6752_IDX_MAX) - 1)
  33. #define RTQ6752_VOUT_MINUV 5000000
  34. #define RTQ6752_VOUT_STEPUV 50000
  35. #define RTQ6752_VOUT_NUM 47
  36. #define RTQ6752_I2CRDY_TIMEUS 1000
  37. #define RTQ6752_MINSS_TIMEUS 5000
  38. struct rtq6752_priv {
  39. struct regmap *regmap;
  40. struct gpio_desc *enable_gpio;
  41. struct mutex lock;
  42. unsigned char enable_flag;
  43. };
  44. static int rtq6752_set_vdd_enable(struct regulator_dev *rdev)
  45. {
  46. struct rtq6752_priv *priv = rdev_get_drvdata(rdev);
  47. int rid = rdev_get_id(rdev), ret;
  48. mutex_lock(&priv->lock);
  49. if (!priv->enable_flag) {
  50. if (priv->enable_gpio) {
  51. gpiod_set_value(priv->enable_gpio, 1);
  52. usleep_range(RTQ6752_I2CRDY_TIMEUS,
  53. RTQ6752_I2CRDY_TIMEUS + 100);
  54. }
  55. regcache_cache_only(priv->regmap, false);
  56. ret = regcache_sync(priv->regmap);
  57. if (ret) {
  58. mutex_unlock(&priv->lock);
  59. return ret;
  60. }
  61. }
  62. priv->enable_flag |= BIT(rid);
  63. mutex_unlock(&priv->lock);
  64. return regulator_enable_regmap(rdev);
  65. }
  66. static int rtq6752_set_vdd_disable(struct regulator_dev *rdev)
  67. {
  68. struct rtq6752_priv *priv = rdev_get_drvdata(rdev);
  69. int rid = rdev_get_id(rdev), ret;
  70. ret = regulator_disable_regmap(rdev);
  71. if (ret)
  72. return ret;
  73. mutex_lock(&priv->lock);
  74. priv->enable_flag &= ~BIT(rid);
  75. if (!priv->enable_flag) {
  76. regcache_cache_only(priv->regmap, true);
  77. regcache_mark_dirty(priv->regmap);
  78. if (priv->enable_gpio)
  79. gpiod_set_value(priv->enable_gpio, 0);
  80. }
  81. mutex_unlock(&priv->lock);
  82. return 0;
  83. }
  84. static int rtq6752_get_error_flags(struct regulator_dev *rdev,
  85. unsigned int *flags)
  86. {
  87. unsigned int val, events = 0;
  88. const unsigned int fault_mask[] = {
  89. RTQ6752_PAVDDF_MASK, RTQ6752_NAVDDF_MASK };
  90. int rid = rdev_get_id(rdev), ret;
  91. ret = regmap_read(rdev->regmap, RTQ6752_REG_FAULT, &val);
  92. if (ret)
  93. return ret;
  94. if (val & fault_mask[rid])
  95. events = REGULATOR_ERROR_REGULATION_OUT;
  96. *flags = events;
  97. return 0;
  98. }
  99. static const struct regulator_ops rtq6752_regulator_ops = {
  100. .list_voltage = regulator_list_voltage_linear,
  101. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  102. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  103. .enable = rtq6752_set_vdd_enable,
  104. .disable = rtq6752_set_vdd_disable,
  105. .is_enabled = regulator_is_enabled_regmap,
  106. .set_active_discharge = regulator_set_active_discharge_regmap,
  107. .get_error_flags = rtq6752_get_error_flags,
  108. };
  109. static const struct regulator_desc rtq6752_regulator_descs[] = {
  110. {
  111. .name = "rtq6752-pavdd",
  112. .of_match = of_match_ptr("pavdd"),
  113. .regulators_node = of_match_ptr("regulators"),
  114. .id = RTQ6752_IDX_PAVDD,
  115. .n_voltages = RTQ6752_VOUT_NUM,
  116. .ops = &rtq6752_regulator_ops,
  117. .owner = THIS_MODULE,
  118. .min_uV = RTQ6752_VOUT_MINUV,
  119. .uV_step = RTQ6752_VOUT_STEPUV,
  120. .enable_time = RTQ6752_MINSS_TIMEUS,
  121. .vsel_reg = RTQ6752_REG_PAVDD,
  122. .vsel_mask = RTQ6752_VOUT_MASK,
  123. .enable_reg = RTQ6752_REG_CHSWITCH,
  124. .enable_mask = RTQ6752_PAVDDEN_MASK,
  125. .active_discharge_reg = RTQ6752_REG_OPTION1,
  126. .active_discharge_mask = RTQ6752_PAVDDAD_MASK,
  127. .active_discharge_off = RTQ6752_PAVDDAD_MASK,
  128. },
  129. {
  130. .name = "rtq6752-navdd",
  131. .of_match = of_match_ptr("navdd"),
  132. .regulators_node = of_match_ptr("regulators"),
  133. .id = RTQ6752_IDX_NAVDD,
  134. .n_voltages = RTQ6752_VOUT_NUM,
  135. .ops = &rtq6752_regulator_ops,
  136. .owner = THIS_MODULE,
  137. .min_uV = RTQ6752_VOUT_MINUV,
  138. .uV_step = RTQ6752_VOUT_STEPUV,
  139. .enable_time = RTQ6752_MINSS_TIMEUS,
  140. .vsel_reg = RTQ6752_REG_NAVDD,
  141. .vsel_mask = RTQ6752_VOUT_MASK,
  142. .enable_reg = RTQ6752_REG_CHSWITCH,
  143. .enable_mask = RTQ6752_NAVDDEN_MASK,
  144. .active_discharge_reg = RTQ6752_REG_OPTION1,
  145. .active_discharge_mask = RTQ6752_NAVDDAD_MASK,
  146. .active_discharge_off = RTQ6752_NAVDDAD_MASK,
  147. }
  148. };
  149. static int rtq6752_init_device_properties(struct rtq6752_priv *priv)
  150. {
  151. u8 raw_vals[] = { 0, 0 };
  152. int ret;
  153. /* Configure PAVDD on and softstart delay time to the minimum */
  154. ret = regmap_raw_write(priv->regmap, RTQ6752_REG_PAVDDONDLY, raw_vals,
  155. ARRAY_SIZE(raw_vals));
  156. if (ret)
  157. return ret;
  158. /* Configure NAVDD on and softstart delay time to the minimum */
  159. return regmap_raw_write(priv->regmap, RTQ6752_REG_NAVDDONDLY, raw_vals,
  160. ARRAY_SIZE(raw_vals));
  161. }
  162. static bool rtq6752_is_volatile_reg(struct device *dev, unsigned int reg)
  163. {
  164. if (reg == RTQ6752_REG_FAULT)
  165. return true;
  166. return false;
  167. }
  168. static const struct reg_default rtq6752_reg_defaults[] = {
  169. { RTQ6752_REG_PAVDD, 0x14 },
  170. { RTQ6752_REG_NAVDD, 0x14 },
  171. { RTQ6752_REG_PAVDDONDLY, 0x01 },
  172. { RTQ6752_REG_PAVDDSSTIME, 0x01 },
  173. { RTQ6752_REG_NAVDDONDLY, 0x01 },
  174. { RTQ6752_REG_NAVDDSSTIME, 0x01 },
  175. { RTQ6752_REG_OPTION1, 0x07 },
  176. { RTQ6752_REG_CHSWITCH, 0x29 },
  177. };
  178. static const struct regmap_config rtq6752_regmap_config = {
  179. .reg_bits = 8,
  180. .val_bits = 8,
  181. .cache_type = REGCACHE_RBTREE,
  182. .max_register = RTQ6752_REG_FAULT,
  183. .reg_defaults = rtq6752_reg_defaults,
  184. .num_reg_defaults = ARRAY_SIZE(rtq6752_reg_defaults),
  185. .volatile_reg = rtq6752_is_volatile_reg,
  186. };
  187. static int rtq6752_probe(struct i2c_client *i2c)
  188. {
  189. struct rtq6752_priv *priv;
  190. struct regulator_config reg_cfg = {};
  191. struct regulator_dev *rdev;
  192. int i, ret;
  193. priv = devm_kzalloc(&i2c->dev, sizeof(*priv), GFP_KERNEL);
  194. if (!priv)
  195. return -ENOMEM;
  196. mutex_init(&priv->lock);
  197. priv->enable_gpio = devm_gpiod_get_optional(&i2c->dev, "enable",
  198. GPIOD_OUT_HIGH);
  199. if (IS_ERR(priv->enable_gpio)) {
  200. dev_err(&i2c->dev, "Failed to get 'enable' gpio\n");
  201. return PTR_ERR(priv->enable_gpio);
  202. }
  203. usleep_range(RTQ6752_I2CRDY_TIMEUS, RTQ6752_I2CRDY_TIMEUS + 100);
  204. /* Default EN pin to high, PAVDD and NAVDD will be on */
  205. priv->enable_flag = RTQ6752_ENABLE_MASK;
  206. priv->regmap = devm_regmap_init_i2c(i2c, &rtq6752_regmap_config);
  207. if (IS_ERR(priv->regmap)) {
  208. dev_err(&i2c->dev, "Failed to init regmap\n");
  209. return PTR_ERR(priv->regmap);
  210. }
  211. ret = rtq6752_init_device_properties(priv);
  212. if (ret) {
  213. dev_err(&i2c->dev, "Failed to init device properties\n");
  214. return ret;
  215. }
  216. reg_cfg.dev = &i2c->dev;
  217. reg_cfg.regmap = priv->regmap;
  218. reg_cfg.driver_data = priv;
  219. for (i = 0; i < ARRAY_SIZE(rtq6752_regulator_descs); i++) {
  220. rdev = devm_regulator_register(&i2c->dev,
  221. rtq6752_regulator_descs + i,
  222. &reg_cfg);
  223. if (IS_ERR(rdev)) {
  224. dev_err(&i2c->dev, "Failed to init %d regulator\n", i);
  225. return PTR_ERR(rdev);
  226. }
  227. }
  228. return 0;
  229. }
  230. static const struct of_device_id __maybe_unused rtq6752_device_table[] = {
  231. { .compatible = "richtek,rtq6752", },
  232. {}
  233. };
  234. MODULE_DEVICE_TABLE(of, rtq6752_device_table);
  235. static struct i2c_driver rtq6752_driver = {
  236. .driver = {
  237. .name = "rtq6752",
  238. .of_match_table = rtq6752_device_table,
  239. },
  240. .probe_new = rtq6752_probe,
  241. };
  242. module_i2c_driver(rtq6752_driver);
  243. MODULE_AUTHOR("ChiYuan Huang <[email protected]>");
  244. MODULE_DESCRIPTION("Richtek RTQ6752 Regulator Driver");
  245. MODULE_LICENSE("GPL v2");