mt6332-regulator.c 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // Copyright (c) 2022 Collabora Ltd.
  4. // Author: AngeloGioacchino Del Regno <[email protected]>
  5. //
  6. // Based on mt6323-regulator.c,
  7. // Copyright (c) 2016 MediaTek Inc.
  8. //
  9. #include <linux/module.h>
  10. #include <linux/of.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/regmap.h>
  13. #include <linux/mfd/mt6397/core.h>
  14. #include <linux/mfd/mt6332/registers.h>
  15. #include <linux/regulator/driver.h>
  16. #include <linux/regulator/machine.h>
  17. #include <linux/regulator/mt6332-regulator.h>
  18. #include <linux/regulator/of_regulator.h>
  19. #define MT6332_LDO_MODE_NORMAL 0
  20. #define MT6332_LDO_MODE_LP 1
  21. /*
  22. * MT6332 regulators information
  23. *
  24. * @desc: standard fields of regulator description.
  25. * @qi: Mask for query enable signal status of regulators
  26. * @vselon_reg: Register sections for hardware control mode of bucks
  27. * @vselctrl_reg: Register for controlling the buck control mode.
  28. * @vselctrl_mask: Mask for query buck's voltage control mode.
  29. * @status_reg: Register for regulator enable status where qi unavailable
  30. * @status_mask: Mask for querying regulator enable status
  31. */
  32. struct mt6332_regulator_info {
  33. struct regulator_desc desc;
  34. u32 qi;
  35. u32 vselon_reg;
  36. u32 vselctrl_reg;
  37. u32 vselctrl_mask;
  38. u32 modeset_reg;
  39. u32 modeset_mask;
  40. u32 status_reg;
  41. u32 status_mask;
  42. };
  43. #define MT6332_BUCK(match, vreg, min, max, step, volt_ranges, enreg, \
  44. vosel, vosel_mask, voselon, vosel_ctrl) \
  45. [MT6332_ID_##vreg] = { \
  46. .desc = { \
  47. .name = #vreg, \
  48. .of_match = of_match_ptr(match), \
  49. .ops = &mt6332_buck_volt_range_ops, \
  50. .type = REGULATOR_VOLTAGE, \
  51. .id = MT6332_ID_##vreg, \
  52. .owner = THIS_MODULE, \
  53. .n_voltages = (max - min)/step + 1, \
  54. .linear_ranges = volt_ranges, \
  55. .n_linear_ranges = ARRAY_SIZE(volt_ranges), \
  56. .vsel_reg = vosel, \
  57. .vsel_mask = vosel_mask, \
  58. .enable_reg = enreg, \
  59. .enable_mask = BIT(0), \
  60. }, \
  61. .qi = BIT(13), \
  62. .vselon_reg = voselon, \
  63. .vselctrl_reg = vosel_ctrl, \
  64. .vselctrl_mask = BIT(1), \
  65. .status_mask = 0, \
  66. }
  67. #define MT6332_LDO_LINEAR(match, vreg, min, max, step, volt_ranges, \
  68. enreg, vosel, vosel_mask, voselon, \
  69. vosel_ctrl, _modeset_reg, _modeset_mask) \
  70. [MT6332_ID_##vreg] = { \
  71. .desc = { \
  72. .name = #vreg, \
  73. .of_match = of_match_ptr(match), \
  74. .ops = &mt6332_ldo_volt_range_ops, \
  75. .type = REGULATOR_VOLTAGE, \
  76. .id = MT6332_ID_##vreg, \
  77. .owner = THIS_MODULE, \
  78. .n_voltages = (max - min)/step + 1, \
  79. .linear_ranges = volt_ranges, \
  80. .n_linear_ranges = ARRAY_SIZE(volt_ranges), \
  81. .vsel_reg = vosel, \
  82. .vsel_mask = vosel_mask, \
  83. .enable_reg = enreg, \
  84. .enable_mask = BIT(0), \
  85. }, \
  86. .qi = BIT(15), \
  87. .vselon_reg = voselon, \
  88. .vselctrl_reg = vosel_ctrl, \
  89. .vselctrl_mask = BIT(1), \
  90. .modeset_reg = _modeset_reg, \
  91. .modeset_mask = _modeset_mask, \
  92. .status_mask = 0, \
  93. }
  94. #define MT6332_LDO_AO(match, vreg, ldo_volt_table, vosel, vosel_mask) \
  95. [MT6332_ID_##vreg] = { \
  96. .desc = { \
  97. .name = #vreg, \
  98. .of_match = of_match_ptr(match), \
  99. .ops = &mt6332_volt_table_ao_ops, \
  100. .type = REGULATOR_VOLTAGE, \
  101. .id = MT6332_ID_##vreg, \
  102. .owner = THIS_MODULE, \
  103. .n_voltages = ARRAY_SIZE(ldo_volt_table), \
  104. .volt_table = ldo_volt_table, \
  105. .vsel_reg = vosel, \
  106. .vsel_mask = vosel_mask, \
  107. }, \
  108. }
  109. #define MT6332_LDO(match, vreg, ldo_volt_table, enreg, enbit, vosel, \
  110. vosel_mask, _modeset_reg, _modeset_mask) \
  111. [MT6332_ID_##vreg] = { \
  112. .desc = { \
  113. .name = #vreg, \
  114. .of_match = of_match_ptr(match), \
  115. .ops = &mt6332_volt_table_ops, \
  116. .type = REGULATOR_VOLTAGE, \
  117. .id = MT6332_ID_##vreg, \
  118. .owner = THIS_MODULE, \
  119. .n_voltages = ARRAY_SIZE(ldo_volt_table), \
  120. .volt_table = ldo_volt_table, \
  121. .vsel_reg = vosel, \
  122. .vsel_mask = vosel_mask, \
  123. .enable_reg = enreg, \
  124. .enable_mask = BIT(enbit), \
  125. }, \
  126. .qi = BIT(15), \
  127. .modeset_reg = _modeset_reg, \
  128. .modeset_mask = _modeset_mask, \
  129. .status_mask = 0, \
  130. }
  131. #define MT6332_REG_FIXED(match, vreg, enreg, enbit, qibit, volt, stbit) \
  132. [MT6332_ID_##vreg] = { \
  133. .desc = { \
  134. .name = #vreg, \
  135. .of_match = of_match_ptr(match), \
  136. .ops = &mt6332_volt_fixed_ops, \
  137. .type = REGULATOR_VOLTAGE, \
  138. .id = MT6332_ID_##vreg, \
  139. .owner = THIS_MODULE, \
  140. .n_voltages = 1, \
  141. .enable_reg = enreg, \
  142. .enable_mask = BIT(enbit), \
  143. .min_uV = volt, \
  144. }, \
  145. .qi = BIT(qibit), \
  146. .status_reg = MT6332_EN_STATUS0, \
  147. .status_mask = BIT(stbit), \
  148. }
  149. static const struct linear_range boost_volt_range[] = {
  150. REGULATOR_LINEAR_RANGE(3500000, 0, 0x7f, 31250),
  151. };
  152. static const struct linear_range buck_volt_range[] = {
  153. REGULATOR_LINEAR_RANGE(700000, 0, 0x7f, 6250),
  154. };
  155. static const struct linear_range buck_pa_volt_range[] = {
  156. REGULATOR_LINEAR_RANGE(500000, 0, 0x3f, 50000),
  157. };
  158. static const struct linear_range buck_rf_volt_range[] = {
  159. REGULATOR_LINEAR_RANGE(1050000, 0, 0x7f, 9375),
  160. };
  161. static const unsigned int ldo_volt_table1[] = {
  162. 2800000, 3000000, 0, 3200000
  163. };
  164. static const unsigned int ldo_volt_table2[] = {
  165. 1200000, 1300000, 1400000, 1500000, 1600000, 1700000, 1800000, 1800000,
  166. };
  167. static int mt6332_get_status(struct regulator_dev *rdev)
  168. {
  169. struct mt6332_regulator_info *info = rdev_get_drvdata(rdev);
  170. u32 reg, en_mask, regval;
  171. int ret;
  172. if (info->qi > 0) {
  173. reg = info->desc.enable_reg;
  174. en_mask = info->qi;
  175. } else {
  176. reg = info->status_reg;
  177. en_mask = info->status_mask;
  178. }
  179. ret = regmap_read(rdev->regmap, reg, &regval);
  180. if (ret != 0) {
  181. dev_err(&rdev->dev, "Failed to get enable reg: %d\n", ret);
  182. return ret;
  183. }
  184. return (regval & en_mask) ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF;
  185. }
  186. static int mt6332_ldo_set_mode(struct regulator_dev *rdev, unsigned int mode)
  187. {
  188. struct mt6332_regulator_info *info = rdev_get_drvdata(rdev);
  189. int val;
  190. switch (mode) {
  191. case REGULATOR_MODE_STANDBY:
  192. val = MT6332_LDO_MODE_LP;
  193. break;
  194. case REGULATOR_MODE_NORMAL:
  195. val = MT6332_LDO_MODE_NORMAL;
  196. break;
  197. default:
  198. return -EINVAL;
  199. }
  200. val <<= ffs(info->modeset_mask) - 1;
  201. return regmap_update_bits(rdev->regmap, info->modeset_reg,
  202. info->modeset_mask, val);
  203. }
  204. static unsigned int mt6332_ldo_get_mode(struct regulator_dev *rdev)
  205. {
  206. struct mt6332_regulator_info *info = rdev_get_drvdata(rdev);
  207. unsigned int val;
  208. int ret;
  209. ret = regmap_read(rdev->regmap, info->modeset_reg, &val);
  210. if (ret < 0)
  211. return ret;
  212. val &= info->modeset_mask;
  213. val >>= ffs(info->modeset_mask) - 1;
  214. return (val & BIT(0)) ? REGULATOR_MODE_STANDBY : REGULATOR_MODE_NORMAL;
  215. }
  216. static const struct regulator_ops mt6332_buck_volt_range_ops = {
  217. .list_voltage = regulator_list_voltage_linear_range,
  218. .map_voltage = regulator_map_voltage_linear_range,
  219. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  220. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  221. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  222. .enable = regulator_enable_regmap,
  223. .disable = regulator_disable_regmap,
  224. .is_enabled = regulator_is_enabled_regmap,
  225. .get_status = mt6332_get_status,
  226. };
  227. static const struct regulator_ops mt6332_ldo_volt_range_ops = {
  228. .list_voltage = regulator_list_voltage_linear_range,
  229. .map_voltage = regulator_map_voltage_linear_range,
  230. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  231. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  232. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  233. .enable = regulator_enable_regmap,
  234. .disable = regulator_disable_regmap,
  235. .is_enabled = regulator_is_enabled_regmap,
  236. .get_status = mt6332_get_status,
  237. .set_mode = mt6332_ldo_set_mode,
  238. .get_mode = mt6332_ldo_get_mode,
  239. };
  240. static const struct regulator_ops mt6332_volt_table_ops = {
  241. .list_voltage = regulator_list_voltage_table,
  242. .map_voltage = regulator_map_voltage_iterate,
  243. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  244. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  245. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  246. .enable = regulator_enable_regmap,
  247. .disable = regulator_disable_regmap,
  248. .is_enabled = regulator_is_enabled_regmap,
  249. .get_status = mt6332_get_status,
  250. .set_mode = mt6332_ldo_set_mode,
  251. .get_mode = mt6332_ldo_get_mode,
  252. };
  253. static const struct regulator_ops mt6332_volt_table_ao_ops = {
  254. .list_voltage = regulator_list_voltage_table,
  255. .map_voltage = regulator_map_voltage_iterate,
  256. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  257. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  258. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  259. };
  260. static const struct regulator_ops mt6332_volt_fixed_ops = {
  261. .list_voltage = regulator_list_voltage_linear,
  262. .enable = regulator_enable_regmap,
  263. .disable = regulator_disable_regmap,
  264. .is_enabled = regulator_is_enabled_regmap,
  265. .get_status = mt6332_get_status,
  266. };
  267. /* The array is indexed by id(MT6332_ID_XXX) */
  268. static struct mt6332_regulator_info mt6332_regulators[] = {
  269. MT6332_BUCK("buck-vdram", VDRAM, 700000, 1493750, 6250, buck_volt_range,
  270. MT6332_EN_STATUS0, MT6332_VDRAM_CON11, GENMASK(6, 0),
  271. MT6332_VDRAM_CON12, MT6332_VDRAM_CON7),
  272. MT6332_BUCK("buck-vdvfs2", VDVFS2, 700000, 1312500, 6250, buck_volt_range,
  273. MT6332_VDVFS2_CON9, MT6332_VDVFS2_CON11, GENMASK(6, 0),
  274. MT6332_VDVFS2_CON12, MT6332_VDVFS2_CON7),
  275. MT6332_BUCK("buck-vpa", VPA, 500000, 3400000, 50000, buck_pa_volt_range,
  276. MT6332_VPA_CON9, MT6332_VPA_CON11, GENMASK(5, 0),
  277. MT6332_VPA_CON12, MT6332_VPA_CON7),
  278. MT6332_BUCK("buck-vrf18a", VRF1, 1050000, 2240625, 9375, buck_rf_volt_range,
  279. MT6332_VRF1_CON9, MT6332_VRF1_CON11, GENMASK(6, 0),
  280. MT6332_VRF1_CON12, MT6332_VRF1_CON7),
  281. MT6332_BUCK("buck-vrf18b", VRF2, 1050000, 2240625, 9375, buck_rf_volt_range,
  282. MT6332_VRF2_CON9, MT6332_VRF2_CON11, GENMASK(6, 0),
  283. MT6332_VRF2_CON12, MT6332_VRF2_CON7),
  284. MT6332_BUCK("buck-vsbst", VSBST, 3500000, 7468750, 31250, boost_volt_range,
  285. MT6332_VSBST_CON8, MT6332_VSBST_CON12, GENMASK(6, 0),
  286. MT6332_VSBST_CON13, MT6332_VSBST_CON8),
  287. MT6332_LDO("ldo-vauxb32", VAUXB32, ldo_volt_table1, MT6332_LDO_CON1, 10,
  288. MT6332_LDO_CON9, GENMASK(6, 5), MT6332_LDO_CON1, GENMASK(1, 0)),
  289. MT6332_REG_FIXED("ldo-vbif28", VBIF28, MT6332_LDO_CON2, 10, 0, 2800000, 1),
  290. MT6332_REG_FIXED("ldo-vusb33", VUSB33, MT6332_LDO_CON3, 10, 0, 3300000, 2),
  291. MT6332_LDO_LINEAR("ldo-vsram", VSRAM_DVFS2, 700000, 1493750, 6250, buck_volt_range,
  292. MT6332_EN_STATUS0, MT6332_LDO_CON8, GENMASK(15, 9),
  293. MT6332_VDVFS2_CON23, MT6332_VDVFS2_CON22,
  294. MT6332_LDO_CON5, GENMASK(1, 0)),
  295. MT6332_LDO_AO("ldo-vdig18", VDIG18, ldo_volt_table2, MT6332_LDO_CON12, GENMASK(11, 9)),
  296. };
  297. static int mt6332_set_buck_vosel_reg(struct platform_device *pdev)
  298. {
  299. struct mt6397_chip *mt6332 = dev_get_drvdata(pdev->dev.parent);
  300. int i;
  301. u32 regval;
  302. for (i = 0; i < MT6332_ID_VREG_MAX; i++) {
  303. if (mt6332_regulators[i].vselctrl_reg) {
  304. if (regmap_read(mt6332->regmap,
  305. mt6332_regulators[i].vselctrl_reg,
  306. &regval) < 0) {
  307. dev_err(&pdev->dev,
  308. "Failed to read buck ctrl\n");
  309. return -EIO;
  310. }
  311. if (regval & mt6332_regulators[i].vselctrl_mask) {
  312. mt6332_regulators[i].desc.vsel_reg =
  313. mt6332_regulators[i].vselon_reg;
  314. }
  315. }
  316. }
  317. return 0;
  318. }
  319. static int mt6332_regulator_probe(struct platform_device *pdev)
  320. {
  321. struct mt6397_chip *mt6332 = dev_get_drvdata(pdev->dev.parent);
  322. struct regulator_config config = {};
  323. struct regulator_dev *rdev;
  324. int i;
  325. u32 reg_value;
  326. /* Query buck controller to select activated voltage register part */
  327. if (mt6332_set_buck_vosel_reg(pdev))
  328. return -EIO;
  329. /* Read PMIC chip revision to update constraints and voltage table */
  330. if (regmap_read(mt6332->regmap, MT6332_HWCID, &reg_value) < 0) {
  331. dev_err(&pdev->dev, "Failed to read Chip ID\n");
  332. return -EIO;
  333. }
  334. reg_value &= GENMASK(7, 0);
  335. dev_info(&pdev->dev, "Chip ID = 0x%x\n", reg_value);
  336. /*
  337. * ChipID 0x10 is "MT6332 E1", has a different voltage table and
  338. * it's currently not supported in this driver. Upon detection of
  339. * this ID, refuse to register the regulators, as we will wrongly
  340. * interpret the VSEL for this revision, potentially overvolting
  341. * some device.
  342. */
  343. if (reg_value == 0x10) {
  344. dev_err(&pdev->dev, "Chip version not supported. Bailing out.\n");
  345. return -EINVAL;
  346. }
  347. for (i = 0; i < MT6332_ID_VREG_MAX; i++) {
  348. config.dev = &pdev->dev;
  349. config.driver_data = &mt6332_regulators[i];
  350. config.regmap = mt6332->regmap;
  351. rdev = devm_regulator_register(&pdev->dev,
  352. &mt6332_regulators[i].desc, &config);
  353. if (IS_ERR(rdev)) {
  354. dev_err(&pdev->dev, "failed to register %s\n",
  355. mt6332_regulators[i].desc.name);
  356. return PTR_ERR(rdev);
  357. }
  358. }
  359. return 0;
  360. }
  361. static const struct platform_device_id mt6332_platform_ids[] = {
  362. {"mt6332-regulator", 0},
  363. { /* sentinel */ },
  364. };
  365. MODULE_DEVICE_TABLE(platform, mt6332_platform_ids);
  366. static struct platform_driver mt6332_regulator_driver = {
  367. .driver = {
  368. .name = "mt6332-regulator",
  369. },
  370. .probe = mt6332_regulator_probe,
  371. .id_table = mt6332_platform_ids,
  372. };
  373. module_platform_driver(mt6332_regulator_driver);
  374. MODULE_AUTHOR("AngeloGioacchino Del Regno <[email protected]>");
  375. MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6332 PMIC");
  376. MODULE_LICENSE("GPL");