goldfish_pipe.c 26 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2012 Intel, Inc.
  4. * Copyright (C) 2013 Intel, Inc.
  5. * Copyright (C) 2014 Linaro Limited
  6. * Copyright (C) 2011-2016 Google, Inc.
  7. *
  8. * This software is licensed under the terms of the GNU General Public
  9. * License version 2, as published by the Free Software Foundation, and
  10. * may be copied, distributed, and modified under those terms.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. */
  18. /* This source file contains the implementation of a special device driver
  19. * that intends to provide a *very* fast communication channel between the
  20. * guest system and the QEMU emulator.
  21. *
  22. * Usage from the guest is simply the following (error handling simplified):
  23. *
  24. * int fd = open("/dev/qemu_pipe",O_RDWR);
  25. * .... write() or read() through the pipe.
  26. *
  27. * This driver doesn't deal with the exact protocol used during the session.
  28. * It is intended to be as simple as something like:
  29. *
  30. * // do this _just_ after opening the fd to connect to a specific
  31. * // emulator service.
  32. * const char* msg = "<pipename>";
  33. * if (write(fd, msg, strlen(msg)+1) < 0) {
  34. * ... could not connect to <pipename> service
  35. * close(fd);
  36. * }
  37. *
  38. * // after this, simply read() and write() to communicate with the
  39. * // service. Exact protocol details left as an exercise to the reader.
  40. *
  41. * This driver is very fast because it doesn't copy any data through
  42. * intermediate buffers, since the emulator is capable of translating
  43. * guest user addresses into host ones.
  44. *
  45. * Note that we must however ensure that each user page involved in the
  46. * exchange is properly mapped during a transfer.
  47. */
  48. #include <linux/module.h>
  49. #include <linux/mod_devicetable.h>
  50. #include <linux/interrupt.h>
  51. #include <linux/kernel.h>
  52. #include <linux/spinlock.h>
  53. #include <linux/miscdevice.h>
  54. #include <linux/platform_device.h>
  55. #include <linux/poll.h>
  56. #include <linux/sched.h>
  57. #include <linux/bitops.h>
  58. #include <linux/slab.h>
  59. #include <linux/io.h>
  60. #include <linux/dma-mapping.h>
  61. #include <linux/mm.h>
  62. #include <linux/acpi.h>
  63. #include <linux/bug.h>
  64. #include "goldfish_pipe_qemu.h"
  65. /*
  66. * Update this when something changes in the driver's behavior so the host
  67. * can benefit from knowing it
  68. */
  69. enum {
  70. PIPE_DRIVER_VERSION = 2,
  71. PIPE_CURRENT_DEVICE_VERSION = 2
  72. };
  73. enum {
  74. MAX_BUFFERS_PER_COMMAND = 336,
  75. MAX_SIGNALLED_PIPES = 64,
  76. INITIAL_PIPES_CAPACITY = 64
  77. };
  78. struct goldfish_pipe_dev;
  79. /* A per-pipe command structure, shared with the host */
  80. struct goldfish_pipe_command {
  81. s32 cmd; /* PipeCmdCode, guest -> host */
  82. s32 id; /* pipe id, guest -> host */
  83. s32 status; /* command execution status, host -> guest */
  84. s32 reserved; /* to pad to 64-bit boundary */
  85. union {
  86. /* Parameters for PIPE_CMD_{READ,WRITE} */
  87. struct {
  88. /* number of buffers, guest -> host */
  89. u32 buffers_count;
  90. /* number of consumed bytes, host -> guest */
  91. s32 consumed_size;
  92. /* buffer pointers, guest -> host */
  93. u64 ptrs[MAX_BUFFERS_PER_COMMAND];
  94. /* buffer sizes, guest -> host */
  95. u32 sizes[MAX_BUFFERS_PER_COMMAND];
  96. } rw_params;
  97. };
  98. };
  99. /* A single signalled pipe information */
  100. struct signalled_pipe_buffer {
  101. u32 id;
  102. u32 flags;
  103. };
  104. /* Parameters for the PIPE_CMD_OPEN command */
  105. struct open_command_param {
  106. u64 command_buffer_ptr;
  107. u32 rw_params_max_count;
  108. };
  109. /* Device-level set of buffers shared with the host */
  110. struct goldfish_pipe_dev_buffers {
  111. struct open_command_param open_command_params;
  112. struct signalled_pipe_buffer
  113. signalled_pipe_buffers[MAX_SIGNALLED_PIPES];
  114. };
  115. /* This data type models a given pipe instance */
  116. struct goldfish_pipe {
  117. /* pipe ID - index into goldfish_pipe_dev::pipes array */
  118. u32 id;
  119. /* The wake flags pipe is waiting for
  120. * Note: not protected with any lock, uses atomic operations
  121. * and barriers to make it thread-safe.
  122. */
  123. unsigned long flags;
  124. /* wake flags host have signalled,
  125. * - protected by goldfish_pipe_dev::lock
  126. */
  127. unsigned long signalled_flags;
  128. /* A pointer to command buffer */
  129. struct goldfish_pipe_command *command_buffer;
  130. /* doubly linked list of signalled pipes, protected by
  131. * goldfish_pipe_dev::lock
  132. */
  133. struct goldfish_pipe *prev_signalled;
  134. struct goldfish_pipe *next_signalled;
  135. /*
  136. * A pipe's own lock. Protects the following:
  137. * - *command_buffer - makes sure a command can safely write its
  138. * parameters to the host and read the results back.
  139. */
  140. struct mutex lock;
  141. /* A wake queue for sleeping until host signals an event */
  142. wait_queue_head_t wake_queue;
  143. /* Pointer to the parent goldfish_pipe_dev instance */
  144. struct goldfish_pipe_dev *dev;
  145. /* A buffer of pages, too large to fit into a stack frame */
  146. struct page *pages[MAX_BUFFERS_PER_COMMAND];
  147. };
  148. /* The global driver data. Holds a reference to the i/o page used to
  149. * communicate with the emulator, and a wake queue for blocked tasks
  150. * waiting to be awoken.
  151. */
  152. struct goldfish_pipe_dev {
  153. /* A magic number to check if this is an instance of this struct */
  154. void *magic;
  155. /*
  156. * Global device spinlock. Protects the following members:
  157. * - pipes, pipes_capacity
  158. * - [*pipes, *pipes + pipes_capacity) - array data
  159. * - first_signalled_pipe,
  160. * goldfish_pipe::prev_signalled,
  161. * goldfish_pipe::next_signalled,
  162. * goldfish_pipe::signalled_flags - all singnalled-related fields,
  163. * in all allocated pipes
  164. * - open_command_params - PIPE_CMD_OPEN-related buffers
  165. *
  166. * It looks like a lot of different fields, but the trick is that
  167. * the only operation that happens often is the signalled pipes array
  168. * manipulation. That's why it's OK for now to keep the rest of the
  169. * fields under the same lock. If we notice too much contention because
  170. * of PIPE_CMD_OPEN, then we should add a separate lock there.
  171. */
  172. spinlock_t lock;
  173. /*
  174. * Array of the pipes of |pipes_capacity| elements,
  175. * indexed by goldfish_pipe::id
  176. */
  177. struct goldfish_pipe **pipes;
  178. u32 pipes_capacity;
  179. /* Pointers to the buffers host uses for interaction with this driver */
  180. struct goldfish_pipe_dev_buffers *buffers;
  181. /* Head of a doubly linked list of signalled pipes */
  182. struct goldfish_pipe *first_signalled_pipe;
  183. /* ptr to platform device's device struct */
  184. struct device *pdev_dev;
  185. /* Some device-specific data */
  186. int irq;
  187. int version;
  188. unsigned char __iomem *base;
  189. struct miscdevice miscdev;
  190. };
  191. static int goldfish_pipe_cmd_locked(struct goldfish_pipe *pipe,
  192. enum PipeCmdCode cmd)
  193. {
  194. pipe->command_buffer->cmd = cmd;
  195. /* failure by default */
  196. pipe->command_buffer->status = PIPE_ERROR_INVAL;
  197. writel(pipe->id, pipe->dev->base + PIPE_REG_CMD);
  198. return pipe->command_buffer->status;
  199. }
  200. static int goldfish_pipe_cmd(struct goldfish_pipe *pipe, enum PipeCmdCode cmd)
  201. {
  202. int status;
  203. if (mutex_lock_interruptible(&pipe->lock))
  204. return PIPE_ERROR_IO;
  205. status = goldfish_pipe_cmd_locked(pipe, cmd);
  206. mutex_unlock(&pipe->lock);
  207. return status;
  208. }
  209. /*
  210. * This function converts an error code returned by the emulator through
  211. * the PIPE_REG_STATUS i/o register into a valid negative errno value.
  212. */
  213. static int goldfish_pipe_error_convert(int status)
  214. {
  215. switch (status) {
  216. case PIPE_ERROR_AGAIN:
  217. return -EAGAIN;
  218. case PIPE_ERROR_NOMEM:
  219. return -ENOMEM;
  220. case PIPE_ERROR_IO:
  221. return -EIO;
  222. default:
  223. return -EINVAL;
  224. }
  225. }
  226. static int goldfish_pin_pages(unsigned long first_page,
  227. unsigned long last_page,
  228. unsigned int last_page_size,
  229. int is_write,
  230. struct page *pages[MAX_BUFFERS_PER_COMMAND],
  231. unsigned int *iter_last_page_size)
  232. {
  233. int ret;
  234. int requested_pages = ((last_page - first_page) >> PAGE_SHIFT) + 1;
  235. if (requested_pages > MAX_BUFFERS_PER_COMMAND) {
  236. requested_pages = MAX_BUFFERS_PER_COMMAND;
  237. *iter_last_page_size = PAGE_SIZE;
  238. } else {
  239. *iter_last_page_size = last_page_size;
  240. }
  241. ret = pin_user_pages_fast(first_page, requested_pages,
  242. !is_write ? FOLL_WRITE : 0,
  243. pages);
  244. if (ret <= 0)
  245. return -EFAULT;
  246. if (ret < requested_pages)
  247. *iter_last_page_size = PAGE_SIZE;
  248. return ret;
  249. }
  250. /* Populate the call parameters, merging adjacent pages together */
  251. static void populate_rw_params(struct page **pages,
  252. int pages_count,
  253. unsigned long address,
  254. unsigned long address_end,
  255. unsigned long first_page,
  256. unsigned long last_page,
  257. unsigned int iter_last_page_size,
  258. int is_write,
  259. struct goldfish_pipe_command *command)
  260. {
  261. /*
  262. * Process the first page separately - it's the only page that
  263. * needs special handling for its start address.
  264. */
  265. unsigned long xaddr = page_to_phys(pages[0]);
  266. unsigned long xaddr_prev = xaddr;
  267. int buffer_idx = 0;
  268. int i = 1;
  269. int size_on_page = first_page == last_page
  270. ? (int)(address_end - address)
  271. : (PAGE_SIZE - (address & ~PAGE_MASK));
  272. command->rw_params.ptrs[0] = (u64)(xaddr | (address & ~PAGE_MASK));
  273. command->rw_params.sizes[0] = size_on_page;
  274. for (; i < pages_count; ++i) {
  275. xaddr = page_to_phys(pages[i]);
  276. size_on_page = (i == pages_count - 1) ?
  277. iter_last_page_size : PAGE_SIZE;
  278. if (xaddr == xaddr_prev + PAGE_SIZE) {
  279. command->rw_params.sizes[buffer_idx] += size_on_page;
  280. } else {
  281. ++buffer_idx;
  282. command->rw_params.ptrs[buffer_idx] = (u64)xaddr;
  283. command->rw_params.sizes[buffer_idx] = size_on_page;
  284. }
  285. xaddr_prev = xaddr;
  286. }
  287. command->rw_params.buffers_count = buffer_idx + 1;
  288. }
  289. static int transfer_max_buffers(struct goldfish_pipe *pipe,
  290. unsigned long address,
  291. unsigned long address_end,
  292. int is_write,
  293. unsigned long last_page,
  294. unsigned int last_page_size,
  295. s32 *consumed_size,
  296. int *status)
  297. {
  298. unsigned long first_page = address & PAGE_MASK;
  299. unsigned int iter_last_page_size;
  300. int pages_count;
  301. /* Serialize access to the pipe command buffers */
  302. if (mutex_lock_interruptible(&pipe->lock))
  303. return -ERESTARTSYS;
  304. pages_count = goldfish_pin_pages(first_page, last_page,
  305. last_page_size, is_write,
  306. pipe->pages, &iter_last_page_size);
  307. if (pages_count < 0) {
  308. mutex_unlock(&pipe->lock);
  309. return pages_count;
  310. }
  311. populate_rw_params(pipe->pages, pages_count, address, address_end,
  312. first_page, last_page, iter_last_page_size, is_write,
  313. pipe->command_buffer);
  314. /* Transfer the data */
  315. *status = goldfish_pipe_cmd_locked(pipe,
  316. is_write ? PIPE_CMD_WRITE : PIPE_CMD_READ);
  317. *consumed_size = pipe->command_buffer->rw_params.consumed_size;
  318. unpin_user_pages_dirty_lock(pipe->pages, pages_count,
  319. !is_write && *consumed_size > 0);
  320. mutex_unlock(&pipe->lock);
  321. return 0;
  322. }
  323. static int wait_for_host_signal(struct goldfish_pipe *pipe, int is_write)
  324. {
  325. u32 wake_bit = is_write ? BIT_WAKE_ON_WRITE : BIT_WAKE_ON_READ;
  326. set_bit(wake_bit, &pipe->flags);
  327. /* Tell the emulator we're going to wait for a wake event */
  328. goldfish_pipe_cmd(pipe,
  329. is_write ? PIPE_CMD_WAKE_ON_WRITE : PIPE_CMD_WAKE_ON_READ);
  330. while (test_bit(wake_bit, &pipe->flags)) {
  331. if (wait_event_interruptible(pipe->wake_queue,
  332. !test_bit(wake_bit, &pipe->flags)))
  333. return -ERESTARTSYS;
  334. if (test_bit(BIT_CLOSED_ON_HOST, &pipe->flags))
  335. return -EIO;
  336. }
  337. return 0;
  338. }
  339. static ssize_t goldfish_pipe_read_write(struct file *filp,
  340. char __user *buffer,
  341. size_t bufflen,
  342. int is_write)
  343. {
  344. struct goldfish_pipe *pipe = filp->private_data;
  345. int count = 0, ret = -EINVAL;
  346. unsigned long address, address_end, last_page;
  347. unsigned int last_page_size;
  348. /* If the emulator already closed the pipe, no need to go further */
  349. if (unlikely(test_bit(BIT_CLOSED_ON_HOST, &pipe->flags)))
  350. return -EIO;
  351. /* Null reads or writes succeeds */
  352. if (unlikely(bufflen == 0))
  353. return 0;
  354. /* Check the buffer range for access */
  355. if (unlikely(!access_ok(buffer, bufflen)))
  356. return -EFAULT;
  357. address = (unsigned long)buffer;
  358. address_end = address + bufflen;
  359. last_page = (address_end - 1) & PAGE_MASK;
  360. last_page_size = ((address_end - 1) & ~PAGE_MASK) + 1;
  361. while (address < address_end) {
  362. s32 consumed_size;
  363. int status;
  364. ret = transfer_max_buffers(pipe, address, address_end, is_write,
  365. last_page, last_page_size,
  366. &consumed_size, &status);
  367. if (ret < 0)
  368. break;
  369. if (consumed_size > 0) {
  370. /* No matter what's the status, we've transferred
  371. * something.
  372. */
  373. count += consumed_size;
  374. address += consumed_size;
  375. }
  376. if (status > 0)
  377. continue;
  378. if (status == 0) {
  379. /* EOF */
  380. ret = 0;
  381. break;
  382. }
  383. if (count > 0) {
  384. /*
  385. * An error occurred, but we already transferred
  386. * something on one of the previous iterations.
  387. * Just return what we already copied and log this
  388. * err.
  389. */
  390. if (status != PIPE_ERROR_AGAIN)
  391. dev_err_ratelimited(pipe->dev->pdev_dev,
  392. "backend error %d on %s\n",
  393. status, is_write ? "write" : "read");
  394. break;
  395. }
  396. /*
  397. * If the error is not PIPE_ERROR_AGAIN, or if we are in
  398. * non-blocking mode, just return the error code.
  399. */
  400. if (status != PIPE_ERROR_AGAIN ||
  401. (filp->f_flags & O_NONBLOCK) != 0) {
  402. ret = goldfish_pipe_error_convert(status);
  403. break;
  404. }
  405. status = wait_for_host_signal(pipe, is_write);
  406. if (status < 0)
  407. return status;
  408. }
  409. if (count > 0)
  410. return count;
  411. return ret;
  412. }
  413. static ssize_t goldfish_pipe_read(struct file *filp, char __user *buffer,
  414. size_t bufflen, loff_t *ppos)
  415. {
  416. return goldfish_pipe_read_write(filp, buffer, bufflen,
  417. /* is_write */ 0);
  418. }
  419. static ssize_t goldfish_pipe_write(struct file *filp,
  420. const char __user *buffer, size_t bufflen,
  421. loff_t *ppos)
  422. {
  423. /* cast away the const */
  424. char __user *no_const_buffer = (char __user *)buffer;
  425. return goldfish_pipe_read_write(filp, no_const_buffer, bufflen,
  426. /* is_write */ 1);
  427. }
  428. static __poll_t goldfish_pipe_poll(struct file *filp, poll_table *wait)
  429. {
  430. struct goldfish_pipe *pipe = filp->private_data;
  431. __poll_t mask = 0;
  432. int status;
  433. poll_wait(filp, &pipe->wake_queue, wait);
  434. status = goldfish_pipe_cmd(pipe, PIPE_CMD_POLL);
  435. if (status < 0)
  436. return -ERESTARTSYS;
  437. if (status & PIPE_POLL_IN)
  438. mask |= EPOLLIN | EPOLLRDNORM;
  439. if (status & PIPE_POLL_OUT)
  440. mask |= EPOLLOUT | EPOLLWRNORM;
  441. if (status & PIPE_POLL_HUP)
  442. mask |= EPOLLHUP;
  443. if (test_bit(BIT_CLOSED_ON_HOST, &pipe->flags))
  444. mask |= EPOLLERR;
  445. return mask;
  446. }
  447. static void signalled_pipes_add_locked(struct goldfish_pipe_dev *dev,
  448. u32 id, u32 flags)
  449. {
  450. struct goldfish_pipe *pipe;
  451. if (WARN_ON(id >= dev->pipes_capacity))
  452. return;
  453. pipe = dev->pipes[id];
  454. if (!pipe)
  455. return;
  456. pipe->signalled_flags |= flags;
  457. if (pipe->prev_signalled || pipe->next_signalled ||
  458. dev->first_signalled_pipe == pipe)
  459. return; /* already in the list */
  460. pipe->next_signalled = dev->first_signalled_pipe;
  461. if (dev->first_signalled_pipe)
  462. dev->first_signalled_pipe->prev_signalled = pipe;
  463. dev->first_signalled_pipe = pipe;
  464. }
  465. static void signalled_pipes_remove_locked(struct goldfish_pipe_dev *dev,
  466. struct goldfish_pipe *pipe)
  467. {
  468. if (pipe->prev_signalled)
  469. pipe->prev_signalled->next_signalled = pipe->next_signalled;
  470. if (pipe->next_signalled)
  471. pipe->next_signalled->prev_signalled = pipe->prev_signalled;
  472. if (pipe == dev->first_signalled_pipe)
  473. dev->first_signalled_pipe = pipe->next_signalled;
  474. pipe->prev_signalled = NULL;
  475. pipe->next_signalled = NULL;
  476. }
  477. static struct goldfish_pipe *signalled_pipes_pop_front(
  478. struct goldfish_pipe_dev *dev, int *wakes)
  479. {
  480. struct goldfish_pipe *pipe;
  481. unsigned long flags;
  482. spin_lock_irqsave(&dev->lock, flags);
  483. pipe = dev->first_signalled_pipe;
  484. if (pipe) {
  485. *wakes = pipe->signalled_flags;
  486. pipe->signalled_flags = 0;
  487. /*
  488. * This is an optimized version of
  489. * signalled_pipes_remove_locked()
  490. * - We want to make it as fast as possible to
  491. * wake the sleeping pipe operations faster.
  492. */
  493. dev->first_signalled_pipe = pipe->next_signalled;
  494. if (dev->first_signalled_pipe)
  495. dev->first_signalled_pipe->prev_signalled = NULL;
  496. pipe->next_signalled = NULL;
  497. }
  498. spin_unlock_irqrestore(&dev->lock, flags);
  499. return pipe;
  500. }
  501. static irqreturn_t goldfish_interrupt_task(int irq, void *dev_addr)
  502. {
  503. /* Iterate over the signalled pipes and wake them one by one */
  504. struct goldfish_pipe_dev *dev = dev_addr;
  505. struct goldfish_pipe *pipe;
  506. int wakes;
  507. while ((pipe = signalled_pipes_pop_front(dev, &wakes)) != NULL) {
  508. if (wakes & PIPE_WAKE_CLOSED) {
  509. pipe->flags = 1 << BIT_CLOSED_ON_HOST;
  510. } else {
  511. if (wakes & PIPE_WAKE_READ)
  512. clear_bit(BIT_WAKE_ON_READ, &pipe->flags);
  513. if (wakes & PIPE_WAKE_WRITE)
  514. clear_bit(BIT_WAKE_ON_WRITE, &pipe->flags);
  515. }
  516. /*
  517. * wake_up_interruptible() implies a write barrier, so don't
  518. * explicitly add another one here.
  519. */
  520. wake_up_interruptible(&pipe->wake_queue);
  521. }
  522. return IRQ_HANDLED;
  523. }
  524. static void goldfish_pipe_device_deinit(struct platform_device *pdev,
  525. struct goldfish_pipe_dev *dev);
  526. /*
  527. * The general idea of the (threaded) interrupt handling:
  528. *
  529. * 1. device raises an interrupt if there's at least one signalled pipe
  530. * 2. IRQ handler reads the signalled pipes and their count from the device
  531. * 3. device writes them into a shared buffer and returns the count
  532. * it only resets the IRQ if it has returned all signalled pipes,
  533. * otherwise it leaves it raised, so IRQ handler will be called
  534. * again for the next chunk
  535. * 4. IRQ handler adds all returned pipes to the device's signalled pipes list
  536. * 5. IRQ handler defers processing the signalled pipes from the list in a
  537. * separate context
  538. */
  539. static irqreturn_t goldfish_pipe_interrupt(int irq, void *dev_id)
  540. {
  541. u32 count;
  542. u32 i;
  543. unsigned long flags;
  544. struct goldfish_pipe_dev *dev = dev_id;
  545. if (dev->magic != &goldfish_pipe_device_deinit)
  546. return IRQ_NONE;
  547. /* Request the signalled pipes from the device */
  548. spin_lock_irqsave(&dev->lock, flags);
  549. count = readl(dev->base + PIPE_REG_GET_SIGNALLED);
  550. if (count == 0) {
  551. spin_unlock_irqrestore(&dev->lock, flags);
  552. return IRQ_NONE;
  553. }
  554. if (count > MAX_SIGNALLED_PIPES)
  555. count = MAX_SIGNALLED_PIPES;
  556. for (i = 0; i < count; ++i)
  557. signalled_pipes_add_locked(dev,
  558. dev->buffers->signalled_pipe_buffers[i].id,
  559. dev->buffers->signalled_pipe_buffers[i].flags);
  560. spin_unlock_irqrestore(&dev->lock, flags);
  561. return IRQ_WAKE_THREAD;
  562. }
  563. static int get_free_pipe_id_locked(struct goldfish_pipe_dev *dev)
  564. {
  565. int id;
  566. for (id = 0; id < dev->pipes_capacity; ++id)
  567. if (!dev->pipes[id])
  568. return id;
  569. {
  570. /* Reallocate the array.
  571. * Since get_free_pipe_id_locked runs with interrupts disabled,
  572. * we don't want to make calls that could lead to sleep.
  573. */
  574. u32 new_capacity = 2 * dev->pipes_capacity;
  575. struct goldfish_pipe **pipes =
  576. kcalloc(new_capacity, sizeof(*pipes), GFP_ATOMIC);
  577. if (!pipes)
  578. return -ENOMEM;
  579. memcpy(pipes, dev->pipes, sizeof(*pipes) * dev->pipes_capacity);
  580. kfree(dev->pipes);
  581. dev->pipes = pipes;
  582. id = dev->pipes_capacity;
  583. dev->pipes_capacity = new_capacity;
  584. }
  585. return id;
  586. }
  587. /* A helper function to get the instance of goldfish_pipe_dev from file */
  588. static struct goldfish_pipe_dev *to_goldfish_pipe_dev(struct file *file)
  589. {
  590. struct miscdevice *miscdev = file->private_data;
  591. return container_of(miscdev, struct goldfish_pipe_dev, miscdev);
  592. }
  593. /**
  594. * goldfish_pipe_open - open a channel to the AVD
  595. * @inode: inode of device
  596. * @file: file struct of opener
  597. *
  598. * Create a new pipe link between the emulator and the use application.
  599. * Each new request produces a new pipe.
  600. *
  601. * Note: we use the pipe ID as a mux. All goldfish emulations are 32bit
  602. * right now so this is fine. A move to 64bit will need this addressing
  603. */
  604. static int goldfish_pipe_open(struct inode *inode, struct file *file)
  605. {
  606. struct goldfish_pipe_dev *dev = to_goldfish_pipe_dev(file);
  607. unsigned long flags;
  608. int id;
  609. int status;
  610. /* Allocate new pipe kernel object */
  611. struct goldfish_pipe *pipe = kzalloc(sizeof(*pipe), GFP_KERNEL);
  612. if (!pipe)
  613. return -ENOMEM;
  614. pipe->dev = dev;
  615. mutex_init(&pipe->lock);
  616. init_waitqueue_head(&pipe->wake_queue);
  617. /*
  618. * Command buffer needs to be allocated on its own page to make sure
  619. * it is physically contiguous in host's address space.
  620. */
  621. BUILD_BUG_ON(sizeof(struct goldfish_pipe_command) > PAGE_SIZE);
  622. pipe->command_buffer =
  623. (struct goldfish_pipe_command *)__get_free_page(GFP_KERNEL);
  624. if (!pipe->command_buffer) {
  625. status = -ENOMEM;
  626. goto err_pipe;
  627. }
  628. spin_lock_irqsave(&dev->lock, flags);
  629. id = get_free_pipe_id_locked(dev);
  630. if (id < 0) {
  631. status = id;
  632. goto err_id_locked;
  633. }
  634. dev->pipes[id] = pipe;
  635. pipe->id = id;
  636. pipe->command_buffer->id = id;
  637. /* Now tell the emulator we're opening a new pipe. */
  638. dev->buffers->open_command_params.rw_params_max_count =
  639. MAX_BUFFERS_PER_COMMAND;
  640. dev->buffers->open_command_params.command_buffer_ptr =
  641. (u64)(unsigned long)__pa(pipe->command_buffer);
  642. status = goldfish_pipe_cmd_locked(pipe, PIPE_CMD_OPEN);
  643. spin_unlock_irqrestore(&dev->lock, flags);
  644. if (status < 0)
  645. goto err_cmd;
  646. /* All is done, save the pipe into the file's private data field */
  647. file->private_data = pipe;
  648. return 0;
  649. err_cmd:
  650. spin_lock_irqsave(&dev->lock, flags);
  651. dev->pipes[id] = NULL;
  652. err_id_locked:
  653. spin_unlock_irqrestore(&dev->lock, flags);
  654. free_page((unsigned long)pipe->command_buffer);
  655. err_pipe:
  656. kfree(pipe);
  657. return status;
  658. }
  659. static int goldfish_pipe_release(struct inode *inode, struct file *filp)
  660. {
  661. unsigned long flags;
  662. struct goldfish_pipe *pipe = filp->private_data;
  663. struct goldfish_pipe_dev *dev = pipe->dev;
  664. /* The guest is closing the channel, so tell the emulator right now */
  665. goldfish_pipe_cmd(pipe, PIPE_CMD_CLOSE);
  666. spin_lock_irqsave(&dev->lock, flags);
  667. dev->pipes[pipe->id] = NULL;
  668. signalled_pipes_remove_locked(dev, pipe);
  669. spin_unlock_irqrestore(&dev->lock, flags);
  670. filp->private_data = NULL;
  671. free_page((unsigned long)pipe->command_buffer);
  672. kfree(pipe);
  673. return 0;
  674. }
  675. static const struct file_operations goldfish_pipe_fops = {
  676. .owner = THIS_MODULE,
  677. .read = goldfish_pipe_read,
  678. .write = goldfish_pipe_write,
  679. .poll = goldfish_pipe_poll,
  680. .open = goldfish_pipe_open,
  681. .release = goldfish_pipe_release,
  682. };
  683. static void init_miscdevice(struct miscdevice *miscdev)
  684. {
  685. memset(miscdev, 0, sizeof(*miscdev));
  686. miscdev->minor = MISC_DYNAMIC_MINOR;
  687. miscdev->name = "goldfish_pipe";
  688. miscdev->fops = &goldfish_pipe_fops;
  689. }
  690. static void write_pa_addr(void *addr, void __iomem *portl, void __iomem *porth)
  691. {
  692. const unsigned long paddr = __pa(addr);
  693. writel(upper_32_bits(paddr), porth);
  694. writel(lower_32_bits(paddr), portl);
  695. }
  696. static int goldfish_pipe_device_init(struct platform_device *pdev,
  697. struct goldfish_pipe_dev *dev)
  698. {
  699. int err;
  700. err = devm_request_threaded_irq(&pdev->dev, dev->irq,
  701. goldfish_pipe_interrupt,
  702. goldfish_interrupt_task,
  703. IRQF_SHARED, "goldfish_pipe", dev);
  704. if (err) {
  705. dev_err(&pdev->dev, "unable to allocate IRQ for v2\n");
  706. return err;
  707. }
  708. init_miscdevice(&dev->miscdev);
  709. err = misc_register(&dev->miscdev);
  710. if (err) {
  711. dev_err(&pdev->dev, "unable to register v2 device\n");
  712. return err;
  713. }
  714. dev->pdev_dev = &pdev->dev;
  715. dev->first_signalled_pipe = NULL;
  716. dev->pipes_capacity = INITIAL_PIPES_CAPACITY;
  717. dev->pipes = kcalloc(dev->pipes_capacity, sizeof(*dev->pipes),
  718. GFP_KERNEL);
  719. if (!dev->pipes) {
  720. misc_deregister(&dev->miscdev);
  721. return -ENOMEM;
  722. }
  723. /*
  724. * We're going to pass two buffers, open_command_params and
  725. * signalled_pipe_buffers, to the host. This means each of those buffers
  726. * needs to be contained in a single physical page. The easiest choice
  727. * is to just allocate a page and place the buffers in it.
  728. */
  729. BUILD_BUG_ON(sizeof(struct goldfish_pipe_dev_buffers) > PAGE_SIZE);
  730. dev->buffers = (struct goldfish_pipe_dev_buffers *)
  731. __get_free_page(GFP_KERNEL);
  732. if (!dev->buffers) {
  733. kfree(dev->pipes);
  734. misc_deregister(&dev->miscdev);
  735. return -ENOMEM;
  736. }
  737. /* Send the buffer addresses to the host */
  738. write_pa_addr(&dev->buffers->signalled_pipe_buffers,
  739. dev->base + PIPE_REG_SIGNAL_BUFFER,
  740. dev->base + PIPE_REG_SIGNAL_BUFFER_HIGH);
  741. writel(MAX_SIGNALLED_PIPES,
  742. dev->base + PIPE_REG_SIGNAL_BUFFER_COUNT);
  743. write_pa_addr(&dev->buffers->open_command_params,
  744. dev->base + PIPE_REG_OPEN_BUFFER,
  745. dev->base + PIPE_REG_OPEN_BUFFER_HIGH);
  746. platform_set_drvdata(pdev, dev);
  747. return 0;
  748. }
  749. static void goldfish_pipe_device_deinit(struct platform_device *pdev,
  750. struct goldfish_pipe_dev *dev)
  751. {
  752. misc_deregister(&dev->miscdev);
  753. kfree(dev->pipes);
  754. free_page((unsigned long)dev->buffers);
  755. }
  756. static int goldfish_pipe_probe(struct platform_device *pdev)
  757. {
  758. struct resource *r;
  759. struct goldfish_pipe_dev *dev;
  760. dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
  761. if (!dev)
  762. return -ENOMEM;
  763. dev->magic = &goldfish_pipe_device_deinit;
  764. spin_lock_init(&dev->lock);
  765. r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  766. if (!r || resource_size(r) < PAGE_SIZE) {
  767. dev_err(&pdev->dev, "can't allocate i/o page\n");
  768. return -EINVAL;
  769. }
  770. dev->base = devm_ioremap(&pdev->dev, r->start, PAGE_SIZE);
  771. if (!dev->base) {
  772. dev_err(&pdev->dev, "ioremap failed\n");
  773. return -EINVAL;
  774. }
  775. dev->irq = platform_get_irq(pdev, 0);
  776. if (dev->irq < 0)
  777. return dev->irq;
  778. /*
  779. * Exchange the versions with the host device
  780. *
  781. * Note: v1 driver used to not report its version, so we write it before
  782. * reading device version back: this allows the host implementation to
  783. * detect the old driver (if there was no version write before read).
  784. */
  785. writel(PIPE_DRIVER_VERSION, dev->base + PIPE_REG_VERSION);
  786. dev->version = readl(dev->base + PIPE_REG_VERSION);
  787. if (WARN_ON(dev->version < PIPE_CURRENT_DEVICE_VERSION))
  788. return -EINVAL;
  789. return goldfish_pipe_device_init(pdev, dev);
  790. }
  791. static int goldfish_pipe_remove(struct platform_device *pdev)
  792. {
  793. struct goldfish_pipe_dev *dev = platform_get_drvdata(pdev);
  794. goldfish_pipe_device_deinit(pdev, dev);
  795. return 0;
  796. }
  797. static const struct acpi_device_id goldfish_pipe_acpi_match[] = {
  798. { "GFSH0003", 0 },
  799. { },
  800. };
  801. MODULE_DEVICE_TABLE(acpi, goldfish_pipe_acpi_match);
  802. static const struct of_device_id goldfish_pipe_of_match[] = {
  803. { .compatible = "google,android-pipe", },
  804. {},
  805. };
  806. MODULE_DEVICE_TABLE(of, goldfish_pipe_of_match);
  807. static struct platform_driver goldfish_pipe_driver = {
  808. .probe = goldfish_pipe_probe,
  809. .remove = goldfish_pipe_remove,
  810. .driver = {
  811. .name = "goldfish_pipe",
  812. .of_match_table = goldfish_pipe_of_match,
  813. .acpi_match_table = ACPI_PTR(goldfish_pipe_acpi_match),
  814. }
  815. };
  816. module_platform_driver(goldfish_pipe_driver);
  817. MODULE_AUTHOR("David Turner <[email protected]>");
  818. MODULE_LICENSE("GPL v2");