pinctrl-sun6i-a31-r.c 4.4 KB

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  1. /*
  2. * Allwinner A31 SoCs special pins pinctrl driver.
  3. *
  4. * Copyright (C) 2014 Boris Brezillon
  5. * Boris Brezillon <[email protected]>
  6. *
  7. * Copyright (C) 2014 Maxime Ripard
  8. * Maxime Ripard <[email protected]>
  9. *
  10. * This file is licensed under the terms of the GNU General Public
  11. * License version 2. This program is licensed "as is" without any
  12. * warranty of any kind, whether express or implied.
  13. */
  14. #include <linux/init.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/of.h>
  17. #include <linux/of_device.h>
  18. #include <linux/pinctrl/pinctrl.h>
  19. #include "pinctrl-sunxi.h"
  20. static const struct sunxi_desc_pin sun6i_a31_r_pins[] = {
  21. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0),
  22. SUNXI_FUNCTION(0x0, "gpio_in"),
  23. SUNXI_FUNCTION(0x1, "gpio_out"),
  24. SUNXI_FUNCTION(0x2, "s_i2c"), /* SCK */
  25. SUNXI_FUNCTION(0x3, "s_p2wi")), /* SCK */
  26. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1),
  27. SUNXI_FUNCTION(0x0, "gpio_in"),
  28. SUNXI_FUNCTION(0x1, "gpio_out"),
  29. SUNXI_FUNCTION(0x2, "s_i2c"), /* SDA */
  30. SUNXI_FUNCTION(0x3, "s_p2wi")), /* SDA */
  31. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2),
  32. SUNXI_FUNCTION(0x0, "gpio_in"),
  33. SUNXI_FUNCTION(0x1, "gpio_out"),
  34. SUNXI_FUNCTION(0x2, "s_uart")), /* TX */
  35. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3),
  36. SUNXI_FUNCTION(0x0, "gpio_in"),
  37. SUNXI_FUNCTION(0x1, "gpio_out"),
  38. SUNXI_FUNCTION(0x2, "s_uart")), /* RX */
  39. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4),
  40. SUNXI_FUNCTION(0x0, "gpio_in"),
  41. SUNXI_FUNCTION(0x1, "gpio_out"),
  42. SUNXI_FUNCTION(0x2, "s_ir")), /* RX */
  43. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),
  44. SUNXI_FUNCTION(0x0, "gpio_in"),
  45. SUNXI_FUNCTION(0x1, "gpio_out"),
  46. SUNXI_FUNCTION_IRQ_BANK(0x2, 0, 0), /* PL_EINT0 */
  47. SUNXI_FUNCTION(0x3, "s_jtag")), /* MS */
  48. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),
  49. SUNXI_FUNCTION(0x0, "gpio_in"),
  50. SUNXI_FUNCTION(0x1, "gpio_out"),
  51. SUNXI_FUNCTION_IRQ_BANK(0x2, 0, 1), /* PL_EINT1 */
  52. SUNXI_FUNCTION(0x3, "s_jtag")), /* CK */
  53. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),
  54. SUNXI_FUNCTION(0x0, "gpio_in"),
  55. SUNXI_FUNCTION(0x1, "gpio_out"),
  56. SUNXI_FUNCTION_IRQ_BANK(0x2, 0, 2), /* PL_EINT2 */
  57. SUNXI_FUNCTION(0x3, "s_jtag")), /* DO */
  58. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),
  59. SUNXI_FUNCTION(0x0, "gpio_in"),
  60. SUNXI_FUNCTION(0x1, "gpio_out"),
  61. SUNXI_FUNCTION_IRQ_BANK(0x2, 0, 3), /* PL_EINT3 */
  62. SUNXI_FUNCTION(0x3, "s_jtag")), /* DI */
  63. /* Hole */
  64. SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 0),
  65. SUNXI_FUNCTION(0x0, "gpio_in"),
  66. SUNXI_FUNCTION(0x1, "gpio_out"),
  67. SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 0)), /* PM_EINT0 */
  68. SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 1),
  69. SUNXI_FUNCTION(0x0, "gpio_in"),
  70. SUNXI_FUNCTION(0x1, "gpio_out"),
  71. SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 1)), /* PM_EINT1 */
  72. SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 2),
  73. SUNXI_FUNCTION(0x0, "gpio_in"),
  74. SUNXI_FUNCTION(0x1, "gpio_out"),
  75. SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 2), /* PM_EINT2 */
  76. SUNXI_FUNCTION(0x3, "1wire")),
  77. SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 3),
  78. SUNXI_FUNCTION(0x0, "gpio_in"),
  79. SUNXI_FUNCTION(0x1, "gpio_out"),
  80. SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 3)), /* PM_EINT3 */
  81. SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 4),
  82. SUNXI_FUNCTION(0x0, "gpio_in"),
  83. SUNXI_FUNCTION(0x1, "gpio_out"),
  84. SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 4)), /* PM_EINT4 */
  85. SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 5),
  86. SUNXI_FUNCTION(0x0, "gpio_in"),
  87. SUNXI_FUNCTION(0x1, "gpio_out"),
  88. SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 5)), /* PM_EINT5 */
  89. SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 6),
  90. SUNXI_FUNCTION(0x0, "gpio_in"),
  91. SUNXI_FUNCTION(0x1, "gpio_out"),
  92. SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 6)), /* PM_EINT6 */
  93. SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 7),
  94. SUNXI_FUNCTION(0x0, "gpio_in"),
  95. SUNXI_FUNCTION(0x1, "gpio_out"),
  96. SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 7), /* PM_EINT7 */
  97. SUNXI_FUNCTION(0x3, "rtc")), /* CLKO */
  98. };
  99. static const struct sunxi_pinctrl_desc sun6i_a31_r_pinctrl_data = {
  100. .pins = sun6i_a31_r_pins,
  101. .npins = ARRAY_SIZE(sun6i_a31_r_pins),
  102. .pin_base = PL_BASE,
  103. .irq_banks = 2,
  104. .disable_strict_mode = true,
  105. };
  106. static int sun6i_a31_r_pinctrl_probe(struct platform_device *pdev)
  107. {
  108. return sunxi_pinctrl_init(pdev, &sun6i_a31_r_pinctrl_data);
  109. }
  110. static const struct of_device_id sun6i_a31_r_pinctrl_match[] = {
  111. { .compatible = "allwinner,sun6i-a31-r-pinctrl", },
  112. {}
  113. };
  114. static struct platform_driver sun6i_a31_r_pinctrl_driver = {
  115. .probe = sun6i_a31_r_pinctrl_probe,
  116. .driver = {
  117. .name = "sun6i-a31-r-pinctrl",
  118. .of_match_table = sun6i_a31_r_pinctrl_match,
  119. },
  120. };
  121. builtin_platform_driver(sun6i_a31_r_pinctrl_driver);