pinctrl-sun50i-a100-r.c 3.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2020 Yangtao Li <[email protected]>
  4. *
  5. * Based on:
  6. * huangshuosheng <[email protected]>
  7. */
  8. #include <linux/module.h>
  9. #include <linux/of.h>
  10. #include <linux/of_device.h>
  11. #include <linux/pinctrl/pinctrl.h>
  12. #include <linux/platform_device.h>
  13. #include "pinctrl-sunxi.h"
  14. static const struct sunxi_desc_pin a100_r_pins[] = {
  15. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0),
  16. SUNXI_FUNCTION(0x0, "gpio_in"),
  17. SUNXI_FUNCTION(0x1, "gpio_out"),
  18. SUNXI_FUNCTION(0x2, "s_i2c0"), /* SCK */
  19. SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),
  20. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1),
  21. SUNXI_FUNCTION(0x0, "gpio_in"),
  22. SUNXI_FUNCTION(0x1, "gpio_out"),
  23. SUNXI_FUNCTION(0x2, "s_i2c0"), /* SDA */
  24. SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),
  25. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2),
  26. SUNXI_FUNCTION(0x0, "gpio_in"),
  27. SUNXI_FUNCTION(0x1, "gpio_out"),
  28. SUNXI_FUNCTION(0x2, "s_uart0"), /* TX */
  29. SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)),
  30. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3),
  31. SUNXI_FUNCTION(0x0, "gpio_in"),
  32. SUNXI_FUNCTION(0x1, "gpio_out"),
  33. SUNXI_FUNCTION(0x2, "s_uart0"), /* RX */
  34. SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),
  35. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4),
  36. SUNXI_FUNCTION(0x0, "gpio_in"),
  37. SUNXI_FUNCTION(0x1, "gpio_out"),
  38. SUNXI_FUNCTION(0x2, "s_jtag"), /* MS */
  39. SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),
  40. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),
  41. SUNXI_FUNCTION(0x0, "gpio_in"),
  42. SUNXI_FUNCTION(0x1, "gpio_out"),
  43. SUNXI_FUNCTION(0x2, "s_jtag"), /* CK */
  44. SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)),
  45. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),
  46. SUNXI_FUNCTION(0x0, "gpio_in"),
  47. SUNXI_FUNCTION(0x1, "gpio_out"),
  48. SUNXI_FUNCTION(0x2, "s_jtag"), /* DO */
  49. SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)),
  50. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),
  51. SUNXI_FUNCTION(0x0, "gpio_in"),
  52. SUNXI_FUNCTION(0x1, "gpio_out"),
  53. SUNXI_FUNCTION(0x2, "s_jtag"), /* DI */
  54. SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)),
  55. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),
  56. SUNXI_FUNCTION(0x0, "gpio_in"),
  57. SUNXI_FUNCTION(0x1, "gpio_out"),
  58. SUNXI_FUNCTION(0x2, "s_i2c1"), /* SCK */
  59. SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)),
  60. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 9),
  61. SUNXI_FUNCTION(0x0, "gpio_in"),
  62. SUNXI_FUNCTION(0x1, "gpio_out"),
  63. SUNXI_FUNCTION(0x2, "s_i2c1"), /* SDA */
  64. SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)),
  65. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 10),
  66. SUNXI_FUNCTION(0x0, "gpio_in"),
  67. SUNXI_FUNCTION(0x1, "gpio_out"),
  68. SUNXI_FUNCTION(0x2, "s_pwm"),
  69. SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)),
  70. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 11),
  71. SUNXI_FUNCTION(0x0, "gpio_in"),
  72. SUNXI_FUNCTION(0x1, "gpio_out"),
  73. SUNXI_FUNCTION(0x3, "s_cir"), /* IN */
  74. SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)),
  75. };
  76. static const struct sunxi_pinctrl_desc a100_r_pinctrl_data = {
  77. .pins = a100_r_pins,
  78. .npins = ARRAY_SIZE(a100_r_pins),
  79. .pin_base = PL_BASE,
  80. .irq_banks = 1,
  81. .io_bias_cfg_variant = BIAS_VOLTAGE_PIO_POW_MODE_CTL,
  82. };
  83. static int a100_r_pinctrl_probe(struct platform_device *pdev)
  84. {
  85. return sunxi_pinctrl_init(pdev, &a100_r_pinctrl_data);
  86. }
  87. static const struct of_device_id a100_r_pinctrl_match[] = {
  88. { .compatible = "allwinner,sun50i-a100-r-pinctrl", },
  89. {}
  90. };
  91. MODULE_DEVICE_TABLE(of, a100_r_pinctrl_match);
  92. static struct platform_driver a100_r_pinctrl_driver = {
  93. .probe = a100_r_pinctrl_probe,
  94. .driver = {
  95. .name = "sun50i-a100-r-pinctrl",
  96. .of_match_table = a100_r_pinctrl_match,
  97. },
  98. };
  99. module_platform_driver(a100_r_pinctrl_driver);