pinctrl-sprd.c 27 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Spreadtrum pin controller driver
  4. * Copyright (C) 2017 Spreadtrum - http://www.spreadtrum.com
  5. */
  6. #include <linux/debugfs.h>
  7. #include <linux/err.h>
  8. #include <linux/init.h>
  9. #include <linux/io.h>
  10. #include <linux/kernel.h>
  11. #include <linux/module.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/pinctrl/machine.h>
  16. #include <linux/pinctrl/pinconf.h>
  17. #include <linux/pinctrl/pinconf-generic.h>
  18. #include <linux/pinctrl/pinctrl.h>
  19. #include <linux/pinctrl/pinmux.h>
  20. #include <linux/slab.h>
  21. #include "../core.h"
  22. #include "../pinmux.h"
  23. #include "../pinconf.h"
  24. #include "../pinctrl-utils.h"
  25. #include "pinctrl-sprd.h"
  26. #define PINCTRL_BIT_MASK(width) (~(~0UL << (width)))
  27. #define PINCTRL_REG_OFFSET 0x20
  28. #define PINCTRL_REG_MISC_OFFSET 0x4020
  29. #define PINCTRL_REG_LEN 0x4
  30. #define PIN_FUNC_MASK (BIT(4) | BIT(5))
  31. #define PIN_FUNC_SEL_1 ~PIN_FUNC_MASK
  32. #define PIN_FUNC_SEL_2 BIT(4)
  33. #define PIN_FUNC_SEL_3 BIT(5)
  34. #define PIN_FUNC_SEL_4 PIN_FUNC_MASK
  35. #define AP_SLEEP_MODE BIT(13)
  36. #define PUBCP_SLEEP_MODE BIT(14)
  37. #define TGLDSP_SLEEP_MODE BIT(15)
  38. #define AGDSP_SLEEP_MODE BIT(16)
  39. #define CM4_SLEEP_MODE BIT(17)
  40. #define SLEEP_MODE_MASK GENMASK(5, 0)
  41. #define SLEEP_MODE_SHIFT 13
  42. #define SLEEP_INPUT BIT(1)
  43. #define SLEEP_INPUT_MASK 0x1
  44. #define SLEEP_INPUT_SHIFT 1
  45. #define SLEEP_OUTPUT BIT(0)
  46. #define SLEEP_OUTPUT_MASK 0x1
  47. #define SLEEP_OUTPUT_SHIFT 0
  48. #define DRIVE_STRENGTH_MASK GENMASK(3, 0)
  49. #define DRIVE_STRENGTH_SHIFT 19
  50. #define SLEEP_PULL_DOWN BIT(2)
  51. #define SLEEP_PULL_DOWN_MASK 0x1
  52. #define SLEEP_PULL_DOWN_SHIFT 2
  53. #define PULL_DOWN BIT(6)
  54. #define PULL_DOWN_MASK 0x1
  55. #define PULL_DOWN_SHIFT 6
  56. #define SLEEP_PULL_UP BIT(3)
  57. #define SLEEP_PULL_UP_MASK 0x1
  58. #define SLEEP_PULL_UP_SHIFT 3
  59. #define PULL_UP_4_7K (BIT(12) | BIT(7))
  60. #define PULL_UP_20K BIT(7)
  61. #define PULL_UP_MASK 0x21
  62. #define PULL_UP_SHIFT 7
  63. #define INPUT_SCHMITT BIT(11)
  64. #define INPUT_SCHMITT_MASK 0x1
  65. #define INPUT_SCHMITT_SHIFT 11
  66. enum pin_sleep_mode {
  67. AP_SLEEP = BIT(0),
  68. PUBCP_SLEEP = BIT(1),
  69. TGLDSP_SLEEP = BIT(2),
  70. AGDSP_SLEEP = BIT(3),
  71. CM4_SLEEP = BIT(4),
  72. };
  73. enum pin_func_sel {
  74. PIN_FUNC_1,
  75. PIN_FUNC_2,
  76. PIN_FUNC_3,
  77. PIN_FUNC_4,
  78. PIN_FUNC_MAX,
  79. };
  80. /**
  81. * struct sprd_pin: represent one pin's description
  82. * @name: pin name
  83. * @number: pin number
  84. * @type: pin type, can be GLOBAL_CTRL_PIN/COMMON_PIN/MISC_PIN
  85. * @reg: pin register address
  86. * @bit_offset: bit offset in pin register
  87. * @bit_width: bit width in pin register
  88. */
  89. struct sprd_pin {
  90. const char *name;
  91. unsigned int number;
  92. enum pin_type type;
  93. unsigned long reg;
  94. unsigned long bit_offset;
  95. unsigned long bit_width;
  96. };
  97. /**
  98. * struct sprd_pin_group: represent one group's description
  99. * @name: group name
  100. * @npins: pin numbers of this group
  101. * @pins: pointer to pins array
  102. */
  103. struct sprd_pin_group {
  104. const char *name;
  105. unsigned int npins;
  106. unsigned int *pins;
  107. };
  108. /**
  109. * struct sprd_pinctrl_soc_info: represent the SoC's pins description
  110. * @groups: pointer to groups of pins
  111. * @ngroups: group numbers of the whole SoC
  112. * @pins: pointer to pins description
  113. * @npins: pin numbers of the whole SoC
  114. * @grp_names: pointer to group names array
  115. */
  116. struct sprd_pinctrl_soc_info {
  117. struct sprd_pin_group *groups;
  118. unsigned int ngroups;
  119. struct sprd_pin *pins;
  120. unsigned int npins;
  121. const char **grp_names;
  122. };
  123. /**
  124. * struct sprd_pinctrl: represent the pin controller device
  125. * @dev: pointer to the device structure
  126. * @pctl: pointer to the pinctrl handle
  127. * @base: base address of the controller
  128. * @info: pointer to SoC's pins description information
  129. */
  130. struct sprd_pinctrl {
  131. struct device *dev;
  132. struct pinctrl_dev *pctl;
  133. void __iomem *base;
  134. struct sprd_pinctrl_soc_info *info;
  135. };
  136. #define SPRD_PIN_CONFIG_CONTROL (PIN_CONFIG_END + 1)
  137. #define SPRD_PIN_CONFIG_SLEEP_MODE (PIN_CONFIG_END + 2)
  138. static int sprd_pinctrl_get_id_by_name(struct sprd_pinctrl *sprd_pctl,
  139. const char *name)
  140. {
  141. struct sprd_pinctrl_soc_info *info = sprd_pctl->info;
  142. int i;
  143. for (i = 0; i < info->npins; i++) {
  144. if (!strcmp(info->pins[i].name, name))
  145. return info->pins[i].number;
  146. }
  147. return -ENODEV;
  148. }
  149. static struct sprd_pin *
  150. sprd_pinctrl_get_pin_by_id(struct sprd_pinctrl *sprd_pctl, unsigned int id)
  151. {
  152. struct sprd_pinctrl_soc_info *info = sprd_pctl->info;
  153. struct sprd_pin *pin = NULL;
  154. int i;
  155. for (i = 0; i < info->npins; i++) {
  156. if (info->pins[i].number == id) {
  157. pin = &info->pins[i];
  158. break;
  159. }
  160. }
  161. return pin;
  162. }
  163. static const struct sprd_pin_group *
  164. sprd_pinctrl_find_group_by_name(struct sprd_pinctrl *sprd_pctl,
  165. const char *name)
  166. {
  167. struct sprd_pinctrl_soc_info *info = sprd_pctl->info;
  168. const struct sprd_pin_group *grp = NULL;
  169. int i;
  170. for (i = 0; i < info->ngroups; i++) {
  171. if (!strcmp(info->groups[i].name, name)) {
  172. grp = &info->groups[i];
  173. break;
  174. }
  175. }
  176. return grp;
  177. }
  178. static int sprd_pctrl_group_count(struct pinctrl_dev *pctldev)
  179. {
  180. struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
  181. struct sprd_pinctrl_soc_info *info = pctl->info;
  182. return info->ngroups;
  183. }
  184. static const char *sprd_pctrl_group_name(struct pinctrl_dev *pctldev,
  185. unsigned int selector)
  186. {
  187. struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
  188. struct sprd_pinctrl_soc_info *info = pctl->info;
  189. return info->groups[selector].name;
  190. }
  191. static int sprd_pctrl_group_pins(struct pinctrl_dev *pctldev,
  192. unsigned int selector,
  193. const unsigned int **pins,
  194. unsigned int *npins)
  195. {
  196. struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
  197. struct sprd_pinctrl_soc_info *info = pctl->info;
  198. if (selector >= info->ngroups)
  199. return -EINVAL;
  200. *pins = info->groups[selector].pins;
  201. *npins = info->groups[selector].npins;
  202. return 0;
  203. }
  204. static int sprd_dt_node_to_map(struct pinctrl_dev *pctldev,
  205. struct device_node *np,
  206. struct pinctrl_map **map,
  207. unsigned int *num_maps)
  208. {
  209. struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
  210. const struct sprd_pin_group *grp;
  211. unsigned long *configs = NULL;
  212. unsigned int num_configs = 0;
  213. unsigned int reserved_maps = 0;
  214. unsigned int reserve = 0;
  215. const char *function;
  216. enum pinctrl_map_type type;
  217. int ret;
  218. grp = sprd_pinctrl_find_group_by_name(pctl, np->name);
  219. if (!grp) {
  220. dev_err(pctl->dev, "unable to find group for node %s\n",
  221. of_node_full_name(np));
  222. return -EINVAL;
  223. }
  224. ret = of_property_count_strings(np, "pins");
  225. if (ret < 0)
  226. return ret;
  227. if (ret == 1)
  228. type = PIN_MAP_TYPE_CONFIGS_PIN;
  229. else
  230. type = PIN_MAP_TYPE_CONFIGS_GROUP;
  231. ret = of_property_read_string(np, "function", &function);
  232. if (ret < 0) {
  233. if (ret != -EINVAL)
  234. dev_err(pctl->dev,
  235. "%s: could not parse property function\n",
  236. of_node_full_name(np));
  237. function = NULL;
  238. }
  239. ret = pinconf_generic_parse_dt_config(np, pctldev, &configs,
  240. &num_configs);
  241. if (ret < 0) {
  242. dev_err(pctl->dev, "%s: could not parse node property\n",
  243. of_node_full_name(np));
  244. return ret;
  245. }
  246. *map = NULL;
  247. *num_maps = 0;
  248. if (function != NULL)
  249. reserve++;
  250. if (num_configs)
  251. reserve++;
  252. ret = pinctrl_utils_reserve_map(pctldev, map, &reserved_maps,
  253. num_maps, reserve);
  254. if (ret < 0)
  255. goto out;
  256. if (function) {
  257. ret = pinctrl_utils_add_map_mux(pctldev, map,
  258. &reserved_maps, num_maps,
  259. grp->name, function);
  260. if (ret < 0)
  261. goto out;
  262. }
  263. if (num_configs) {
  264. const char *group_or_pin;
  265. unsigned int pin_id;
  266. if (type == PIN_MAP_TYPE_CONFIGS_PIN) {
  267. pin_id = grp->pins[0];
  268. group_or_pin = pin_get_name(pctldev, pin_id);
  269. } else {
  270. group_or_pin = grp->name;
  271. }
  272. ret = pinctrl_utils_add_map_configs(pctldev, map,
  273. &reserved_maps, num_maps,
  274. group_or_pin, configs,
  275. num_configs, type);
  276. }
  277. out:
  278. kfree(configs);
  279. return ret;
  280. }
  281. static void sprd_pctrl_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
  282. unsigned int offset)
  283. {
  284. seq_printf(s, "%s", dev_name(pctldev->dev));
  285. }
  286. static const struct pinctrl_ops sprd_pctrl_ops = {
  287. .get_groups_count = sprd_pctrl_group_count,
  288. .get_group_name = sprd_pctrl_group_name,
  289. .get_group_pins = sprd_pctrl_group_pins,
  290. .pin_dbg_show = sprd_pctrl_dbg_show,
  291. .dt_node_to_map = sprd_dt_node_to_map,
  292. .dt_free_map = pinctrl_utils_free_map,
  293. };
  294. static int sprd_pmx_get_function_count(struct pinctrl_dev *pctldev)
  295. {
  296. return PIN_FUNC_MAX;
  297. }
  298. static const char *sprd_pmx_get_function_name(struct pinctrl_dev *pctldev,
  299. unsigned int selector)
  300. {
  301. switch (selector) {
  302. case PIN_FUNC_1:
  303. return "func1";
  304. case PIN_FUNC_2:
  305. return "func2";
  306. case PIN_FUNC_3:
  307. return "func3";
  308. case PIN_FUNC_4:
  309. return "func4";
  310. default:
  311. return "null";
  312. }
  313. }
  314. static int sprd_pmx_get_function_groups(struct pinctrl_dev *pctldev,
  315. unsigned int selector,
  316. const char * const **groups,
  317. unsigned int * const num_groups)
  318. {
  319. struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
  320. struct sprd_pinctrl_soc_info *info = pctl->info;
  321. *groups = info->grp_names;
  322. *num_groups = info->ngroups;
  323. return 0;
  324. }
  325. static int sprd_pmx_set_mux(struct pinctrl_dev *pctldev,
  326. unsigned int func_selector,
  327. unsigned int group_selector)
  328. {
  329. struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
  330. struct sprd_pinctrl_soc_info *info = pctl->info;
  331. struct sprd_pin_group *grp = &info->groups[group_selector];
  332. unsigned int i, grp_pins = grp->npins;
  333. unsigned long reg;
  334. unsigned int val = 0;
  335. if (group_selector >= info->ngroups)
  336. return -EINVAL;
  337. switch (func_selector) {
  338. case PIN_FUNC_1:
  339. val &= PIN_FUNC_SEL_1;
  340. break;
  341. case PIN_FUNC_2:
  342. val |= PIN_FUNC_SEL_2;
  343. break;
  344. case PIN_FUNC_3:
  345. val |= PIN_FUNC_SEL_3;
  346. break;
  347. case PIN_FUNC_4:
  348. val |= PIN_FUNC_SEL_4;
  349. break;
  350. default:
  351. break;
  352. }
  353. for (i = 0; i < grp_pins; i++) {
  354. unsigned int pin_id = grp->pins[i];
  355. struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id);
  356. if (!pin || pin->type != COMMON_PIN)
  357. continue;
  358. reg = readl((void __iomem *)pin->reg);
  359. reg &= ~PIN_FUNC_MASK;
  360. reg |= val;
  361. writel(reg, (void __iomem *)pin->reg);
  362. }
  363. return 0;
  364. }
  365. static const struct pinmux_ops sprd_pmx_ops = {
  366. .get_functions_count = sprd_pmx_get_function_count,
  367. .get_function_name = sprd_pmx_get_function_name,
  368. .get_function_groups = sprd_pmx_get_function_groups,
  369. .set_mux = sprd_pmx_set_mux,
  370. };
  371. static int sprd_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin_id,
  372. unsigned long *config)
  373. {
  374. struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
  375. struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id);
  376. unsigned int param = pinconf_to_config_param(*config);
  377. unsigned int reg, arg;
  378. if (!pin)
  379. return -EINVAL;
  380. if (pin->type == GLOBAL_CTRL_PIN) {
  381. reg = (readl((void __iomem *)pin->reg) >>
  382. pin->bit_offset) & PINCTRL_BIT_MASK(pin->bit_width);
  383. } else {
  384. reg = readl((void __iomem *)pin->reg);
  385. }
  386. if (pin->type == GLOBAL_CTRL_PIN &&
  387. param == SPRD_PIN_CONFIG_CONTROL) {
  388. arg = reg;
  389. } else if (pin->type == COMMON_PIN || pin->type == MISC_PIN) {
  390. switch (param) {
  391. case SPRD_PIN_CONFIG_SLEEP_MODE:
  392. arg = (reg >> SLEEP_MODE_SHIFT) & SLEEP_MODE_MASK;
  393. break;
  394. case PIN_CONFIG_INPUT_ENABLE:
  395. arg = (reg >> SLEEP_INPUT_SHIFT) & SLEEP_INPUT_MASK;
  396. break;
  397. case PIN_CONFIG_OUTPUT_ENABLE:
  398. arg = reg & SLEEP_OUTPUT_MASK;
  399. break;
  400. case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
  401. if ((reg & SLEEP_OUTPUT) || (reg & SLEEP_INPUT))
  402. return -EINVAL;
  403. arg = 1;
  404. break;
  405. case PIN_CONFIG_DRIVE_STRENGTH:
  406. arg = (reg >> DRIVE_STRENGTH_SHIFT) &
  407. DRIVE_STRENGTH_MASK;
  408. break;
  409. case PIN_CONFIG_BIAS_PULL_DOWN:
  410. /* combine sleep pull down and pull down config */
  411. arg = ((reg >> SLEEP_PULL_DOWN_SHIFT) &
  412. SLEEP_PULL_DOWN_MASK) << 16;
  413. arg |= (reg >> PULL_DOWN_SHIFT) & PULL_DOWN_MASK;
  414. break;
  415. case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
  416. arg = (reg >> INPUT_SCHMITT_SHIFT) & INPUT_SCHMITT_MASK;
  417. break;
  418. case PIN_CONFIG_BIAS_PULL_UP:
  419. /* combine sleep pull up and pull up config */
  420. arg = ((reg >> SLEEP_PULL_UP_SHIFT) &
  421. SLEEP_PULL_UP_MASK) << 16;
  422. arg |= (reg >> PULL_UP_SHIFT) & PULL_UP_MASK;
  423. break;
  424. case PIN_CONFIG_BIAS_DISABLE:
  425. if ((reg & (SLEEP_PULL_DOWN | SLEEP_PULL_UP)) ||
  426. (reg & (PULL_DOWN | PULL_UP_4_7K | PULL_UP_20K)))
  427. return -EINVAL;
  428. arg = 1;
  429. break;
  430. case PIN_CONFIG_SLEEP_HARDWARE_STATE:
  431. arg = 0;
  432. break;
  433. default:
  434. return -ENOTSUPP;
  435. }
  436. } else {
  437. return -ENOTSUPP;
  438. }
  439. *config = pinconf_to_config_packed(param, arg);
  440. return 0;
  441. }
  442. static unsigned int sprd_pinconf_drive(unsigned int mA)
  443. {
  444. unsigned int val = 0;
  445. switch (mA) {
  446. case 2:
  447. break;
  448. case 4:
  449. val |= BIT(19);
  450. break;
  451. case 6:
  452. val |= BIT(20);
  453. break;
  454. case 8:
  455. val |= BIT(19) | BIT(20);
  456. break;
  457. case 10:
  458. val |= BIT(21);
  459. break;
  460. case 12:
  461. val |= BIT(21) | BIT(19);
  462. break;
  463. case 14:
  464. val |= BIT(21) | BIT(20);
  465. break;
  466. case 16:
  467. val |= BIT(19) | BIT(20) | BIT(21);
  468. break;
  469. case 20:
  470. val |= BIT(22);
  471. break;
  472. case 21:
  473. val |= BIT(22) | BIT(19);
  474. break;
  475. case 24:
  476. val |= BIT(22) | BIT(20);
  477. break;
  478. case 25:
  479. val |= BIT(22) | BIT(20) | BIT(19);
  480. break;
  481. case 27:
  482. val |= BIT(22) | BIT(21);
  483. break;
  484. case 29:
  485. val |= BIT(22) | BIT(21) | BIT(19);
  486. break;
  487. case 31:
  488. val |= BIT(22) | BIT(21) | BIT(20);
  489. break;
  490. case 33:
  491. val |= BIT(22) | BIT(21) | BIT(20) | BIT(19);
  492. break;
  493. default:
  494. break;
  495. }
  496. return val;
  497. }
  498. static bool sprd_pinctrl_check_sleep_config(unsigned long *configs,
  499. unsigned int num_configs)
  500. {
  501. unsigned int param;
  502. int i;
  503. for (i = 0; i < num_configs; i++) {
  504. param = pinconf_to_config_param(configs[i]);
  505. if (param == PIN_CONFIG_SLEEP_HARDWARE_STATE)
  506. return true;
  507. }
  508. return false;
  509. }
  510. static int sprd_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin_id,
  511. unsigned long *configs, unsigned int num_configs)
  512. {
  513. struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
  514. struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id);
  515. bool is_sleep_config;
  516. unsigned long reg;
  517. int i;
  518. if (!pin)
  519. return -EINVAL;
  520. is_sleep_config = sprd_pinctrl_check_sleep_config(configs, num_configs);
  521. for (i = 0; i < num_configs; i++) {
  522. unsigned int param, arg, shift, mask, val;
  523. param = pinconf_to_config_param(configs[i]);
  524. arg = pinconf_to_config_argument(configs[i]);
  525. val = 0;
  526. shift = 0;
  527. mask = 0;
  528. if (pin->type == GLOBAL_CTRL_PIN &&
  529. param == SPRD_PIN_CONFIG_CONTROL) {
  530. val = arg;
  531. } else if (pin->type == COMMON_PIN || pin->type == MISC_PIN) {
  532. switch (param) {
  533. case SPRD_PIN_CONFIG_SLEEP_MODE:
  534. if (arg & AP_SLEEP)
  535. val |= AP_SLEEP_MODE;
  536. if (arg & PUBCP_SLEEP)
  537. val |= PUBCP_SLEEP_MODE;
  538. if (arg & TGLDSP_SLEEP)
  539. val |= TGLDSP_SLEEP_MODE;
  540. if (arg & AGDSP_SLEEP)
  541. val |= AGDSP_SLEEP_MODE;
  542. if (arg & CM4_SLEEP)
  543. val |= CM4_SLEEP_MODE;
  544. mask = SLEEP_MODE_MASK;
  545. shift = SLEEP_MODE_SHIFT;
  546. break;
  547. case PIN_CONFIG_INPUT_ENABLE:
  548. if (is_sleep_config == true) {
  549. if (arg > 0)
  550. val |= SLEEP_INPUT;
  551. else
  552. val &= ~SLEEP_INPUT;
  553. mask = SLEEP_INPUT_MASK;
  554. shift = SLEEP_INPUT_SHIFT;
  555. }
  556. break;
  557. case PIN_CONFIG_OUTPUT_ENABLE:
  558. if (is_sleep_config == true) {
  559. if (arg > 0)
  560. val |= SLEEP_OUTPUT;
  561. else
  562. val &= ~SLEEP_OUTPUT;
  563. mask = SLEEP_OUTPUT_MASK;
  564. shift = SLEEP_OUTPUT_SHIFT;
  565. }
  566. break;
  567. case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
  568. if (is_sleep_config == true) {
  569. val = shift = 0;
  570. mask = SLEEP_OUTPUT | SLEEP_INPUT;
  571. }
  572. break;
  573. case PIN_CONFIG_DRIVE_STRENGTH:
  574. if (arg < 2 || arg > 60)
  575. return -EINVAL;
  576. val = sprd_pinconf_drive(arg);
  577. mask = DRIVE_STRENGTH_MASK;
  578. shift = DRIVE_STRENGTH_SHIFT;
  579. break;
  580. case PIN_CONFIG_BIAS_PULL_DOWN:
  581. if (is_sleep_config == true) {
  582. val |= SLEEP_PULL_DOWN;
  583. mask = SLEEP_PULL_DOWN_MASK;
  584. shift = SLEEP_PULL_DOWN_SHIFT;
  585. } else {
  586. val |= PULL_DOWN;
  587. mask = PULL_DOWN_MASK;
  588. shift = PULL_DOWN_SHIFT;
  589. }
  590. break;
  591. case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
  592. if (arg > 0)
  593. val |= INPUT_SCHMITT;
  594. else
  595. val &= ~INPUT_SCHMITT;
  596. mask = INPUT_SCHMITT_MASK;
  597. shift = INPUT_SCHMITT_SHIFT;
  598. break;
  599. case PIN_CONFIG_BIAS_PULL_UP:
  600. if (is_sleep_config) {
  601. val |= SLEEP_PULL_UP;
  602. mask = SLEEP_PULL_UP_MASK;
  603. shift = SLEEP_PULL_UP_SHIFT;
  604. } else {
  605. if (arg == 20000)
  606. val |= PULL_UP_20K;
  607. else if (arg == 4700)
  608. val |= PULL_UP_4_7K;
  609. mask = PULL_UP_MASK;
  610. shift = PULL_UP_SHIFT;
  611. }
  612. break;
  613. case PIN_CONFIG_BIAS_DISABLE:
  614. if (is_sleep_config == true) {
  615. val = shift = 0;
  616. mask = SLEEP_PULL_DOWN | SLEEP_PULL_UP;
  617. } else {
  618. val = shift = 0;
  619. mask = PULL_DOWN | PULL_UP_20K |
  620. PULL_UP_4_7K;
  621. }
  622. break;
  623. case PIN_CONFIG_SLEEP_HARDWARE_STATE:
  624. continue;
  625. default:
  626. return -ENOTSUPP;
  627. }
  628. } else {
  629. return -ENOTSUPP;
  630. }
  631. if (pin->type == GLOBAL_CTRL_PIN) {
  632. reg = readl((void __iomem *)pin->reg);
  633. reg &= ~(PINCTRL_BIT_MASK(pin->bit_width)
  634. << pin->bit_offset);
  635. reg |= (val & PINCTRL_BIT_MASK(pin->bit_width))
  636. << pin->bit_offset;
  637. writel(reg, (void __iomem *)pin->reg);
  638. } else {
  639. reg = readl((void __iomem *)pin->reg);
  640. reg &= ~(mask << shift);
  641. reg |= val;
  642. writel(reg, (void __iomem *)pin->reg);
  643. }
  644. }
  645. return 0;
  646. }
  647. static int sprd_pinconf_group_get(struct pinctrl_dev *pctldev,
  648. unsigned int selector, unsigned long *config)
  649. {
  650. struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
  651. struct sprd_pinctrl_soc_info *info = pctl->info;
  652. struct sprd_pin_group *grp;
  653. unsigned int pin_id;
  654. if (selector >= info->ngroups)
  655. return -EINVAL;
  656. grp = &info->groups[selector];
  657. pin_id = grp->pins[0];
  658. return sprd_pinconf_get(pctldev, pin_id, config);
  659. }
  660. static int sprd_pinconf_group_set(struct pinctrl_dev *pctldev,
  661. unsigned int selector,
  662. unsigned long *configs,
  663. unsigned int num_configs)
  664. {
  665. struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
  666. struct sprd_pinctrl_soc_info *info = pctl->info;
  667. struct sprd_pin_group *grp;
  668. int ret, i;
  669. if (selector >= info->ngroups)
  670. return -EINVAL;
  671. grp = &info->groups[selector];
  672. for (i = 0; i < grp->npins; i++) {
  673. unsigned int pin_id = grp->pins[i];
  674. ret = sprd_pinconf_set(pctldev, pin_id, configs, num_configs);
  675. if (ret)
  676. return ret;
  677. }
  678. return 0;
  679. }
  680. static int sprd_pinconf_get_config(struct pinctrl_dev *pctldev,
  681. unsigned int pin_id,
  682. unsigned long *config)
  683. {
  684. struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
  685. struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id);
  686. if (!pin)
  687. return -EINVAL;
  688. if (pin->type == GLOBAL_CTRL_PIN) {
  689. *config = (readl((void __iomem *)pin->reg) >>
  690. pin->bit_offset) & PINCTRL_BIT_MASK(pin->bit_width);
  691. } else {
  692. *config = readl((void __iomem *)pin->reg);
  693. }
  694. return 0;
  695. }
  696. static void sprd_pinconf_dbg_show(struct pinctrl_dev *pctldev,
  697. struct seq_file *s, unsigned int pin_id)
  698. {
  699. unsigned long config;
  700. int ret;
  701. ret = sprd_pinconf_get_config(pctldev, pin_id, &config);
  702. if (ret)
  703. return;
  704. seq_printf(s, "0x%lx", config);
  705. }
  706. static void sprd_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
  707. struct seq_file *s,
  708. unsigned int selector)
  709. {
  710. struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
  711. struct sprd_pinctrl_soc_info *info = pctl->info;
  712. struct sprd_pin_group *grp;
  713. unsigned long config;
  714. const char *name;
  715. int i, ret;
  716. if (selector >= info->ngroups)
  717. return;
  718. grp = &info->groups[selector];
  719. seq_putc(s, '\n');
  720. for (i = 0; i < grp->npins; i++, config++) {
  721. unsigned int pin_id = grp->pins[i];
  722. name = pin_get_name(pctldev, pin_id);
  723. ret = sprd_pinconf_get_config(pctldev, pin_id, &config);
  724. if (ret)
  725. return;
  726. seq_printf(s, "%s: 0x%lx ", name, config);
  727. }
  728. }
  729. static const struct pinconf_ops sprd_pinconf_ops = {
  730. .is_generic = true,
  731. .pin_config_get = sprd_pinconf_get,
  732. .pin_config_set = sprd_pinconf_set,
  733. .pin_config_group_get = sprd_pinconf_group_get,
  734. .pin_config_group_set = sprd_pinconf_group_set,
  735. .pin_config_dbg_show = sprd_pinconf_dbg_show,
  736. .pin_config_group_dbg_show = sprd_pinconf_group_dbg_show,
  737. };
  738. static const struct pinconf_generic_params sprd_dt_params[] = {
  739. {"sprd,control", SPRD_PIN_CONFIG_CONTROL, 0},
  740. {"sprd,sleep-mode", SPRD_PIN_CONFIG_SLEEP_MODE, 0},
  741. };
  742. #ifdef CONFIG_DEBUG_FS
  743. static const struct pin_config_item sprd_conf_items[] = {
  744. PCONFDUMP(SPRD_PIN_CONFIG_CONTROL, "global control", NULL, true),
  745. PCONFDUMP(SPRD_PIN_CONFIG_SLEEP_MODE, "sleep mode", NULL, true),
  746. };
  747. #endif
  748. static struct pinctrl_desc sprd_pinctrl_desc = {
  749. .pctlops = &sprd_pctrl_ops,
  750. .pmxops = &sprd_pmx_ops,
  751. .confops = &sprd_pinconf_ops,
  752. .num_custom_params = ARRAY_SIZE(sprd_dt_params),
  753. .custom_params = sprd_dt_params,
  754. #ifdef CONFIG_DEBUG_FS
  755. .custom_conf_items = sprd_conf_items,
  756. #endif
  757. .owner = THIS_MODULE,
  758. };
  759. static int sprd_pinctrl_parse_groups(struct device_node *np,
  760. struct sprd_pinctrl *sprd_pctl,
  761. struct sprd_pin_group *grp)
  762. {
  763. struct property *prop;
  764. const char *pin_name;
  765. int ret, i = 0;
  766. ret = of_property_count_strings(np, "pins");
  767. if (ret < 0)
  768. return ret;
  769. grp->name = np->name;
  770. grp->npins = ret;
  771. grp->pins = devm_kcalloc(sprd_pctl->dev,
  772. grp->npins, sizeof(unsigned int),
  773. GFP_KERNEL);
  774. if (!grp->pins)
  775. return -ENOMEM;
  776. of_property_for_each_string(np, "pins", prop, pin_name) {
  777. ret = sprd_pinctrl_get_id_by_name(sprd_pctl, pin_name);
  778. if (ret >= 0)
  779. grp->pins[i++] = ret;
  780. }
  781. for (i = 0; i < grp->npins; i++) {
  782. dev_dbg(sprd_pctl->dev,
  783. "Group[%s] contains [%d] pins: id = %d\n",
  784. grp->name, grp->npins, grp->pins[i]);
  785. }
  786. return 0;
  787. }
  788. static unsigned int sprd_pinctrl_get_groups(struct device_node *np)
  789. {
  790. struct device_node *child;
  791. unsigned int group_cnt, cnt;
  792. group_cnt = of_get_child_count(np);
  793. for_each_child_of_node(np, child) {
  794. cnt = of_get_child_count(child);
  795. if (cnt > 0)
  796. group_cnt += cnt;
  797. }
  798. return group_cnt;
  799. }
  800. static int sprd_pinctrl_parse_dt(struct sprd_pinctrl *sprd_pctl)
  801. {
  802. struct sprd_pinctrl_soc_info *info = sprd_pctl->info;
  803. struct device_node *np = sprd_pctl->dev->of_node;
  804. struct device_node *child, *sub_child;
  805. struct sprd_pin_group *grp;
  806. const char **temp;
  807. int ret;
  808. if (!np)
  809. return -ENODEV;
  810. info->ngroups = sprd_pinctrl_get_groups(np);
  811. if (!info->ngroups)
  812. return 0;
  813. info->groups = devm_kcalloc(sprd_pctl->dev,
  814. info->ngroups,
  815. sizeof(struct sprd_pin_group),
  816. GFP_KERNEL);
  817. if (!info->groups)
  818. return -ENOMEM;
  819. info->grp_names = devm_kcalloc(sprd_pctl->dev,
  820. info->ngroups, sizeof(char *),
  821. GFP_KERNEL);
  822. if (!info->grp_names)
  823. return -ENOMEM;
  824. temp = info->grp_names;
  825. grp = info->groups;
  826. for_each_child_of_node(np, child) {
  827. ret = sprd_pinctrl_parse_groups(child, sprd_pctl, grp);
  828. if (ret) {
  829. of_node_put(child);
  830. return ret;
  831. }
  832. *temp++ = grp->name;
  833. grp++;
  834. if (of_get_child_count(child) > 0) {
  835. for_each_child_of_node(child, sub_child) {
  836. ret = sprd_pinctrl_parse_groups(sub_child,
  837. sprd_pctl, grp);
  838. if (ret) {
  839. of_node_put(sub_child);
  840. of_node_put(child);
  841. return ret;
  842. }
  843. *temp++ = grp->name;
  844. grp++;
  845. }
  846. }
  847. }
  848. return 0;
  849. }
  850. static int sprd_pinctrl_add_pins(struct sprd_pinctrl *sprd_pctl,
  851. struct sprd_pins_info *sprd_soc_pin_info,
  852. int pins_cnt)
  853. {
  854. struct sprd_pinctrl_soc_info *info = sprd_pctl->info;
  855. unsigned int ctrl_pin = 0, com_pin = 0;
  856. struct sprd_pin *pin;
  857. int i;
  858. info->npins = pins_cnt;
  859. info->pins = devm_kcalloc(sprd_pctl->dev,
  860. info->npins, sizeof(struct sprd_pin),
  861. GFP_KERNEL);
  862. if (!info->pins)
  863. return -ENOMEM;
  864. for (i = 0, pin = info->pins; i < info->npins; i++, pin++) {
  865. unsigned int reg;
  866. pin->name = sprd_soc_pin_info[i].name;
  867. pin->type = sprd_soc_pin_info[i].type;
  868. pin->number = sprd_soc_pin_info[i].num;
  869. reg = sprd_soc_pin_info[i].reg;
  870. if (pin->type == GLOBAL_CTRL_PIN) {
  871. pin->reg = (unsigned long)sprd_pctl->base +
  872. PINCTRL_REG_LEN * reg;
  873. pin->bit_offset = sprd_soc_pin_info[i].bit_offset;
  874. pin->bit_width = sprd_soc_pin_info[i].bit_width;
  875. ctrl_pin++;
  876. } else if (pin->type == COMMON_PIN) {
  877. pin->reg = (unsigned long)sprd_pctl->base +
  878. PINCTRL_REG_OFFSET + PINCTRL_REG_LEN *
  879. (i - ctrl_pin);
  880. com_pin++;
  881. } else if (pin->type == MISC_PIN) {
  882. pin->reg = (unsigned long)sprd_pctl->base +
  883. PINCTRL_REG_MISC_OFFSET + PINCTRL_REG_LEN *
  884. (i - ctrl_pin - com_pin);
  885. }
  886. }
  887. for (i = 0, pin = info->pins; i < info->npins; pin++, i++) {
  888. dev_dbg(sprd_pctl->dev, "pin name[%s-%d], type = %d, "
  889. "bit offset = %ld, bit width = %ld, reg = 0x%lx\n",
  890. pin->name, pin->number, pin->type,
  891. pin->bit_offset, pin->bit_width, pin->reg);
  892. }
  893. return 0;
  894. }
  895. int sprd_pinctrl_core_probe(struct platform_device *pdev,
  896. struct sprd_pins_info *sprd_soc_pin_info,
  897. int pins_cnt)
  898. {
  899. struct sprd_pinctrl *sprd_pctl;
  900. struct sprd_pinctrl_soc_info *pinctrl_info;
  901. struct pinctrl_pin_desc *pin_desc;
  902. int ret, i;
  903. sprd_pctl = devm_kzalloc(&pdev->dev, sizeof(struct sprd_pinctrl),
  904. GFP_KERNEL);
  905. if (!sprd_pctl)
  906. return -ENOMEM;
  907. sprd_pctl->base = devm_platform_ioremap_resource(pdev, 0);
  908. if (IS_ERR(sprd_pctl->base))
  909. return PTR_ERR(sprd_pctl->base);
  910. pinctrl_info = devm_kzalloc(&pdev->dev,
  911. sizeof(struct sprd_pinctrl_soc_info),
  912. GFP_KERNEL);
  913. if (!pinctrl_info)
  914. return -ENOMEM;
  915. sprd_pctl->info = pinctrl_info;
  916. sprd_pctl->dev = &pdev->dev;
  917. platform_set_drvdata(pdev, sprd_pctl);
  918. ret = sprd_pinctrl_add_pins(sprd_pctl, sprd_soc_pin_info, pins_cnt);
  919. if (ret) {
  920. dev_err(&pdev->dev, "fail to add pins information\n");
  921. return ret;
  922. }
  923. ret = sprd_pinctrl_parse_dt(sprd_pctl);
  924. if (ret) {
  925. dev_err(&pdev->dev, "fail to parse dt properties\n");
  926. return ret;
  927. }
  928. pin_desc = devm_kcalloc(&pdev->dev,
  929. pinctrl_info->npins,
  930. sizeof(struct pinctrl_pin_desc),
  931. GFP_KERNEL);
  932. if (!pin_desc)
  933. return -ENOMEM;
  934. for (i = 0; i < pinctrl_info->npins; i++) {
  935. pin_desc[i].number = pinctrl_info->pins[i].number;
  936. pin_desc[i].name = pinctrl_info->pins[i].name;
  937. pin_desc[i].drv_data = pinctrl_info;
  938. }
  939. sprd_pinctrl_desc.pins = pin_desc;
  940. sprd_pinctrl_desc.name = dev_name(&pdev->dev);
  941. sprd_pinctrl_desc.npins = pinctrl_info->npins;
  942. sprd_pctl->pctl = pinctrl_register(&sprd_pinctrl_desc,
  943. &pdev->dev, (void *)sprd_pctl);
  944. if (IS_ERR(sprd_pctl->pctl)) {
  945. dev_err(&pdev->dev, "could not register pinctrl driver\n");
  946. return PTR_ERR(sprd_pctl->pctl);
  947. }
  948. return 0;
  949. }
  950. EXPORT_SYMBOL_GPL(sprd_pinctrl_core_probe);
  951. int sprd_pinctrl_remove(struct platform_device *pdev)
  952. {
  953. struct sprd_pinctrl *sprd_pctl = platform_get_drvdata(pdev);
  954. pinctrl_unregister(sprd_pctl->pctl);
  955. return 0;
  956. }
  957. EXPORT_SYMBOL_GPL(sprd_pinctrl_remove);
  958. void sprd_pinctrl_shutdown(struct platform_device *pdev)
  959. {
  960. struct pinctrl *pinctl;
  961. struct pinctrl_state *state;
  962. pinctl = devm_pinctrl_get(&pdev->dev);
  963. if (IS_ERR(pinctl))
  964. return;
  965. state = pinctrl_lookup_state(pinctl, "shutdown");
  966. if (IS_ERR(state))
  967. return;
  968. pinctrl_select_state(pinctl, state);
  969. }
  970. EXPORT_SYMBOL_GPL(sprd_pinctrl_shutdown);
  971. MODULE_DESCRIPTION("SPREADTRUM Pin Controller Driver");
  972. MODULE_AUTHOR("Baolin Wang <[email protected]>");
  973. MODULE_LICENSE("GPL v2");