hwmon.c 6.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * NVM Express hardware monitoring support
  4. * Copyright (c) 2019, Guenter Roeck
  5. */
  6. #include <linux/hwmon.h>
  7. #include <linux/units.h>
  8. #include <asm/unaligned.h>
  9. #include "nvme.h"
  10. struct nvme_hwmon_data {
  11. struct nvme_ctrl *ctrl;
  12. struct nvme_smart_log *log;
  13. struct mutex read_lock;
  14. };
  15. static int nvme_get_temp_thresh(struct nvme_ctrl *ctrl, int sensor, bool under,
  16. long *temp)
  17. {
  18. unsigned int threshold = sensor << NVME_TEMP_THRESH_SELECT_SHIFT;
  19. u32 status;
  20. int ret;
  21. if (under)
  22. threshold |= NVME_TEMP_THRESH_TYPE_UNDER;
  23. ret = nvme_get_features(ctrl, NVME_FEAT_TEMP_THRESH, threshold, NULL, 0,
  24. &status);
  25. if (ret > 0)
  26. return -EIO;
  27. if (ret < 0)
  28. return ret;
  29. *temp = kelvin_to_millicelsius(status & NVME_TEMP_THRESH_MASK);
  30. return 0;
  31. }
  32. static int nvme_set_temp_thresh(struct nvme_ctrl *ctrl, int sensor, bool under,
  33. long temp)
  34. {
  35. unsigned int threshold = sensor << NVME_TEMP_THRESH_SELECT_SHIFT;
  36. int ret;
  37. temp = millicelsius_to_kelvin(temp);
  38. threshold |= clamp_val(temp, 0, NVME_TEMP_THRESH_MASK);
  39. if (under)
  40. threshold |= NVME_TEMP_THRESH_TYPE_UNDER;
  41. ret = nvme_set_features(ctrl, NVME_FEAT_TEMP_THRESH, threshold, NULL, 0,
  42. NULL);
  43. if (ret > 0)
  44. return -EIO;
  45. return ret;
  46. }
  47. static int nvme_hwmon_get_smart_log(struct nvme_hwmon_data *data)
  48. {
  49. return nvme_get_log(data->ctrl, NVME_NSID_ALL, NVME_LOG_SMART, 0,
  50. NVME_CSI_NVM, data->log, sizeof(*data->log), 0);
  51. }
  52. static int nvme_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
  53. u32 attr, int channel, long *val)
  54. {
  55. struct nvme_hwmon_data *data = dev_get_drvdata(dev);
  56. struct nvme_smart_log *log = data->log;
  57. int temp;
  58. int err;
  59. /*
  60. * First handle attributes which don't require us to read
  61. * the smart log.
  62. */
  63. switch (attr) {
  64. case hwmon_temp_max:
  65. return nvme_get_temp_thresh(data->ctrl, channel, false, val);
  66. case hwmon_temp_min:
  67. return nvme_get_temp_thresh(data->ctrl, channel, true, val);
  68. case hwmon_temp_crit:
  69. *val = kelvin_to_millicelsius(data->ctrl->cctemp);
  70. return 0;
  71. default:
  72. break;
  73. }
  74. mutex_lock(&data->read_lock);
  75. err = nvme_hwmon_get_smart_log(data);
  76. if (err)
  77. goto unlock;
  78. switch (attr) {
  79. case hwmon_temp_input:
  80. if (!channel)
  81. temp = get_unaligned_le16(log->temperature);
  82. else
  83. temp = le16_to_cpu(log->temp_sensor[channel - 1]);
  84. *val = kelvin_to_millicelsius(temp);
  85. break;
  86. case hwmon_temp_alarm:
  87. *val = !!(log->critical_warning & NVME_SMART_CRIT_TEMPERATURE);
  88. break;
  89. default:
  90. err = -EOPNOTSUPP;
  91. break;
  92. }
  93. unlock:
  94. mutex_unlock(&data->read_lock);
  95. return err;
  96. }
  97. static int nvme_hwmon_write(struct device *dev, enum hwmon_sensor_types type,
  98. u32 attr, int channel, long val)
  99. {
  100. struct nvme_hwmon_data *data = dev_get_drvdata(dev);
  101. switch (attr) {
  102. case hwmon_temp_max:
  103. return nvme_set_temp_thresh(data->ctrl, channel, false, val);
  104. case hwmon_temp_min:
  105. return nvme_set_temp_thresh(data->ctrl, channel, true, val);
  106. default:
  107. break;
  108. }
  109. return -EOPNOTSUPP;
  110. }
  111. static const char * const nvme_hwmon_sensor_names[] = {
  112. "Composite",
  113. "Sensor 1",
  114. "Sensor 2",
  115. "Sensor 3",
  116. "Sensor 4",
  117. "Sensor 5",
  118. "Sensor 6",
  119. "Sensor 7",
  120. "Sensor 8",
  121. };
  122. static int nvme_hwmon_read_string(struct device *dev,
  123. enum hwmon_sensor_types type, u32 attr,
  124. int channel, const char **str)
  125. {
  126. *str = nvme_hwmon_sensor_names[channel];
  127. return 0;
  128. }
  129. static umode_t nvme_hwmon_is_visible(const void *_data,
  130. enum hwmon_sensor_types type,
  131. u32 attr, int channel)
  132. {
  133. const struct nvme_hwmon_data *data = _data;
  134. switch (attr) {
  135. case hwmon_temp_crit:
  136. if (!channel && data->ctrl->cctemp)
  137. return 0444;
  138. break;
  139. case hwmon_temp_max:
  140. case hwmon_temp_min:
  141. if ((!channel && data->ctrl->wctemp) ||
  142. (channel && data->log->temp_sensor[channel - 1] &&
  143. !(data->ctrl->quirks &
  144. NVME_QUIRK_NO_SECONDARY_TEMP_THRESH))) {
  145. if (data->ctrl->quirks &
  146. NVME_QUIRK_NO_TEMP_THRESH_CHANGE)
  147. return 0444;
  148. return 0644;
  149. }
  150. break;
  151. case hwmon_temp_alarm:
  152. if (!channel)
  153. return 0444;
  154. break;
  155. case hwmon_temp_input:
  156. case hwmon_temp_label:
  157. if (!channel || data->log->temp_sensor[channel - 1])
  158. return 0444;
  159. break;
  160. default:
  161. break;
  162. }
  163. return 0;
  164. }
  165. static const struct hwmon_channel_info *nvme_hwmon_info[] = {
  166. HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ),
  167. HWMON_CHANNEL_INFO(temp,
  168. HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN |
  169. HWMON_T_CRIT | HWMON_T_LABEL | HWMON_T_ALARM,
  170. HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN |
  171. HWMON_T_LABEL,
  172. HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN |
  173. HWMON_T_LABEL,
  174. HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN |
  175. HWMON_T_LABEL,
  176. HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN |
  177. HWMON_T_LABEL,
  178. HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN |
  179. HWMON_T_LABEL,
  180. HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN |
  181. HWMON_T_LABEL,
  182. HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN |
  183. HWMON_T_LABEL,
  184. HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN |
  185. HWMON_T_LABEL),
  186. NULL
  187. };
  188. static const struct hwmon_ops nvme_hwmon_ops = {
  189. .is_visible = nvme_hwmon_is_visible,
  190. .read = nvme_hwmon_read,
  191. .read_string = nvme_hwmon_read_string,
  192. .write = nvme_hwmon_write,
  193. };
  194. static const struct hwmon_chip_info nvme_hwmon_chip_info = {
  195. .ops = &nvme_hwmon_ops,
  196. .info = nvme_hwmon_info,
  197. };
  198. int nvme_hwmon_init(struct nvme_ctrl *ctrl)
  199. {
  200. struct device *dev = ctrl->device;
  201. struct nvme_hwmon_data *data;
  202. struct device *hwmon;
  203. int err;
  204. data = kzalloc(sizeof(*data), GFP_KERNEL);
  205. if (!data)
  206. return -ENOMEM;
  207. data->log = kzalloc(sizeof(*data->log), GFP_KERNEL);
  208. if (!data->log) {
  209. err = -ENOMEM;
  210. goto err_free_data;
  211. }
  212. data->ctrl = ctrl;
  213. mutex_init(&data->read_lock);
  214. err = nvme_hwmon_get_smart_log(data);
  215. if (err) {
  216. dev_warn(dev, "Failed to read smart log (error %d)\n", err);
  217. goto err_free_log;
  218. }
  219. hwmon = hwmon_device_register_with_info(dev, "nvme",
  220. data, &nvme_hwmon_chip_info,
  221. NULL);
  222. if (IS_ERR(hwmon)) {
  223. dev_warn(dev, "Failed to instantiate hwmon device\n");
  224. err = PTR_ERR(hwmon);
  225. goto err_free_log;
  226. }
  227. ctrl->hwmon_device = hwmon;
  228. return 0;
  229. err_free_log:
  230. kfree(data->log);
  231. err_free_data:
  232. kfree(data);
  233. return err;
  234. }
  235. void nvme_hwmon_exit(struct nvme_ctrl *ctrl)
  236. {
  237. if (ctrl->hwmon_device) {
  238. struct nvme_hwmon_data *data =
  239. dev_get_drvdata(ctrl->hwmon_device);
  240. hwmon_device_unregister(ctrl->hwmon_device);
  241. ctrl->hwmon_device = NULL;
  242. kfree(data->log);
  243. kfree(data);
  244. }
  245. }