tx.c 18 KB

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  1. // SPDX-License-Identifier: ISC
  2. /*
  3. * Copyright (C) 2016 Felix Fietkau <[email protected]>
  4. */
  5. #include "mt76.h"
  6. static int
  7. mt76_txq_get_qid(struct ieee80211_txq *txq)
  8. {
  9. if (!txq->sta)
  10. return MT_TXQ_BE;
  11. return txq->ac;
  12. }
  13. void
  14. mt76_tx_check_agg_ssn(struct ieee80211_sta *sta, struct sk_buff *skb)
  15. {
  16. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  17. struct ieee80211_txq *txq;
  18. struct mt76_txq *mtxq;
  19. u8 tid;
  20. if (!sta || !ieee80211_is_data_qos(hdr->frame_control) ||
  21. !ieee80211_is_data_present(hdr->frame_control))
  22. return;
  23. tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
  24. txq = sta->txq[tid];
  25. mtxq = (struct mt76_txq *)txq->drv_priv;
  26. if (!mtxq->aggr)
  27. return;
  28. mtxq->agg_ssn = le16_to_cpu(hdr->seq_ctrl) + 0x10;
  29. }
  30. EXPORT_SYMBOL_GPL(mt76_tx_check_agg_ssn);
  31. void
  32. mt76_tx_status_lock(struct mt76_dev *dev, struct sk_buff_head *list)
  33. __acquires(&dev->status_lock)
  34. {
  35. __skb_queue_head_init(list);
  36. spin_lock_bh(&dev->status_lock);
  37. }
  38. EXPORT_SYMBOL_GPL(mt76_tx_status_lock);
  39. void
  40. mt76_tx_status_unlock(struct mt76_dev *dev, struct sk_buff_head *list)
  41. __releases(&dev->status_lock)
  42. {
  43. struct ieee80211_hw *hw;
  44. struct sk_buff *skb;
  45. spin_unlock_bh(&dev->status_lock);
  46. rcu_read_lock();
  47. while ((skb = __skb_dequeue(list)) != NULL) {
  48. struct ieee80211_tx_status status = {
  49. .skb = skb,
  50. .info = IEEE80211_SKB_CB(skb),
  51. };
  52. struct ieee80211_rate_status rs = {};
  53. struct mt76_tx_cb *cb = mt76_tx_skb_cb(skb);
  54. struct mt76_wcid *wcid;
  55. wcid = rcu_dereference(dev->wcid[cb->wcid]);
  56. if (wcid) {
  57. status.sta = wcid_to_sta(wcid);
  58. if (status.sta && (wcid->rate.flags || wcid->rate.legacy)) {
  59. rs.rate_idx = wcid->rate;
  60. status.rates = &rs;
  61. status.n_rates = 1;
  62. } else {
  63. status.n_rates = 0;
  64. }
  65. }
  66. hw = mt76_tx_status_get_hw(dev, skb);
  67. spin_lock_bh(&dev->rx_lock);
  68. ieee80211_tx_status_ext(hw, &status);
  69. spin_unlock_bh(&dev->rx_lock);
  70. }
  71. rcu_read_unlock();
  72. }
  73. EXPORT_SYMBOL_GPL(mt76_tx_status_unlock);
  74. static void
  75. __mt76_tx_status_skb_done(struct mt76_dev *dev, struct sk_buff *skb, u8 flags,
  76. struct sk_buff_head *list)
  77. {
  78. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  79. struct mt76_tx_cb *cb = mt76_tx_skb_cb(skb);
  80. u8 done = MT_TX_CB_DMA_DONE | MT_TX_CB_TXS_DONE;
  81. flags |= cb->flags;
  82. cb->flags = flags;
  83. if ((flags & done) != done)
  84. return;
  85. /* Tx status can be unreliable. if it fails, mark the frame as ACKed */
  86. if (flags & MT_TX_CB_TXS_FAILED) {
  87. info->status.rates[0].count = 0;
  88. info->status.rates[0].idx = -1;
  89. info->flags |= IEEE80211_TX_STAT_ACK;
  90. }
  91. __skb_queue_tail(list, skb);
  92. }
  93. void
  94. mt76_tx_status_skb_done(struct mt76_dev *dev, struct sk_buff *skb,
  95. struct sk_buff_head *list)
  96. {
  97. __mt76_tx_status_skb_done(dev, skb, MT_TX_CB_TXS_DONE, list);
  98. }
  99. EXPORT_SYMBOL_GPL(mt76_tx_status_skb_done);
  100. int
  101. mt76_tx_status_skb_add(struct mt76_dev *dev, struct mt76_wcid *wcid,
  102. struct sk_buff *skb)
  103. {
  104. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  105. struct mt76_tx_cb *cb = mt76_tx_skb_cb(skb);
  106. int pid;
  107. memset(cb, 0, sizeof(*cb));
  108. if (!wcid || !rcu_access_pointer(dev->wcid[wcid->idx]))
  109. return MT_PACKET_ID_NO_ACK;
  110. if (info->flags & IEEE80211_TX_CTL_NO_ACK)
  111. return MT_PACKET_ID_NO_ACK;
  112. if (!(info->flags & (IEEE80211_TX_CTL_REQ_TX_STATUS |
  113. IEEE80211_TX_CTL_RATE_CTRL_PROBE)))
  114. return MT_PACKET_ID_NO_SKB;
  115. spin_lock_bh(&dev->status_lock);
  116. pid = idr_alloc(&wcid->pktid, skb, MT_PACKET_ID_FIRST,
  117. MT_PACKET_ID_MASK, GFP_ATOMIC);
  118. if (pid < 0) {
  119. pid = MT_PACKET_ID_NO_SKB;
  120. goto out;
  121. }
  122. cb->wcid = wcid->idx;
  123. cb->pktid = pid;
  124. if (list_empty(&wcid->list))
  125. list_add_tail(&wcid->list, &dev->wcid_list);
  126. out:
  127. spin_unlock_bh(&dev->status_lock);
  128. return pid;
  129. }
  130. EXPORT_SYMBOL_GPL(mt76_tx_status_skb_add);
  131. struct sk_buff *
  132. mt76_tx_status_skb_get(struct mt76_dev *dev, struct mt76_wcid *wcid, int pktid,
  133. struct sk_buff_head *list)
  134. {
  135. struct sk_buff *skb;
  136. int id;
  137. lockdep_assert_held(&dev->status_lock);
  138. skb = idr_remove(&wcid->pktid, pktid);
  139. if (skb)
  140. goto out;
  141. /* look for stale entries in the wcid idr queue */
  142. idr_for_each_entry(&wcid->pktid, skb, id) {
  143. struct mt76_tx_cb *cb = mt76_tx_skb_cb(skb);
  144. if (pktid >= 0) {
  145. if (!(cb->flags & MT_TX_CB_DMA_DONE))
  146. continue;
  147. if (time_is_after_jiffies(cb->jiffies +
  148. MT_TX_STATUS_SKB_TIMEOUT))
  149. continue;
  150. }
  151. /* It has been too long since DMA_DONE, time out this packet
  152. * and stop waiting for TXS callback.
  153. */
  154. idr_remove(&wcid->pktid, cb->pktid);
  155. __mt76_tx_status_skb_done(dev, skb, MT_TX_CB_TXS_FAILED |
  156. MT_TX_CB_TXS_DONE, list);
  157. }
  158. out:
  159. if (idr_is_empty(&wcid->pktid))
  160. list_del_init(&wcid->list);
  161. return skb;
  162. }
  163. EXPORT_SYMBOL_GPL(mt76_tx_status_skb_get);
  164. void
  165. mt76_tx_status_check(struct mt76_dev *dev, bool flush)
  166. {
  167. struct mt76_wcid *wcid, *tmp;
  168. struct sk_buff_head list;
  169. mt76_tx_status_lock(dev, &list);
  170. list_for_each_entry_safe(wcid, tmp, &dev->wcid_list, list)
  171. mt76_tx_status_skb_get(dev, wcid, flush ? -1 : 0, &list);
  172. mt76_tx_status_unlock(dev, &list);
  173. }
  174. EXPORT_SYMBOL_GPL(mt76_tx_status_check);
  175. static void
  176. mt76_tx_check_non_aql(struct mt76_dev *dev, struct mt76_wcid *wcid,
  177. struct sk_buff *skb)
  178. {
  179. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  180. int pending;
  181. if (!wcid || info->tx_time_est)
  182. return;
  183. pending = atomic_dec_return(&wcid->non_aql_packets);
  184. if (pending < 0)
  185. atomic_cmpxchg(&wcid->non_aql_packets, pending, 0);
  186. }
  187. void __mt76_tx_complete_skb(struct mt76_dev *dev, u16 wcid_idx, struct sk_buff *skb,
  188. struct list_head *free_list)
  189. {
  190. struct mt76_tx_cb *cb = mt76_tx_skb_cb(skb);
  191. struct ieee80211_tx_status status = {
  192. .skb = skb,
  193. .free_list = free_list,
  194. };
  195. struct mt76_wcid *wcid = NULL;
  196. struct ieee80211_hw *hw;
  197. struct sk_buff_head list;
  198. rcu_read_lock();
  199. if (wcid_idx < ARRAY_SIZE(dev->wcid))
  200. wcid = rcu_dereference(dev->wcid[wcid_idx]);
  201. mt76_tx_check_non_aql(dev, wcid, skb);
  202. #ifdef CONFIG_NL80211_TESTMODE
  203. if (mt76_is_testmode_skb(dev, skb, &hw)) {
  204. struct mt76_phy *phy = hw->priv;
  205. if (skb == phy->test.tx_skb)
  206. phy->test.tx_done++;
  207. if (phy->test.tx_queued == phy->test.tx_done)
  208. wake_up(&dev->tx_wait);
  209. dev_kfree_skb_any(skb);
  210. goto out;
  211. }
  212. #endif
  213. if (cb->pktid < MT_PACKET_ID_FIRST) {
  214. hw = mt76_tx_status_get_hw(dev, skb);
  215. status.sta = wcid_to_sta(wcid);
  216. spin_lock_bh(&dev->rx_lock);
  217. ieee80211_tx_status_ext(hw, &status);
  218. spin_unlock_bh(&dev->rx_lock);
  219. goto out;
  220. }
  221. mt76_tx_status_lock(dev, &list);
  222. cb->jiffies = jiffies;
  223. __mt76_tx_status_skb_done(dev, skb, MT_TX_CB_DMA_DONE, &list);
  224. mt76_tx_status_unlock(dev, &list);
  225. out:
  226. rcu_read_unlock();
  227. }
  228. EXPORT_SYMBOL_GPL(__mt76_tx_complete_skb);
  229. static int
  230. __mt76_tx_queue_skb(struct mt76_phy *phy, int qid, struct sk_buff *skb,
  231. struct mt76_wcid *wcid, struct ieee80211_sta *sta,
  232. bool *stop)
  233. {
  234. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  235. struct mt76_queue *q = phy->q_tx[qid];
  236. struct mt76_dev *dev = phy->dev;
  237. bool non_aql;
  238. int pending;
  239. int idx;
  240. non_aql = !info->tx_time_est;
  241. idx = dev->queue_ops->tx_queue_skb(dev, q, qid, skb, wcid, sta);
  242. if (idx < 0 || !sta)
  243. return idx;
  244. wcid = (struct mt76_wcid *)sta->drv_priv;
  245. q->entry[idx].wcid = wcid->idx;
  246. if (!non_aql)
  247. return idx;
  248. pending = atomic_inc_return(&wcid->non_aql_packets);
  249. if (stop && pending >= MT_MAX_NON_AQL_PKT)
  250. *stop = true;
  251. return idx;
  252. }
  253. void
  254. mt76_tx(struct mt76_phy *phy, struct ieee80211_sta *sta,
  255. struct mt76_wcid *wcid, struct sk_buff *skb)
  256. {
  257. struct mt76_dev *dev = phy->dev;
  258. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  259. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  260. struct mt76_queue *q;
  261. int qid = skb_get_queue_mapping(skb);
  262. if (mt76_testmode_enabled(phy)) {
  263. ieee80211_free_txskb(phy->hw, skb);
  264. return;
  265. }
  266. if (WARN_ON(qid >= MT_TXQ_PSD)) {
  267. qid = MT_TXQ_BE;
  268. skb_set_queue_mapping(skb, qid);
  269. }
  270. if ((dev->drv->drv_flags & MT_DRV_HW_MGMT_TXQ) &&
  271. !(info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP) &&
  272. !ieee80211_is_data(hdr->frame_control) &&
  273. !ieee80211_is_bufferable_mmpdu(hdr->frame_control)) {
  274. qid = MT_TXQ_PSD;
  275. }
  276. if (wcid && !(wcid->tx_info & MT_WCID_TX_INFO_SET))
  277. ieee80211_get_tx_rates(info->control.vif, sta, skb,
  278. info->control.rates, 1);
  279. info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, phy->band_idx);
  280. q = phy->q_tx[qid];
  281. spin_lock_bh(&q->lock);
  282. __mt76_tx_queue_skb(phy, qid, skb, wcid, sta, NULL);
  283. dev->queue_ops->kick(dev, q);
  284. spin_unlock_bh(&q->lock);
  285. }
  286. EXPORT_SYMBOL_GPL(mt76_tx);
  287. static struct sk_buff *
  288. mt76_txq_dequeue(struct mt76_phy *phy, struct mt76_txq *mtxq)
  289. {
  290. struct ieee80211_txq *txq = mtxq_to_txq(mtxq);
  291. struct ieee80211_tx_info *info;
  292. struct sk_buff *skb;
  293. skb = ieee80211_tx_dequeue(phy->hw, txq);
  294. if (!skb)
  295. return NULL;
  296. info = IEEE80211_SKB_CB(skb);
  297. info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, phy->band_idx);
  298. return skb;
  299. }
  300. static void
  301. mt76_queue_ps_skb(struct mt76_phy *phy, struct ieee80211_sta *sta,
  302. struct sk_buff *skb, bool last)
  303. {
  304. struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv;
  305. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  306. info->control.flags |= IEEE80211_TX_CTRL_PS_RESPONSE;
  307. if (last)
  308. info->flags |= IEEE80211_TX_STATUS_EOSP |
  309. IEEE80211_TX_CTL_REQ_TX_STATUS;
  310. mt76_skb_set_moredata(skb, !last);
  311. __mt76_tx_queue_skb(phy, MT_TXQ_PSD, skb, wcid, sta, NULL);
  312. }
  313. void
  314. mt76_release_buffered_frames(struct ieee80211_hw *hw, struct ieee80211_sta *sta,
  315. u16 tids, int nframes,
  316. enum ieee80211_frame_release_type reason,
  317. bool more_data)
  318. {
  319. struct mt76_phy *phy = hw->priv;
  320. struct mt76_dev *dev = phy->dev;
  321. struct sk_buff *last_skb = NULL;
  322. struct mt76_queue *hwq = phy->q_tx[MT_TXQ_PSD];
  323. int i;
  324. spin_lock_bh(&hwq->lock);
  325. for (i = 0; tids && nframes; i++, tids >>= 1) {
  326. struct ieee80211_txq *txq = sta->txq[i];
  327. struct mt76_txq *mtxq = (struct mt76_txq *)txq->drv_priv;
  328. struct sk_buff *skb;
  329. if (!(tids & 1))
  330. continue;
  331. do {
  332. skb = mt76_txq_dequeue(phy, mtxq);
  333. if (!skb)
  334. break;
  335. nframes--;
  336. if (last_skb)
  337. mt76_queue_ps_skb(phy, sta, last_skb, false);
  338. last_skb = skb;
  339. } while (nframes);
  340. }
  341. if (last_skb) {
  342. mt76_queue_ps_skb(phy, sta, last_skb, true);
  343. dev->queue_ops->kick(dev, hwq);
  344. } else {
  345. ieee80211_sta_eosp(sta);
  346. }
  347. spin_unlock_bh(&hwq->lock);
  348. }
  349. EXPORT_SYMBOL_GPL(mt76_release_buffered_frames);
  350. static bool
  351. mt76_txq_stopped(struct mt76_queue *q)
  352. {
  353. return q->stopped || q->blocked ||
  354. q->queued + MT_TXQ_FREE_THR >= q->ndesc;
  355. }
  356. static int
  357. mt76_txq_send_burst(struct mt76_phy *phy, struct mt76_queue *q,
  358. struct mt76_txq *mtxq, struct mt76_wcid *wcid)
  359. {
  360. struct mt76_dev *dev = phy->dev;
  361. struct ieee80211_txq *txq = mtxq_to_txq(mtxq);
  362. enum mt76_txq_id qid = mt76_txq_get_qid(txq);
  363. struct ieee80211_tx_info *info;
  364. struct sk_buff *skb;
  365. int n_frames = 1;
  366. bool stop = false;
  367. int idx;
  368. if (test_bit(MT_WCID_FLAG_PS, &wcid->flags))
  369. return 0;
  370. if (atomic_read(&wcid->non_aql_packets) >= MT_MAX_NON_AQL_PKT)
  371. return 0;
  372. skb = mt76_txq_dequeue(phy, mtxq);
  373. if (!skb)
  374. return 0;
  375. info = IEEE80211_SKB_CB(skb);
  376. if (!(wcid->tx_info & MT_WCID_TX_INFO_SET))
  377. ieee80211_get_tx_rates(txq->vif, txq->sta, skb,
  378. info->control.rates, 1);
  379. spin_lock(&q->lock);
  380. idx = __mt76_tx_queue_skb(phy, qid, skb, wcid, txq->sta, &stop);
  381. spin_unlock(&q->lock);
  382. if (idx < 0)
  383. return idx;
  384. do {
  385. if (test_bit(MT76_RESET, &phy->state))
  386. return -EBUSY;
  387. if (stop || mt76_txq_stopped(q))
  388. break;
  389. skb = mt76_txq_dequeue(phy, mtxq);
  390. if (!skb)
  391. break;
  392. info = IEEE80211_SKB_CB(skb);
  393. if (!(wcid->tx_info & MT_WCID_TX_INFO_SET))
  394. ieee80211_get_tx_rates(txq->vif, txq->sta, skb,
  395. info->control.rates, 1);
  396. spin_lock(&q->lock);
  397. idx = __mt76_tx_queue_skb(phy, qid, skb, wcid, txq->sta, &stop);
  398. spin_unlock(&q->lock);
  399. if (idx < 0)
  400. break;
  401. n_frames++;
  402. } while (1);
  403. spin_lock(&q->lock);
  404. dev->queue_ops->kick(dev, q);
  405. spin_unlock(&q->lock);
  406. return n_frames;
  407. }
  408. static int
  409. mt76_txq_schedule_list(struct mt76_phy *phy, enum mt76_txq_id qid)
  410. {
  411. struct mt76_queue *q = phy->q_tx[qid];
  412. struct mt76_dev *dev = phy->dev;
  413. struct ieee80211_txq *txq;
  414. struct mt76_txq *mtxq;
  415. struct mt76_wcid *wcid;
  416. int ret = 0;
  417. while (1) {
  418. int n_frames = 0;
  419. if (test_bit(MT76_RESET, &phy->state))
  420. return -EBUSY;
  421. if (dev->queue_ops->tx_cleanup &&
  422. q->queued + 2 * MT_TXQ_FREE_THR >= q->ndesc) {
  423. dev->queue_ops->tx_cleanup(dev, q, false);
  424. }
  425. txq = ieee80211_next_txq(phy->hw, qid);
  426. if (!txq)
  427. break;
  428. mtxq = (struct mt76_txq *)txq->drv_priv;
  429. wcid = rcu_dereference(dev->wcid[mtxq->wcid]);
  430. if (!wcid || test_bit(MT_WCID_FLAG_PS, &wcid->flags))
  431. continue;
  432. if (mtxq->send_bar && mtxq->aggr) {
  433. struct ieee80211_txq *txq = mtxq_to_txq(mtxq);
  434. struct ieee80211_sta *sta = txq->sta;
  435. struct ieee80211_vif *vif = txq->vif;
  436. u16 agg_ssn = mtxq->agg_ssn;
  437. u8 tid = txq->tid;
  438. mtxq->send_bar = false;
  439. ieee80211_send_bar(vif, sta->addr, tid, agg_ssn);
  440. }
  441. if (!mt76_txq_stopped(q))
  442. n_frames = mt76_txq_send_burst(phy, q, mtxq, wcid);
  443. ieee80211_return_txq(phy->hw, txq, false);
  444. if (unlikely(n_frames < 0))
  445. return n_frames;
  446. ret += n_frames;
  447. }
  448. return ret;
  449. }
  450. void mt76_txq_schedule(struct mt76_phy *phy, enum mt76_txq_id qid)
  451. {
  452. int len;
  453. if (qid >= 4)
  454. return;
  455. local_bh_disable();
  456. rcu_read_lock();
  457. do {
  458. ieee80211_txq_schedule_start(phy->hw, qid);
  459. len = mt76_txq_schedule_list(phy, qid);
  460. ieee80211_txq_schedule_end(phy->hw, qid);
  461. } while (len > 0);
  462. rcu_read_unlock();
  463. local_bh_enable();
  464. }
  465. EXPORT_SYMBOL_GPL(mt76_txq_schedule);
  466. void mt76_txq_schedule_all(struct mt76_phy *phy)
  467. {
  468. int i;
  469. for (i = 0; i <= MT_TXQ_BK; i++)
  470. mt76_txq_schedule(phy, i);
  471. }
  472. EXPORT_SYMBOL_GPL(mt76_txq_schedule_all);
  473. void mt76_tx_worker_run(struct mt76_dev *dev)
  474. {
  475. struct mt76_phy *phy;
  476. int i;
  477. for (i = 0; i < ARRAY_SIZE(dev->phys); i++) {
  478. phy = dev->phys[i];
  479. if (!phy)
  480. continue;
  481. mt76_txq_schedule_all(phy);
  482. }
  483. #ifdef CONFIG_NL80211_TESTMODE
  484. for (i = 0; i < ARRAY_SIZE(dev->phys); i++) {
  485. phy = dev->phys[i];
  486. if (!phy || !phy->test.tx_pending)
  487. continue;
  488. mt76_testmode_tx_pending(phy);
  489. }
  490. #endif
  491. }
  492. EXPORT_SYMBOL_GPL(mt76_tx_worker_run);
  493. void mt76_tx_worker(struct mt76_worker *w)
  494. {
  495. struct mt76_dev *dev = container_of(w, struct mt76_dev, tx_worker);
  496. mt76_tx_worker_run(dev);
  497. }
  498. void mt76_stop_tx_queues(struct mt76_phy *phy, struct ieee80211_sta *sta,
  499. bool send_bar)
  500. {
  501. int i;
  502. for (i = 0; i < ARRAY_SIZE(sta->txq); i++) {
  503. struct ieee80211_txq *txq = sta->txq[i];
  504. struct mt76_queue *hwq;
  505. struct mt76_txq *mtxq;
  506. if (!txq)
  507. continue;
  508. hwq = phy->q_tx[mt76_txq_get_qid(txq)];
  509. mtxq = (struct mt76_txq *)txq->drv_priv;
  510. spin_lock_bh(&hwq->lock);
  511. mtxq->send_bar = mtxq->aggr && send_bar;
  512. spin_unlock_bh(&hwq->lock);
  513. }
  514. }
  515. EXPORT_SYMBOL_GPL(mt76_stop_tx_queues);
  516. void mt76_wake_tx_queue(struct ieee80211_hw *hw, struct ieee80211_txq *txq)
  517. {
  518. struct mt76_phy *phy = hw->priv;
  519. struct mt76_dev *dev = phy->dev;
  520. if (!test_bit(MT76_STATE_RUNNING, &phy->state))
  521. return;
  522. mt76_worker_schedule(&dev->tx_worker);
  523. }
  524. EXPORT_SYMBOL_GPL(mt76_wake_tx_queue);
  525. u8 mt76_ac_to_hwq(u8 ac)
  526. {
  527. static const u8 wmm_queue_map[] = {
  528. [IEEE80211_AC_BE] = 0,
  529. [IEEE80211_AC_BK] = 1,
  530. [IEEE80211_AC_VI] = 2,
  531. [IEEE80211_AC_VO] = 3,
  532. };
  533. if (WARN_ON(ac >= IEEE80211_NUM_ACS))
  534. return 0;
  535. return wmm_queue_map[ac];
  536. }
  537. EXPORT_SYMBOL_GPL(mt76_ac_to_hwq);
  538. int mt76_skb_adjust_pad(struct sk_buff *skb, int pad)
  539. {
  540. struct sk_buff *iter, *last = skb;
  541. /* First packet of a A-MSDU burst keeps track of the whole burst
  542. * length, need to update length of it and the last packet.
  543. */
  544. skb_walk_frags(skb, iter) {
  545. last = iter;
  546. if (!iter->next) {
  547. skb->data_len += pad;
  548. skb->len += pad;
  549. break;
  550. }
  551. }
  552. if (skb_pad(last, pad))
  553. return -ENOMEM;
  554. __skb_put(last, pad);
  555. return 0;
  556. }
  557. EXPORT_SYMBOL_GPL(mt76_skb_adjust_pad);
  558. void mt76_queue_tx_complete(struct mt76_dev *dev, struct mt76_queue *q,
  559. struct mt76_queue_entry *e)
  560. {
  561. if (e->skb)
  562. dev->drv->tx_complete_skb(dev, e);
  563. spin_lock_bh(&q->lock);
  564. q->tail = (q->tail + 1) % q->ndesc;
  565. q->queued--;
  566. spin_unlock_bh(&q->lock);
  567. }
  568. EXPORT_SYMBOL_GPL(mt76_queue_tx_complete);
  569. void __mt76_set_tx_blocked(struct mt76_dev *dev, bool blocked)
  570. {
  571. struct mt76_phy *phy = &dev->phy;
  572. struct mt76_queue *q = phy->q_tx[0];
  573. if (blocked == q->blocked)
  574. return;
  575. q->blocked = blocked;
  576. phy = dev->phys[MT_BAND1];
  577. if (phy) {
  578. q = phy->q_tx[0];
  579. q->blocked = blocked;
  580. }
  581. phy = dev->phys[MT_BAND2];
  582. if (phy) {
  583. q = phy->q_tx[0];
  584. q->blocked = blocked;
  585. }
  586. if (!blocked)
  587. mt76_worker_schedule(&dev->tx_worker);
  588. }
  589. EXPORT_SYMBOL_GPL(__mt76_set_tx_blocked);
  590. int mt76_token_consume(struct mt76_dev *dev, struct mt76_txwi_cache **ptxwi)
  591. {
  592. int token;
  593. spin_lock_bh(&dev->token_lock);
  594. token = idr_alloc(&dev->token, *ptxwi, 0, dev->token_size, GFP_ATOMIC);
  595. if (token >= 0)
  596. dev->token_count++;
  597. #ifdef CONFIG_NET_MEDIATEK_SOC_WED
  598. if (mtk_wed_device_active(&dev->mmio.wed) &&
  599. token >= dev->mmio.wed.wlan.token_start)
  600. dev->wed_token_count++;
  601. #endif
  602. if (dev->token_count >= dev->token_size - MT76_TOKEN_FREE_THR)
  603. __mt76_set_tx_blocked(dev, true);
  604. spin_unlock_bh(&dev->token_lock);
  605. return token;
  606. }
  607. EXPORT_SYMBOL_GPL(mt76_token_consume);
  608. struct mt76_txwi_cache *
  609. mt76_token_release(struct mt76_dev *dev, int token, bool *wake)
  610. {
  611. struct mt76_txwi_cache *txwi;
  612. spin_lock_bh(&dev->token_lock);
  613. txwi = idr_remove(&dev->token, token);
  614. if (txwi) {
  615. dev->token_count--;
  616. #ifdef CONFIG_NET_MEDIATEK_SOC_WED
  617. if (mtk_wed_device_active(&dev->mmio.wed) &&
  618. token >= dev->mmio.wed.wlan.token_start &&
  619. --dev->wed_token_count == 0)
  620. wake_up(&dev->tx_wait);
  621. #endif
  622. }
  623. if (dev->token_count < dev->token_size - MT76_TOKEN_FREE_THR &&
  624. dev->phy.q_tx[0]->blocked)
  625. *wake = true;
  626. spin_unlock_bh(&dev->token_lock);
  627. return txwi;
  628. }
  629. EXPORT_SYMBOL_GPL(mt76_token_release);