wmi.c 313 KB

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  1. // SPDX-License-Identifier: ISC
  2. /*
  3. * Copyright (c) 2005-2011 Atheros Communications Inc.
  4. * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
  5. * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
  6. */
  7. #include <linux/skbuff.h>
  8. #include <linux/ctype.h>
  9. #include "core.h"
  10. #include "htc.h"
  11. #include "debug.h"
  12. #include "wmi.h"
  13. #include "wmi-tlv.h"
  14. #include "mac.h"
  15. #include "testmode.h"
  16. #include "wmi-ops.h"
  17. #include "p2p.h"
  18. #include "hw.h"
  19. #include "hif.h"
  20. #include "txrx.h"
  21. #define ATH10K_WMI_BARRIER_ECHO_ID 0xBA991E9
  22. #define ATH10K_WMI_BARRIER_TIMEOUT_HZ (3 * HZ)
  23. #define ATH10K_WMI_DFS_CONF_TIMEOUT_HZ (HZ / 6)
  24. /* MAIN WMI cmd track */
  25. static struct wmi_cmd_map wmi_cmd_map = {
  26. .init_cmdid = WMI_INIT_CMDID,
  27. .start_scan_cmdid = WMI_START_SCAN_CMDID,
  28. .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
  29. .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
  30. .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
  31. .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
  32. .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
  33. .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
  34. .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
  35. .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
  36. .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
  37. .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
  38. .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
  39. .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
  40. .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
  41. .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
  42. .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  43. .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
  44. .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
  45. .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
  46. .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
  47. .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
  48. .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
  49. .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
  50. .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
  51. .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
  52. .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
  53. .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
  54. .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
  55. .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
  56. .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
  57. .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
  58. .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
  59. .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
  60. .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
  61. .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
  62. .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
  63. .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
  64. .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
  65. .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
  66. .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
  67. .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
  68. .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
  69. .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
  70. .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
  71. .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
  72. .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
  73. .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
  74. .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
  75. .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
  76. .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
  77. .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
  78. .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
  79. .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
  80. .roam_scan_mode = WMI_ROAM_SCAN_MODE,
  81. .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
  82. .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
  83. .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  84. .roam_ap_profile = WMI_ROAM_AP_PROFILE,
  85. .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
  86. .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
  87. .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
  88. .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
  89. .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
  90. .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
  91. .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
  92. .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
  93. .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
  94. .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
  95. .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
  96. .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
  97. .wlan_profile_set_hist_intvl_cmdid =
  98. WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  99. .wlan_profile_get_profile_data_cmdid =
  100. WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  101. .wlan_profile_enable_profile_id_cmdid =
  102. WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  103. .wlan_profile_list_profile_id_cmdid =
  104. WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  105. .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
  106. .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
  107. .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
  108. .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
  109. .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
  110. .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
  111. .wow_enable_disable_wake_event_cmdid =
  112. WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  113. .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
  114. .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  115. .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
  116. .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
  117. .vdev_spectral_scan_configure_cmdid =
  118. WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  119. .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  120. .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
  121. .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
  122. .network_list_offload_config_cmdid =
  123. WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
  124. .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
  125. .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
  126. .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
  127. .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
  128. .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
  129. .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
  130. .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
  131. .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
  132. .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
  133. .echo_cmdid = WMI_ECHO_CMDID,
  134. .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
  135. .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
  136. .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
  137. .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
  138. .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
  139. .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
  140. .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
  141. .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
  142. .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
  143. .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
  144. .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
  145. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  146. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  147. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  148. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  149. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  150. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  151. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  152. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  153. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  154. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  155. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  156. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  157. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  158. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  159. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  160. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  161. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  162. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  163. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  164. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  165. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  166. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  167. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  168. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  169. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  170. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  171. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  172. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  173. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  174. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  175. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  176. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  177. .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
  178. .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
  179. .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
  180. .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
  181. .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  182. .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  183. .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
  184. .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
  185. .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
  186. .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
  187. .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
  188. .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
  189. };
  190. /* 10.X WMI cmd track */
  191. static struct wmi_cmd_map wmi_10x_cmd_map = {
  192. .init_cmdid = WMI_10X_INIT_CMDID,
  193. .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
  194. .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
  195. .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
  196. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  197. .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
  198. .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
  199. .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
  200. .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
  201. .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
  202. .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
  203. .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
  204. .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
  205. .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
  206. .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
  207. .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
  208. .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  209. .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
  210. .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
  211. .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
  212. .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
  213. .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
  214. .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
  215. .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
  216. .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
  217. .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
  218. .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
  219. .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
  220. .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
  221. .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
  222. .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
  223. .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
  224. .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
  225. .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
  226. .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
  227. .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
  228. .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
  229. .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
  230. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  231. .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
  232. .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
  233. .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
  234. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  235. .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
  236. .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
  237. .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
  238. .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
  239. .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
  240. .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
  241. .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
  242. .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
  243. .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
  244. .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
  245. .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
  246. .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
  247. .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
  248. .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
  249. .roam_scan_rssi_change_threshold =
  250. WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  251. .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
  252. .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
  253. .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
  254. .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
  255. .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
  256. .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
  257. .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
  258. .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
  259. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  260. .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID,
  261. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  262. .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
  263. .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
  264. .wlan_profile_set_hist_intvl_cmdid =
  265. WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  266. .wlan_profile_get_profile_data_cmdid =
  267. WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  268. .wlan_profile_enable_profile_id_cmdid =
  269. WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  270. .wlan_profile_list_profile_id_cmdid =
  271. WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  272. .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
  273. .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
  274. .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
  275. .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
  276. .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
  277. .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
  278. .wow_enable_disable_wake_event_cmdid =
  279. WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  280. .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
  281. .wow_hostwakeup_from_sleep_cmdid =
  282. WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  283. .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
  284. .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
  285. .vdev_spectral_scan_configure_cmdid =
  286. WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  287. .vdev_spectral_scan_enable_cmdid =
  288. WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  289. .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
  290. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  291. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  292. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  293. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  294. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  295. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  296. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  297. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  298. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  299. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  300. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  301. .echo_cmdid = WMI_10X_ECHO_CMDID,
  302. .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
  303. .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
  304. .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
  305. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  306. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  307. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  308. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  309. .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
  310. .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
  311. .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
  312. .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
  313. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  314. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  315. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  316. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  317. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  318. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  319. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  320. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  321. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  322. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  323. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  324. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  325. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  326. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  327. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  328. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  329. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  330. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  331. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  332. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  333. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  334. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  335. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  336. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  337. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  338. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  339. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  340. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  341. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  342. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  343. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  344. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  345. .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
  346. .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
  347. .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
  348. .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
  349. .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  350. .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  351. .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
  352. .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
  353. .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
  354. .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
  355. .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
  356. .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
  357. };
  358. /* 10.2.4 WMI cmd track */
  359. static struct wmi_cmd_map wmi_10_2_4_cmd_map = {
  360. .init_cmdid = WMI_10_2_INIT_CMDID,
  361. .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
  362. .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
  363. .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
  364. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  365. .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
  366. .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
  367. .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
  368. .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
  369. .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
  370. .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
  371. .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
  372. .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
  373. .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
  374. .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
  375. .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  376. .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
  377. .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
  378. .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
  379. .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
  380. .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
  381. .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
  382. .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
  383. .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
  384. .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
  385. .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
  386. .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
  387. .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
  388. .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
  389. .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
  390. .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
  391. .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
  392. .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
  393. .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
  394. .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
  395. .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
  396. .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
  397. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  398. .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
  399. .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
  400. .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
  401. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  402. .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
  403. .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
  404. .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
  405. .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
  406. .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
  407. .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
  408. .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
  409. .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
  410. .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
  411. .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
  412. .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
  413. .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
  414. .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
  415. .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
  416. .roam_scan_rssi_change_threshold =
  417. WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  418. .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
  419. .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
  420. .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
  421. .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
  422. .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
  423. .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
  424. .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
  425. .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
  426. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  427. .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
  428. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  429. .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
  430. .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
  431. .wlan_profile_set_hist_intvl_cmdid =
  432. WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  433. .wlan_profile_get_profile_data_cmdid =
  434. WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  435. .wlan_profile_enable_profile_id_cmdid =
  436. WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  437. .wlan_profile_list_profile_id_cmdid =
  438. WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  439. .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
  440. .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
  441. .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
  442. .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
  443. .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
  444. .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
  445. .wow_enable_disable_wake_event_cmdid =
  446. WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  447. .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
  448. .wow_hostwakeup_from_sleep_cmdid =
  449. WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  450. .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
  451. .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
  452. .vdev_spectral_scan_configure_cmdid =
  453. WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  454. .vdev_spectral_scan_enable_cmdid =
  455. WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  456. .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
  457. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  458. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  459. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  460. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  461. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  462. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  463. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  464. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  465. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  466. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  467. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  468. .echo_cmdid = WMI_10_2_ECHO_CMDID,
  469. .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
  470. .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
  471. .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
  472. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  473. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  474. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  475. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  476. .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
  477. .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
  478. .pdev_get_temperature_cmdid = WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
  479. .pdev_enable_adaptive_cca_cmdid = WMI_10_2_SET_CCA_PARAMS,
  480. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  481. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  482. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  483. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  484. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  485. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  486. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  487. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  488. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  489. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  490. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  491. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  492. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  493. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  494. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  495. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  496. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  497. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  498. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  499. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  500. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  501. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  502. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  503. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  504. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  505. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  506. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  507. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  508. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  509. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  510. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  511. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  512. .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
  513. .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
  514. .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
  515. .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
  516. .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  517. .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  518. .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
  519. .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
  520. .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
  521. .pdev_bss_chan_info_request_cmdid =
  522. WMI_10_2_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
  523. .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
  524. .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
  525. .set_bb_timing_cmdid = WMI_10_2_PDEV_SET_BB_TIMING_CONFIG_CMDID,
  526. };
  527. /* 10.4 WMI cmd track */
  528. static struct wmi_cmd_map wmi_10_4_cmd_map = {
  529. .init_cmdid = WMI_10_4_INIT_CMDID,
  530. .start_scan_cmdid = WMI_10_4_START_SCAN_CMDID,
  531. .stop_scan_cmdid = WMI_10_4_STOP_SCAN_CMDID,
  532. .scan_chan_list_cmdid = WMI_10_4_SCAN_CHAN_LIST_CMDID,
  533. .scan_sch_prio_tbl_cmdid = WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID,
  534. .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
  535. .pdev_set_regdomain_cmdid = WMI_10_4_PDEV_SET_REGDOMAIN_CMDID,
  536. .pdev_set_channel_cmdid = WMI_10_4_PDEV_SET_CHANNEL_CMDID,
  537. .pdev_set_param_cmdid = WMI_10_4_PDEV_SET_PARAM_CMDID,
  538. .pdev_pktlog_enable_cmdid = WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID,
  539. .pdev_pktlog_disable_cmdid = WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID,
  540. .pdev_set_wmm_params_cmdid = WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID,
  541. .pdev_set_ht_cap_ie_cmdid = WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID,
  542. .pdev_set_vht_cap_ie_cmdid = WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID,
  543. .pdev_set_dscp_tid_map_cmdid = WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID,
  544. .pdev_set_quiet_mode_cmdid = WMI_10_4_PDEV_SET_QUIET_MODE_CMDID,
  545. .pdev_green_ap_ps_enable_cmdid = WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  546. .pdev_get_tpc_config_cmdid = WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID,
  547. .pdev_set_base_macaddr_cmdid = WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID,
  548. .vdev_create_cmdid = WMI_10_4_VDEV_CREATE_CMDID,
  549. .vdev_delete_cmdid = WMI_10_4_VDEV_DELETE_CMDID,
  550. .vdev_start_request_cmdid = WMI_10_4_VDEV_START_REQUEST_CMDID,
  551. .vdev_restart_request_cmdid = WMI_10_4_VDEV_RESTART_REQUEST_CMDID,
  552. .vdev_up_cmdid = WMI_10_4_VDEV_UP_CMDID,
  553. .vdev_stop_cmdid = WMI_10_4_VDEV_STOP_CMDID,
  554. .vdev_down_cmdid = WMI_10_4_VDEV_DOWN_CMDID,
  555. .vdev_set_param_cmdid = WMI_10_4_VDEV_SET_PARAM_CMDID,
  556. .vdev_install_key_cmdid = WMI_10_4_VDEV_INSTALL_KEY_CMDID,
  557. .peer_create_cmdid = WMI_10_4_PEER_CREATE_CMDID,
  558. .peer_delete_cmdid = WMI_10_4_PEER_DELETE_CMDID,
  559. .peer_flush_tids_cmdid = WMI_10_4_PEER_FLUSH_TIDS_CMDID,
  560. .peer_set_param_cmdid = WMI_10_4_PEER_SET_PARAM_CMDID,
  561. .peer_assoc_cmdid = WMI_10_4_PEER_ASSOC_CMDID,
  562. .peer_add_wds_entry_cmdid = WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID,
  563. .peer_remove_wds_entry_cmdid = WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID,
  564. .peer_mcast_group_cmdid = WMI_10_4_PEER_MCAST_GROUP_CMDID,
  565. .bcn_tx_cmdid = WMI_10_4_BCN_TX_CMDID,
  566. .pdev_send_bcn_cmdid = WMI_10_4_PDEV_SEND_BCN_CMDID,
  567. .bcn_tmpl_cmdid = WMI_10_4_BCN_PRB_TMPL_CMDID,
  568. .bcn_filter_rx_cmdid = WMI_10_4_BCN_FILTER_RX_CMDID,
  569. .prb_req_filter_rx_cmdid = WMI_10_4_PRB_REQ_FILTER_RX_CMDID,
  570. .mgmt_tx_cmdid = WMI_10_4_MGMT_TX_CMDID,
  571. .prb_tmpl_cmdid = WMI_10_4_PRB_TMPL_CMDID,
  572. .addba_clear_resp_cmdid = WMI_10_4_ADDBA_CLEAR_RESP_CMDID,
  573. .addba_send_cmdid = WMI_10_4_ADDBA_SEND_CMDID,
  574. .addba_status_cmdid = WMI_10_4_ADDBA_STATUS_CMDID,
  575. .delba_send_cmdid = WMI_10_4_DELBA_SEND_CMDID,
  576. .addba_set_resp_cmdid = WMI_10_4_ADDBA_SET_RESP_CMDID,
  577. .send_singleamsdu_cmdid = WMI_10_4_SEND_SINGLEAMSDU_CMDID,
  578. .sta_powersave_mode_cmdid = WMI_10_4_STA_POWERSAVE_MODE_CMDID,
  579. .sta_powersave_param_cmdid = WMI_10_4_STA_POWERSAVE_PARAM_CMDID,
  580. .sta_mimo_ps_mode_cmdid = WMI_10_4_STA_MIMO_PS_MODE_CMDID,
  581. .pdev_dfs_enable_cmdid = WMI_10_4_PDEV_DFS_ENABLE_CMDID,
  582. .pdev_dfs_disable_cmdid = WMI_10_4_PDEV_DFS_DISABLE_CMDID,
  583. .roam_scan_mode = WMI_10_4_ROAM_SCAN_MODE,
  584. .roam_scan_rssi_threshold = WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD,
  585. .roam_scan_period = WMI_10_4_ROAM_SCAN_PERIOD,
  586. .roam_scan_rssi_change_threshold =
  587. WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  588. .roam_ap_profile = WMI_10_4_ROAM_AP_PROFILE,
  589. .ofl_scan_add_ap_profile = WMI_10_4_OFL_SCAN_ADD_AP_PROFILE,
  590. .ofl_scan_remove_ap_profile = WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE,
  591. .ofl_scan_period = WMI_10_4_OFL_SCAN_PERIOD,
  592. .p2p_dev_set_device_info = WMI_10_4_P2P_DEV_SET_DEVICE_INFO,
  593. .p2p_dev_set_discoverability = WMI_10_4_P2P_DEV_SET_DISCOVERABILITY,
  594. .p2p_go_set_beacon_ie = WMI_10_4_P2P_GO_SET_BEACON_IE,
  595. .p2p_go_set_probe_resp_ie = WMI_10_4_P2P_GO_SET_PROBE_RESP_IE,
  596. .p2p_set_vendor_ie_data_cmdid = WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID,
  597. .ap_ps_peer_param_cmdid = WMI_10_4_AP_PS_PEER_PARAM_CMDID,
  598. .ap_ps_peer_uapsd_coex_cmdid = WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID,
  599. .peer_rate_retry_sched_cmdid = WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID,
  600. .wlan_profile_trigger_cmdid = WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID,
  601. .wlan_profile_set_hist_intvl_cmdid =
  602. WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  603. .wlan_profile_get_profile_data_cmdid =
  604. WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  605. .wlan_profile_enable_profile_id_cmdid =
  606. WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  607. .wlan_profile_list_profile_id_cmdid =
  608. WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  609. .pdev_suspend_cmdid = WMI_10_4_PDEV_SUSPEND_CMDID,
  610. .pdev_resume_cmdid = WMI_10_4_PDEV_RESUME_CMDID,
  611. .add_bcn_filter_cmdid = WMI_10_4_ADD_BCN_FILTER_CMDID,
  612. .rmv_bcn_filter_cmdid = WMI_10_4_RMV_BCN_FILTER_CMDID,
  613. .wow_add_wake_pattern_cmdid = WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID,
  614. .wow_del_wake_pattern_cmdid = WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID,
  615. .wow_enable_disable_wake_event_cmdid =
  616. WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  617. .wow_enable_cmdid = WMI_10_4_WOW_ENABLE_CMDID,
  618. .wow_hostwakeup_from_sleep_cmdid =
  619. WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  620. .rtt_measreq_cmdid = WMI_10_4_RTT_MEASREQ_CMDID,
  621. .rtt_tsf_cmdid = WMI_10_4_RTT_TSF_CMDID,
  622. .vdev_spectral_scan_configure_cmdid =
  623. WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  624. .vdev_spectral_scan_enable_cmdid =
  625. WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  626. .request_stats_cmdid = WMI_10_4_REQUEST_STATS_CMDID,
  627. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  628. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  629. .gtk_offload_cmdid = WMI_10_4_GTK_OFFLOAD_CMDID,
  630. .csa_offload_enable_cmdid = WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID,
  631. .csa_offload_chanswitch_cmdid = WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID,
  632. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  633. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  634. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  635. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  636. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  637. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  638. .echo_cmdid = WMI_10_4_ECHO_CMDID,
  639. .pdev_utf_cmdid = WMI_10_4_PDEV_UTF_CMDID,
  640. .dbglog_cfg_cmdid = WMI_10_4_DBGLOG_CFG_CMDID,
  641. .pdev_qvit_cmdid = WMI_10_4_PDEV_QVIT_CMDID,
  642. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  643. .vdev_set_keepalive_cmdid = WMI_10_4_VDEV_SET_KEEPALIVE_CMDID,
  644. .vdev_get_keepalive_cmdid = WMI_10_4_VDEV_GET_KEEPALIVE_CMDID,
  645. .force_fw_hang_cmdid = WMI_10_4_FORCE_FW_HANG_CMDID,
  646. .gpio_config_cmdid = WMI_10_4_GPIO_CONFIG_CMDID,
  647. .gpio_output_cmdid = WMI_10_4_GPIO_OUTPUT_CMDID,
  648. .pdev_get_temperature_cmdid = WMI_10_4_PDEV_GET_TEMPERATURE_CMDID,
  649. .vdev_set_wmm_params_cmdid = WMI_CMD_UNSUPPORTED,
  650. .adaptive_qcs_cmdid = WMI_CMD_UNSUPPORTED,
  651. .scan_update_request_cmdid = WMI_10_4_SCAN_UPDATE_REQUEST_CMDID,
  652. .vdev_standby_response_cmdid = WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID,
  653. .vdev_resume_response_cmdid = WMI_10_4_VDEV_RESUME_RESPONSE_CMDID,
  654. .wlan_peer_caching_add_peer_cmdid =
  655. WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID,
  656. .wlan_peer_caching_evict_peer_cmdid =
  657. WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID,
  658. .wlan_peer_caching_restore_peer_cmdid =
  659. WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID,
  660. .wlan_peer_caching_print_all_peers_info_cmdid =
  661. WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID,
  662. .peer_update_wds_entry_cmdid = WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID,
  663. .peer_add_proxy_sta_entry_cmdid =
  664. WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID,
  665. .rtt_keepalive_cmdid = WMI_10_4_RTT_KEEPALIVE_CMDID,
  666. .oem_req_cmdid = WMI_10_4_OEM_REQ_CMDID,
  667. .nan_cmdid = WMI_10_4_NAN_CMDID,
  668. .vdev_ratemask_cmdid = WMI_10_4_VDEV_RATEMASK_CMDID,
  669. .qboost_cfg_cmdid = WMI_10_4_QBOOST_CFG_CMDID,
  670. .pdev_smart_ant_enable_cmdid = WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID,
  671. .pdev_smart_ant_set_rx_antenna_cmdid =
  672. WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
  673. .peer_smart_ant_set_tx_antenna_cmdid =
  674. WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
  675. .peer_smart_ant_set_train_info_cmdid =
  676. WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
  677. .peer_smart_ant_set_node_config_ops_cmdid =
  678. WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
  679. .pdev_set_antenna_switch_table_cmdid =
  680. WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
  681. .pdev_set_ctl_table_cmdid = WMI_10_4_PDEV_SET_CTL_TABLE_CMDID,
  682. .pdev_set_mimogain_table_cmdid = WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID,
  683. .pdev_ratepwr_table_cmdid = WMI_10_4_PDEV_RATEPWR_TABLE_CMDID,
  684. .pdev_ratepwr_chainmsk_table_cmdid =
  685. WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
  686. .pdev_fips_cmdid = WMI_10_4_PDEV_FIPS_CMDID,
  687. .tt_set_conf_cmdid = WMI_10_4_TT_SET_CONF_CMDID,
  688. .fwtest_cmdid = WMI_10_4_FWTEST_CMDID,
  689. .vdev_atf_request_cmdid = WMI_10_4_VDEV_ATF_REQUEST_CMDID,
  690. .peer_atf_request_cmdid = WMI_10_4_PEER_ATF_REQUEST_CMDID,
  691. .pdev_get_ani_cck_config_cmdid = WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID,
  692. .pdev_get_ani_ofdm_config_cmdid =
  693. WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
  694. .pdev_reserve_ast_entry_cmdid = WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID,
  695. .pdev_get_nfcal_power_cmdid = WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID,
  696. .pdev_get_tpc_cmdid = WMI_10_4_PDEV_GET_TPC_CMDID,
  697. .pdev_get_ast_info_cmdid = WMI_10_4_PDEV_GET_AST_INFO_CMDID,
  698. .vdev_set_dscp_tid_map_cmdid = WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID,
  699. .pdev_get_info_cmdid = WMI_10_4_PDEV_GET_INFO_CMDID,
  700. .vdev_get_info_cmdid = WMI_10_4_VDEV_GET_INFO_CMDID,
  701. .vdev_filter_neighbor_rx_packets_cmdid =
  702. WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
  703. .mu_cal_start_cmdid = WMI_10_4_MU_CAL_START_CMDID,
  704. .set_cca_params_cmdid = WMI_10_4_SET_CCA_PARAMS_CMDID,
  705. .pdev_bss_chan_info_request_cmdid =
  706. WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
  707. .ext_resource_cfg_cmdid = WMI_10_4_EXT_RESOURCE_CFG_CMDID,
  708. .vdev_set_ie_cmdid = WMI_10_4_VDEV_SET_IE_CMDID,
  709. .set_lteu_config_cmdid = WMI_10_4_SET_LTEU_CONFIG_CMDID,
  710. .atf_ssid_grouping_request_cmdid =
  711. WMI_10_4_ATF_SSID_GROUPING_REQUEST_CMDID,
  712. .peer_atf_ext_request_cmdid = WMI_10_4_PEER_ATF_EXT_REQUEST_CMDID,
  713. .set_periodic_channel_stats_cfg_cmdid =
  714. WMI_10_4_SET_PERIODIC_CHANNEL_STATS_CONFIG,
  715. .peer_bwf_request_cmdid = WMI_10_4_PEER_BWF_REQUEST_CMDID,
  716. .btcoex_cfg_cmdid = WMI_10_4_BTCOEX_CFG_CMDID,
  717. .peer_tx_mu_txmit_count_cmdid = WMI_10_4_PEER_TX_MU_TXMIT_COUNT_CMDID,
  718. .peer_tx_mu_txmit_rstcnt_cmdid = WMI_10_4_PEER_TX_MU_TXMIT_RSTCNT_CMDID,
  719. .peer_gid_userpos_list_cmdid = WMI_10_4_PEER_GID_USERPOS_LIST_CMDID,
  720. .pdev_check_cal_version_cmdid = WMI_10_4_PDEV_CHECK_CAL_VERSION_CMDID,
  721. .coex_version_cfg_cmid = WMI_10_4_COEX_VERSION_CFG_CMID,
  722. .pdev_get_rx_filter_cmdid = WMI_10_4_PDEV_GET_RX_FILTER_CMDID,
  723. .pdev_extended_nss_cfg_cmdid = WMI_10_4_PDEV_EXTENDED_NSS_CFG_CMDID,
  724. .vdev_set_scan_nac_rssi_cmdid = WMI_10_4_VDEV_SET_SCAN_NAC_RSSI_CMDID,
  725. .prog_gpio_band_select_cmdid = WMI_10_4_PROG_GPIO_BAND_SELECT_CMDID,
  726. .config_smart_logging_cmdid = WMI_10_4_CONFIG_SMART_LOGGING_CMDID,
  727. .debug_fatal_condition_cmdid = WMI_10_4_DEBUG_FATAL_CONDITION_CMDID,
  728. .get_tsf_timer_cmdid = WMI_10_4_GET_TSF_TIMER_CMDID,
  729. .pdev_get_tpc_table_cmdid = WMI_10_4_PDEV_GET_TPC_TABLE_CMDID,
  730. .vdev_sifs_trigger_time_cmdid = WMI_10_4_VDEV_SIFS_TRIGGER_TIME_CMDID,
  731. .pdev_wds_entry_list_cmdid = WMI_10_4_PDEV_WDS_ENTRY_LIST_CMDID,
  732. .tdls_set_state_cmdid = WMI_10_4_TDLS_SET_STATE_CMDID,
  733. .tdls_peer_update_cmdid = WMI_10_4_TDLS_PEER_UPDATE_CMDID,
  734. .tdls_set_offchan_mode_cmdid = WMI_10_4_TDLS_SET_OFFCHAN_MODE_CMDID,
  735. .radar_found_cmdid = WMI_10_4_RADAR_FOUND_CMDID,
  736. .per_peer_per_tid_config_cmdid = WMI_10_4_PER_PEER_PER_TID_CONFIG_CMDID,
  737. };
  738. static struct wmi_peer_param_map wmi_peer_param_map = {
  739. .smps_state = WMI_PEER_SMPS_STATE,
  740. .ampdu = WMI_PEER_AMPDU,
  741. .authorize = WMI_PEER_AUTHORIZE,
  742. .chan_width = WMI_PEER_CHAN_WIDTH,
  743. .nss = WMI_PEER_NSS,
  744. .use_4addr = WMI_PEER_USE_4ADDR,
  745. .use_fixed_power = WMI_PEER_USE_FIXED_PWR,
  746. .debug = WMI_PEER_DEBUG,
  747. .phymode = WMI_PEER_PHYMODE,
  748. .dummy_var = WMI_PEER_DUMMY_VAR,
  749. };
  750. /* MAIN WMI VDEV param map */
  751. static struct wmi_vdev_param_map wmi_vdev_param_map = {
  752. .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
  753. .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  754. .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
  755. .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
  756. .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
  757. .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
  758. .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
  759. .preamble = WMI_VDEV_PARAM_PREAMBLE,
  760. .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
  761. .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
  762. .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
  763. .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
  764. .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
  765. .wmi_vdev_oc_scheduler_air_time_limit =
  766. WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  767. .wds = WMI_VDEV_PARAM_WDS,
  768. .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
  769. .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
  770. .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
  771. .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
  772. .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
  773. .chwidth = WMI_VDEV_PARAM_CHWIDTH,
  774. .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
  775. .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
  776. .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
  777. .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
  778. .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
  779. .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
  780. .sgi = WMI_VDEV_PARAM_SGI,
  781. .ldpc = WMI_VDEV_PARAM_LDPC,
  782. .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
  783. .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
  784. .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
  785. .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
  786. .nss = WMI_VDEV_PARAM_NSS,
  787. .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
  788. .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
  789. .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
  790. .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
  791. .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  792. .ap_keepalive_min_idle_inactive_time_secs =
  793. WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  794. .ap_keepalive_max_idle_inactive_time_secs =
  795. WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  796. .ap_keepalive_max_unresponsive_time_secs =
  797. WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  798. .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
  799. .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
  800. .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
  801. .txbf = WMI_VDEV_PARAM_TXBF,
  802. .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
  803. .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
  804. .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
  805. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  806. WMI_VDEV_PARAM_UNSUPPORTED,
  807. .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
  808. .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
  809. .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
  810. .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
  811. .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
  812. .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  813. .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
  814. .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
  815. .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
  816. .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
  817. .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
  818. .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
  819. .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
  820. .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
  821. .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  822. .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  823. .disable_4addr_src_lrn = WMI_VDEV_PARAM_UNSUPPORTED,
  824. .rtt_responder_role = WMI_VDEV_PARAM_UNSUPPORTED,
  825. };
  826. /* 10.X WMI VDEV param map */
  827. static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
  828. .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
  829. .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  830. .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
  831. .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
  832. .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
  833. .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
  834. .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
  835. .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
  836. .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
  837. .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
  838. .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
  839. .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
  840. .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
  841. .wmi_vdev_oc_scheduler_air_time_limit =
  842. WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  843. .wds = WMI_10X_VDEV_PARAM_WDS,
  844. .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
  845. .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
  846. .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  847. .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  848. .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
  849. .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
  850. .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
  851. .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
  852. .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
  853. .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
  854. .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
  855. .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
  856. .sgi = WMI_10X_VDEV_PARAM_SGI,
  857. .ldpc = WMI_10X_VDEV_PARAM_LDPC,
  858. .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
  859. .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
  860. .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
  861. .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
  862. .nss = WMI_10X_VDEV_PARAM_NSS,
  863. .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
  864. .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
  865. .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
  866. .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
  867. .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  868. .ap_keepalive_min_idle_inactive_time_secs =
  869. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  870. .ap_keepalive_max_idle_inactive_time_secs =
  871. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  872. .ap_keepalive_max_unresponsive_time_secs =
  873. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  874. .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
  875. .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
  876. .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
  877. .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
  878. .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
  879. .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
  880. .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  881. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  882. WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
  883. .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
  884. .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
  885. .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
  886. .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
  887. .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
  888. .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  889. .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
  890. .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
  891. .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
  892. .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
  893. .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
  894. .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
  895. .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
  896. .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
  897. .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  898. .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  899. .disable_4addr_src_lrn = WMI_VDEV_PARAM_UNSUPPORTED,
  900. .rtt_responder_role = WMI_VDEV_PARAM_UNSUPPORTED,
  901. };
  902. static struct wmi_vdev_param_map wmi_10_2_4_vdev_param_map = {
  903. .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
  904. .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  905. .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
  906. .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
  907. .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
  908. .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
  909. .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
  910. .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
  911. .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
  912. .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
  913. .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
  914. .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
  915. .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
  916. .wmi_vdev_oc_scheduler_air_time_limit =
  917. WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  918. .wds = WMI_10X_VDEV_PARAM_WDS,
  919. .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
  920. .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
  921. .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  922. .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  923. .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
  924. .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
  925. .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
  926. .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
  927. .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
  928. .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
  929. .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
  930. .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
  931. .sgi = WMI_10X_VDEV_PARAM_SGI,
  932. .ldpc = WMI_10X_VDEV_PARAM_LDPC,
  933. .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
  934. .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
  935. .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
  936. .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
  937. .nss = WMI_10X_VDEV_PARAM_NSS,
  938. .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
  939. .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
  940. .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
  941. .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
  942. .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  943. .ap_keepalive_min_idle_inactive_time_secs =
  944. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  945. .ap_keepalive_max_idle_inactive_time_secs =
  946. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  947. .ap_keepalive_max_unresponsive_time_secs =
  948. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  949. .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
  950. .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
  951. .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
  952. .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
  953. .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
  954. .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
  955. .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  956. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  957. WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
  958. .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
  959. .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
  960. .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
  961. .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
  962. .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
  963. .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  964. .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
  965. .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
  966. .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
  967. .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
  968. .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
  969. .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
  970. .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
  971. .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
  972. .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  973. .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  974. .disable_4addr_src_lrn = WMI_VDEV_PARAM_UNSUPPORTED,
  975. .rtt_responder_role = WMI_VDEV_PARAM_UNSUPPORTED,
  976. };
  977. static struct wmi_vdev_param_map wmi_10_4_vdev_param_map = {
  978. .rts_threshold = WMI_10_4_VDEV_PARAM_RTS_THRESHOLD,
  979. .fragmentation_threshold = WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  980. .beacon_interval = WMI_10_4_VDEV_PARAM_BEACON_INTERVAL,
  981. .listen_interval = WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL,
  982. .multicast_rate = WMI_10_4_VDEV_PARAM_MULTICAST_RATE,
  983. .mgmt_tx_rate = WMI_10_4_VDEV_PARAM_MGMT_TX_RATE,
  984. .slot_time = WMI_10_4_VDEV_PARAM_SLOT_TIME,
  985. .preamble = WMI_10_4_VDEV_PARAM_PREAMBLE,
  986. .swba_time = WMI_10_4_VDEV_PARAM_SWBA_TIME,
  987. .wmi_vdev_stats_update_period = WMI_10_4_VDEV_STATS_UPDATE_PERIOD,
  988. .wmi_vdev_pwrsave_ageout_time = WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME,
  989. .wmi_vdev_host_swba_interval = WMI_10_4_VDEV_HOST_SWBA_INTERVAL,
  990. .dtim_period = WMI_10_4_VDEV_PARAM_DTIM_PERIOD,
  991. .wmi_vdev_oc_scheduler_air_time_limit =
  992. WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  993. .wds = WMI_10_4_VDEV_PARAM_WDS,
  994. .atim_window = WMI_10_4_VDEV_PARAM_ATIM_WINDOW,
  995. .bmiss_count_max = WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX,
  996. .bmiss_first_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT,
  997. .bmiss_final_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT,
  998. .feature_wmm = WMI_10_4_VDEV_PARAM_FEATURE_WMM,
  999. .chwidth = WMI_10_4_VDEV_PARAM_CHWIDTH,
  1000. .chextoffset = WMI_10_4_VDEV_PARAM_CHEXTOFFSET,
  1001. .disable_htprotection = WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION,
  1002. .sta_quickkickout = WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT,
  1003. .mgmt_rate = WMI_10_4_VDEV_PARAM_MGMT_RATE,
  1004. .protection_mode = WMI_10_4_VDEV_PARAM_PROTECTION_MODE,
  1005. .fixed_rate = WMI_10_4_VDEV_PARAM_FIXED_RATE,
  1006. .sgi = WMI_10_4_VDEV_PARAM_SGI,
  1007. .ldpc = WMI_10_4_VDEV_PARAM_LDPC,
  1008. .tx_stbc = WMI_10_4_VDEV_PARAM_TX_STBC,
  1009. .rx_stbc = WMI_10_4_VDEV_PARAM_RX_STBC,
  1010. .intra_bss_fwd = WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD,
  1011. .def_keyid = WMI_10_4_VDEV_PARAM_DEF_KEYID,
  1012. .nss = WMI_10_4_VDEV_PARAM_NSS,
  1013. .bcast_data_rate = WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE,
  1014. .mcast_data_rate = WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE,
  1015. .mcast_indicate = WMI_10_4_VDEV_PARAM_MCAST_INDICATE,
  1016. .dhcp_indicate = WMI_10_4_VDEV_PARAM_DHCP_INDICATE,
  1017. .unknown_dest_indicate = WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  1018. .ap_keepalive_min_idle_inactive_time_secs =
  1019. WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  1020. .ap_keepalive_max_idle_inactive_time_secs =
  1021. WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  1022. .ap_keepalive_max_unresponsive_time_secs =
  1023. WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  1024. .ap_enable_nawds = WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS,
  1025. .mcast2ucast_set = WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET,
  1026. .enable_rtscts = WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS,
  1027. .txbf = WMI_10_4_VDEV_PARAM_TXBF,
  1028. .packet_powersave = WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE,
  1029. .drop_unencry = WMI_10_4_VDEV_PARAM_DROP_UNENCRY,
  1030. .tx_encap_type = WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE,
  1031. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  1032. WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
  1033. .rc_num_retries = WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES,
  1034. .cabq_maxdur = WMI_10_4_VDEV_PARAM_CABQ_MAXDUR,
  1035. .mfptest_set = WMI_10_4_VDEV_PARAM_MFPTEST_SET,
  1036. .rts_fixed_rate = WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE,
  1037. .vht_sgimask = WMI_10_4_VDEV_PARAM_VHT_SGIMASK,
  1038. .vht80_ratemask = WMI_10_4_VDEV_PARAM_VHT80_RATEMASK,
  1039. .early_rx_adjust_enable = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
  1040. .early_rx_tgt_bmiss_num = WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
  1041. .early_rx_bmiss_sample_cycle =
  1042. WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
  1043. .early_rx_slop_step = WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP,
  1044. .early_rx_init_slop = WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP,
  1045. .early_rx_adjust_pause = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
  1046. .proxy_sta = WMI_10_4_VDEV_PARAM_PROXY_STA,
  1047. .meru_vc = WMI_10_4_VDEV_PARAM_MERU_VC,
  1048. .rx_decap_type = WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE,
  1049. .bw_nss_ratemask = WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK,
  1050. .inc_tsf = WMI_10_4_VDEV_PARAM_TSF_INCREMENT,
  1051. .dec_tsf = WMI_10_4_VDEV_PARAM_TSF_DECREMENT,
  1052. .disable_4addr_src_lrn = WMI_10_4_VDEV_PARAM_DISABLE_4_ADDR_SRC_LRN,
  1053. .rtt_responder_role = WMI_10_4_VDEV_PARAM_ENABLE_DISABLE_RTT_RESPONDER_ROLE,
  1054. };
  1055. static struct wmi_pdev_param_map wmi_pdev_param_map = {
  1056. .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
  1057. .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
  1058. .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
  1059. .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
  1060. .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
  1061. .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
  1062. .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
  1063. .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1064. .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
  1065. .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
  1066. .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1067. .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
  1068. .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
  1069. .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1070. .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
  1071. .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1072. .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1073. .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1074. .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1075. .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1076. .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1077. .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
  1078. .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1079. .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
  1080. .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
  1081. .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
  1082. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  1083. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  1084. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
  1085. .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1086. .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1087. .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1088. .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1089. .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
  1090. .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
  1091. .dcs = WMI_PDEV_PARAM_DCS,
  1092. .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
  1093. .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
  1094. .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1095. .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
  1096. .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
  1097. .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
  1098. .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
  1099. .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
  1100. .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
  1101. .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1102. .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
  1103. .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1104. .cal_period = WMI_PDEV_PARAM_UNSUPPORTED,
  1105. .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
  1106. .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1107. .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
  1108. .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1109. .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1110. .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
  1111. .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
  1112. .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1113. .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1114. .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1115. .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1116. .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1117. .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1118. .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1119. .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
  1120. .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1121. .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1122. .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1123. .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1124. .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1125. .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1126. .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
  1127. .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
  1128. .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
  1129. .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1130. .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1131. .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
  1132. .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
  1133. .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
  1134. .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
  1135. .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
  1136. .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
  1137. .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
  1138. .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
  1139. .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1140. .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1141. .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1142. .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
  1143. .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1144. .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
  1145. .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1146. .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1147. .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
  1148. };
  1149. static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
  1150. .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
  1151. .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
  1152. .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
  1153. .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
  1154. .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
  1155. .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
  1156. .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
  1157. .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1158. .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
  1159. .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
  1160. .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1161. .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
  1162. .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
  1163. .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1164. .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
  1165. .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1166. .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1167. .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1168. .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1169. .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1170. .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1171. .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
  1172. .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1173. .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
  1174. .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
  1175. .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
  1176. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
  1177. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
  1178. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
  1179. .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1180. .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1181. .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1182. .bcnflt_stats_update_period =
  1183. WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1184. .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
  1185. .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
  1186. .dcs = WMI_10X_PDEV_PARAM_DCS,
  1187. .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
  1188. .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
  1189. .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1190. .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
  1191. .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
  1192. .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
  1193. .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
  1194. .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
  1195. .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
  1196. .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
  1197. .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
  1198. .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
  1199. .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
  1200. .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
  1201. .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1202. .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
  1203. .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1204. .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1205. .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
  1206. .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
  1207. .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1208. .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1209. .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1210. .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1211. .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1212. .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1213. .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1214. .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
  1215. .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1216. .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1217. .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1218. .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1219. .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1220. .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1221. .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
  1222. .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
  1223. .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
  1224. .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1225. .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1226. .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
  1227. .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
  1228. .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
  1229. .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
  1230. .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
  1231. .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
  1232. .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
  1233. .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
  1234. .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1235. .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1236. .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1237. .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
  1238. .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1239. .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
  1240. .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1241. .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1242. .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
  1243. };
  1244. static struct wmi_pdev_param_map wmi_10_2_4_pdev_param_map = {
  1245. .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
  1246. .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
  1247. .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
  1248. .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
  1249. .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
  1250. .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
  1251. .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
  1252. .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1253. .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
  1254. .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
  1255. .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1256. .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
  1257. .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
  1258. .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1259. .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
  1260. .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1261. .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1262. .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1263. .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1264. .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1265. .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1266. .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
  1267. .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1268. .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
  1269. .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
  1270. .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
  1271. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
  1272. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
  1273. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
  1274. .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1275. .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1276. .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1277. .bcnflt_stats_update_period =
  1278. WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1279. .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
  1280. .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
  1281. .dcs = WMI_10X_PDEV_PARAM_DCS,
  1282. .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
  1283. .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
  1284. .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1285. .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
  1286. .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
  1287. .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
  1288. .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
  1289. .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
  1290. .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
  1291. .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
  1292. .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
  1293. .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
  1294. .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
  1295. .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
  1296. .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1297. .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
  1298. .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1299. .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1300. .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
  1301. .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
  1302. .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1303. .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1304. .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1305. .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1306. .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1307. .peer_sta_ps_statechg_enable =
  1308. WMI_10X_PDEV_PARAM_PEER_STA_PS_STATECHG_ENABLE,
  1309. .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1310. .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
  1311. .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1312. .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1313. .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1314. .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1315. .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1316. .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1317. .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
  1318. .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
  1319. .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
  1320. .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1321. .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1322. .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
  1323. .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
  1324. .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
  1325. .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
  1326. .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
  1327. .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
  1328. .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
  1329. .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
  1330. .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1331. .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1332. .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1333. .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
  1334. .pdev_reset = WMI_10X_PDEV_PARAM_PDEV_RESET,
  1335. .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
  1336. .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1337. .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1338. .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
  1339. };
  1340. /* firmware 10.2 specific mappings */
  1341. static struct wmi_cmd_map wmi_10_2_cmd_map = {
  1342. .init_cmdid = WMI_10_2_INIT_CMDID,
  1343. .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
  1344. .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
  1345. .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
  1346. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  1347. .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
  1348. .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
  1349. .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
  1350. .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
  1351. .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
  1352. .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
  1353. .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
  1354. .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
  1355. .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
  1356. .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
  1357. .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  1358. .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
  1359. .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
  1360. .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
  1361. .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
  1362. .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
  1363. .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
  1364. .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
  1365. .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
  1366. .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
  1367. .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
  1368. .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
  1369. .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
  1370. .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
  1371. .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
  1372. .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
  1373. .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
  1374. .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
  1375. .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
  1376. .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
  1377. .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
  1378. .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
  1379. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  1380. .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
  1381. .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
  1382. .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
  1383. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  1384. .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
  1385. .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
  1386. .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
  1387. .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
  1388. .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
  1389. .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
  1390. .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
  1391. .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
  1392. .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
  1393. .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
  1394. .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
  1395. .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
  1396. .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
  1397. .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
  1398. .roam_scan_rssi_change_threshold =
  1399. WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  1400. .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
  1401. .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
  1402. .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
  1403. .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
  1404. .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
  1405. .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
  1406. .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
  1407. .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
  1408. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  1409. .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
  1410. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  1411. .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
  1412. .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
  1413. .wlan_profile_set_hist_intvl_cmdid =
  1414. WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  1415. .wlan_profile_get_profile_data_cmdid =
  1416. WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  1417. .wlan_profile_enable_profile_id_cmdid =
  1418. WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  1419. .wlan_profile_list_profile_id_cmdid =
  1420. WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  1421. .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
  1422. .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
  1423. .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
  1424. .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
  1425. .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
  1426. .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
  1427. .wow_enable_disable_wake_event_cmdid =
  1428. WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  1429. .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
  1430. .wow_hostwakeup_from_sleep_cmdid =
  1431. WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  1432. .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
  1433. .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
  1434. .vdev_spectral_scan_configure_cmdid =
  1435. WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  1436. .vdev_spectral_scan_enable_cmdid =
  1437. WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  1438. .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
  1439. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  1440. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  1441. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  1442. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  1443. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  1444. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  1445. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  1446. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  1447. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  1448. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  1449. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  1450. .echo_cmdid = WMI_10_2_ECHO_CMDID,
  1451. .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
  1452. .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
  1453. .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
  1454. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  1455. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  1456. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  1457. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  1458. .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
  1459. .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
  1460. .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
  1461. .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
  1462. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  1463. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  1464. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  1465. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  1466. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  1467. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  1468. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  1469. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  1470. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  1471. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  1472. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  1473. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  1474. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  1475. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  1476. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  1477. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  1478. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  1479. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  1480. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  1481. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  1482. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  1483. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  1484. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  1485. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  1486. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  1487. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  1488. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  1489. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  1490. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  1491. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  1492. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  1493. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  1494. .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
  1495. .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
  1496. };
  1497. static struct wmi_pdev_param_map wmi_10_4_pdev_param_map = {
  1498. .tx_chain_mask = WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK,
  1499. .rx_chain_mask = WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK,
  1500. .txpower_limit2g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G,
  1501. .txpower_limit5g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G,
  1502. .txpower_scale = WMI_10_4_PDEV_PARAM_TXPOWER_SCALE,
  1503. .beacon_gen_mode = WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE,
  1504. .beacon_tx_mode = WMI_10_4_PDEV_PARAM_BEACON_TX_MODE,
  1505. .resmgr_offchan_mode = WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1506. .protection_mode = WMI_10_4_PDEV_PARAM_PROTECTION_MODE,
  1507. .dynamic_bw = WMI_10_4_PDEV_PARAM_DYNAMIC_BW,
  1508. .non_agg_sw_retry_th = WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1509. .agg_sw_retry_th = WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH,
  1510. .sta_kickout_th = WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH,
  1511. .ac_aggrsize_scaling = WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1512. .ltr_enable = WMI_10_4_PDEV_PARAM_LTR_ENABLE,
  1513. .ltr_ac_latency_be = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1514. .ltr_ac_latency_bk = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1515. .ltr_ac_latency_vi = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1516. .ltr_ac_latency_vo = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1517. .ltr_ac_latency_timeout = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1518. .ltr_sleep_override = WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1519. .ltr_rx_override = WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE,
  1520. .ltr_tx_activity_timeout = WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1521. .l1ss_enable = WMI_10_4_PDEV_PARAM_L1SS_ENABLE,
  1522. .dsleep_enable = WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE,
  1523. .pcielp_txbuf_flush = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
  1524. .pcielp_txbuf_watermark = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
  1525. .pcielp_txbuf_tmo_en = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  1526. .pcielp_txbuf_tmo_value = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
  1527. .pdev_stats_update_period =
  1528. WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1529. .vdev_stats_update_period =
  1530. WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1531. .peer_stats_update_period =
  1532. WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1533. .bcnflt_stats_update_period =
  1534. WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1535. .pmf_qos = WMI_10_4_PDEV_PARAM_PMF_QOS,
  1536. .arp_ac_override = WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE,
  1537. .dcs = WMI_10_4_PDEV_PARAM_DCS,
  1538. .ani_enable = WMI_10_4_PDEV_PARAM_ANI_ENABLE,
  1539. .ani_poll_period = WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD,
  1540. .ani_listen_period = WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1541. .ani_ofdm_level = WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL,
  1542. .ani_cck_level = WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL,
  1543. .dyntxchain = WMI_10_4_PDEV_PARAM_DYNTXCHAIN,
  1544. .proxy_sta = WMI_10_4_PDEV_PARAM_PROXY_STA,
  1545. .idle_ps_config = WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG,
  1546. .power_gating_sleep = WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP,
  1547. .fast_channel_reset = WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET,
  1548. .burst_dur = WMI_10_4_PDEV_PARAM_BURST_DUR,
  1549. .burst_enable = WMI_10_4_PDEV_PARAM_BURST_ENABLE,
  1550. .cal_period = WMI_10_4_PDEV_PARAM_CAL_PERIOD,
  1551. .aggr_burst = WMI_10_4_PDEV_PARAM_AGGR_BURST,
  1552. .rx_decap_mode = WMI_10_4_PDEV_PARAM_RX_DECAP_MODE,
  1553. .smart_antenna_default_antenna =
  1554. WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
  1555. .igmpmld_override = WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE,
  1556. .igmpmld_tid = WMI_10_4_PDEV_PARAM_IGMPMLD_TID,
  1557. .antenna_gain = WMI_10_4_PDEV_PARAM_ANTENNA_GAIN,
  1558. .rx_filter = WMI_10_4_PDEV_PARAM_RX_FILTER,
  1559. .set_mcast_to_ucast_tid = WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID,
  1560. .proxy_sta_mode = WMI_10_4_PDEV_PARAM_PROXY_STA_MODE,
  1561. .set_mcast2ucast_mode = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE,
  1562. .set_mcast2ucast_buffer = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
  1563. .remove_mcast2ucast_buffer =
  1564. WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
  1565. .peer_sta_ps_statechg_enable =
  1566. WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE,
  1567. .igmpmld_ac_override = WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
  1568. .block_interbss = WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS,
  1569. .set_disable_reset_cmdid = WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
  1570. .set_msdu_ttl_cmdid = WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID,
  1571. .set_ppdu_duration_cmdid = WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
  1572. .txbf_sound_period_cmdid = WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
  1573. .set_promisc_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
  1574. .set_burst_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID,
  1575. .en_stats = WMI_10_4_PDEV_PARAM_EN_STATS,
  1576. .mu_group_policy = WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY,
  1577. .noise_detection = WMI_10_4_PDEV_PARAM_NOISE_DETECTION,
  1578. .noise_threshold = WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD,
  1579. .dpd_enable = WMI_10_4_PDEV_PARAM_DPD_ENABLE,
  1580. .set_mcast_bcast_echo = WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
  1581. .atf_strict_sch = WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH,
  1582. .atf_sched_duration = WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION,
  1583. .ant_plzn = WMI_10_4_PDEV_PARAM_ANT_PLZN,
  1584. .mgmt_retry_limit = WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT,
  1585. .sensitivity_level = WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL,
  1586. .signed_txpower_2g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G,
  1587. .signed_txpower_5g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G,
  1588. .enable_per_tid_amsdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
  1589. .enable_per_tid_ampdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
  1590. .cca_threshold = WMI_10_4_PDEV_PARAM_CCA_THRESHOLD,
  1591. .rts_fixed_rate = WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE,
  1592. .pdev_reset = WMI_10_4_PDEV_PARAM_PDEV_RESET,
  1593. .wapi_mbssid_offset = WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET,
  1594. .arp_srcaddr = WMI_10_4_PDEV_PARAM_ARP_SRCADDR,
  1595. .arp_dstaddr = WMI_10_4_PDEV_PARAM_ARP_DSTADDR,
  1596. .enable_btcoex = WMI_10_4_PDEV_PARAM_ENABLE_BTCOEX,
  1597. };
  1598. static const u8 wmi_key_cipher_suites[] = {
  1599. [WMI_CIPHER_NONE] = WMI_CIPHER_NONE,
  1600. [WMI_CIPHER_WEP] = WMI_CIPHER_WEP,
  1601. [WMI_CIPHER_TKIP] = WMI_CIPHER_TKIP,
  1602. [WMI_CIPHER_AES_OCB] = WMI_CIPHER_AES_OCB,
  1603. [WMI_CIPHER_AES_CCM] = WMI_CIPHER_AES_CCM,
  1604. [WMI_CIPHER_WAPI] = WMI_CIPHER_WAPI,
  1605. [WMI_CIPHER_CKIP] = WMI_CIPHER_CKIP,
  1606. [WMI_CIPHER_AES_CMAC] = WMI_CIPHER_AES_CMAC,
  1607. [WMI_CIPHER_AES_GCM] = WMI_CIPHER_AES_GCM,
  1608. };
  1609. static const u8 wmi_tlv_key_cipher_suites[] = {
  1610. [WMI_CIPHER_NONE] = WMI_TLV_CIPHER_NONE,
  1611. [WMI_CIPHER_WEP] = WMI_TLV_CIPHER_WEP,
  1612. [WMI_CIPHER_TKIP] = WMI_TLV_CIPHER_TKIP,
  1613. [WMI_CIPHER_AES_OCB] = WMI_TLV_CIPHER_AES_OCB,
  1614. [WMI_CIPHER_AES_CCM] = WMI_TLV_CIPHER_AES_CCM,
  1615. [WMI_CIPHER_WAPI] = WMI_TLV_CIPHER_WAPI,
  1616. [WMI_CIPHER_CKIP] = WMI_TLV_CIPHER_CKIP,
  1617. [WMI_CIPHER_AES_CMAC] = WMI_TLV_CIPHER_AES_CMAC,
  1618. [WMI_CIPHER_AES_GCM] = WMI_TLV_CIPHER_AES_GCM,
  1619. };
  1620. static const struct wmi_peer_flags_map wmi_peer_flags_map = {
  1621. .auth = WMI_PEER_AUTH,
  1622. .qos = WMI_PEER_QOS,
  1623. .need_ptk_4_way = WMI_PEER_NEED_PTK_4_WAY,
  1624. .need_gtk_2_way = WMI_PEER_NEED_GTK_2_WAY,
  1625. .apsd = WMI_PEER_APSD,
  1626. .ht = WMI_PEER_HT,
  1627. .bw40 = WMI_PEER_40MHZ,
  1628. .stbc = WMI_PEER_STBC,
  1629. .ldbc = WMI_PEER_LDPC,
  1630. .dyn_mimops = WMI_PEER_DYN_MIMOPS,
  1631. .static_mimops = WMI_PEER_STATIC_MIMOPS,
  1632. .spatial_mux = WMI_PEER_SPATIAL_MUX,
  1633. .vht = WMI_PEER_VHT,
  1634. .bw80 = WMI_PEER_80MHZ,
  1635. .vht_2g = WMI_PEER_VHT_2G,
  1636. .pmf = WMI_PEER_PMF,
  1637. .bw160 = WMI_PEER_160MHZ,
  1638. };
  1639. static const struct wmi_peer_flags_map wmi_10x_peer_flags_map = {
  1640. .auth = WMI_10X_PEER_AUTH,
  1641. .qos = WMI_10X_PEER_QOS,
  1642. .need_ptk_4_way = WMI_10X_PEER_NEED_PTK_4_WAY,
  1643. .need_gtk_2_way = WMI_10X_PEER_NEED_GTK_2_WAY,
  1644. .apsd = WMI_10X_PEER_APSD,
  1645. .ht = WMI_10X_PEER_HT,
  1646. .bw40 = WMI_10X_PEER_40MHZ,
  1647. .stbc = WMI_10X_PEER_STBC,
  1648. .ldbc = WMI_10X_PEER_LDPC,
  1649. .dyn_mimops = WMI_10X_PEER_DYN_MIMOPS,
  1650. .static_mimops = WMI_10X_PEER_STATIC_MIMOPS,
  1651. .spatial_mux = WMI_10X_PEER_SPATIAL_MUX,
  1652. .vht = WMI_10X_PEER_VHT,
  1653. .bw80 = WMI_10X_PEER_80MHZ,
  1654. .bw160 = WMI_10X_PEER_160MHZ,
  1655. };
  1656. static const struct wmi_peer_flags_map wmi_10_2_peer_flags_map = {
  1657. .auth = WMI_10_2_PEER_AUTH,
  1658. .qos = WMI_10_2_PEER_QOS,
  1659. .need_ptk_4_way = WMI_10_2_PEER_NEED_PTK_4_WAY,
  1660. .need_gtk_2_way = WMI_10_2_PEER_NEED_GTK_2_WAY,
  1661. .apsd = WMI_10_2_PEER_APSD,
  1662. .ht = WMI_10_2_PEER_HT,
  1663. .bw40 = WMI_10_2_PEER_40MHZ,
  1664. .stbc = WMI_10_2_PEER_STBC,
  1665. .ldbc = WMI_10_2_PEER_LDPC,
  1666. .dyn_mimops = WMI_10_2_PEER_DYN_MIMOPS,
  1667. .static_mimops = WMI_10_2_PEER_STATIC_MIMOPS,
  1668. .spatial_mux = WMI_10_2_PEER_SPATIAL_MUX,
  1669. .vht = WMI_10_2_PEER_VHT,
  1670. .bw80 = WMI_10_2_PEER_80MHZ,
  1671. .vht_2g = WMI_10_2_PEER_VHT_2G,
  1672. .pmf = WMI_10_2_PEER_PMF,
  1673. .bw160 = WMI_10_2_PEER_160MHZ,
  1674. };
  1675. void ath10k_wmi_put_wmi_channel(struct ath10k *ar, struct wmi_channel *ch,
  1676. const struct wmi_channel_arg *arg)
  1677. {
  1678. u32 flags = 0;
  1679. struct ieee80211_channel *chan = NULL;
  1680. memset(ch, 0, sizeof(*ch));
  1681. if (arg->passive)
  1682. flags |= WMI_CHAN_FLAG_PASSIVE;
  1683. if (arg->allow_ibss)
  1684. flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
  1685. if (arg->allow_ht)
  1686. flags |= WMI_CHAN_FLAG_ALLOW_HT;
  1687. if (arg->allow_vht)
  1688. flags |= WMI_CHAN_FLAG_ALLOW_VHT;
  1689. if (arg->ht40plus)
  1690. flags |= WMI_CHAN_FLAG_HT40_PLUS;
  1691. if (arg->chan_radar)
  1692. flags |= WMI_CHAN_FLAG_DFS;
  1693. ch->band_center_freq2 = 0;
  1694. ch->mhz = __cpu_to_le32(arg->freq);
  1695. ch->band_center_freq1 = __cpu_to_le32(arg->band_center_freq1);
  1696. if (arg->mode == MODE_11AC_VHT80_80) {
  1697. ch->band_center_freq2 = __cpu_to_le32(arg->band_center_freq2);
  1698. chan = ieee80211_get_channel(ar->hw->wiphy,
  1699. arg->band_center_freq2 - 10);
  1700. }
  1701. if (arg->mode == MODE_11AC_VHT160) {
  1702. u32 band_center_freq1;
  1703. u32 band_center_freq2;
  1704. if (arg->freq > arg->band_center_freq1) {
  1705. band_center_freq1 = arg->band_center_freq1 + 40;
  1706. band_center_freq2 = arg->band_center_freq1 - 40;
  1707. } else {
  1708. band_center_freq1 = arg->band_center_freq1 - 40;
  1709. band_center_freq2 = arg->band_center_freq1 + 40;
  1710. }
  1711. ch->band_center_freq1 =
  1712. __cpu_to_le32(band_center_freq1);
  1713. /* Minus 10 to get a defined 5G channel frequency*/
  1714. chan = ieee80211_get_channel(ar->hw->wiphy,
  1715. band_center_freq2 - 10);
  1716. /* The center frequency of the entire VHT160 */
  1717. ch->band_center_freq2 = __cpu_to_le32(arg->band_center_freq1);
  1718. }
  1719. if (chan && chan->flags & IEEE80211_CHAN_RADAR)
  1720. flags |= WMI_CHAN_FLAG_DFS_CFREQ2;
  1721. ch->min_power = arg->min_power;
  1722. ch->max_power = arg->max_power;
  1723. ch->reg_power = arg->max_reg_power;
  1724. ch->antenna_max = arg->max_antenna_gain;
  1725. ch->max_tx_power = arg->max_power;
  1726. /* mode & flags share storage */
  1727. ch->mode = arg->mode;
  1728. ch->flags |= __cpu_to_le32(flags);
  1729. }
  1730. int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
  1731. {
  1732. unsigned long time_left;
  1733. time_left = wait_for_completion_timeout(&ar->wmi.service_ready,
  1734. WMI_SERVICE_READY_TIMEOUT_HZ);
  1735. if (!time_left)
  1736. return -ETIMEDOUT;
  1737. return 0;
  1738. }
  1739. int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
  1740. {
  1741. unsigned long time_left;
  1742. time_left = wait_for_completion_timeout(&ar->wmi.unified_ready,
  1743. WMI_UNIFIED_READY_TIMEOUT_HZ);
  1744. if (!time_left)
  1745. return -ETIMEDOUT;
  1746. return 0;
  1747. }
  1748. struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len)
  1749. {
  1750. struct sk_buff *skb;
  1751. u32 round_len = roundup(len, 4);
  1752. skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len);
  1753. if (!skb)
  1754. return NULL;
  1755. skb_reserve(skb, WMI_SKB_HEADROOM);
  1756. if (!IS_ALIGNED((unsigned long)skb->data, 4))
  1757. ath10k_warn(ar, "Unaligned WMI skb\n");
  1758. skb_put(skb, round_len);
  1759. memset(skb->data, 0, round_len);
  1760. return skb;
  1761. }
  1762. static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
  1763. {
  1764. dev_kfree_skb(skb);
  1765. }
  1766. int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
  1767. u32 cmd_id)
  1768. {
  1769. struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
  1770. struct wmi_cmd_hdr *cmd_hdr;
  1771. int ret;
  1772. u32 cmd = 0;
  1773. if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  1774. return -ENOMEM;
  1775. cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
  1776. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  1777. cmd_hdr->cmd_id = __cpu_to_le32(cmd);
  1778. memset(skb_cb, 0, sizeof(*skb_cb));
  1779. trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len);
  1780. ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
  1781. if (ret)
  1782. goto err_pull;
  1783. return 0;
  1784. err_pull:
  1785. skb_pull(skb, sizeof(struct wmi_cmd_hdr));
  1786. return ret;
  1787. }
  1788. static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
  1789. {
  1790. struct ath10k *ar = arvif->ar;
  1791. struct ath10k_skb_cb *cb;
  1792. struct sk_buff *bcn;
  1793. bool dtim_zero;
  1794. bool deliver_cab;
  1795. int ret;
  1796. spin_lock_bh(&ar->data_lock);
  1797. bcn = arvif->beacon;
  1798. if (!bcn)
  1799. goto unlock;
  1800. cb = ATH10K_SKB_CB(bcn);
  1801. switch (arvif->beacon_state) {
  1802. case ATH10K_BEACON_SENDING:
  1803. case ATH10K_BEACON_SENT:
  1804. break;
  1805. case ATH10K_BEACON_SCHEDULED:
  1806. arvif->beacon_state = ATH10K_BEACON_SENDING;
  1807. spin_unlock_bh(&ar->data_lock);
  1808. dtim_zero = !!(cb->flags & ATH10K_SKB_F_DTIM_ZERO);
  1809. deliver_cab = !!(cb->flags & ATH10K_SKB_F_DELIVER_CAB);
  1810. ret = ath10k_wmi_beacon_send_ref_nowait(arvif->ar,
  1811. arvif->vdev_id,
  1812. bcn->data, bcn->len,
  1813. cb->paddr,
  1814. dtim_zero,
  1815. deliver_cab);
  1816. spin_lock_bh(&ar->data_lock);
  1817. if (ret == 0)
  1818. arvif->beacon_state = ATH10K_BEACON_SENT;
  1819. else
  1820. arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
  1821. }
  1822. unlock:
  1823. spin_unlock_bh(&ar->data_lock);
  1824. }
  1825. static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
  1826. struct ieee80211_vif *vif)
  1827. {
  1828. struct ath10k_vif *arvif = (void *)vif->drv_priv;
  1829. ath10k_wmi_tx_beacon_nowait(arvif);
  1830. }
  1831. static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
  1832. {
  1833. ieee80211_iterate_active_interfaces_atomic(ar->hw,
  1834. ATH10K_ITER_NORMAL_FLAGS,
  1835. ath10k_wmi_tx_beacons_iter,
  1836. NULL);
  1837. }
  1838. static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
  1839. {
  1840. /* try to send pending beacons first. they take priority */
  1841. ath10k_wmi_tx_beacons_nowait(ar);
  1842. wake_up(&ar->wmi.tx_credits_wq);
  1843. }
  1844. int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id)
  1845. {
  1846. int ret = -EOPNOTSUPP;
  1847. might_sleep();
  1848. if (cmd_id == WMI_CMD_UNSUPPORTED) {
  1849. ath10k_warn(ar, "wmi command %d is not supported by firmware\n",
  1850. cmd_id);
  1851. return ret;
  1852. }
  1853. wait_event_timeout(ar->wmi.tx_credits_wq, ({
  1854. /* try to send pending beacons first. they take priority */
  1855. ath10k_wmi_tx_beacons_nowait(ar);
  1856. ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
  1857. if (ret && test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags))
  1858. ret = -ESHUTDOWN;
  1859. (ret != -EAGAIN);
  1860. }), 3 * HZ);
  1861. if (ret)
  1862. dev_kfree_skb_any(skb);
  1863. if (ret == -EAGAIN) {
  1864. ath10k_warn(ar, "wmi command %d timeout, restarting hardware\n",
  1865. cmd_id);
  1866. ath10k_core_start_recovery(ar);
  1867. }
  1868. return ret;
  1869. }
  1870. static struct sk_buff *
  1871. ath10k_wmi_op_gen_mgmt_tx(struct ath10k *ar, struct sk_buff *msdu)
  1872. {
  1873. struct ath10k_skb_cb *cb = ATH10K_SKB_CB(msdu);
  1874. struct ath10k_vif *arvif;
  1875. struct wmi_mgmt_tx_cmd *cmd;
  1876. struct ieee80211_hdr *hdr;
  1877. struct sk_buff *skb;
  1878. int len;
  1879. u32 vdev_id;
  1880. u32 buf_len = msdu->len;
  1881. u16 fc;
  1882. const u8 *peer_addr;
  1883. hdr = (struct ieee80211_hdr *)msdu->data;
  1884. fc = le16_to_cpu(hdr->frame_control);
  1885. if (cb->vif) {
  1886. arvif = (void *)cb->vif->drv_priv;
  1887. vdev_id = arvif->vdev_id;
  1888. } else {
  1889. vdev_id = 0;
  1890. }
  1891. if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
  1892. return ERR_PTR(-EINVAL);
  1893. len = sizeof(cmd->hdr) + msdu->len;
  1894. if ((ieee80211_is_action(hdr->frame_control) ||
  1895. ieee80211_is_deauth(hdr->frame_control) ||
  1896. ieee80211_is_disassoc(hdr->frame_control)) &&
  1897. ieee80211_has_protected(hdr->frame_control)) {
  1898. peer_addr = hdr->addr1;
  1899. if (is_multicast_ether_addr(peer_addr)) {
  1900. len += sizeof(struct ieee80211_mmie_16);
  1901. buf_len += sizeof(struct ieee80211_mmie_16);
  1902. } else {
  1903. if (cb->ucast_cipher == WLAN_CIPHER_SUITE_GCMP ||
  1904. cb->ucast_cipher == WLAN_CIPHER_SUITE_GCMP_256) {
  1905. len += IEEE80211_GCMP_MIC_LEN;
  1906. buf_len += IEEE80211_GCMP_MIC_LEN;
  1907. } else {
  1908. len += IEEE80211_CCMP_MIC_LEN;
  1909. buf_len += IEEE80211_CCMP_MIC_LEN;
  1910. }
  1911. }
  1912. }
  1913. len = round_up(len, 4);
  1914. skb = ath10k_wmi_alloc_skb(ar, len);
  1915. if (!skb)
  1916. return ERR_PTR(-ENOMEM);
  1917. cmd = (struct wmi_mgmt_tx_cmd *)skb->data;
  1918. cmd->hdr.vdev_id = __cpu_to_le32(vdev_id);
  1919. cmd->hdr.tx_rate = 0;
  1920. cmd->hdr.tx_power = 0;
  1921. cmd->hdr.buf_len = __cpu_to_le32(buf_len);
  1922. ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr));
  1923. memcpy(cmd->buf, msdu->data, msdu->len);
  1924. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %pK len %d ftype %02x stype %02x\n",
  1925. msdu, skb->len, fc & IEEE80211_FCTL_FTYPE,
  1926. fc & IEEE80211_FCTL_STYPE);
  1927. trace_ath10k_tx_hdr(ar, skb->data, skb->len);
  1928. trace_ath10k_tx_payload(ar, skb->data, skb->len);
  1929. return skb;
  1930. }
  1931. static void ath10k_wmi_event_scan_started(struct ath10k *ar)
  1932. {
  1933. lockdep_assert_held(&ar->data_lock);
  1934. switch (ar->scan.state) {
  1935. case ATH10K_SCAN_IDLE:
  1936. case ATH10K_SCAN_RUNNING:
  1937. case ATH10K_SCAN_ABORTING:
  1938. ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n",
  1939. ath10k_scan_state_str(ar->scan.state),
  1940. ar->scan.state);
  1941. break;
  1942. case ATH10K_SCAN_STARTING:
  1943. ar->scan.state = ATH10K_SCAN_RUNNING;
  1944. if (ar->scan.is_roc)
  1945. ieee80211_ready_on_channel(ar->hw);
  1946. complete(&ar->scan.started);
  1947. break;
  1948. }
  1949. }
  1950. static void ath10k_wmi_event_scan_start_failed(struct ath10k *ar)
  1951. {
  1952. lockdep_assert_held(&ar->data_lock);
  1953. switch (ar->scan.state) {
  1954. case ATH10K_SCAN_IDLE:
  1955. case ATH10K_SCAN_RUNNING:
  1956. case ATH10K_SCAN_ABORTING:
  1957. ath10k_warn(ar, "received scan start failed event in an invalid scan state: %s (%d)\n",
  1958. ath10k_scan_state_str(ar->scan.state),
  1959. ar->scan.state);
  1960. break;
  1961. case ATH10K_SCAN_STARTING:
  1962. complete(&ar->scan.started);
  1963. __ath10k_scan_finish(ar);
  1964. break;
  1965. }
  1966. }
  1967. static void ath10k_wmi_event_scan_completed(struct ath10k *ar)
  1968. {
  1969. lockdep_assert_held(&ar->data_lock);
  1970. switch (ar->scan.state) {
  1971. case ATH10K_SCAN_IDLE:
  1972. case ATH10K_SCAN_STARTING:
  1973. /* One suspected reason scan can be completed while starting is
  1974. * if firmware fails to deliver all scan events to the host,
  1975. * e.g. when transport pipe is full. This has been observed
  1976. * with spectral scan phyerr events starving wmi transport
  1977. * pipe. In such case the "scan completed" event should be (and
  1978. * is) ignored by the host as it may be just firmware's scan
  1979. * state machine recovering.
  1980. */
  1981. ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n",
  1982. ath10k_scan_state_str(ar->scan.state),
  1983. ar->scan.state);
  1984. break;
  1985. case ATH10K_SCAN_RUNNING:
  1986. case ATH10K_SCAN_ABORTING:
  1987. __ath10k_scan_finish(ar);
  1988. break;
  1989. }
  1990. }
  1991. static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar)
  1992. {
  1993. lockdep_assert_held(&ar->data_lock);
  1994. switch (ar->scan.state) {
  1995. case ATH10K_SCAN_IDLE:
  1996. case ATH10K_SCAN_STARTING:
  1997. ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n",
  1998. ath10k_scan_state_str(ar->scan.state),
  1999. ar->scan.state);
  2000. break;
  2001. case ATH10K_SCAN_RUNNING:
  2002. case ATH10K_SCAN_ABORTING:
  2003. ar->scan_channel = NULL;
  2004. break;
  2005. }
  2006. }
  2007. static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq)
  2008. {
  2009. lockdep_assert_held(&ar->data_lock);
  2010. switch (ar->scan.state) {
  2011. case ATH10K_SCAN_IDLE:
  2012. case ATH10K_SCAN_STARTING:
  2013. ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
  2014. ath10k_scan_state_str(ar->scan.state),
  2015. ar->scan.state);
  2016. break;
  2017. case ATH10K_SCAN_RUNNING:
  2018. case ATH10K_SCAN_ABORTING:
  2019. ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
  2020. if (ar->scan.is_roc && ar->scan.roc_freq == freq)
  2021. complete(&ar->scan.on_channel);
  2022. break;
  2023. }
  2024. }
  2025. static const char *
  2026. ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
  2027. enum wmi_scan_completion_reason reason)
  2028. {
  2029. switch (type) {
  2030. case WMI_SCAN_EVENT_STARTED:
  2031. return "started";
  2032. case WMI_SCAN_EVENT_COMPLETED:
  2033. switch (reason) {
  2034. case WMI_SCAN_REASON_COMPLETED:
  2035. return "completed";
  2036. case WMI_SCAN_REASON_CANCELLED:
  2037. return "completed [cancelled]";
  2038. case WMI_SCAN_REASON_PREEMPTED:
  2039. return "completed [preempted]";
  2040. case WMI_SCAN_REASON_TIMEDOUT:
  2041. return "completed [timedout]";
  2042. case WMI_SCAN_REASON_INTERNAL_FAILURE:
  2043. return "completed [internal err]";
  2044. case WMI_SCAN_REASON_MAX:
  2045. break;
  2046. }
  2047. return "completed [unknown]";
  2048. case WMI_SCAN_EVENT_BSS_CHANNEL:
  2049. return "bss channel";
  2050. case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
  2051. return "foreign channel";
  2052. case WMI_SCAN_EVENT_DEQUEUED:
  2053. return "dequeued";
  2054. case WMI_SCAN_EVENT_PREEMPTED:
  2055. return "preempted";
  2056. case WMI_SCAN_EVENT_START_FAILED:
  2057. return "start failed";
  2058. case WMI_SCAN_EVENT_RESTARTED:
  2059. return "restarted";
  2060. case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
  2061. return "foreign channel exit";
  2062. default:
  2063. return "unknown";
  2064. }
  2065. }
  2066. static int ath10k_wmi_op_pull_scan_ev(struct ath10k *ar, struct sk_buff *skb,
  2067. struct wmi_scan_ev_arg *arg)
  2068. {
  2069. struct wmi_scan_event *ev = (void *)skb->data;
  2070. if (skb->len < sizeof(*ev))
  2071. return -EPROTO;
  2072. skb_pull(skb, sizeof(*ev));
  2073. arg->event_type = ev->event_type;
  2074. arg->reason = ev->reason;
  2075. arg->channel_freq = ev->channel_freq;
  2076. arg->scan_req_id = ev->scan_req_id;
  2077. arg->scan_id = ev->scan_id;
  2078. arg->vdev_id = ev->vdev_id;
  2079. return 0;
  2080. }
  2081. int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
  2082. {
  2083. struct wmi_scan_ev_arg arg = {};
  2084. enum wmi_scan_event_type event_type;
  2085. enum wmi_scan_completion_reason reason;
  2086. u32 freq;
  2087. u32 req_id;
  2088. u32 scan_id;
  2089. u32 vdev_id;
  2090. int ret;
  2091. ret = ath10k_wmi_pull_scan(ar, skb, &arg);
  2092. if (ret) {
  2093. ath10k_warn(ar, "failed to parse scan event: %d\n", ret);
  2094. return ret;
  2095. }
  2096. event_type = __le32_to_cpu(arg.event_type);
  2097. reason = __le32_to_cpu(arg.reason);
  2098. freq = __le32_to_cpu(arg.channel_freq);
  2099. req_id = __le32_to_cpu(arg.scan_req_id);
  2100. scan_id = __le32_to_cpu(arg.scan_id);
  2101. vdev_id = __le32_to_cpu(arg.vdev_id);
  2102. spin_lock_bh(&ar->data_lock);
  2103. ath10k_dbg(ar, ATH10K_DBG_WMI,
  2104. "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
  2105. ath10k_wmi_event_scan_type_str(event_type, reason),
  2106. event_type, reason, freq, req_id, scan_id, vdev_id,
  2107. ath10k_scan_state_str(ar->scan.state), ar->scan.state);
  2108. switch (event_type) {
  2109. case WMI_SCAN_EVENT_STARTED:
  2110. ath10k_wmi_event_scan_started(ar);
  2111. break;
  2112. case WMI_SCAN_EVENT_COMPLETED:
  2113. ath10k_wmi_event_scan_completed(ar);
  2114. break;
  2115. case WMI_SCAN_EVENT_BSS_CHANNEL:
  2116. ath10k_wmi_event_scan_bss_chan(ar);
  2117. break;
  2118. case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
  2119. ath10k_wmi_event_scan_foreign_chan(ar, freq);
  2120. break;
  2121. case WMI_SCAN_EVENT_START_FAILED:
  2122. ath10k_warn(ar, "received scan start failure event\n");
  2123. ath10k_wmi_event_scan_start_failed(ar);
  2124. break;
  2125. case WMI_SCAN_EVENT_DEQUEUED:
  2126. case WMI_SCAN_EVENT_PREEMPTED:
  2127. case WMI_SCAN_EVENT_RESTARTED:
  2128. case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
  2129. default:
  2130. break;
  2131. }
  2132. spin_unlock_bh(&ar->data_lock);
  2133. return 0;
  2134. }
  2135. /* If keys are configured, HW decrypts all frames
  2136. * with protected bit set. Mark such frames as decrypted.
  2137. */
  2138. static void ath10k_wmi_handle_wep_reauth(struct ath10k *ar,
  2139. struct sk_buff *skb,
  2140. struct ieee80211_rx_status *status)
  2141. {
  2142. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2143. unsigned int hdrlen;
  2144. bool peer_key;
  2145. u8 *addr, keyidx;
  2146. if (!ieee80211_is_auth(hdr->frame_control) ||
  2147. !ieee80211_has_protected(hdr->frame_control))
  2148. return;
  2149. hdrlen = ieee80211_hdrlen(hdr->frame_control);
  2150. if (skb->len < (hdrlen + IEEE80211_WEP_IV_LEN))
  2151. return;
  2152. keyidx = skb->data[hdrlen + (IEEE80211_WEP_IV_LEN - 1)] >> WEP_KEYID_SHIFT;
  2153. addr = ieee80211_get_SA(hdr);
  2154. spin_lock_bh(&ar->data_lock);
  2155. peer_key = ath10k_mac_is_peer_wep_key_set(ar, addr, keyidx);
  2156. spin_unlock_bh(&ar->data_lock);
  2157. if (peer_key) {
  2158. ath10k_dbg(ar, ATH10K_DBG_MAC,
  2159. "mac wep key present for peer %pM\n", addr);
  2160. status->flag |= RX_FLAG_DECRYPTED;
  2161. }
  2162. }
  2163. static int ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k *ar, struct sk_buff *skb,
  2164. struct wmi_mgmt_rx_ev_arg *arg)
  2165. {
  2166. struct wmi_mgmt_rx_event_v1 *ev_v1;
  2167. struct wmi_mgmt_rx_event_v2 *ev_v2;
  2168. struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
  2169. struct wmi_mgmt_rx_ext_info *ext_info;
  2170. size_t pull_len;
  2171. u32 msdu_len;
  2172. u32 len;
  2173. if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX,
  2174. ar->running_fw->fw_file.fw_features)) {
  2175. ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
  2176. ev_hdr = &ev_v2->hdr.v1;
  2177. pull_len = sizeof(*ev_v2);
  2178. } else {
  2179. ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
  2180. ev_hdr = &ev_v1->hdr;
  2181. pull_len = sizeof(*ev_v1);
  2182. }
  2183. if (skb->len < pull_len)
  2184. return -EPROTO;
  2185. skb_pull(skb, pull_len);
  2186. arg->channel = ev_hdr->channel;
  2187. arg->buf_len = ev_hdr->buf_len;
  2188. arg->status = ev_hdr->status;
  2189. arg->snr = ev_hdr->snr;
  2190. arg->phy_mode = ev_hdr->phy_mode;
  2191. arg->rate = ev_hdr->rate;
  2192. msdu_len = __le32_to_cpu(arg->buf_len);
  2193. if (skb->len < msdu_len)
  2194. return -EPROTO;
  2195. if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
  2196. len = ALIGN(le32_to_cpu(arg->buf_len), 4);
  2197. ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
  2198. memcpy(&arg->ext_info, ext_info,
  2199. sizeof(struct wmi_mgmt_rx_ext_info));
  2200. }
  2201. /* the WMI buffer might've ended up being padded to 4 bytes due to HTC
  2202. * trailer with credit update. Trim the excess garbage.
  2203. */
  2204. skb_trim(skb, msdu_len);
  2205. return 0;
  2206. }
  2207. static int ath10k_wmi_10_4_op_pull_mgmt_rx_ev(struct ath10k *ar,
  2208. struct sk_buff *skb,
  2209. struct wmi_mgmt_rx_ev_arg *arg)
  2210. {
  2211. struct wmi_10_4_mgmt_rx_event *ev;
  2212. struct wmi_10_4_mgmt_rx_hdr *ev_hdr;
  2213. size_t pull_len;
  2214. u32 msdu_len;
  2215. struct wmi_mgmt_rx_ext_info *ext_info;
  2216. u32 len;
  2217. ev = (struct wmi_10_4_mgmt_rx_event *)skb->data;
  2218. ev_hdr = &ev->hdr;
  2219. pull_len = sizeof(*ev);
  2220. if (skb->len < pull_len)
  2221. return -EPROTO;
  2222. skb_pull(skb, pull_len);
  2223. arg->channel = ev_hdr->channel;
  2224. arg->buf_len = ev_hdr->buf_len;
  2225. arg->status = ev_hdr->status;
  2226. arg->snr = ev_hdr->snr;
  2227. arg->phy_mode = ev_hdr->phy_mode;
  2228. arg->rate = ev_hdr->rate;
  2229. msdu_len = __le32_to_cpu(arg->buf_len);
  2230. if (skb->len < msdu_len)
  2231. return -EPROTO;
  2232. if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
  2233. len = ALIGN(le32_to_cpu(arg->buf_len), 4);
  2234. ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
  2235. memcpy(&arg->ext_info, ext_info,
  2236. sizeof(struct wmi_mgmt_rx_ext_info));
  2237. }
  2238. /* Make sure bytes added for padding are removed. */
  2239. skb_trim(skb, msdu_len);
  2240. return 0;
  2241. }
  2242. static bool ath10k_wmi_rx_is_decrypted(struct ath10k *ar,
  2243. struct ieee80211_hdr *hdr)
  2244. {
  2245. if (!ieee80211_has_protected(hdr->frame_control))
  2246. return false;
  2247. /* FW delivers WEP Shared Auth frame with Protected Bit set and
  2248. * encrypted payload. However in case of PMF it delivers decrypted
  2249. * frames with Protected Bit set.
  2250. */
  2251. if (ieee80211_is_auth(hdr->frame_control))
  2252. return false;
  2253. /* qca99x0 based FW delivers broadcast or multicast management frames
  2254. * (ex: group privacy action frames in mesh) as encrypted payload.
  2255. */
  2256. if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) &&
  2257. ar->hw_params.sw_decrypt_mcast_mgmt)
  2258. return false;
  2259. return true;
  2260. }
  2261. static int
  2262. wmi_process_mgmt_tx_comp(struct ath10k *ar, struct mgmt_tx_compl_params *param)
  2263. {
  2264. struct ath10k_mgmt_tx_pkt_addr *pkt_addr;
  2265. struct ath10k_wmi *wmi = &ar->wmi;
  2266. struct ieee80211_tx_info *info;
  2267. struct sk_buff *msdu;
  2268. int ret;
  2269. spin_lock_bh(&ar->data_lock);
  2270. pkt_addr = idr_find(&wmi->mgmt_pending_tx, param->desc_id);
  2271. if (!pkt_addr) {
  2272. ath10k_warn(ar, "received mgmt tx completion for invalid msdu_id: %d\n",
  2273. param->desc_id);
  2274. ret = -ENOENT;
  2275. goto out;
  2276. }
  2277. msdu = pkt_addr->vaddr;
  2278. dma_unmap_single(ar->dev, pkt_addr->paddr,
  2279. msdu->len, DMA_TO_DEVICE);
  2280. info = IEEE80211_SKB_CB(msdu);
  2281. if (param->status) {
  2282. info->flags &= ~IEEE80211_TX_STAT_ACK;
  2283. } else {
  2284. info->flags |= IEEE80211_TX_STAT_ACK;
  2285. info->status.ack_signal = ATH10K_DEFAULT_NOISE_FLOOR +
  2286. param->ack_rssi;
  2287. info->status.flags |= IEEE80211_TX_STATUS_ACK_SIGNAL_VALID;
  2288. }
  2289. ieee80211_tx_status_irqsafe(ar->hw, msdu);
  2290. ret = 0;
  2291. out:
  2292. idr_remove(&wmi->mgmt_pending_tx, param->desc_id);
  2293. spin_unlock_bh(&ar->data_lock);
  2294. return ret;
  2295. }
  2296. int ath10k_wmi_event_mgmt_tx_compl(struct ath10k *ar, struct sk_buff *skb)
  2297. {
  2298. struct wmi_tlv_mgmt_tx_compl_ev_arg arg;
  2299. struct mgmt_tx_compl_params param;
  2300. int ret;
  2301. ret = ath10k_wmi_pull_mgmt_tx_compl(ar, skb, &arg);
  2302. if (ret) {
  2303. ath10k_warn(ar, "failed to parse mgmt comp event: %d\n", ret);
  2304. return ret;
  2305. }
  2306. memset(&param, 0, sizeof(struct mgmt_tx_compl_params));
  2307. param.desc_id = __le32_to_cpu(arg.desc_id);
  2308. param.status = __le32_to_cpu(arg.status);
  2309. if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI, ar->wmi.svc_map))
  2310. param.ack_rssi = __le32_to_cpu(arg.ack_rssi);
  2311. wmi_process_mgmt_tx_comp(ar, &param);
  2312. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi tlv evnt mgmt tx completion\n");
  2313. return 0;
  2314. }
  2315. int ath10k_wmi_event_mgmt_tx_bundle_compl(struct ath10k *ar, struct sk_buff *skb)
  2316. {
  2317. struct wmi_tlv_mgmt_tx_bundle_compl_ev_arg arg;
  2318. struct mgmt_tx_compl_params param;
  2319. u32 num_reports;
  2320. int i, ret;
  2321. ret = ath10k_wmi_pull_mgmt_tx_bundle_compl(ar, skb, &arg);
  2322. if (ret) {
  2323. ath10k_warn(ar, "failed to parse bundle mgmt compl event: %d\n", ret);
  2324. return ret;
  2325. }
  2326. num_reports = __le32_to_cpu(arg.num_reports);
  2327. for (i = 0; i < num_reports; i++) {
  2328. memset(&param, 0, sizeof(struct mgmt_tx_compl_params));
  2329. param.desc_id = __le32_to_cpu(arg.desc_ids[i]);
  2330. param.status = __le32_to_cpu(arg.desc_ids[i]);
  2331. if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI, ar->wmi.svc_map))
  2332. param.ack_rssi = __le32_to_cpu(arg.ack_rssi[i]);
  2333. wmi_process_mgmt_tx_comp(ar, &param);
  2334. }
  2335. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi tlv event bundle mgmt tx completion\n");
  2336. return 0;
  2337. }
  2338. int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
  2339. {
  2340. struct wmi_mgmt_rx_ev_arg arg = {};
  2341. struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
  2342. struct ieee80211_hdr *hdr;
  2343. struct ieee80211_supported_band *sband;
  2344. u32 rx_status;
  2345. u32 channel;
  2346. u32 phy_mode;
  2347. u32 snr, rssi;
  2348. u32 rate;
  2349. u16 fc;
  2350. int ret, i;
  2351. ret = ath10k_wmi_pull_mgmt_rx(ar, skb, &arg);
  2352. if (ret) {
  2353. ath10k_warn(ar, "failed to parse mgmt rx event: %d\n", ret);
  2354. dev_kfree_skb(skb);
  2355. return ret;
  2356. }
  2357. channel = __le32_to_cpu(arg.channel);
  2358. rx_status = __le32_to_cpu(arg.status);
  2359. snr = __le32_to_cpu(arg.snr);
  2360. phy_mode = __le32_to_cpu(arg.phy_mode);
  2361. rate = __le32_to_cpu(arg.rate);
  2362. memset(status, 0, sizeof(*status));
  2363. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  2364. "event mgmt rx status %08x\n", rx_status);
  2365. if ((test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) ||
  2366. (rx_status & (WMI_RX_STATUS_ERR_DECRYPT |
  2367. WMI_RX_STATUS_ERR_KEY_CACHE_MISS | WMI_RX_STATUS_ERR_CRC))) {
  2368. dev_kfree_skb(skb);
  2369. return 0;
  2370. }
  2371. if (rx_status & WMI_RX_STATUS_ERR_MIC)
  2372. status->flag |= RX_FLAG_MMIC_ERROR;
  2373. if (rx_status & WMI_RX_STATUS_EXT_INFO) {
  2374. status->mactime =
  2375. __le64_to_cpu(arg.ext_info.rx_mac_timestamp);
  2376. status->flag |= RX_FLAG_MACTIME_END;
  2377. }
  2378. /* Hardware can Rx CCK rates on 5GHz. In that case phy_mode is set to
  2379. * MODE_11B. This means phy_mode is not a reliable source for the band
  2380. * of mgmt rx.
  2381. */
  2382. if (channel >= 1 && channel <= 14) {
  2383. status->band = NL80211_BAND_2GHZ;
  2384. } else if (channel >= 36 && channel <= ATH10K_MAX_5G_CHAN) {
  2385. status->band = NL80211_BAND_5GHZ;
  2386. } else {
  2387. /* Shouldn't happen unless list of advertised channels to
  2388. * mac80211 has been changed.
  2389. */
  2390. WARN_ON_ONCE(1);
  2391. dev_kfree_skb(skb);
  2392. return 0;
  2393. }
  2394. if (phy_mode == MODE_11B && status->band == NL80211_BAND_5GHZ)
  2395. ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
  2396. sband = &ar->mac.sbands[status->band];
  2397. status->freq = ieee80211_channel_to_frequency(channel, status->band);
  2398. status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
  2399. BUILD_BUG_ON(ARRAY_SIZE(status->chain_signal) != ARRAY_SIZE(arg.rssi));
  2400. for (i = 0; i < ARRAY_SIZE(status->chain_signal); i++) {
  2401. status->chains &= ~BIT(i);
  2402. rssi = __le32_to_cpu(arg.rssi[i]);
  2403. ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt rssi[%d]:%d\n", i, arg.rssi[i]);
  2404. if (rssi != ATH10K_INVALID_RSSI && rssi != 0) {
  2405. status->chain_signal[i] = ATH10K_DEFAULT_NOISE_FLOOR + rssi;
  2406. status->chains |= BIT(i);
  2407. }
  2408. }
  2409. status->rate_idx = ath10k_mac_bitrate_to_idx(sband, rate / 100);
  2410. hdr = (struct ieee80211_hdr *)skb->data;
  2411. fc = le16_to_cpu(hdr->frame_control);
  2412. /* Firmware is guaranteed to report all essential management frames via
  2413. * WMI while it can deliver some extra via HTT. Since there can be
  2414. * duplicates split the reporting wrt monitor/sniffing.
  2415. */
  2416. status->flag |= RX_FLAG_SKIP_MONITOR;
  2417. ath10k_wmi_handle_wep_reauth(ar, skb, status);
  2418. if (ath10k_wmi_rx_is_decrypted(ar, hdr)) {
  2419. status->flag |= RX_FLAG_DECRYPTED;
  2420. if (!ieee80211_is_action(hdr->frame_control) &&
  2421. !ieee80211_is_deauth(hdr->frame_control) &&
  2422. !ieee80211_is_disassoc(hdr->frame_control)) {
  2423. status->flag |= RX_FLAG_IV_STRIPPED |
  2424. RX_FLAG_MMIC_STRIPPED;
  2425. hdr->frame_control = __cpu_to_le16(fc &
  2426. ~IEEE80211_FCTL_PROTECTED);
  2427. }
  2428. }
  2429. if (ieee80211_is_beacon(hdr->frame_control))
  2430. ath10k_mac_handle_beacon(ar, skb);
  2431. if (ieee80211_is_beacon(hdr->frame_control) ||
  2432. ieee80211_is_probe_resp(hdr->frame_control))
  2433. status->boottime_ns = ktime_get_boottime_ns();
  2434. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  2435. "event mgmt rx skb %pK len %d ftype %02x stype %02x\n",
  2436. skb, skb->len,
  2437. fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
  2438. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  2439. "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
  2440. status->freq, status->band, status->signal,
  2441. status->rate_idx);
  2442. ieee80211_rx_ni(ar->hw, skb);
  2443. return 0;
  2444. }
  2445. static int freq_to_idx(struct ath10k *ar, int freq)
  2446. {
  2447. struct ieee80211_supported_band *sband;
  2448. int band, ch, idx = 0;
  2449. for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
  2450. sband = ar->hw->wiphy->bands[band];
  2451. if (!sband)
  2452. continue;
  2453. for (ch = 0; ch < sband->n_channels; ch++, idx++)
  2454. if (sband->channels[ch].center_freq == freq)
  2455. goto exit;
  2456. }
  2457. exit:
  2458. return idx;
  2459. }
  2460. static int ath10k_wmi_op_pull_ch_info_ev(struct ath10k *ar, struct sk_buff *skb,
  2461. struct wmi_ch_info_ev_arg *arg)
  2462. {
  2463. struct wmi_chan_info_event *ev = (void *)skb->data;
  2464. if (skb->len < sizeof(*ev))
  2465. return -EPROTO;
  2466. skb_pull(skb, sizeof(*ev));
  2467. arg->err_code = ev->err_code;
  2468. arg->freq = ev->freq;
  2469. arg->cmd_flags = ev->cmd_flags;
  2470. arg->noise_floor = ev->noise_floor;
  2471. arg->rx_clear_count = ev->rx_clear_count;
  2472. arg->cycle_count = ev->cycle_count;
  2473. return 0;
  2474. }
  2475. static int ath10k_wmi_10_4_op_pull_ch_info_ev(struct ath10k *ar,
  2476. struct sk_buff *skb,
  2477. struct wmi_ch_info_ev_arg *arg)
  2478. {
  2479. struct wmi_10_4_chan_info_event *ev = (void *)skb->data;
  2480. if (skb->len < sizeof(*ev))
  2481. return -EPROTO;
  2482. skb_pull(skb, sizeof(*ev));
  2483. arg->err_code = ev->err_code;
  2484. arg->freq = ev->freq;
  2485. arg->cmd_flags = ev->cmd_flags;
  2486. arg->noise_floor = ev->noise_floor;
  2487. arg->rx_clear_count = ev->rx_clear_count;
  2488. arg->cycle_count = ev->cycle_count;
  2489. arg->chan_tx_pwr_range = ev->chan_tx_pwr_range;
  2490. arg->chan_tx_pwr_tp = ev->chan_tx_pwr_tp;
  2491. arg->rx_frame_count = ev->rx_frame_count;
  2492. return 0;
  2493. }
  2494. /*
  2495. * Handle the channel info event for firmware which only sends one
  2496. * chan_info event per scanned channel.
  2497. */
  2498. static void ath10k_wmi_event_chan_info_unpaired(struct ath10k *ar,
  2499. struct chan_info_params *params)
  2500. {
  2501. struct survey_info *survey;
  2502. int idx;
  2503. if (params->cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
  2504. ath10k_dbg(ar, ATH10K_DBG_WMI, "chan info report completed\n");
  2505. return;
  2506. }
  2507. idx = freq_to_idx(ar, params->freq);
  2508. if (idx >= ARRAY_SIZE(ar->survey)) {
  2509. ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
  2510. params->freq, idx);
  2511. return;
  2512. }
  2513. survey = &ar->survey[idx];
  2514. if (!params->mac_clk_mhz)
  2515. return;
  2516. memset(survey, 0, sizeof(*survey));
  2517. survey->noise = params->noise_floor;
  2518. survey->time = (params->cycle_count / params->mac_clk_mhz) / 1000;
  2519. survey->time_busy = (params->rx_clear_count / params->mac_clk_mhz) / 1000;
  2520. survey->filled |= SURVEY_INFO_NOISE_DBM | SURVEY_INFO_TIME |
  2521. SURVEY_INFO_TIME_BUSY;
  2522. }
  2523. /*
  2524. * Handle the channel info event for firmware which sends chan_info
  2525. * event in pairs(start and stop events) for every scanned channel.
  2526. */
  2527. static void ath10k_wmi_event_chan_info_paired(struct ath10k *ar,
  2528. struct chan_info_params *params)
  2529. {
  2530. struct survey_info *survey;
  2531. int idx;
  2532. idx = freq_to_idx(ar, params->freq);
  2533. if (idx >= ARRAY_SIZE(ar->survey)) {
  2534. ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
  2535. params->freq, idx);
  2536. return;
  2537. }
  2538. if (params->cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
  2539. if (ar->ch_info_can_report_survey) {
  2540. survey = &ar->survey[idx];
  2541. survey->noise = params->noise_floor;
  2542. survey->filled = SURVEY_INFO_NOISE_DBM;
  2543. ath10k_hw_fill_survey_time(ar,
  2544. survey,
  2545. params->cycle_count,
  2546. params->rx_clear_count,
  2547. ar->survey_last_cycle_count,
  2548. ar->survey_last_rx_clear_count);
  2549. }
  2550. ar->ch_info_can_report_survey = false;
  2551. } else {
  2552. ar->ch_info_can_report_survey = true;
  2553. }
  2554. if (!(params->cmd_flags & WMI_CHAN_INFO_FLAG_PRE_COMPLETE)) {
  2555. ar->survey_last_rx_clear_count = params->rx_clear_count;
  2556. ar->survey_last_cycle_count = params->cycle_count;
  2557. }
  2558. }
  2559. void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
  2560. {
  2561. struct chan_info_params ch_info_param;
  2562. struct wmi_ch_info_ev_arg arg = {};
  2563. int ret;
  2564. ret = ath10k_wmi_pull_ch_info(ar, skb, &arg);
  2565. if (ret) {
  2566. ath10k_warn(ar, "failed to parse chan info event: %d\n", ret);
  2567. return;
  2568. }
  2569. ch_info_param.err_code = __le32_to_cpu(arg.err_code);
  2570. ch_info_param.freq = __le32_to_cpu(arg.freq);
  2571. ch_info_param.cmd_flags = __le32_to_cpu(arg.cmd_flags);
  2572. ch_info_param.noise_floor = __le32_to_cpu(arg.noise_floor);
  2573. ch_info_param.rx_clear_count = __le32_to_cpu(arg.rx_clear_count);
  2574. ch_info_param.cycle_count = __le32_to_cpu(arg.cycle_count);
  2575. ch_info_param.mac_clk_mhz = __le32_to_cpu(arg.mac_clk_mhz);
  2576. ath10k_dbg(ar, ATH10K_DBG_WMI,
  2577. "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
  2578. ch_info_param.err_code, ch_info_param.freq, ch_info_param.cmd_flags,
  2579. ch_info_param.noise_floor, ch_info_param.rx_clear_count,
  2580. ch_info_param.cycle_count);
  2581. spin_lock_bh(&ar->data_lock);
  2582. switch (ar->scan.state) {
  2583. case ATH10K_SCAN_IDLE:
  2584. case ATH10K_SCAN_STARTING:
  2585. ath10k_dbg(ar, ATH10K_DBG_WMI, "received chan info event without a scan request, ignoring\n");
  2586. goto exit;
  2587. case ATH10K_SCAN_RUNNING:
  2588. case ATH10K_SCAN_ABORTING:
  2589. break;
  2590. }
  2591. if (test_bit(ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL,
  2592. ar->running_fw->fw_file.fw_features))
  2593. ath10k_wmi_event_chan_info_unpaired(ar, &ch_info_param);
  2594. else
  2595. ath10k_wmi_event_chan_info_paired(ar, &ch_info_param);
  2596. exit:
  2597. spin_unlock_bh(&ar->data_lock);
  2598. }
  2599. void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
  2600. {
  2601. struct wmi_echo_ev_arg arg = {};
  2602. int ret;
  2603. ret = ath10k_wmi_pull_echo_ev(ar, skb, &arg);
  2604. if (ret) {
  2605. ath10k_warn(ar, "failed to parse echo: %d\n", ret);
  2606. return;
  2607. }
  2608. ath10k_dbg(ar, ATH10K_DBG_WMI,
  2609. "wmi event echo value 0x%08x\n",
  2610. le32_to_cpu(arg.value));
  2611. if (le32_to_cpu(arg.value) == ATH10K_WMI_BARRIER_ECHO_ID)
  2612. complete(&ar->wmi.barrier);
  2613. }
  2614. int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
  2615. {
  2616. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
  2617. skb->len);
  2618. trace_ath10k_wmi_dbglog(ar, skb->data, skb->len);
  2619. return 0;
  2620. }
  2621. void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
  2622. struct ath10k_fw_stats_pdev *dst)
  2623. {
  2624. dst->ch_noise_floor = __le32_to_cpu(src->chan_nf);
  2625. dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count);
  2626. dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count);
  2627. dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count);
  2628. dst->cycle_count = __le32_to_cpu(src->cycle_count);
  2629. dst->phy_err_count = __le32_to_cpu(src->phy_err_count);
  2630. dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr);
  2631. }
  2632. void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
  2633. struct ath10k_fw_stats_pdev *dst)
  2634. {
  2635. dst->comp_queued = __le32_to_cpu(src->comp_queued);
  2636. dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
  2637. dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
  2638. dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
  2639. dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
  2640. dst->local_enqued = __le32_to_cpu(src->local_enqued);
  2641. dst->local_freed = __le32_to_cpu(src->local_freed);
  2642. dst->hw_queued = __le32_to_cpu(src->hw_queued);
  2643. dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
  2644. dst->underrun = __le32_to_cpu(src->underrun);
  2645. dst->tx_abort = __le32_to_cpu(src->tx_abort);
  2646. dst->mpdus_requeued = __le32_to_cpu(src->mpdus_requeued);
  2647. dst->tx_ko = __le32_to_cpu(src->tx_ko);
  2648. dst->data_rc = __le32_to_cpu(src->data_rc);
  2649. dst->self_triggers = __le32_to_cpu(src->self_triggers);
  2650. dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
  2651. dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
  2652. dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
  2653. dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
  2654. dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
  2655. dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
  2656. dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
  2657. }
  2658. static void
  2659. ath10k_wmi_10_4_pull_pdev_stats_tx(const struct wmi_10_4_pdev_stats_tx *src,
  2660. struct ath10k_fw_stats_pdev *dst)
  2661. {
  2662. dst->comp_queued = __le32_to_cpu(src->comp_queued);
  2663. dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
  2664. dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
  2665. dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
  2666. dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
  2667. dst->local_enqued = __le32_to_cpu(src->local_enqued);
  2668. dst->local_freed = __le32_to_cpu(src->local_freed);
  2669. dst->hw_queued = __le32_to_cpu(src->hw_queued);
  2670. dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
  2671. dst->underrun = __le32_to_cpu(src->underrun);
  2672. dst->tx_abort = __le32_to_cpu(src->tx_abort);
  2673. dst->mpdus_requeued = __le32_to_cpu(src->mpdus_requeued);
  2674. dst->tx_ko = __le32_to_cpu(src->tx_ko);
  2675. dst->data_rc = __le32_to_cpu(src->data_rc);
  2676. dst->self_triggers = __le32_to_cpu(src->self_triggers);
  2677. dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
  2678. dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
  2679. dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
  2680. dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
  2681. dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
  2682. dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
  2683. dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
  2684. dst->hw_paused = __le32_to_cpu(src->hw_paused);
  2685. dst->seq_posted = __le32_to_cpu(src->seq_posted);
  2686. dst->seq_failed_queueing =
  2687. __le32_to_cpu(src->seq_failed_queueing);
  2688. dst->seq_completed = __le32_to_cpu(src->seq_completed);
  2689. dst->seq_restarted = __le32_to_cpu(src->seq_restarted);
  2690. dst->mu_seq_posted = __le32_to_cpu(src->mu_seq_posted);
  2691. dst->mpdus_sw_flush = __le32_to_cpu(src->mpdus_sw_flush);
  2692. dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
  2693. dst->mpdus_truncated = __le32_to_cpu(src->mpdus_truncated);
  2694. dst->mpdus_ack_failed = __le32_to_cpu(src->mpdus_ack_failed);
  2695. dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
  2696. dst->mpdus_expired = __le32_to_cpu(src->mpdus_expired);
  2697. }
  2698. void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
  2699. struct ath10k_fw_stats_pdev *dst)
  2700. {
  2701. dst->mid_ppdu_route_change = __le32_to_cpu(src->mid_ppdu_route_change);
  2702. dst->status_rcvd = __le32_to_cpu(src->status_rcvd);
  2703. dst->r0_frags = __le32_to_cpu(src->r0_frags);
  2704. dst->r1_frags = __le32_to_cpu(src->r1_frags);
  2705. dst->r2_frags = __le32_to_cpu(src->r2_frags);
  2706. dst->r3_frags = __le32_to_cpu(src->r3_frags);
  2707. dst->htt_msdus = __le32_to_cpu(src->htt_msdus);
  2708. dst->htt_mpdus = __le32_to_cpu(src->htt_mpdus);
  2709. dst->loc_msdus = __le32_to_cpu(src->loc_msdus);
  2710. dst->loc_mpdus = __le32_to_cpu(src->loc_mpdus);
  2711. dst->oversize_amsdu = __le32_to_cpu(src->oversize_amsdu);
  2712. dst->phy_errs = __le32_to_cpu(src->phy_errs);
  2713. dst->phy_err_drop = __le32_to_cpu(src->phy_err_drop);
  2714. dst->mpdu_errs = __le32_to_cpu(src->mpdu_errs);
  2715. }
  2716. void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
  2717. struct ath10k_fw_stats_pdev *dst)
  2718. {
  2719. dst->ack_rx_bad = __le32_to_cpu(src->ack_rx_bad);
  2720. dst->rts_bad = __le32_to_cpu(src->rts_bad);
  2721. dst->rts_good = __le32_to_cpu(src->rts_good);
  2722. dst->fcs_bad = __le32_to_cpu(src->fcs_bad);
  2723. dst->no_beacons = __le32_to_cpu(src->no_beacons);
  2724. dst->mib_int_count = __le32_to_cpu(src->mib_int_count);
  2725. }
  2726. void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
  2727. struct ath10k_fw_stats_peer *dst)
  2728. {
  2729. ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
  2730. dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
  2731. dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
  2732. }
  2733. static void
  2734. ath10k_wmi_10_4_pull_peer_stats(const struct wmi_10_4_peer_stats *src,
  2735. struct ath10k_fw_stats_peer *dst)
  2736. {
  2737. ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
  2738. dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
  2739. dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
  2740. dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
  2741. }
  2742. static void
  2743. ath10k_wmi_10_4_pull_vdev_stats(const struct wmi_vdev_stats_extd *src,
  2744. struct ath10k_fw_stats_vdev_extd *dst)
  2745. {
  2746. dst->vdev_id = __le32_to_cpu(src->vdev_id);
  2747. dst->ppdu_aggr_cnt = __le32_to_cpu(src->ppdu_aggr_cnt);
  2748. dst->ppdu_noack = __le32_to_cpu(src->ppdu_noack);
  2749. dst->mpdu_queued = __le32_to_cpu(src->mpdu_queued);
  2750. dst->ppdu_nonaggr_cnt = __le32_to_cpu(src->ppdu_nonaggr_cnt);
  2751. dst->mpdu_sw_requeued = __le32_to_cpu(src->mpdu_sw_requeued);
  2752. dst->mpdu_suc_retry = __le32_to_cpu(src->mpdu_suc_retry);
  2753. dst->mpdu_suc_multitry = __le32_to_cpu(src->mpdu_suc_multitry);
  2754. dst->mpdu_fail_retry = __le32_to_cpu(src->mpdu_fail_retry);
  2755. dst->tx_ftm_suc = __le32_to_cpu(src->tx_ftm_suc);
  2756. dst->tx_ftm_suc_retry = __le32_to_cpu(src->tx_ftm_suc_retry);
  2757. dst->tx_ftm_fail = __le32_to_cpu(src->tx_ftm_fail);
  2758. dst->rx_ftmr_cnt = __le32_to_cpu(src->rx_ftmr_cnt);
  2759. dst->rx_ftmr_dup_cnt = __le32_to_cpu(src->rx_ftmr_dup_cnt);
  2760. dst->rx_iftmr_cnt = __le32_to_cpu(src->rx_iftmr_cnt);
  2761. dst->rx_iftmr_dup_cnt = __le32_to_cpu(src->rx_iftmr_dup_cnt);
  2762. }
  2763. static int ath10k_wmi_main_op_pull_fw_stats(struct ath10k *ar,
  2764. struct sk_buff *skb,
  2765. struct ath10k_fw_stats *stats)
  2766. {
  2767. const struct wmi_stats_event *ev = (void *)skb->data;
  2768. u32 num_pdev_stats, num_peer_stats;
  2769. int i;
  2770. if (!skb_pull(skb, sizeof(*ev)))
  2771. return -EPROTO;
  2772. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2773. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2774. for (i = 0; i < num_pdev_stats; i++) {
  2775. const struct wmi_pdev_stats *src;
  2776. struct ath10k_fw_stats_pdev *dst;
  2777. src = (void *)skb->data;
  2778. if (!skb_pull(skb, sizeof(*src)))
  2779. return -EPROTO;
  2780. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2781. if (!dst)
  2782. continue;
  2783. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2784. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2785. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2786. list_add_tail(&dst->list, &stats->pdevs);
  2787. }
  2788. /* fw doesn't implement vdev stats */
  2789. for (i = 0; i < num_peer_stats; i++) {
  2790. const struct wmi_peer_stats *src;
  2791. struct ath10k_fw_stats_peer *dst;
  2792. src = (void *)skb->data;
  2793. if (!skb_pull(skb, sizeof(*src)))
  2794. return -EPROTO;
  2795. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2796. if (!dst)
  2797. continue;
  2798. ath10k_wmi_pull_peer_stats(src, dst);
  2799. list_add_tail(&dst->list, &stats->peers);
  2800. }
  2801. return 0;
  2802. }
  2803. static int ath10k_wmi_10x_op_pull_fw_stats(struct ath10k *ar,
  2804. struct sk_buff *skb,
  2805. struct ath10k_fw_stats *stats)
  2806. {
  2807. const struct wmi_stats_event *ev = (void *)skb->data;
  2808. u32 num_pdev_stats, num_peer_stats;
  2809. int i;
  2810. if (!skb_pull(skb, sizeof(*ev)))
  2811. return -EPROTO;
  2812. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2813. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2814. for (i = 0; i < num_pdev_stats; i++) {
  2815. const struct wmi_10x_pdev_stats *src;
  2816. struct ath10k_fw_stats_pdev *dst;
  2817. src = (void *)skb->data;
  2818. if (!skb_pull(skb, sizeof(*src)))
  2819. return -EPROTO;
  2820. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2821. if (!dst)
  2822. continue;
  2823. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2824. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2825. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2826. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2827. list_add_tail(&dst->list, &stats->pdevs);
  2828. }
  2829. /* fw doesn't implement vdev stats */
  2830. for (i = 0; i < num_peer_stats; i++) {
  2831. const struct wmi_10x_peer_stats *src;
  2832. struct ath10k_fw_stats_peer *dst;
  2833. src = (void *)skb->data;
  2834. if (!skb_pull(skb, sizeof(*src)))
  2835. return -EPROTO;
  2836. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2837. if (!dst)
  2838. continue;
  2839. ath10k_wmi_pull_peer_stats(&src->old, dst);
  2840. dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
  2841. list_add_tail(&dst->list, &stats->peers);
  2842. }
  2843. return 0;
  2844. }
  2845. static int ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k *ar,
  2846. struct sk_buff *skb,
  2847. struct ath10k_fw_stats *stats)
  2848. {
  2849. const struct wmi_10_2_stats_event *ev = (void *)skb->data;
  2850. u32 num_pdev_stats;
  2851. u32 num_pdev_ext_stats;
  2852. u32 num_peer_stats;
  2853. int i;
  2854. if (!skb_pull(skb, sizeof(*ev)))
  2855. return -EPROTO;
  2856. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2857. num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
  2858. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2859. for (i = 0; i < num_pdev_stats; i++) {
  2860. const struct wmi_10_2_pdev_stats *src;
  2861. struct ath10k_fw_stats_pdev *dst;
  2862. src = (void *)skb->data;
  2863. if (!skb_pull(skb, sizeof(*src)))
  2864. return -EPROTO;
  2865. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2866. if (!dst)
  2867. continue;
  2868. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2869. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2870. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2871. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2872. /* FIXME: expose 10.2 specific values */
  2873. list_add_tail(&dst->list, &stats->pdevs);
  2874. }
  2875. for (i = 0; i < num_pdev_ext_stats; i++) {
  2876. const struct wmi_10_2_pdev_ext_stats *src;
  2877. src = (void *)skb->data;
  2878. if (!skb_pull(skb, sizeof(*src)))
  2879. return -EPROTO;
  2880. /* FIXME: expose values to userspace
  2881. *
  2882. * Note: Even though this loop seems to do nothing it is
  2883. * required to parse following sub-structures properly.
  2884. */
  2885. }
  2886. /* fw doesn't implement vdev stats */
  2887. for (i = 0; i < num_peer_stats; i++) {
  2888. const struct wmi_10_2_peer_stats *src;
  2889. struct ath10k_fw_stats_peer *dst;
  2890. src = (void *)skb->data;
  2891. if (!skb_pull(skb, sizeof(*src)))
  2892. return -EPROTO;
  2893. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2894. if (!dst)
  2895. continue;
  2896. ath10k_wmi_pull_peer_stats(&src->old, dst);
  2897. dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
  2898. /* FIXME: expose 10.2 specific values */
  2899. list_add_tail(&dst->list, &stats->peers);
  2900. }
  2901. return 0;
  2902. }
  2903. static int ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k *ar,
  2904. struct sk_buff *skb,
  2905. struct ath10k_fw_stats *stats)
  2906. {
  2907. const struct wmi_10_2_stats_event *ev = (void *)skb->data;
  2908. u32 num_pdev_stats;
  2909. u32 num_pdev_ext_stats;
  2910. u32 num_peer_stats;
  2911. int i;
  2912. if (!skb_pull(skb, sizeof(*ev)))
  2913. return -EPROTO;
  2914. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2915. num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
  2916. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2917. for (i = 0; i < num_pdev_stats; i++) {
  2918. const struct wmi_10_2_pdev_stats *src;
  2919. struct ath10k_fw_stats_pdev *dst;
  2920. src = (void *)skb->data;
  2921. if (!skb_pull(skb, sizeof(*src)))
  2922. return -EPROTO;
  2923. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2924. if (!dst)
  2925. continue;
  2926. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2927. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2928. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2929. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2930. /* FIXME: expose 10.2 specific values */
  2931. list_add_tail(&dst->list, &stats->pdevs);
  2932. }
  2933. for (i = 0; i < num_pdev_ext_stats; i++) {
  2934. const struct wmi_10_2_pdev_ext_stats *src;
  2935. src = (void *)skb->data;
  2936. if (!skb_pull(skb, sizeof(*src)))
  2937. return -EPROTO;
  2938. /* FIXME: expose values to userspace
  2939. *
  2940. * Note: Even though this loop seems to do nothing it is
  2941. * required to parse following sub-structures properly.
  2942. */
  2943. }
  2944. /* fw doesn't implement vdev stats */
  2945. for (i = 0; i < num_peer_stats; i++) {
  2946. const struct wmi_10_2_4_ext_peer_stats *src;
  2947. struct ath10k_fw_stats_peer *dst;
  2948. int stats_len;
  2949. if (test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map))
  2950. stats_len = sizeof(struct wmi_10_2_4_ext_peer_stats);
  2951. else
  2952. stats_len = sizeof(struct wmi_10_2_4_peer_stats);
  2953. src = (void *)skb->data;
  2954. if (!skb_pull(skb, stats_len))
  2955. return -EPROTO;
  2956. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2957. if (!dst)
  2958. continue;
  2959. ath10k_wmi_pull_peer_stats(&src->common.old, dst);
  2960. dst->peer_rx_rate = __le32_to_cpu(src->common.peer_rx_rate);
  2961. if (ath10k_peer_stats_enabled(ar))
  2962. dst->rx_duration = __le32_to_cpu(src->rx_duration);
  2963. /* FIXME: expose 10.2 specific values */
  2964. list_add_tail(&dst->list, &stats->peers);
  2965. }
  2966. return 0;
  2967. }
  2968. static int ath10k_wmi_10_4_op_pull_fw_stats(struct ath10k *ar,
  2969. struct sk_buff *skb,
  2970. struct ath10k_fw_stats *stats)
  2971. {
  2972. const struct wmi_10_2_stats_event *ev = (void *)skb->data;
  2973. u32 num_pdev_stats;
  2974. u32 num_pdev_ext_stats;
  2975. u32 num_vdev_stats;
  2976. u32 num_peer_stats;
  2977. u32 num_bcnflt_stats;
  2978. u32 stats_id;
  2979. int i;
  2980. if (!skb_pull(skb, sizeof(*ev)))
  2981. return -EPROTO;
  2982. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2983. num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
  2984. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2985. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2986. num_bcnflt_stats = __le32_to_cpu(ev->num_bcnflt_stats);
  2987. stats_id = __le32_to_cpu(ev->stats_id);
  2988. for (i = 0; i < num_pdev_stats; i++) {
  2989. const struct wmi_10_4_pdev_stats *src;
  2990. struct ath10k_fw_stats_pdev *dst;
  2991. src = (void *)skb->data;
  2992. if (!skb_pull(skb, sizeof(*src)))
  2993. return -EPROTO;
  2994. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2995. if (!dst)
  2996. continue;
  2997. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2998. ath10k_wmi_10_4_pull_pdev_stats_tx(&src->tx, dst);
  2999. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  3000. dst->rx_ovfl_errs = __le32_to_cpu(src->rx_ovfl_errs);
  3001. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  3002. list_add_tail(&dst->list, &stats->pdevs);
  3003. }
  3004. for (i = 0; i < num_pdev_ext_stats; i++) {
  3005. const struct wmi_10_2_pdev_ext_stats *src;
  3006. src = (void *)skb->data;
  3007. if (!skb_pull(skb, sizeof(*src)))
  3008. return -EPROTO;
  3009. /* FIXME: expose values to userspace
  3010. *
  3011. * Note: Even though this loop seems to do nothing it is
  3012. * required to parse following sub-structures properly.
  3013. */
  3014. }
  3015. for (i = 0; i < num_vdev_stats; i++) {
  3016. const struct wmi_vdev_stats *src;
  3017. /* Ignore vdev stats here as it has only vdev id. Actual vdev
  3018. * stats will be retrieved from vdev extended stats.
  3019. */
  3020. src = (void *)skb->data;
  3021. if (!skb_pull(skb, sizeof(*src)))
  3022. return -EPROTO;
  3023. }
  3024. for (i = 0; i < num_peer_stats; i++) {
  3025. const struct wmi_10_4_peer_stats *src;
  3026. struct ath10k_fw_stats_peer *dst;
  3027. src = (void *)skb->data;
  3028. if (!skb_pull(skb, sizeof(*src)))
  3029. return -EPROTO;
  3030. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  3031. if (!dst)
  3032. continue;
  3033. ath10k_wmi_10_4_pull_peer_stats(src, dst);
  3034. list_add_tail(&dst->list, &stats->peers);
  3035. }
  3036. for (i = 0; i < num_bcnflt_stats; i++) {
  3037. const struct wmi_10_4_bss_bcn_filter_stats *src;
  3038. src = (void *)skb->data;
  3039. if (!skb_pull(skb, sizeof(*src)))
  3040. return -EPROTO;
  3041. /* FIXME: expose values to userspace
  3042. *
  3043. * Note: Even though this loop seems to do nothing it is
  3044. * required to parse following sub-structures properly.
  3045. */
  3046. }
  3047. if (stats_id & WMI_10_4_STAT_PEER_EXTD) {
  3048. stats->extended = true;
  3049. for (i = 0; i < num_peer_stats; i++) {
  3050. const struct wmi_10_4_peer_extd_stats *src;
  3051. struct ath10k_fw_extd_stats_peer *dst;
  3052. src = (void *)skb->data;
  3053. if (!skb_pull(skb, sizeof(*src)))
  3054. return -EPROTO;
  3055. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  3056. if (!dst)
  3057. continue;
  3058. ether_addr_copy(dst->peer_macaddr,
  3059. src->peer_macaddr.addr);
  3060. dst->rx_duration = __le32_to_cpu(src->rx_duration);
  3061. list_add_tail(&dst->list, &stats->peers_extd);
  3062. }
  3063. }
  3064. if (stats_id & WMI_10_4_STAT_VDEV_EXTD) {
  3065. for (i = 0; i < num_vdev_stats; i++) {
  3066. const struct wmi_vdev_stats_extd *src;
  3067. struct ath10k_fw_stats_vdev_extd *dst;
  3068. src = (void *)skb->data;
  3069. if (!skb_pull(skb, sizeof(*src)))
  3070. return -EPROTO;
  3071. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  3072. if (!dst)
  3073. continue;
  3074. ath10k_wmi_10_4_pull_vdev_stats(src, dst);
  3075. list_add_tail(&dst->list, &stats->vdevs);
  3076. }
  3077. }
  3078. return 0;
  3079. }
  3080. void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb)
  3081. {
  3082. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
  3083. ath10k_debug_fw_stats_process(ar, skb);
  3084. }
  3085. static int
  3086. ath10k_wmi_op_pull_vdev_start_ev(struct ath10k *ar, struct sk_buff *skb,
  3087. struct wmi_vdev_start_ev_arg *arg)
  3088. {
  3089. struct wmi_vdev_start_response_event *ev = (void *)skb->data;
  3090. if (skb->len < sizeof(*ev))
  3091. return -EPROTO;
  3092. skb_pull(skb, sizeof(*ev));
  3093. arg->vdev_id = ev->vdev_id;
  3094. arg->req_id = ev->req_id;
  3095. arg->resp_type = ev->resp_type;
  3096. arg->status = ev->status;
  3097. return 0;
  3098. }
  3099. void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb)
  3100. {
  3101. struct wmi_vdev_start_ev_arg arg = {};
  3102. int ret;
  3103. u32 status;
  3104. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
  3105. ar->last_wmi_vdev_start_status = 0;
  3106. ret = ath10k_wmi_pull_vdev_start(ar, skb, &arg);
  3107. if (ret) {
  3108. ath10k_warn(ar, "failed to parse vdev start event: %d\n", ret);
  3109. ar->last_wmi_vdev_start_status = ret;
  3110. goto out;
  3111. }
  3112. status = __le32_to_cpu(arg.status);
  3113. if (WARN_ON_ONCE(status)) {
  3114. ath10k_warn(ar, "vdev-start-response reports status error: %d (%s)\n",
  3115. status, (status == WMI_VDEV_START_CHAN_INVALID) ?
  3116. "chan-invalid" : "unknown");
  3117. /* Setup is done one way or another though, so we should still
  3118. * do the completion, so don't return here.
  3119. */
  3120. ar->last_wmi_vdev_start_status = -EINVAL;
  3121. }
  3122. out:
  3123. complete(&ar->vdev_setup_done);
  3124. }
  3125. void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb)
  3126. {
  3127. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
  3128. complete(&ar->vdev_setup_done);
  3129. }
  3130. static int
  3131. ath10k_wmi_op_pull_peer_kick_ev(struct ath10k *ar, struct sk_buff *skb,
  3132. struct wmi_peer_kick_ev_arg *arg)
  3133. {
  3134. struct wmi_peer_sta_kickout_event *ev = (void *)skb->data;
  3135. if (skb->len < sizeof(*ev))
  3136. return -EPROTO;
  3137. skb_pull(skb, sizeof(*ev));
  3138. arg->mac_addr = ev->peer_macaddr.addr;
  3139. return 0;
  3140. }
  3141. void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb)
  3142. {
  3143. struct wmi_peer_kick_ev_arg arg = {};
  3144. struct ieee80211_sta *sta;
  3145. int ret;
  3146. ret = ath10k_wmi_pull_peer_kick(ar, skb, &arg);
  3147. if (ret) {
  3148. ath10k_warn(ar, "failed to parse peer kickout event: %d\n",
  3149. ret);
  3150. return;
  3151. }
  3152. ath10k_dbg(ar, ATH10K_DBG_STA, "wmi event peer sta kickout %pM\n",
  3153. arg.mac_addr);
  3154. rcu_read_lock();
  3155. sta = ieee80211_find_sta_by_ifaddr(ar->hw, arg.mac_addr, NULL);
  3156. if (!sta) {
  3157. ath10k_warn(ar, "Spurious quick kickout for STA %pM\n",
  3158. arg.mac_addr);
  3159. goto exit;
  3160. }
  3161. ieee80211_report_low_ack(sta, 10);
  3162. exit:
  3163. rcu_read_unlock();
  3164. }
  3165. /*
  3166. * FIXME
  3167. *
  3168. * We don't report to mac80211 sleep state of connected
  3169. * stations. Due to this mac80211 can't fill in TIM IE
  3170. * correctly.
  3171. *
  3172. * I know of no way of getting nullfunc frames that contain
  3173. * sleep transition from connected stations - these do not
  3174. * seem to be sent from the target to the host. There also
  3175. * doesn't seem to be a dedicated event for that. So the
  3176. * only way left to do this would be to read tim_bitmap
  3177. * during SWBA.
  3178. *
  3179. * We could probably try using tim_bitmap from SWBA to tell
  3180. * mac80211 which stations are asleep and which are not. The
  3181. * problem here is calling mac80211 functions so many times
  3182. * could take too long and make us miss the time to submit
  3183. * the beacon to the target.
  3184. *
  3185. * So as a workaround we try to extend the TIM IE if there
  3186. * is unicast buffered for stations with aid > 7 and fill it
  3187. * in ourselves.
  3188. */
  3189. static void ath10k_wmi_update_tim(struct ath10k *ar,
  3190. struct ath10k_vif *arvif,
  3191. struct sk_buff *bcn,
  3192. const struct wmi_tim_info_arg *tim_info)
  3193. {
  3194. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
  3195. struct ieee80211_tim_ie *tim;
  3196. u8 *ies, *ie;
  3197. u8 ie_len, pvm_len;
  3198. __le32 t;
  3199. u32 v, tim_len;
  3200. /* When FW reports 0 in tim_len, ensure at least first byte
  3201. * in tim_bitmap is considered for pvm calculation.
  3202. */
  3203. tim_len = tim_info->tim_len ? __le32_to_cpu(tim_info->tim_len) : 1;
  3204. /* if next SWBA has no tim_changed the tim_bitmap is garbage.
  3205. * we must copy the bitmap upon change and reuse it later
  3206. */
  3207. if (__le32_to_cpu(tim_info->tim_changed)) {
  3208. int i;
  3209. if (sizeof(arvif->u.ap.tim_bitmap) < tim_len) {
  3210. ath10k_warn(ar, "SWBA TIM field is too big (%u), truncated it to %zu",
  3211. tim_len, sizeof(arvif->u.ap.tim_bitmap));
  3212. tim_len = sizeof(arvif->u.ap.tim_bitmap);
  3213. }
  3214. for (i = 0; i < tim_len; i++) {
  3215. t = tim_info->tim_bitmap[i / 4];
  3216. v = __le32_to_cpu(t);
  3217. arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
  3218. }
  3219. /* FW reports either length 0 or length based on max supported
  3220. * station. so we calculate this on our own
  3221. */
  3222. arvif->u.ap.tim_len = 0;
  3223. for (i = 0; i < tim_len; i++)
  3224. if (arvif->u.ap.tim_bitmap[i])
  3225. arvif->u.ap.tim_len = i;
  3226. arvif->u.ap.tim_len++;
  3227. }
  3228. ies = bcn->data;
  3229. ies += ieee80211_hdrlen(hdr->frame_control);
  3230. ies += 12; /* fixed parameters */
  3231. ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
  3232. (u8 *)skb_tail_pointer(bcn) - ies);
  3233. if (!ie) {
  3234. if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
  3235. ath10k_warn(ar, "no tim ie found;\n");
  3236. return;
  3237. }
  3238. tim = (void *)ie + 2;
  3239. ie_len = ie[1];
  3240. pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
  3241. if (pvm_len < arvif->u.ap.tim_len) {
  3242. int expand_size = tim_len - pvm_len;
  3243. int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
  3244. void *next_ie = ie + 2 + ie_len;
  3245. if (skb_put(bcn, expand_size)) {
  3246. memmove(next_ie + expand_size, next_ie, move_size);
  3247. ie[1] += expand_size;
  3248. ie_len += expand_size;
  3249. pvm_len += expand_size;
  3250. } else {
  3251. ath10k_warn(ar, "tim expansion failed\n");
  3252. }
  3253. }
  3254. if (pvm_len > tim_len) {
  3255. ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len);
  3256. return;
  3257. }
  3258. tim->bitmap_ctrl = !!__le32_to_cpu(tim_info->tim_mcast);
  3259. memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
  3260. if (tim->dtim_count == 0) {
  3261. ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DTIM_ZERO;
  3262. if (__le32_to_cpu(tim_info->tim_mcast) == 1)
  3263. ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DELIVER_CAB;
  3264. }
  3265. ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
  3266. tim->dtim_count, tim->dtim_period,
  3267. tim->bitmap_ctrl, pvm_len);
  3268. }
  3269. static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
  3270. struct sk_buff *bcn,
  3271. const struct wmi_p2p_noa_info *noa)
  3272. {
  3273. if (!arvif->vif->p2p)
  3274. return;
  3275. ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
  3276. if (noa->changed & WMI_P2P_NOA_CHANGED_BIT)
  3277. ath10k_p2p_noa_update(arvif, noa);
  3278. if (arvif->u.ap.noa_data)
  3279. if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
  3280. skb_put_data(bcn, arvif->u.ap.noa_data,
  3281. arvif->u.ap.noa_len);
  3282. }
  3283. static int ath10k_wmi_op_pull_swba_ev(struct ath10k *ar, struct sk_buff *skb,
  3284. struct wmi_swba_ev_arg *arg)
  3285. {
  3286. struct wmi_host_swba_event *ev = (void *)skb->data;
  3287. u32 map;
  3288. size_t i;
  3289. if (skb->len < sizeof(*ev))
  3290. return -EPROTO;
  3291. skb_pull(skb, sizeof(*ev));
  3292. arg->vdev_map = ev->vdev_map;
  3293. for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
  3294. if (!(map & BIT(0)))
  3295. continue;
  3296. /* If this happens there were some changes in firmware and
  3297. * ath10k should update the max size of tim_info array.
  3298. */
  3299. if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
  3300. break;
  3301. if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
  3302. sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
  3303. ath10k_warn(ar, "refusing to parse invalid swba structure\n");
  3304. return -EPROTO;
  3305. }
  3306. arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
  3307. arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
  3308. arg->tim_info[i].tim_bitmap =
  3309. ev->bcn_info[i].tim_info.tim_bitmap;
  3310. arg->tim_info[i].tim_changed =
  3311. ev->bcn_info[i].tim_info.tim_changed;
  3312. arg->tim_info[i].tim_num_ps_pending =
  3313. ev->bcn_info[i].tim_info.tim_num_ps_pending;
  3314. arg->noa_info[i] = &ev->bcn_info[i].p2p_noa_info;
  3315. i++;
  3316. }
  3317. return 0;
  3318. }
  3319. static int ath10k_wmi_10_2_4_op_pull_swba_ev(struct ath10k *ar,
  3320. struct sk_buff *skb,
  3321. struct wmi_swba_ev_arg *arg)
  3322. {
  3323. struct wmi_10_2_4_host_swba_event *ev = (void *)skb->data;
  3324. u32 map;
  3325. size_t i;
  3326. if (skb->len < sizeof(*ev))
  3327. return -EPROTO;
  3328. skb_pull(skb, sizeof(*ev));
  3329. arg->vdev_map = ev->vdev_map;
  3330. for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
  3331. if (!(map & BIT(0)))
  3332. continue;
  3333. /* If this happens there were some changes in firmware and
  3334. * ath10k should update the max size of tim_info array.
  3335. */
  3336. if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
  3337. break;
  3338. if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
  3339. sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
  3340. ath10k_warn(ar, "refusing to parse invalid swba structure\n");
  3341. return -EPROTO;
  3342. }
  3343. arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
  3344. arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
  3345. arg->tim_info[i].tim_bitmap =
  3346. ev->bcn_info[i].tim_info.tim_bitmap;
  3347. arg->tim_info[i].tim_changed =
  3348. ev->bcn_info[i].tim_info.tim_changed;
  3349. arg->tim_info[i].tim_num_ps_pending =
  3350. ev->bcn_info[i].tim_info.tim_num_ps_pending;
  3351. i++;
  3352. }
  3353. return 0;
  3354. }
  3355. static int ath10k_wmi_10_4_op_pull_swba_ev(struct ath10k *ar,
  3356. struct sk_buff *skb,
  3357. struct wmi_swba_ev_arg *arg)
  3358. {
  3359. struct wmi_10_4_host_swba_event *ev = (void *)skb->data;
  3360. u32 map, tim_len;
  3361. size_t i;
  3362. if (skb->len < sizeof(*ev))
  3363. return -EPROTO;
  3364. skb_pull(skb, sizeof(*ev));
  3365. arg->vdev_map = ev->vdev_map;
  3366. for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
  3367. if (!(map & BIT(0)))
  3368. continue;
  3369. /* If this happens there were some changes in firmware and
  3370. * ath10k should update the max size of tim_info array.
  3371. */
  3372. if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
  3373. break;
  3374. if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
  3375. sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
  3376. ath10k_warn(ar, "refusing to parse invalid swba structure\n");
  3377. return -EPROTO;
  3378. }
  3379. tim_len = __le32_to_cpu(ev->bcn_info[i].tim_info.tim_len);
  3380. if (tim_len) {
  3381. /* Exclude 4 byte guard length */
  3382. tim_len -= 4;
  3383. arg->tim_info[i].tim_len = __cpu_to_le32(tim_len);
  3384. } else {
  3385. arg->tim_info[i].tim_len = 0;
  3386. }
  3387. arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
  3388. arg->tim_info[i].tim_bitmap =
  3389. ev->bcn_info[i].tim_info.tim_bitmap;
  3390. arg->tim_info[i].tim_changed =
  3391. ev->bcn_info[i].tim_info.tim_changed;
  3392. arg->tim_info[i].tim_num_ps_pending =
  3393. ev->bcn_info[i].tim_info.tim_num_ps_pending;
  3394. /* 10.4 firmware doesn't have p2p support. notice of absence
  3395. * info can be ignored for now.
  3396. */
  3397. i++;
  3398. }
  3399. return 0;
  3400. }
  3401. static enum wmi_txbf_conf ath10k_wmi_10_4_txbf_conf_scheme(struct ath10k *ar)
  3402. {
  3403. return WMI_TXBF_CONF_BEFORE_ASSOC;
  3404. }
  3405. void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
  3406. {
  3407. struct wmi_swba_ev_arg arg = {};
  3408. u32 map;
  3409. int i = -1;
  3410. const struct wmi_tim_info_arg *tim_info;
  3411. const struct wmi_p2p_noa_info *noa_info;
  3412. struct ath10k_vif *arvif;
  3413. struct sk_buff *bcn;
  3414. dma_addr_t paddr;
  3415. int ret, vdev_id = 0;
  3416. ret = ath10k_wmi_pull_swba(ar, skb, &arg);
  3417. if (ret) {
  3418. ath10k_warn(ar, "failed to parse swba event: %d\n", ret);
  3419. return;
  3420. }
  3421. map = __le32_to_cpu(arg.vdev_map);
  3422. ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n",
  3423. map);
  3424. for (; map; map >>= 1, vdev_id++) {
  3425. if (!(map & 0x1))
  3426. continue;
  3427. i++;
  3428. if (i >= WMI_MAX_AP_VDEV) {
  3429. ath10k_warn(ar, "swba has corrupted vdev map\n");
  3430. break;
  3431. }
  3432. tim_info = &arg.tim_info[i];
  3433. noa_info = arg.noa_info[i];
  3434. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  3435. "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n",
  3436. i,
  3437. __le32_to_cpu(tim_info->tim_len),
  3438. __le32_to_cpu(tim_info->tim_mcast),
  3439. __le32_to_cpu(tim_info->tim_changed),
  3440. __le32_to_cpu(tim_info->tim_num_ps_pending),
  3441. __le32_to_cpu(tim_info->tim_bitmap[3]),
  3442. __le32_to_cpu(tim_info->tim_bitmap[2]),
  3443. __le32_to_cpu(tim_info->tim_bitmap[1]),
  3444. __le32_to_cpu(tim_info->tim_bitmap[0]));
  3445. /* TODO: Only first 4 word from tim_bitmap is dumped.
  3446. * Extend debug code to dump full tim_bitmap.
  3447. */
  3448. arvif = ath10k_get_arvif(ar, vdev_id);
  3449. if (arvif == NULL) {
  3450. ath10k_warn(ar, "no vif for vdev_id %d found\n",
  3451. vdev_id);
  3452. continue;
  3453. }
  3454. /* mac80211 would have already asked us to stop beaconing and
  3455. * bring the vdev down, so continue in that case
  3456. */
  3457. if (!arvif->is_up)
  3458. continue;
  3459. /* There are no completions for beacons so wait for next SWBA
  3460. * before telling mac80211 to decrement CSA counter
  3461. *
  3462. * Once CSA counter is completed stop sending beacons until
  3463. * actual channel switch is done
  3464. */
  3465. if (arvif->vif->bss_conf.csa_active &&
  3466. ieee80211_beacon_cntdwn_is_complete(arvif->vif)) {
  3467. ieee80211_csa_finish(arvif->vif);
  3468. continue;
  3469. }
  3470. bcn = ieee80211_beacon_get(ar->hw, arvif->vif, 0);
  3471. if (!bcn) {
  3472. ath10k_warn(ar, "could not get mac80211 beacon\n");
  3473. continue;
  3474. }
  3475. ath10k_tx_h_seq_no(arvif->vif, bcn);
  3476. ath10k_wmi_update_tim(ar, arvif, bcn, tim_info);
  3477. ath10k_wmi_update_noa(ar, arvif, bcn, noa_info);
  3478. spin_lock_bh(&ar->data_lock);
  3479. if (arvif->beacon) {
  3480. switch (arvif->beacon_state) {
  3481. case ATH10K_BEACON_SENT:
  3482. break;
  3483. case ATH10K_BEACON_SCHEDULED:
  3484. ath10k_warn(ar, "SWBA overrun on vdev %d, skipped old beacon\n",
  3485. arvif->vdev_id);
  3486. break;
  3487. case ATH10K_BEACON_SENDING:
  3488. ath10k_warn(ar, "SWBA overrun on vdev %d, skipped new beacon\n",
  3489. arvif->vdev_id);
  3490. dev_kfree_skb(bcn);
  3491. goto skip;
  3492. }
  3493. ath10k_mac_vif_beacon_free(arvif);
  3494. }
  3495. if (!arvif->beacon_buf) {
  3496. paddr = dma_map_single(arvif->ar->dev, bcn->data,
  3497. bcn->len, DMA_TO_DEVICE);
  3498. ret = dma_mapping_error(arvif->ar->dev, paddr);
  3499. if (ret) {
  3500. ath10k_warn(ar, "failed to map beacon: %d\n",
  3501. ret);
  3502. dev_kfree_skb_any(bcn);
  3503. goto skip;
  3504. }
  3505. ATH10K_SKB_CB(bcn)->paddr = paddr;
  3506. } else {
  3507. if (bcn->len > IEEE80211_MAX_FRAME_LEN) {
  3508. ath10k_warn(ar, "trimming beacon %d -> %d bytes!\n",
  3509. bcn->len, IEEE80211_MAX_FRAME_LEN);
  3510. skb_trim(bcn, IEEE80211_MAX_FRAME_LEN);
  3511. }
  3512. memcpy(arvif->beacon_buf, bcn->data, bcn->len);
  3513. ATH10K_SKB_CB(bcn)->paddr = arvif->beacon_paddr;
  3514. }
  3515. arvif->beacon = bcn;
  3516. arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
  3517. trace_ath10k_tx_hdr(ar, bcn->data, bcn->len);
  3518. trace_ath10k_tx_payload(ar, bcn->data, bcn->len);
  3519. skip:
  3520. spin_unlock_bh(&ar->data_lock);
  3521. }
  3522. ath10k_wmi_tx_beacons_nowait(ar);
  3523. }
  3524. void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb)
  3525. {
  3526. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
  3527. }
  3528. static void ath10k_radar_detected(struct ath10k *ar)
  3529. {
  3530. ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n");
  3531. ATH10K_DFS_STAT_INC(ar, radar_detected);
  3532. /* Control radar events reporting in debugfs file
  3533. * dfs_block_radar_events
  3534. */
  3535. if (ar->dfs_block_radar_events)
  3536. ath10k_info(ar, "DFS Radar detected, but ignored as requested\n");
  3537. else
  3538. ieee80211_radar_detected(ar->hw);
  3539. }
  3540. static void ath10k_radar_confirmation_work(struct work_struct *work)
  3541. {
  3542. struct ath10k *ar = container_of(work, struct ath10k,
  3543. radar_confirmation_work);
  3544. struct ath10k_radar_found_info radar_info;
  3545. int ret, time_left;
  3546. reinit_completion(&ar->wmi.radar_confirm);
  3547. spin_lock_bh(&ar->data_lock);
  3548. memcpy(&radar_info, &ar->last_radar_info, sizeof(radar_info));
  3549. spin_unlock_bh(&ar->data_lock);
  3550. ret = ath10k_wmi_report_radar_found(ar, &radar_info);
  3551. if (ret) {
  3552. ath10k_warn(ar, "failed to send radar found %d\n", ret);
  3553. goto wait_complete;
  3554. }
  3555. time_left = wait_for_completion_timeout(&ar->wmi.radar_confirm,
  3556. ATH10K_WMI_DFS_CONF_TIMEOUT_HZ);
  3557. if (time_left) {
  3558. /* DFS Confirmation status event received and
  3559. * necessary action completed.
  3560. */
  3561. goto wait_complete;
  3562. } else {
  3563. /* DFS Confirmation event not received from FW.Considering this
  3564. * as real radar.
  3565. */
  3566. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3567. "dfs confirmation not received from fw, considering as radar\n");
  3568. goto radar_detected;
  3569. }
  3570. radar_detected:
  3571. ath10k_radar_detected(ar);
  3572. /* Reset state to allow sending confirmation on consecutive radar
  3573. * detections, unless radar confirmation is disabled/stopped.
  3574. */
  3575. wait_complete:
  3576. spin_lock_bh(&ar->data_lock);
  3577. if (ar->radar_conf_state != ATH10K_RADAR_CONFIRMATION_STOPPED)
  3578. ar->radar_conf_state = ATH10K_RADAR_CONFIRMATION_IDLE;
  3579. spin_unlock_bh(&ar->data_lock);
  3580. }
  3581. static void ath10k_dfs_radar_report(struct ath10k *ar,
  3582. struct wmi_phyerr_ev_arg *phyerr,
  3583. const struct phyerr_radar_report *rr,
  3584. u64 tsf)
  3585. {
  3586. u32 reg0, reg1, tsf32l;
  3587. struct ieee80211_channel *ch;
  3588. struct pulse_event pe;
  3589. struct radar_detector_specs rs;
  3590. u64 tsf64;
  3591. u8 rssi, width;
  3592. struct ath10k_radar_found_info *radar_info;
  3593. reg0 = __le32_to_cpu(rr->reg0);
  3594. reg1 = __le32_to_cpu(rr->reg1);
  3595. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3596. "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
  3597. MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
  3598. MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
  3599. MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
  3600. MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
  3601. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3602. "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
  3603. MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
  3604. MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
  3605. MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
  3606. MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
  3607. MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
  3608. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3609. "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
  3610. MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
  3611. MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
  3612. if (!ar->dfs_detector)
  3613. return;
  3614. spin_lock_bh(&ar->data_lock);
  3615. ch = ar->rx_channel;
  3616. /* fetch target operating channel during channel change */
  3617. if (!ch)
  3618. ch = ar->tgt_oper_chan;
  3619. spin_unlock_bh(&ar->data_lock);
  3620. if (!ch) {
  3621. ath10k_warn(ar, "failed to derive channel for radar pulse, treating as radar\n");
  3622. goto radar_detected;
  3623. }
  3624. /* report event to DFS pattern detector */
  3625. tsf32l = phyerr->tsf_timestamp;
  3626. tsf64 = tsf & (~0xFFFFFFFFULL);
  3627. tsf64 |= tsf32l;
  3628. width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
  3629. rssi = phyerr->rssi_combined;
  3630. /* hardware store this as 8 bit signed value,
  3631. * set to zero if negative number
  3632. */
  3633. if (rssi & 0x80)
  3634. rssi = 0;
  3635. pe.ts = tsf64;
  3636. pe.freq = ch->center_freq;
  3637. pe.width = width;
  3638. pe.rssi = rssi;
  3639. pe.chirp = (MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP) != 0);
  3640. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3641. "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
  3642. pe.freq, pe.width, pe.rssi, pe.ts);
  3643. ATH10K_DFS_STAT_INC(ar, pulses_detected);
  3644. if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe, &rs)) {
  3645. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3646. "dfs no pulse pattern detected, yet\n");
  3647. return;
  3648. }
  3649. if ((test_bit(WMI_SERVICE_HOST_DFS_CHECK_SUPPORT, ar->wmi.svc_map)) &&
  3650. ar->dfs_detector->region == NL80211_DFS_FCC) {
  3651. /* Consecutive radar indications need not be
  3652. * sent to the firmware until we get confirmation
  3653. * for the previous detected radar.
  3654. */
  3655. spin_lock_bh(&ar->data_lock);
  3656. if (ar->radar_conf_state != ATH10K_RADAR_CONFIRMATION_IDLE) {
  3657. spin_unlock_bh(&ar->data_lock);
  3658. return;
  3659. }
  3660. ar->radar_conf_state = ATH10K_RADAR_CONFIRMATION_INPROGRESS;
  3661. radar_info = &ar->last_radar_info;
  3662. radar_info->pri_min = rs.pri_min;
  3663. radar_info->pri_max = rs.pri_max;
  3664. radar_info->width_min = rs.width_min;
  3665. radar_info->width_max = rs.width_max;
  3666. /*TODO Find sidx_min and sidx_max */
  3667. radar_info->sidx_min = MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX);
  3668. radar_info->sidx_max = MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX);
  3669. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3670. "sending wmi radar found cmd pri_min %d pri_max %d width_min %d width_max %d sidx_min %d sidx_max %d\n",
  3671. radar_info->pri_min, radar_info->pri_max,
  3672. radar_info->width_min, radar_info->width_max,
  3673. radar_info->sidx_min, radar_info->sidx_max);
  3674. ieee80211_queue_work(ar->hw, &ar->radar_confirmation_work);
  3675. spin_unlock_bh(&ar->data_lock);
  3676. return;
  3677. }
  3678. radar_detected:
  3679. ath10k_radar_detected(ar);
  3680. }
  3681. static int ath10k_dfs_fft_report(struct ath10k *ar,
  3682. struct wmi_phyerr_ev_arg *phyerr,
  3683. const struct phyerr_fft_report *fftr,
  3684. u64 tsf)
  3685. {
  3686. u32 reg0, reg1;
  3687. u8 rssi, peak_mag;
  3688. reg0 = __le32_to_cpu(fftr->reg0);
  3689. reg1 = __le32_to_cpu(fftr->reg1);
  3690. rssi = phyerr->rssi_combined;
  3691. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3692. "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
  3693. MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
  3694. MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
  3695. MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
  3696. MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
  3697. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3698. "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
  3699. MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
  3700. MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
  3701. MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
  3702. MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
  3703. peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
  3704. /* false event detection */
  3705. if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
  3706. peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
  3707. ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
  3708. ATH10K_DFS_STAT_INC(ar, pulses_discarded);
  3709. return -EINVAL;
  3710. }
  3711. return 0;
  3712. }
  3713. void ath10k_wmi_event_dfs(struct ath10k *ar,
  3714. struct wmi_phyerr_ev_arg *phyerr,
  3715. u64 tsf)
  3716. {
  3717. int buf_len, tlv_len, res, i = 0;
  3718. const struct phyerr_tlv *tlv;
  3719. const struct phyerr_radar_report *rr;
  3720. const struct phyerr_fft_report *fftr;
  3721. const u8 *tlv_buf;
  3722. buf_len = phyerr->buf_len;
  3723. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3724. "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
  3725. phyerr->phy_err_code, phyerr->rssi_combined,
  3726. phyerr->tsf_timestamp, tsf, buf_len);
  3727. /* Skip event if DFS disabled */
  3728. if (!IS_ENABLED(CONFIG_ATH10K_DFS_CERTIFIED))
  3729. return;
  3730. ATH10K_DFS_STAT_INC(ar, pulses_total);
  3731. while (i < buf_len) {
  3732. if (i + sizeof(*tlv) > buf_len) {
  3733. ath10k_warn(ar, "too short buf for tlv header (%d)\n",
  3734. i);
  3735. return;
  3736. }
  3737. tlv = (struct phyerr_tlv *)&phyerr->buf[i];
  3738. tlv_len = __le16_to_cpu(tlv->len);
  3739. tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
  3740. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3741. "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
  3742. tlv_len, tlv->tag, tlv->sig);
  3743. switch (tlv->tag) {
  3744. case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
  3745. if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
  3746. ath10k_warn(ar, "too short radar pulse summary (%d)\n",
  3747. i);
  3748. return;
  3749. }
  3750. rr = (struct phyerr_radar_report *)tlv_buf;
  3751. ath10k_dfs_radar_report(ar, phyerr, rr, tsf);
  3752. break;
  3753. case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
  3754. if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
  3755. ath10k_warn(ar, "too short fft report (%d)\n",
  3756. i);
  3757. return;
  3758. }
  3759. fftr = (struct phyerr_fft_report *)tlv_buf;
  3760. res = ath10k_dfs_fft_report(ar, phyerr, fftr, tsf);
  3761. if (res)
  3762. return;
  3763. break;
  3764. }
  3765. i += sizeof(*tlv) + tlv_len;
  3766. }
  3767. }
  3768. void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
  3769. struct wmi_phyerr_ev_arg *phyerr,
  3770. u64 tsf)
  3771. {
  3772. int buf_len, tlv_len, res, i = 0;
  3773. struct phyerr_tlv *tlv;
  3774. const void *tlv_buf;
  3775. const struct phyerr_fft_report *fftr;
  3776. size_t fftr_len;
  3777. buf_len = phyerr->buf_len;
  3778. while (i < buf_len) {
  3779. if (i + sizeof(*tlv) > buf_len) {
  3780. ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n",
  3781. i);
  3782. return;
  3783. }
  3784. tlv = (struct phyerr_tlv *)&phyerr->buf[i];
  3785. tlv_len = __le16_to_cpu(tlv->len);
  3786. tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
  3787. if (i + sizeof(*tlv) + tlv_len > buf_len) {
  3788. ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n",
  3789. i);
  3790. return;
  3791. }
  3792. switch (tlv->tag) {
  3793. case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
  3794. if (sizeof(*fftr) > tlv_len) {
  3795. ath10k_warn(ar, "failed to parse fft report at byte %d\n",
  3796. i);
  3797. return;
  3798. }
  3799. fftr_len = tlv_len - sizeof(*fftr);
  3800. fftr = tlv_buf;
  3801. res = ath10k_spectral_process_fft(ar, phyerr,
  3802. fftr, fftr_len,
  3803. tsf);
  3804. if (res < 0) {
  3805. ath10k_dbg(ar, ATH10K_DBG_WMI, "failed to process fft report: %d\n",
  3806. res);
  3807. return;
  3808. }
  3809. break;
  3810. }
  3811. i += sizeof(*tlv) + tlv_len;
  3812. }
  3813. }
  3814. static int ath10k_wmi_op_pull_phyerr_ev_hdr(struct ath10k *ar,
  3815. struct sk_buff *skb,
  3816. struct wmi_phyerr_hdr_arg *arg)
  3817. {
  3818. struct wmi_phyerr_event *ev = (void *)skb->data;
  3819. if (skb->len < sizeof(*ev))
  3820. return -EPROTO;
  3821. arg->num_phyerrs = __le32_to_cpu(ev->num_phyerrs);
  3822. arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
  3823. arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
  3824. arg->buf_len = skb->len - sizeof(*ev);
  3825. arg->phyerrs = ev->phyerrs;
  3826. return 0;
  3827. }
  3828. static int ath10k_wmi_10_4_op_pull_phyerr_ev_hdr(struct ath10k *ar,
  3829. struct sk_buff *skb,
  3830. struct wmi_phyerr_hdr_arg *arg)
  3831. {
  3832. struct wmi_10_4_phyerr_event *ev = (void *)skb->data;
  3833. if (skb->len < sizeof(*ev))
  3834. return -EPROTO;
  3835. /* 10.4 firmware always reports only one phyerr */
  3836. arg->num_phyerrs = 1;
  3837. arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
  3838. arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
  3839. arg->buf_len = skb->len;
  3840. arg->phyerrs = skb->data;
  3841. return 0;
  3842. }
  3843. int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar,
  3844. const void *phyerr_buf,
  3845. int left_len,
  3846. struct wmi_phyerr_ev_arg *arg)
  3847. {
  3848. const struct wmi_phyerr *phyerr = phyerr_buf;
  3849. int i;
  3850. if (left_len < sizeof(*phyerr)) {
  3851. ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
  3852. left_len, sizeof(*phyerr));
  3853. return -EINVAL;
  3854. }
  3855. arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
  3856. arg->freq1 = __le16_to_cpu(phyerr->freq1);
  3857. arg->freq2 = __le16_to_cpu(phyerr->freq2);
  3858. arg->rssi_combined = phyerr->rssi_combined;
  3859. arg->chan_width_mhz = phyerr->chan_width_mhz;
  3860. arg->buf_len = __le32_to_cpu(phyerr->buf_len);
  3861. arg->buf = phyerr->buf;
  3862. arg->hdr_len = sizeof(*phyerr);
  3863. for (i = 0; i < 4; i++)
  3864. arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
  3865. switch (phyerr->phy_err_code) {
  3866. case PHY_ERROR_GEN_SPECTRAL_SCAN:
  3867. arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
  3868. break;
  3869. case PHY_ERROR_GEN_FALSE_RADAR_EXT:
  3870. arg->phy_err_code = PHY_ERROR_FALSE_RADAR_EXT;
  3871. break;
  3872. case PHY_ERROR_GEN_RADAR:
  3873. arg->phy_err_code = PHY_ERROR_RADAR;
  3874. break;
  3875. default:
  3876. arg->phy_err_code = PHY_ERROR_UNKNOWN;
  3877. break;
  3878. }
  3879. return 0;
  3880. }
  3881. static int ath10k_wmi_10_4_op_pull_phyerr_ev(struct ath10k *ar,
  3882. const void *phyerr_buf,
  3883. int left_len,
  3884. struct wmi_phyerr_ev_arg *arg)
  3885. {
  3886. const struct wmi_10_4_phyerr_event *phyerr = phyerr_buf;
  3887. u32 phy_err_mask;
  3888. int i;
  3889. if (left_len < sizeof(*phyerr)) {
  3890. ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
  3891. left_len, sizeof(*phyerr));
  3892. return -EINVAL;
  3893. }
  3894. arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
  3895. arg->freq1 = __le16_to_cpu(phyerr->freq1);
  3896. arg->freq2 = __le16_to_cpu(phyerr->freq2);
  3897. arg->rssi_combined = phyerr->rssi_combined;
  3898. arg->chan_width_mhz = phyerr->chan_width_mhz;
  3899. arg->buf_len = __le32_to_cpu(phyerr->buf_len);
  3900. arg->buf = phyerr->buf;
  3901. arg->hdr_len = sizeof(*phyerr);
  3902. for (i = 0; i < 4; i++)
  3903. arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
  3904. phy_err_mask = __le32_to_cpu(phyerr->phy_err_mask[0]);
  3905. if (phy_err_mask & PHY_ERROR_10_4_SPECTRAL_SCAN_MASK)
  3906. arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
  3907. else if (phy_err_mask & PHY_ERROR_10_4_RADAR_MASK)
  3908. arg->phy_err_code = PHY_ERROR_RADAR;
  3909. else
  3910. arg->phy_err_code = PHY_ERROR_UNKNOWN;
  3911. return 0;
  3912. }
  3913. void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
  3914. {
  3915. struct wmi_phyerr_hdr_arg hdr_arg = {};
  3916. struct wmi_phyerr_ev_arg phyerr_arg = {};
  3917. const void *phyerr;
  3918. u32 count, i, buf_len, phy_err_code;
  3919. u64 tsf;
  3920. int left_len, ret;
  3921. ATH10K_DFS_STAT_INC(ar, phy_errors);
  3922. ret = ath10k_wmi_pull_phyerr_hdr(ar, skb, &hdr_arg);
  3923. if (ret) {
  3924. ath10k_warn(ar, "failed to parse phyerr event hdr: %d\n", ret);
  3925. return;
  3926. }
  3927. /* Check number of included events */
  3928. count = hdr_arg.num_phyerrs;
  3929. left_len = hdr_arg.buf_len;
  3930. tsf = hdr_arg.tsf_u32;
  3931. tsf <<= 32;
  3932. tsf |= hdr_arg.tsf_l32;
  3933. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3934. "wmi event phyerr count %d tsf64 0x%llX\n",
  3935. count, tsf);
  3936. phyerr = hdr_arg.phyerrs;
  3937. for (i = 0; i < count; i++) {
  3938. ret = ath10k_wmi_pull_phyerr(ar, phyerr, left_len, &phyerr_arg);
  3939. if (ret) {
  3940. ath10k_warn(ar, "failed to parse phyerr event (%d)\n",
  3941. i);
  3942. return;
  3943. }
  3944. left_len -= phyerr_arg.hdr_len;
  3945. buf_len = phyerr_arg.buf_len;
  3946. phy_err_code = phyerr_arg.phy_err_code;
  3947. if (left_len < buf_len) {
  3948. ath10k_warn(ar, "single event (%d) wrong buf len\n", i);
  3949. return;
  3950. }
  3951. left_len -= buf_len;
  3952. switch (phy_err_code) {
  3953. case PHY_ERROR_RADAR:
  3954. ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
  3955. break;
  3956. case PHY_ERROR_SPECTRAL_SCAN:
  3957. ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
  3958. break;
  3959. case PHY_ERROR_FALSE_RADAR_EXT:
  3960. ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
  3961. ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
  3962. break;
  3963. default:
  3964. break;
  3965. }
  3966. phyerr = phyerr + phyerr_arg.hdr_len + buf_len;
  3967. }
  3968. }
  3969. static int
  3970. ath10k_wmi_10_4_op_pull_dfs_status_ev(struct ath10k *ar, struct sk_buff *skb,
  3971. struct wmi_dfs_status_ev_arg *arg)
  3972. {
  3973. struct wmi_dfs_status_ev_arg *ev = (void *)skb->data;
  3974. if (skb->len < sizeof(*ev))
  3975. return -EPROTO;
  3976. arg->status = ev->status;
  3977. return 0;
  3978. }
  3979. static void
  3980. ath10k_wmi_event_dfs_status_check(struct ath10k *ar, struct sk_buff *skb)
  3981. {
  3982. struct wmi_dfs_status_ev_arg status_arg = {};
  3983. int ret;
  3984. ret = ath10k_wmi_pull_dfs_status(ar, skb, &status_arg);
  3985. if (ret) {
  3986. ath10k_warn(ar, "failed to parse dfs status event: %d\n", ret);
  3987. return;
  3988. }
  3989. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3990. "dfs status event received from fw: %d\n",
  3991. status_arg.status);
  3992. /* Even in case of radar detection failure we follow the same
  3993. * behaviour as if radar is detected i.e to switch to a different
  3994. * channel.
  3995. */
  3996. if (status_arg.status == WMI_HW_RADAR_DETECTED ||
  3997. status_arg.status == WMI_RADAR_DETECTION_FAIL)
  3998. ath10k_radar_detected(ar);
  3999. complete(&ar->wmi.radar_confirm);
  4000. }
  4001. void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
  4002. {
  4003. struct wmi_roam_ev_arg arg = {};
  4004. int ret;
  4005. u32 vdev_id;
  4006. u32 reason;
  4007. s32 rssi;
  4008. ret = ath10k_wmi_pull_roam_ev(ar, skb, &arg);
  4009. if (ret) {
  4010. ath10k_warn(ar, "failed to parse roam event: %d\n", ret);
  4011. return;
  4012. }
  4013. vdev_id = __le32_to_cpu(arg.vdev_id);
  4014. reason = __le32_to_cpu(arg.reason);
  4015. rssi = __le32_to_cpu(arg.rssi);
  4016. rssi += WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT;
  4017. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4018. "wmi roam event vdev %u reason 0x%08x rssi %d\n",
  4019. vdev_id, reason, rssi);
  4020. if (reason >= WMI_ROAM_REASON_MAX)
  4021. ath10k_warn(ar, "ignoring unknown roam event reason %d on vdev %i\n",
  4022. reason, vdev_id);
  4023. switch (reason) {
  4024. case WMI_ROAM_REASON_BEACON_MISS:
  4025. ath10k_mac_handle_beacon_miss(ar, vdev_id);
  4026. break;
  4027. case WMI_ROAM_REASON_BETTER_AP:
  4028. case WMI_ROAM_REASON_LOW_RSSI:
  4029. case WMI_ROAM_REASON_SUITABLE_AP_FOUND:
  4030. case WMI_ROAM_REASON_HO_FAILED:
  4031. ath10k_warn(ar, "ignoring not implemented roam event reason %d on vdev %i\n",
  4032. reason, vdev_id);
  4033. break;
  4034. }
  4035. }
  4036. void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb)
  4037. {
  4038. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
  4039. }
  4040. void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb)
  4041. {
  4042. char buf[101], c;
  4043. int i;
  4044. for (i = 0; i < sizeof(buf) - 1; i++) {
  4045. if (i >= skb->len)
  4046. break;
  4047. c = skb->data[i];
  4048. if (c == '\0')
  4049. break;
  4050. if (isascii(c) && isprint(c))
  4051. buf[i] = c;
  4052. else
  4053. buf[i] = '.';
  4054. }
  4055. if (i == sizeof(buf) - 1)
  4056. ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len);
  4057. /* for some reason the debug prints end with \n, remove that */
  4058. if (skb->data[i - 1] == '\n')
  4059. i--;
  4060. /* the last byte is always reserved for the null character */
  4061. buf[i] = '\0';
  4062. ath10k_dbg(ar, ATH10K_DBG_WMI_PRINT, "wmi print '%s'\n", buf);
  4063. }
  4064. void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
  4065. {
  4066. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
  4067. }
  4068. void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb)
  4069. {
  4070. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
  4071. }
  4072. void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
  4073. struct sk_buff *skb)
  4074. {
  4075. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
  4076. }
  4077. void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
  4078. struct sk_buff *skb)
  4079. {
  4080. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
  4081. }
  4082. void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb)
  4083. {
  4084. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
  4085. }
  4086. void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb)
  4087. {
  4088. struct wmi_wow_ev_arg ev = {};
  4089. int ret;
  4090. complete(&ar->wow.wakeup_completed);
  4091. ret = ath10k_wmi_pull_wow_event(ar, skb, &ev);
  4092. if (ret) {
  4093. ath10k_warn(ar, "failed to parse wow wakeup event: %d\n", ret);
  4094. return;
  4095. }
  4096. ath10k_dbg(ar, ATH10K_DBG_WMI, "wow wakeup host reason %s\n",
  4097. wow_reason(ev.wake_reason));
  4098. }
  4099. void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb)
  4100. {
  4101. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
  4102. }
  4103. static u8 ath10k_tpc_config_get_rate(struct ath10k *ar,
  4104. struct wmi_pdev_tpc_config_event *ev,
  4105. u32 rate_idx, u32 num_chains,
  4106. u32 rate_code, u8 type)
  4107. {
  4108. u8 tpc, num_streams, preamble, ch, stm_idx;
  4109. num_streams = ATH10K_HW_NSS(rate_code);
  4110. preamble = ATH10K_HW_PREAMBLE(rate_code);
  4111. ch = num_chains - 1;
  4112. tpc = min_t(u8, ev->rates_array[rate_idx], ev->max_reg_allow_pow[ch]);
  4113. if (__le32_to_cpu(ev->num_tx_chain) <= 1)
  4114. goto out;
  4115. if (preamble == WMI_RATE_PREAMBLE_CCK)
  4116. goto out;
  4117. stm_idx = num_streams - 1;
  4118. if (num_chains <= num_streams)
  4119. goto out;
  4120. switch (type) {
  4121. case WMI_TPC_TABLE_TYPE_STBC:
  4122. tpc = min_t(u8, tpc,
  4123. ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx]);
  4124. break;
  4125. case WMI_TPC_TABLE_TYPE_TXBF:
  4126. tpc = min_t(u8, tpc,
  4127. ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx]);
  4128. break;
  4129. case WMI_TPC_TABLE_TYPE_CDD:
  4130. tpc = min_t(u8, tpc,
  4131. ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx]);
  4132. break;
  4133. default:
  4134. ath10k_warn(ar, "unknown wmi tpc table type: %d\n", type);
  4135. tpc = 0;
  4136. break;
  4137. }
  4138. out:
  4139. return tpc;
  4140. }
  4141. static void ath10k_tpc_config_disp_tables(struct ath10k *ar,
  4142. struct wmi_pdev_tpc_config_event *ev,
  4143. struct ath10k_tpc_stats *tpc_stats,
  4144. u8 *rate_code, u16 *pream_table, u8 type)
  4145. {
  4146. u32 i, j, pream_idx, flags;
  4147. u8 tpc[WMI_TPC_TX_N_CHAIN];
  4148. char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
  4149. char buff[WMI_TPC_BUF_SIZE];
  4150. flags = __le32_to_cpu(ev->flags);
  4151. switch (type) {
  4152. case WMI_TPC_TABLE_TYPE_CDD:
  4153. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) {
  4154. ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n");
  4155. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  4156. return;
  4157. }
  4158. break;
  4159. case WMI_TPC_TABLE_TYPE_STBC:
  4160. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) {
  4161. ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n");
  4162. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  4163. return;
  4164. }
  4165. break;
  4166. case WMI_TPC_TABLE_TYPE_TXBF:
  4167. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) {
  4168. ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n");
  4169. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  4170. return;
  4171. }
  4172. break;
  4173. default:
  4174. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4175. "invalid table type in wmi tpc event: %d\n", type);
  4176. return;
  4177. }
  4178. pream_idx = 0;
  4179. for (i = 0; i < tpc_stats->rate_max; i++) {
  4180. memset(tpc_value, 0, sizeof(tpc_value));
  4181. memset(buff, 0, sizeof(buff));
  4182. if (i == pream_table[pream_idx])
  4183. pream_idx++;
  4184. for (j = 0; j < tpc_stats->num_tx_chain; j++) {
  4185. tpc[j] = ath10k_tpc_config_get_rate(ar, ev, i, j + 1,
  4186. rate_code[i],
  4187. type);
  4188. snprintf(buff, sizeof(buff), "%8d ", tpc[j]);
  4189. strlcat(tpc_value, buff, sizeof(tpc_value));
  4190. }
  4191. tpc_stats->tpc_table[type].pream_idx[i] = pream_idx;
  4192. tpc_stats->tpc_table[type].rate_code[i] = rate_code[i];
  4193. memcpy(tpc_stats->tpc_table[type].tpc_value[i],
  4194. tpc_value, sizeof(tpc_value));
  4195. }
  4196. }
  4197. void ath10k_wmi_tpc_config_get_rate_code(u8 *rate_code, u16 *pream_table,
  4198. u32 num_tx_chain)
  4199. {
  4200. u32 i, j, pream_idx;
  4201. u8 rate_idx;
  4202. /* Create the rate code table based on the chains supported */
  4203. rate_idx = 0;
  4204. pream_idx = 0;
  4205. /* Fill CCK rate code */
  4206. for (i = 0; i < 4; i++) {
  4207. rate_code[rate_idx] =
  4208. ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_CCK);
  4209. rate_idx++;
  4210. }
  4211. pream_table[pream_idx] = rate_idx;
  4212. pream_idx++;
  4213. /* Fill OFDM rate code */
  4214. for (i = 0; i < 8; i++) {
  4215. rate_code[rate_idx] =
  4216. ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_OFDM);
  4217. rate_idx++;
  4218. }
  4219. pream_table[pream_idx] = rate_idx;
  4220. pream_idx++;
  4221. /* Fill HT20 rate code */
  4222. for (i = 0; i < num_tx_chain; i++) {
  4223. for (j = 0; j < 8; j++) {
  4224. rate_code[rate_idx] =
  4225. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
  4226. rate_idx++;
  4227. }
  4228. }
  4229. pream_table[pream_idx] = rate_idx;
  4230. pream_idx++;
  4231. /* Fill HT40 rate code */
  4232. for (i = 0; i < num_tx_chain; i++) {
  4233. for (j = 0; j < 8; j++) {
  4234. rate_code[rate_idx] =
  4235. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
  4236. rate_idx++;
  4237. }
  4238. }
  4239. pream_table[pream_idx] = rate_idx;
  4240. pream_idx++;
  4241. /* Fill VHT20 rate code */
  4242. for (i = 0; i < num_tx_chain; i++) {
  4243. for (j = 0; j < 10; j++) {
  4244. rate_code[rate_idx] =
  4245. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
  4246. rate_idx++;
  4247. }
  4248. }
  4249. pream_table[pream_idx] = rate_idx;
  4250. pream_idx++;
  4251. /* Fill VHT40 rate code */
  4252. for (i = 0; i < num_tx_chain; i++) {
  4253. for (j = 0; j < 10; j++) {
  4254. rate_code[rate_idx] =
  4255. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
  4256. rate_idx++;
  4257. }
  4258. }
  4259. pream_table[pream_idx] = rate_idx;
  4260. pream_idx++;
  4261. /* Fill VHT80 rate code */
  4262. for (i = 0; i < num_tx_chain; i++) {
  4263. for (j = 0; j < 10; j++) {
  4264. rate_code[rate_idx] =
  4265. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
  4266. rate_idx++;
  4267. }
  4268. }
  4269. pream_table[pream_idx] = rate_idx;
  4270. pream_idx++;
  4271. rate_code[rate_idx++] =
  4272. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
  4273. rate_code[rate_idx++] =
  4274. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
  4275. rate_code[rate_idx++] =
  4276. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
  4277. rate_code[rate_idx++] =
  4278. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
  4279. rate_code[rate_idx++] =
  4280. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
  4281. pream_table[pream_idx] = ATH10K_TPC_PREAM_TABLE_END;
  4282. }
  4283. void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb)
  4284. {
  4285. u32 num_tx_chain, rate_max;
  4286. u8 rate_code[WMI_TPC_RATE_MAX];
  4287. u16 pream_table[WMI_TPC_PREAM_TABLE_MAX];
  4288. struct wmi_pdev_tpc_config_event *ev;
  4289. struct ath10k_tpc_stats *tpc_stats;
  4290. ev = (struct wmi_pdev_tpc_config_event *)skb->data;
  4291. num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
  4292. if (num_tx_chain > WMI_TPC_TX_N_CHAIN) {
  4293. ath10k_warn(ar, "number of tx chain is %d greater than TPC configured tx chain %d\n",
  4294. num_tx_chain, WMI_TPC_TX_N_CHAIN);
  4295. return;
  4296. }
  4297. rate_max = __le32_to_cpu(ev->rate_max);
  4298. if (rate_max > WMI_TPC_RATE_MAX) {
  4299. ath10k_warn(ar, "number of rate is %d greater than TPC configured rate %d\n",
  4300. rate_max, WMI_TPC_RATE_MAX);
  4301. rate_max = WMI_TPC_RATE_MAX;
  4302. }
  4303. tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC);
  4304. if (!tpc_stats)
  4305. return;
  4306. ath10k_wmi_tpc_config_get_rate_code(rate_code, pream_table,
  4307. num_tx_chain);
  4308. tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq);
  4309. tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode);
  4310. tpc_stats->ctl = __le32_to_cpu(ev->ctl);
  4311. tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain);
  4312. tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain);
  4313. tpc_stats->twice_antenna_reduction =
  4314. __le32_to_cpu(ev->twice_antenna_reduction);
  4315. tpc_stats->power_limit = __le32_to_cpu(ev->power_limit);
  4316. tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power);
  4317. tpc_stats->num_tx_chain = num_tx_chain;
  4318. tpc_stats->rate_max = rate_max;
  4319. ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
  4320. rate_code, pream_table,
  4321. WMI_TPC_TABLE_TYPE_CDD);
  4322. ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
  4323. rate_code, pream_table,
  4324. WMI_TPC_TABLE_TYPE_STBC);
  4325. ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
  4326. rate_code, pream_table,
  4327. WMI_TPC_TABLE_TYPE_TXBF);
  4328. ath10k_debug_tpc_stats_process(ar, tpc_stats);
  4329. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4330. "wmi event tpc config channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n",
  4331. __le32_to_cpu(ev->chan_freq),
  4332. __le32_to_cpu(ev->phy_mode),
  4333. __le32_to_cpu(ev->ctl),
  4334. __le32_to_cpu(ev->reg_domain),
  4335. a_sle32_to_cpu(ev->twice_antenna_gain),
  4336. __le32_to_cpu(ev->twice_antenna_reduction),
  4337. __le32_to_cpu(ev->power_limit),
  4338. __le32_to_cpu(ev->twice_max_rd_power) / 2,
  4339. __le32_to_cpu(ev->num_tx_chain),
  4340. __le32_to_cpu(ev->rate_max));
  4341. }
  4342. static u8
  4343. ath10k_wmi_tpc_final_get_rate(struct ath10k *ar,
  4344. struct wmi_pdev_tpc_final_table_event *ev,
  4345. u32 rate_idx, u32 num_chains,
  4346. u32 rate_code, u8 type, u32 pream_idx)
  4347. {
  4348. u8 tpc, num_streams, preamble, ch, stm_idx;
  4349. s8 pow_agcdd, pow_agstbc, pow_agtxbf;
  4350. int pream;
  4351. num_streams = ATH10K_HW_NSS(rate_code);
  4352. preamble = ATH10K_HW_PREAMBLE(rate_code);
  4353. ch = num_chains - 1;
  4354. stm_idx = num_streams - 1;
  4355. pream = -1;
  4356. if (__le32_to_cpu(ev->chan_freq) <= 2483) {
  4357. switch (pream_idx) {
  4358. case WMI_TPC_PREAM_2GHZ_CCK:
  4359. pream = 0;
  4360. break;
  4361. case WMI_TPC_PREAM_2GHZ_OFDM:
  4362. pream = 1;
  4363. break;
  4364. case WMI_TPC_PREAM_2GHZ_HT20:
  4365. case WMI_TPC_PREAM_2GHZ_VHT20:
  4366. pream = 2;
  4367. break;
  4368. case WMI_TPC_PREAM_2GHZ_HT40:
  4369. case WMI_TPC_PREAM_2GHZ_VHT40:
  4370. pream = 3;
  4371. break;
  4372. case WMI_TPC_PREAM_2GHZ_VHT80:
  4373. pream = 4;
  4374. break;
  4375. default:
  4376. pream = -1;
  4377. break;
  4378. }
  4379. }
  4380. if (__le32_to_cpu(ev->chan_freq) >= 5180) {
  4381. switch (pream_idx) {
  4382. case WMI_TPC_PREAM_5GHZ_OFDM:
  4383. pream = 0;
  4384. break;
  4385. case WMI_TPC_PREAM_5GHZ_HT20:
  4386. case WMI_TPC_PREAM_5GHZ_VHT20:
  4387. pream = 1;
  4388. break;
  4389. case WMI_TPC_PREAM_5GHZ_HT40:
  4390. case WMI_TPC_PREAM_5GHZ_VHT40:
  4391. pream = 2;
  4392. break;
  4393. case WMI_TPC_PREAM_5GHZ_VHT80:
  4394. pream = 3;
  4395. break;
  4396. case WMI_TPC_PREAM_5GHZ_HTCUP:
  4397. pream = 4;
  4398. break;
  4399. default:
  4400. pream = -1;
  4401. break;
  4402. }
  4403. }
  4404. if (pream == -1) {
  4405. ath10k_warn(ar, "unknown wmi tpc final index and frequency: %u, %u\n",
  4406. pream_idx, __le32_to_cpu(ev->chan_freq));
  4407. tpc = 0;
  4408. goto out;
  4409. }
  4410. if (pream == 4)
  4411. tpc = min_t(u8, ev->rates_array[rate_idx],
  4412. ev->max_reg_allow_pow[ch]);
  4413. else
  4414. tpc = min_t(u8, min_t(u8, ev->rates_array[rate_idx],
  4415. ev->max_reg_allow_pow[ch]),
  4416. ev->ctl_power_table[0][pream][stm_idx]);
  4417. if (__le32_to_cpu(ev->num_tx_chain) <= 1)
  4418. goto out;
  4419. if (preamble == WMI_RATE_PREAMBLE_CCK)
  4420. goto out;
  4421. if (num_chains <= num_streams)
  4422. goto out;
  4423. switch (type) {
  4424. case WMI_TPC_TABLE_TYPE_STBC:
  4425. pow_agstbc = ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx];
  4426. if (pream == 4)
  4427. tpc = min_t(u8, tpc, pow_agstbc);
  4428. else
  4429. tpc = min_t(u8, min_t(u8, tpc, pow_agstbc),
  4430. ev->ctl_power_table[0][pream][stm_idx]);
  4431. break;
  4432. case WMI_TPC_TABLE_TYPE_TXBF:
  4433. pow_agtxbf = ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx];
  4434. if (pream == 4)
  4435. tpc = min_t(u8, tpc, pow_agtxbf);
  4436. else
  4437. tpc = min_t(u8, min_t(u8, tpc, pow_agtxbf),
  4438. ev->ctl_power_table[1][pream][stm_idx]);
  4439. break;
  4440. case WMI_TPC_TABLE_TYPE_CDD:
  4441. pow_agcdd = ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx];
  4442. if (pream == 4)
  4443. tpc = min_t(u8, tpc, pow_agcdd);
  4444. else
  4445. tpc = min_t(u8, min_t(u8, tpc, pow_agcdd),
  4446. ev->ctl_power_table[0][pream][stm_idx]);
  4447. break;
  4448. default:
  4449. ath10k_warn(ar, "unknown wmi tpc final table type: %d\n", type);
  4450. tpc = 0;
  4451. break;
  4452. }
  4453. out:
  4454. return tpc;
  4455. }
  4456. static void
  4457. ath10k_wmi_tpc_stats_final_disp_tables(struct ath10k *ar,
  4458. struct wmi_pdev_tpc_final_table_event *ev,
  4459. struct ath10k_tpc_stats_final *tpc_stats,
  4460. u8 *rate_code, u16 *pream_table, u8 type)
  4461. {
  4462. u32 i, j, pream_idx, flags;
  4463. u8 tpc[WMI_TPC_TX_N_CHAIN];
  4464. char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
  4465. char buff[WMI_TPC_BUF_SIZE];
  4466. flags = __le32_to_cpu(ev->flags);
  4467. switch (type) {
  4468. case WMI_TPC_TABLE_TYPE_CDD:
  4469. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) {
  4470. ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n");
  4471. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  4472. return;
  4473. }
  4474. break;
  4475. case WMI_TPC_TABLE_TYPE_STBC:
  4476. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) {
  4477. ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n");
  4478. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  4479. return;
  4480. }
  4481. break;
  4482. case WMI_TPC_TABLE_TYPE_TXBF:
  4483. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) {
  4484. ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n");
  4485. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  4486. return;
  4487. }
  4488. break;
  4489. default:
  4490. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4491. "invalid table type in wmi tpc event: %d\n", type);
  4492. return;
  4493. }
  4494. pream_idx = 0;
  4495. for (i = 0; i < tpc_stats->rate_max; i++) {
  4496. memset(tpc_value, 0, sizeof(tpc_value));
  4497. memset(buff, 0, sizeof(buff));
  4498. if (i == pream_table[pream_idx])
  4499. pream_idx++;
  4500. for (j = 0; j < tpc_stats->num_tx_chain; j++) {
  4501. tpc[j] = ath10k_wmi_tpc_final_get_rate(ar, ev, i, j + 1,
  4502. rate_code[i],
  4503. type, pream_idx);
  4504. snprintf(buff, sizeof(buff), "%8d ", tpc[j]);
  4505. strlcat(tpc_value, buff, sizeof(tpc_value));
  4506. }
  4507. tpc_stats->tpc_table_final[type].pream_idx[i] = pream_idx;
  4508. tpc_stats->tpc_table_final[type].rate_code[i] = rate_code[i];
  4509. memcpy(tpc_stats->tpc_table_final[type].tpc_value[i],
  4510. tpc_value, sizeof(tpc_value));
  4511. }
  4512. }
  4513. void ath10k_wmi_event_tpc_final_table(struct ath10k *ar, struct sk_buff *skb)
  4514. {
  4515. u32 num_tx_chain, rate_max;
  4516. u8 rate_code[WMI_TPC_FINAL_RATE_MAX];
  4517. u16 pream_table[WMI_TPC_PREAM_TABLE_MAX];
  4518. struct wmi_pdev_tpc_final_table_event *ev;
  4519. struct ath10k_tpc_stats_final *tpc_stats;
  4520. ev = (struct wmi_pdev_tpc_final_table_event *)skb->data;
  4521. num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
  4522. if (num_tx_chain > WMI_TPC_TX_N_CHAIN) {
  4523. ath10k_warn(ar, "number of tx chain is %d greater than TPC final configured tx chain %d\n",
  4524. num_tx_chain, WMI_TPC_TX_N_CHAIN);
  4525. return;
  4526. }
  4527. rate_max = __le32_to_cpu(ev->rate_max);
  4528. if (rate_max > WMI_TPC_FINAL_RATE_MAX) {
  4529. ath10k_warn(ar, "number of rate is %d greater than TPC final configured rate %d\n",
  4530. rate_max, WMI_TPC_FINAL_RATE_MAX);
  4531. rate_max = WMI_TPC_FINAL_RATE_MAX;
  4532. }
  4533. tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC);
  4534. if (!tpc_stats)
  4535. return;
  4536. ath10k_wmi_tpc_config_get_rate_code(rate_code, pream_table,
  4537. num_tx_chain);
  4538. tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq);
  4539. tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode);
  4540. tpc_stats->ctl = __le32_to_cpu(ev->ctl);
  4541. tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain);
  4542. tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain);
  4543. tpc_stats->twice_antenna_reduction =
  4544. __le32_to_cpu(ev->twice_antenna_reduction);
  4545. tpc_stats->power_limit = __le32_to_cpu(ev->power_limit);
  4546. tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power);
  4547. tpc_stats->num_tx_chain = num_tx_chain;
  4548. tpc_stats->rate_max = rate_max;
  4549. ath10k_wmi_tpc_stats_final_disp_tables(ar, ev, tpc_stats,
  4550. rate_code, pream_table,
  4551. WMI_TPC_TABLE_TYPE_CDD);
  4552. ath10k_wmi_tpc_stats_final_disp_tables(ar, ev, tpc_stats,
  4553. rate_code, pream_table,
  4554. WMI_TPC_TABLE_TYPE_STBC);
  4555. ath10k_wmi_tpc_stats_final_disp_tables(ar, ev, tpc_stats,
  4556. rate_code, pream_table,
  4557. WMI_TPC_TABLE_TYPE_TXBF);
  4558. ath10k_debug_tpc_stats_final_process(ar, tpc_stats);
  4559. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4560. "wmi event tpc final table channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n",
  4561. __le32_to_cpu(ev->chan_freq),
  4562. __le32_to_cpu(ev->phy_mode),
  4563. __le32_to_cpu(ev->ctl),
  4564. __le32_to_cpu(ev->reg_domain),
  4565. a_sle32_to_cpu(ev->twice_antenna_gain),
  4566. __le32_to_cpu(ev->twice_antenna_reduction),
  4567. __le32_to_cpu(ev->power_limit),
  4568. __le32_to_cpu(ev->twice_max_rd_power) / 2,
  4569. __le32_to_cpu(ev->num_tx_chain),
  4570. __le32_to_cpu(ev->rate_max));
  4571. }
  4572. static void
  4573. ath10k_wmi_handle_tdls_peer_event(struct ath10k *ar, struct sk_buff *skb)
  4574. {
  4575. struct wmi_tdls_peer_event *ev;
  4576. struct ath10k_peer *peer;
  4577. struct ath10k_vif *arvif;
  4578. int vdev_id;
  4579. int peer_status;
  4580. int peer_reason;
  4581. u8 reason;
  4582. if (skb->len < sizeof(*ev)) {
  4583. ath10k_err(ar, "received tdls peer event with invalid size (%d bytes)\n",
  4584. skb->len);
  4585. return;
  4586. }
  4587. ev = (struct wmi_tdls_peer_event *)skb->data;
  4588. vdev_id = __le32_to_cpu(ev->vdev_id);
  4589. peer_status = __le32_to_cpu(ev->peer_status);
  4590. peer_reason = __le32_to_cpu(ev->peer_reason);
  4591. spin_lock_bh(&ar->data_lock);
  4592. peer = ath10k_peer_find(ar, vdev_id, ev->peer_macaddr.addr);
  4593. spin_unlock_bh(&ar->data_lock);
  4594. if (!peer) {
  4595. ath10k_warn(ar, "failed to find peer entry for %pM\n",
  4596. ev->peer_macaddr.addr);
  4597. return;
  4598. }
  4599. switch (peer_status) {
  4600. case WMI_TDLS_SHOULD_TEARDOWN:
  4601. switch (peer_reason) {
  4602. case WMI_TDLS_TEARDOWN_REASON_PTR_TIMEOUT:
  4603. case WMI_TDLS_TEARDOWN_REASON_NO_RESPONSE:
  4604. case WMI_TDLS_TEARDOWN_REASON_RSSI:
  4605. reason = WLAN_REASON_TDLS_TEARDOWN_UNREACHABLE;
  4606. break;
  4607. default:
  4608. reason = WLAN_REASON_TDLS_TEARDOWN_UNSPECIFIED;
  4609. break;
  4610. }
  4611. arvif = ath10k_get_arvif(ar, vdev_id);
  4612. if (!arvif) {
  4613. ath10k_warn(ar, "received tdls peer event for invalid vdev id %u\n",
  4614. vdev_id);
  4615. return;
  4616. }
  4617. ieee80211_tdls_oper_request(arvif->vif, ev->peer_macaddr.addr,
  4618. NL80211_TDLS_TEARDOWN, reason,
  4619. GFP_ATOMIC);
  4620. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4621. "received tdls teardown event for peer %pM reason %u\n",
  4622. ev->peer_macaddr.addr, peer_reason);
  4623. break;
  4624. default:
  4625. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4626. "received unknown tdls peer event %u\n",
  4627. peer_status);
  4628. break;
  4629. }
  4630. }
  4631. static void
  4632. ath10k_wmi_event_peer_sta_ps_state_chg(struct ath10k *ar, struct sk_buff *skb)
  4633. {
  4634. struct wmi_peer_sta_ps_state_chg_event *ev;
  4635. struct ieee80211_sta *sta;
  4636. struct ath10k_sta *arsta;
  4637. u8 peer_addr[ETH_ALEN];
  4638. lockdep_assert_held(&ar->data_lock);
  4639. ev = (struct wmi_peer_sta_ps_state_chg_event *)skb->data;
  4640. ether_addr_copy(peer_addr, ev->peer_macaddr.addr);
  4641. rcu_read_lock();
  4642. sta = ieee80211_find_sta_by_ifaddr(ar->hw, peer_addr, NULL);
  4643. if (!sta) {
  4644. ath10k_warn(ar, "failed to find station entry %pM\n",
  4645. peer_addr);
  4646. goto exit;
  4647. }
  4648. arsta = (struct ath10k_sta *)sta->drv_priv;
  4649. arsta->peer_ps_state = __le32_to_cpu(ev->peer_ps_state);
  4650. exit:
  4651. rcu_read_unlock();
  4652. }
  4653. void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb)
  4654. {
  4655. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
  4656. }
  4657. void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, struct sk_buff *skb)
  4658. {
  4659. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
  4660. }
  4661. void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb)
  4662. {
  4663. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
  4664. }
  4665. void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb)
  4666. {
  4667. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
  4668. }
  4669. void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb)
  4670. {
  4671. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
  4672. }
  4673. void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
  4674. struct sk_buff *skb)
  4675. {
  4676. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
  4677. }
  4678. void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb)
  4679. {
  4680. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
  4681. }
  4682. void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb)
  4683. {
  4684. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
  4685. }
  4686. void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb)
  4687. {
  4688. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
  4689. }
  4690. static int ath10k_wmi_alloc_chunk(struct ath10k *ar, u32 req_id,
  4691. u32 num_units, u32 unit_len)
  4692. {
  4693. dma_addr_t paddr;
  4694. u32 pool_size;
  4695. int idx = ar->wmi.num_mem_chunks;
  4696. void *vaddr;
  4697. pool_size = num_units * round_up(unit_len, 4);
  4698. vaddr = dma_alloc_coherent(ar->dev, pool_size, &paddr, GFP_KERNEL);
  4699. if (!vaddr)
  4700. return -ENOMEM;
  4701. ar->wmi.mem_chunks[idx].vaddr = vaddr;
  4702. ar->wmi.mem_chunks[idx].paddr = paddr;
  4703. ar->wmi.mem_chunks[idx].len = pool_size;
  4704. ar->wmi.mem_chunks[idx].req_id = req_id;
  4705. ar->wmi.num_mem_chunks++;
  4706. return num_units;
  4707. }
  4708. static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
  4709. u32 num_units, u32 unit_len)
  4710. {
  4711. int ret;
  4712. while (num_units) {
  4713. ret = ath10k_wmi_alloc_chunk(ar, req_id, num_units, unit_len);
  4714. if (ret < 0)
  4715. return ret;
  4716. num_units -= ret;
  4717. }
  4718. return 0;
  4719. }
  4720. static bool
  4721. ath10k_wmi_is_host_mem_allocated(struct ath10k *ar,
  4722. const struct wlan_host_mem_req **mem_reqs,
  4723. u32 num_mem_reqs)
  4724. {
  4725. u32 req_id, num_units, unit_size, num_unit_info;
  4726. u32 pool_size;
  4727. int i, j;
  4728. bool found;
  4729. if (ar->wmi.num_mem_chunks != num_mem_reqs)
  4730. return false;
  4731. for (i = 0; i < num_mem_reqs; ++i) {
  4732. req_id = __le32_to_cpu(mem_reqs[i]->req_id);
  4733. num_units = __le32_to_cpu(mem_reqs[i]->num_units);
  4734. unit_size = __le32_to_cpu(mem_reqs[i]->unit_size);
  4735. num_unit_info = __le32_to_cpu(mem_reqs[i]->num_unit_info);
  4736. if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
  4737. if (ar->num_active_peers)
  4738. num_units = ar->num_active_peers + 1;
  4739. else
  4740. num_units = ar->max_num_peers + 1;
  4741. } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
  4742. num_units = ar->max_num_peers + 1;
  4743. } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
  4744. num_units = ar->max_num_vdevs + 1;
  4745. }
  4746. found = false;
  4747. for (j = 0; j < ar->wmi.num_mem_chunks; j++) {
  4748. if (ar->wmi.mem_chunks[j].req_id == req_id) {
  4749. pool_size = num_units * round_up(unit_size, 4);
  4750. if (ar->wmi.mem_chunks[j].len == pool_size) {
  4751. found = true;
  4752. break;
  4753. }
  4754. }
  4755. }
  4756. if (!found)
  4757. return false;
  4758. }
  4759. return true;
  4760. }
  4761. static int
  4762. ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
  4763. struct wmi_svc_rdy_ev_arg *arg)
  4764. {
  4765. struct wmi_service_ready_event *ev;
  4766. size_t i, n;
  4767. if (skb->len < sizeof(*ev))
  4768. return -EPROTO;
  4769. ev = (void *)skb->data;
  4770. skb_pull(skb, sizeof(*ev));
  4771. arg->min_tx_power = ev->hw_min_tx_power;
  4772. arg->max_tx_power = ev->hw_max_tx_power;
  4773. arg->ht_cap = ev->ht_cap_info;
  4774. arg->vht_cap = ev->vht_cap_info;
  4775. arg->vht_supp_mcs = ev->vht_supp_mcs;
  4776. arg->sw_ver0 = ev->sw_version;
  4777. arg->sw_ver1 = ev->sw_version_1;
  4778. arg->phy_capab = ev->phy_capability;
  4779. arg->num_rf_chains = ev->num_rf_chains;
  4780. arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
  4781. arg->low_2ghz_chan = ev->hal_reg_capabilities.low_2ghz_chan;
  4782. arg->high_2ghz_chan = ev->hal_reg_capabilities.high_2ghz_chan;
  4783. arg->low_5ghz_chan = ev->hal_reg_capabilities.low_5ghz_chan;
  4784. arg->high_5ghz_chan = ev->hal_reg_capabilities.high_5ghz_chan;
  4785. arg->num_mem_reqs = ev->num_mem_reqs;
  4786. arg->service_map = ev->wmi_service_bitmap;
  4787. arg->service_map_len = sizeof(ev->wmi_service_bitmap);
  4788. n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
  4789. ARRAY_SIZE(arg->mem_reqs));
  4790. for (i = 0; i < n; i++)
  4791. arg->mem_reqs[i] = &ev->mem_reqs[i];
  4792. if (skb->len <
  4793. __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
  4794. return -EPROTO;
  4795. return 0;
  4796. }
  4797. static int
  4798. ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
  4799. struct wmi_svc_rdy_ev_arg *arg)
  4800. {
  4801. struct wmi_10x_service_ready_event *ev;
  4802. int i, n;
  4803. if (skb->len < sizeof(*ev))
  4804. return -EPROTO;
  4805. ev = (void *)skb->data;
  4806. skb_pull(skb, sizeof(*ev));
  4807. arg->min_tx_power = ev->hw_min_tx_power;
  4808. arg->max_tx_power = ev->hw_max_tx_power;
  4809. arg->ht_cap = ev->ht_cap_info;
  4810. arg->vht_cap = ev->vht_cap_info;
  4811. arg->vht_supp_mcs = ev->vht_supp_mcs;
  4812. arg->sw_ver0 = ev->sw_version;
  4813. arg->phy_capab = ev->phy_capability;
  4814. arg->num_rf_chains = ev->num_rf_chains;
  4815. arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
  4816. arg->low_2ghz_chan = ev->hal_reg_capabilities.low_2ghz_chan;
  4817. arg->high_2ghz_chan = ev->hal_reg_capabilities.high_2ghz_chan;
  4818. arg->low_5ghz_chan = ev->hal_reg_capabilities.low_5ghz_chan;
  4819. arg->high_5ghz_chan = ev->hal_reg_capabilities.high_5ghz_chan;
  4820. arg->num_mem_reqs = ev->num_mem_reqs;
  4821. arg->service_map = ev->wmi_service_bitmap;
  4822. arg->service_map_len = sizeof(ev->wmi_service_bitmap);
  4823. /* Deliberately skipping ev->sys_cap_info as WMI and WMI-TLV have
  4824. * different values. We would need a translation to handle that,
  4825. * but as we don't currently need anything from sys_cap_info from
  4826. * WMI interface (only from WMI-TLV) safest it to skip it.
  4827. */
  4828. n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
  4829. ARRAY_SIZE(arg->mem_reqs));
  4830. for (i = 0; i < n; i++)
  4831. arg->mem_reqs[i] = &ev->mem_reqs[i];
  4832. if (skb->len <
  4833. __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
  4834. return -EPROTO;
  4835. return 0;
  4836. }
  4837. static void ath10k_wmi_event_service_ready_work(struct work_struct *work)
  4838. {
  4839. struct ath10k *ar = container_of(work, struct ath10k, svc_rdy_work);
  4840. struct sk_buff *skb = ar->svc_rdy_skb;
  4841. struct wmi_svc_rdy_ev_arg arg = {};
  4842. u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
  4843. int ret;
  4844. bool allocated;
  4845. if (!skb) {
  4846. ath10k_warn(ar, "invalid service ready event skb\n");
  4847. return;
  4848. }
  4849. ret = ath10k_wmi_pull_svc_rdy(ar, skb, &arg);
  4850. if (ret) {
  4851. ath10k_warn(ar, "failed to parse service ready: %d\n", ret);
  4852. return;
  4853. }
  4854. ath10k_wmi_map_svc(ar, arg.service_map, ar->wmi.svc_map,
  4855. arg.service_map_len);
  4856. ar->hw_min_tx_power = __le32_to_cpu(arg.min_tx_power);
  4857. ar->hw_max_tx_power = __le32_to_cpu(arg.max_tx_power);
  4858. ar->ht_cap_info = __le32_to_cpu(arg.ht_cap);
  4859. ar->vht_cap_info = __le32_to_cpu(arg.vht_cap);
  4860. ar->vht_supp_mcs = __le32_to_cpu(arg.vht_supp_mcs);
  4861. ar->fw_version_major =
  4862. (__le32_to_cpu(arg.sw_ver0) & 0xff000000) >> 24;
  4863. ar->fw_version_minor = (__le32_to_cpu(arg.sw_ver0) & 0x00ffffff);
  4864. ar->fw_version_release =
  4865. (__le32_to_cpu(arg.sw_ver1) & 0xffff0000) >> 16;
  4866. ar->fw_version_build = (__le32_to_cpu(arg.sw_ver1) & 0x0000ffff);
  4867. ar->phy_capability = __le32_to_cpu(arg.phy_capab);
  4868. ar->num_rf_chains = __le32_to_cpu(arg.num_rf_chains);
  4869. ar->hw_eeprom_rd = __le32_to_cpu(arg.eeprom_rd);
  4870. ar->low_2ghz_chan = __le32_to_cpu(arg.low_2ghz_chan);
  4871. ar->high_2ghz_chan = __le32_to_cpu(arg.high_2ghz_chan);
  4872. ar->low_5ghz_chan = __le32_to_cpu(arg.low_5ghz_chan);
  4873. ar->high_5ghz_chan = __le32_to_cpu(arg.high_5ghz_chan);
  4874. ar->sys_cap_info = __le32_to_cpu(arg.sys_cap_info);
  4875. ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ",
  4876. arg.service_map, arg.service_map_len);
  4877. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi sys_cap_info 0x%x\n",
  4878. ar->sys_cap_info);
  4879. if (ar->num_rf_chains > ar->max_spatial_stream) {
  4880. ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n",
  4881. ar->num_rf_chains, ar->max_spatial_stream);
  4882. ar->num_rf_chains = ar->max_spatial_stream;
  4883. }
  4884. if (!ar->cfg_tx_chainmask) {
  4885. ar->cfg_tx_chainmask = (1 << ar->num_rf_chains) - 1;
  4886. ar->cfg_rx_chainmask = (1 << ar->num_rf_chains) - 1;
  4887. }
  4888. if (strlen(ar->hw->wiphy->fw_version) == 0) {
  4889. snprintf(ar->hw->wiphy->fw_version,
  4890. sizeof(ar->hw->wiphy->fw_version),
  4891. "%u.%u.%u.%u",
  4892. ar->fw_version_major,
  4893. ar->fw_version_minor,
  4894. ar->fw_version_release,
  4895. ar->fw_version_build);
  4896. }
  4897. num_mem_reqs = __le32_to_cpu(arg.num_mem_reqs);
  4898. if (num_mem_reqs > WMI_MAX_MEM_REQS) {
  4899. ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n",
  4900. num_mem_reqs);
  4901. return;
  4902. }
  4903. if (test_bit(WMI_SERVICE_PEER_CACHING, ar->wmi.svc_map)) {
  4904. if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
  4905. ar->running_fw->fw_file.fw_features))
  4906. ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS_PFC +
  4907. ar->max_num_vdevs;
  4908. else
  4909. ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS +
  4910. ar->max_num_vdevs;
  4911. ar->max_num_peers = TARGET_10_4_NUM_QCACHE_PEERS_MAX +
  4912. ar->max_num_vdevs;
  4913. ar->num_tids = ar->num_active_peers * 2;
  4914. ar->max_num_stations = TARGET_10_4_NUM_QCACHE_PEERS_MAX;
  4915. }
  4916. /* TODO: Adjust max peer count for cases like WMI_SERVICE_RATECTRL_CACHE
  4917. * and WMI_SERVICE_IRAM_TIDS, etc.
  4918. */
  4919. allocated = ath10k_wmi_is_host_mem_allocated(ar, arg.mem_reqs,
  4920. num_mem_reqs);
  4921. if (allocated)
  4922. goto skip_mem_alloc;
  4923. /* Either this event is received during boot time or there is a change
  4924. * in memory requirement from firmware when compared to last request.
  4925. * Free any old memory and do a fresh allocation based on the current
  4926. * memory requirement.
  4927. */
  4928. ath10k_wmi_free_host_mem(ar);
  4929. for (i = 0; i < num_mem_reqs; ++i) {
  4930. req_id = __le32_to_cpu(arg.mem_reqs[i]->req_id);
  4931. num_units = __le32_to_cpu(arg.mem_reqs[i]->num_units);
  4932. unit_size = __le32_to_cpu(arg.mem_reqs[i]->unit_size);
  4933. num_unit_info = __le32_to_cpu(arg.mem_reqs[i]->num_unit_info);
  4934. if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
  4935. if (ar->num_active_peers)
  4936. num_units = ar->num_active_peers + 1;
  4937. else
  4938. num_units = ar->max_num_peers + 1;
  4939. } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
  4940. /* number of units to allocate is number of
  4941. * peers, 1 extra for self peer on target
  4942. * this needs to be tied, host and target
  4943. * can get out of sync
  4944. */
  4945. num_units = ar->max_num_peers + 1;
  4946. } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
  4947. num_units = ar->max_num_vdevs + 1;
  4948. }
  4949. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4950. "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
  4951. req_id,
  4952. __le32_to_cpu(arg.mem_reqs[i]->num_units),
  4953. num_unit_info,
  4954. unit_size,
  4955. num_units);
  4956. ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
  4957. unit_size);
  4958. if (ret)
  4959. return;
  4960. }
  4961. skip_mem_alloc:
  4962. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4963. "wmi event service ready min_tx_power 0x%08x max_tx_power 0x%08x ht_cap 0x%08x vht_cap 0x%08x vht_supp_mcs 0x%08x sw_ver0 0x%08x sw_ver1 0x%08x fw_build 0x%08x phy_capab 0x%08x num_rf_chains 0x%08x eeprom_rd 0x%08x low_2ghz_chan %d high_2ghz_chan %d low_5ghz_chan %d high_5ghz_chan %d num_mem_reqs 0x%08x\n",
  4964. __le32_to_cpu(arg.min_tx_power),
  4965. __le32_to_cpu(arg.max_tx_power),
  4966. __le32_to_cpu(arg.ht_cap),
  4967. __le32_to_cpu(arg.vht_cap),
  4968. __le32_to_cpu(arg.vht_supp_mcs),
  4969. __le32_to_cpu(arg.sw_ver0),
  4970. __le32_to_cpu(arg.sw_ver1),
  4971. __le32_to_cpu(arg.fw_build),
  4972. __le32_to_cpu(arg.phy_capab),
  4973. __le32_to_cpu(arg.num_rf_chains),
  4974. __le32_to_cpu(arg.eeprom_rd),
  4975. __le32_to_cpu(arg.low_2ghz_chan),
  4976. __le32_to_cpu(arg.high_2ghz_chan),
  4977. __le32_to_cpu(arg.low_5ghz_chan),
  4978. __le32_to_cpu(arg.high_5ghz_chan),
  4979. __le32_to_cpu(arg.num_mem_reqs));
  4980. dev_kfree_skb(skb);
  4981. ar->svc_rdy_skb = NULL;
  4982. complete(&ar->wmi.service_ready);
  4983. }
  4984. void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb)
  4985. {
  4986. ar->svc_rdy_skb = skb;
  4987. queue_work(ar->workqueue_aux, &ar->svc_rdy_work);
  4988. }
  4989. static int ath10k_wmi_op_pull_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
  4990. struct wmi_rdy_ev_arg *arg)
  4991. {
  4992. struct wmi_ready_event *ev = (void *)skb->data;
  4993. if (skb->len < sizeof(*ev))
  4994. return -EPROTO;
  4995. skb_pull(skb, sizeof(*ev));
  4996. arg->sw_version = ev->sw_version;
  4997. arg->abi_version = ev->abi_version;
  4998. arg->status = ev->status;
  4999. arg->mac_addr = ev->mac_addr.addr;
  5000. return 0;
  5001. }
  5002. static int ath10k_wmi_op_pull_roam_ev(struct ath10k *ar, struct sk_buff *skb,
  5003. struct wmi_roam_ev_arg *arg)
  5004. {
  5005. struct wmi_roam_ev *ev = (void *)skb->data;
  5006. if (skb->len < sizeof(*ev))
  5007. return -EPROTO;
  5008. skb_pull(skb, sizeof(*ev));
  5009. arg->vdev_id = ev->vdev_id;
  5010. arg->reason = ev->reason;
  5011. return 0;
  5012. }
  5013. static int ath10k_wmi_op_pull_echo_ev(struct ath10k *ar,
  5014. struct sk_buff *skb,
  5015. struct wmi_echo_ev_arg *arg)
  5016. {
  5017. struct wmi_echo_event *ev = (void *)skb->data;
  5018. arg->value = ev->value;
  5019. return 0;
  5020. }
  5021. int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb)
  5022. {
  5023. struct wmi_rdy_ev_arg arg = {};
  5024. int ret;
  5025. ret = ath10k_wmi_pull_rdy(ar, skb, &arg);
  5026. if (ret) {
  5027. ath10k_warn(ar, "failed to parse ready event: %d\n", ret);
  5028. return ret;
  5029. }
  5030. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5031. "wmi event ready sw_version 0x%08x abi_version %u mac_addr %pM status %d\n",
  5032. __le32_to_cpu(arg.sw_version),
  5033. __le32_to_cpu(arg.abi_version),
  5034. arg.mac_addr,
  5035. __le32_to_cpu(arg.status));
  5036. if (is_zero_ether_addr(ar->mac_addr))
  5037. ether_addr_copy(ar->mac_addr, arg.mac_addr);
  5038. complete(&ar->wmi.unified_ready);
  5039. return 0;
  5040. }
  5041. void ath10k_wmi_event_service_available(struct ath10k *ar, struct sk_buff *skb)
  5042. {
  5043. int ret;
  5044. struct wmi_svc_avail_ev_arg arg = {};
  5045. ret = ath10k_wmi_pull_svc_avail(ar, skb, &arg);
  5046. if (ret) {
  5047. ath10k_warn(ar, "failed to parse service available event: %d\n",
  5048. ret);
  5049. }
  5050. /*
  5051. * Initialization of "arg.service_map_ext_valid" to ZERO is necessary
  5052. * for the below logic to work.
  5053. */
  5054. if (arg.service_map_ext_valid)
  5055. ath10k_wmi_map_svc_ext(ar, arg.service_map_ext, ar->wmi.svc_map,
  5056. __le32_to_cpu(arg.service_map_ext_len));
  5057. }
  5058. static int ath10k_wmi_event_temperature(struct ath10k *ar, struct sk_buff *skb)
  5059. {
  5060. const struct wmi_pdev_temperature_event *ev;
  5061. ev = (struct wmi_pdev_temperature_event *)skb->data;
  5062. if (WARN_ON(skb->len < sizeof(*ev)))
  5063. return -EPROTO;
  5064. ath10k_thermal_event_temperature(ar, __le32_to_cpu(ev->temperature));
  5065. return 0;
  5066. }
  5067. static int ath10k_wmi_event_pdev_bss_chan_info(struct ath10k *ar,
  5068. struct sk_buff *skb)
  5069. {
  5070. struct wmi_pdev_bss_chan_info_event *ev;
  5071. struct survey_info *survey;
  5072. u64 busy, total, tx, rx, rx_bss;
  5073. u32 freq, noise_floor;
  5074. u32 cc_freq_hz = ar->hw_params.channel_counters_freq_hz;
  5075. int idx;
  5076. ev = (struct wmi_pdev_bss_chan_info_event *)skb->data;
  5077. if (WARN_ON(skb->len < sizeof(*ev)))
  5078. return -EPROTO;
  5079. freq = __le32_to_cpu(ev->freq);
  5080. noise_floor = __le32_to_cpu(ev->noise_floor);
  5081. busy = __le64_to_cpu(ev->cycle_busy);
  5082. total = __le64_to_cpu(ev->cycle_total);
  5083. tx = __le64_to_cpu(ev->cycle_tx);
  5084. rx = __le64_to_cpu(ev->cycle_rx);
  5085. rx_bss = __le64_to_cpu(ev->cycle_rx_bss);
  5086. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5087. "wmi event pdev bss chan info:\n freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n",
  5088. freq, noise_floor, busy, total, tx, rx, rx_bss);
  5089. spin_lock_bh(&ar->data_lock);
  5090. idx = freq_to_idx(ar, freq);
  5091. if (idx >= ARRAY_SIZE(ar->survey)) {
  5092. ath10k_warn(ar, "bss chan info: invalid frequency %d (idx %d out of bounds)\n",
  5093. freq, idx);
  5094. goto exit;
  5095. }
  5096. survey = &ar->survey[idx];
  5097. survey->noise = noise_floor;
  5098. survey->time = div_u64(total, cc_freq_hz);
  5099. survey->time_busy = div_u64(busy, cc_freq_hz);
  5100. survey->time_rx = div_u64(rx_bss, cc_freq_hz);
  5101. survey->time_tx = div_u64(tx, cc_freq_hz);
  5102. survey->filled |= (SURVEY_INFO_NOISE_DBM |
  5103. SURVEY_INFO_TIME |
  5104. SURVEY_INFO_TIME_BUSY |
  5105. SURVEY_INFO_TIME_RX |
  5106. SURVEY_INFO_TIME_TX);
  5107. exit:
  5108. spin_unlock_bh(&ar->data_lock);
  5109. complete(&ar->bss_survey_done);
  5110. return 0;
  5111. }
  5112. static inline void ath10k_wmi_queue_set_coverage_class_work(struct ath10k *ar)
  5113. {
  5114. if (ar->hw_params.hw_ops->set_coverage_class) {
  5115. spin_lock_bh(&ar->data_lock);
  5116. /* This call only ensures that the modified coverage class
  5117. * persists in case the firmware sets the registers back to
  5118. * their default value. So calling it is only necessary if the
  5119. * coverage class has a non-zero value.
  5120. */
  5121. if (ar->fw_coverage.coverage_class)
  5122. queue_work(ar->workqueue, &ar->set_coverage_class_work);
  5123. spin_unlock_bh(&ar->data_lock);
  5124. }
  5125. }
  5126. static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb)
  5127. {
  5128. struct wmi_cmd_hdr *cmd_hdr;
  5129. enum wmi_event_id id;
  5130. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  5131. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  5132. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  5133. goto out;
  5134. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  5135. switch (id) {
  5136. case WMI_MGMT_RX_EVENTID:
  5137. ath10k_wmi_event_mgmt_rx(ar, skb);
  5138. /* mgmt_rx() owns the skb now! */
  5139. return;
  5140. case WMI_SCAN_EVENTID:
  5141. ath10k_wmi_event_scan(ar, skb);
  5142. ath10k_wmi_queue_set_coverage_class_work(ar);
  5143. break;
  5144. case WMI_CHAN_INFO_EVENTID:
  5145. ath10k_wmi_event_chan_info(ar, skb);
  5146. break;
  5147. case WMI_ECHO_EVENTID:
  5148. ath10k_wmi_event_echo(ar, skb);
  5149. break;
  5150. case WMI_DEBUG_MESG_EVENTID:
  5151. ath10k_wmi_event_debug_mesg(ar, skb);
  5152. ath10k_wmi_queue_set_coverage_class_work(ar);
  5153. break;
  5154. case WMI_UPDATE_STATS_EVENTID:
  5155. ath10k_wmi_event_update_stats(ar, skb);
  5156. break;
  5157. case WMI_VDEV_START_RESP_EVENTID:
  5158. ath10k_wmi_event_vdev_start_resp(ar, skb);
  5159. ath10k_wmi_queue_set_coverage_class_work(ar);
  5160. break;
  5161. case WMI_VDEV_STOPPED_EVENTID:
  5162. ath10k_wmi_event_vdev_stopped(ar, skb);
  5163. ath10k_wmi_queue_set_coverage_class_work(ar);
  5164. break;
  5165. case WMI_PEER_STA_KICKOUT_EVENTID:
  5166. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  5167. break;
  5168. case WMI_HOST_SWBA_EVENTID:
  5169. ath10k_wmi_event_host_swba(ar, skb);
  5170. break;
  5171. case WMI_TBTTOFFSET_UPDATE_EVENTID:
  5172. ath10k_wmi_event_tbttoffset_update(ar, skb);
  5173. break;
  5174. case WMI_PHYERR_EVENTID:
  5175. ath10k_wmi_event_phyerr(ar, skb);
  5176. break;
  5177. case WMI_ROAM_EVENTID:
  5178. ath10k_wmi_event_roam(ar, skb);
  5179. ath10k_wmi_queue_set_coverage_class_work(ar);
  5180. break;
  5181. case WMI_PROFILE_MATCH:
  5182. ath10k_wmi_event_profile_match(ar, skb);
  5183. break;
  5184. case WMI_DEBUG_PRINT_EVENTID:
  5185. ath10k_wmi_event_debug_print(ar, skb);
  5186. ath10k_wmi_queue_set_coverage_class_work(ar);
  5187. break;
  5188. case WMI_PDEV_QVIT_EVENTID:
  5189. ath10k_wmi_event_pdev_qvit(ar, skb);
  5190. break;
  5191. case WMI_WLAN_PROFILE_DATA_EVENTID:
  5192. ath10k_wmi_event_wlan_profile_data(ar, skb);
  5193. break;
  5194. case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
  5195. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  5196. break;
  5197. case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
  5198. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  5199. break;
  5200. case WMI_RTT_ERROR_REPORT_EVENTID:
  5201. ath10k_wmi_event_rtt_error_report(ar, skb);
  5202. break;
  5203. case WMI_WOW_WAKEUP_HOST_EVENTID:
  5204. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  5205. break;
  5206. case WMI_DCS_INTERFERENCE_EVENTID:
  5207. ath10k_wmi_event_dcs_interference(ar, skb);
  5208. break;
  5209. case WMI_PDEV_TPC_CONFIG_EVENTID:
  5210. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  5211. break;
  5212. case WMI_PDEV_FTM_INTG_EVENTID:
  5213. ath10k_wmi_event_pdev_ftm_intg(ar, skb);
  5214. break;
  5215. case WMI_GTK_OFFLOAD_STATUS_EVENTID:
  5216. ath10k_wmi_event_gtk_offload_status(ar, skb);
  5217. break;
  5218. case WMI_GTK_REKEY_FAIL_EVENTID:
  5219. ath10k_wmi_event_gtk_rekey_fail(ar, skb);
  5220. break;
  5221. case WMI_TX_DELBA_COMPLETE_EVENTID:
  5222. ath10k_wmi_event_delba_complete(ar, skb);
  5223. break;
  5224. case WMI_TX_ADDBA_COMPLETE_EVENTID:
  5225. ath10k_wmi_event_addba_complete(ar, skb);
  5226. break;
  5227. case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
  5228. ath10k_wmi_event_vdev_install_key_complete(ar, skb);
  5229. break;
  5230. case WMI_SERVICE_READY_EVENTID:
  5231. ath10k_wmi_event_service_ready(ar, skb);
  5232. return;
  5233. case WMI_READY_EVENTID:
  5234. ath10k_wmi_event_ready(ar, skb);
  5235. ath10k_wmi_queue_set_coverage_class_work(ar);
  5236. break;
  5237. case WMI_SERVICE_AVAILABLE_EVENTID:
  5238. ath10k_wmi_event_service_available(ar, skb);
  5239. break;
  5240. default:
  5241. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  5242. break;
  5243. }
  5244. out:
  5245. dev_kfree_skb(skb);
  5246. }
  5247. static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb)
  5248. {
  5249. struct wmi_cmd_hdr *cmd_hdr;
  5250. enum wmi_10x_event_id id;
  5251. bool consumed;
  5252. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  5253. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  5254. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  5255. goto out;
  5256. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  5257. consumed = ath10k_tm_event_wmi(ar, id, skb);
  5258. /* Ready event must be handled normally also in UTF mode so that we
  5259. * know the UTF firmware has booted, others we are just bypass WMI
  5260. * events to testmode.
  5261. */
  5262. if (consumed && id != WMI_10X_READY_EVENTID) {
  5263. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5264. "wmi testmode consumed 0x%x\n", id);
  5265. goto out;
  5266. }
  5267. switch (id) {
  5268. case WMI_10X_MGMT_RX_EVENTID:
  5269. ath10k_wmi_event_mgmt_rx(ar, skb);
  5270. /* mgmt_rx() owns the skb now! */
  5271. return;
  5272. case WMI_10X_SCAN_EVENTID:
  5273. ath10k_wmi_event_scan(ar, skb);
  5274. ath10k_wmi_queue_set_coverage_class_work(ar);
  5275. break;
  5276. case WMI_10X_CHAN_INFO_EVENTID:
  5277. ath10k_wmi_event_chan_info(ar, skb);
  5278. break;
  5279. case WMI_10X_ECHO_EVENTID:
  5280. ath10k_wmi_event_echo(ar, skb);
  5281. break;
  5282. case WMI_10X_DEBUG_MESG_EVENTID:
  5283. ath10k_wmi_event_debug_mesg(ar, skb);
  5284. ath10k_wmi_queue_set_coverage_class_work(ar);
  5285. break;
  5286. case WMI_10X_UPDATE_STATS_EVENTID:
  5287. ath10k_wmi_event_update_stats(ar, skb);
  5288. break;
  5289. case WMI_10X_VDEV_START_RESP_EVENTID:
  5290. ath10k_wmi_event_vdev_start_resp(ar, skb);
  5291. ath10k_wmi_queue_set_coverage_class_work(ar);
  5292. break;
  5293. case WMI_10X_VDEV_STOPPED_EVENTID:
  5294. ath10k_wmi_event_vdev_stopped(ar, skb);
  5295. ath10k_wmi_queue_set_coverage_class_work(ar);
  5296. break;
  5297. case WMI_10X_PEER_STA_KICKOUT_EVENTID:
  5298. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  5299. break;
  5300. case WMI_10X_HOST_SWBA_EVENTID:
  5301. ath10k_wmi_event_host_swba(ar, skb);
  5302. break;
  5303. case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
  5304. ath10k_wmi_event_tbttoffset_update(ar, skb);
  5305. break;
  5306. case WMI_10X_PHYERR_EVENTID:
  5307. ath10k_wmi_event_phyerr(ar, skb);
  5308. break;
  5309. case WMI_10X_ROAM_EVENTID:
  5310. ath10k_wmi_event_roam(ar, skb);
  5311. ath10k_wmi_queue_set_coverage_class_work(ar);
  5312. break;
  5313. case WMI_10X_PROFILE_MATCH:
  5314. ath10k_wmi_event_profile_match(ar, skb);
  5315. break;
  5316. case WMI_10X_DEBUG_PRINT_EVENTID:
  5317. ath10k_wmi_event_debug_print(ar, skb);
  5318. ath10k_wmi_queue_set_coverage_class_work(ar);
  5319. break;
  5320. case WMI_10X_PDEV_QVIT_EVENTID:
  5321. ath10k_wmi_event_pdev_qvit(ar, skb);
  5322. break;
  5323. case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
  5324. ath10k_wmi_event_wlan_profile_data(ar, skb);
  5325. break;
  5326. case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
  5327. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  5328. break;
  5329. case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
  5330. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  5331. break;
  5332. case WMI_10X_RTT_ERROR_REPORT_EVENTID:
  5333. ath10k_wmi_event_rtt_error_report(ar, skb);
  5334. break;
  5335. case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
  5336. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  5337. break;
  5338. case WMI_10X_DCS_INTERFERENCE_EVENTID:
  5339. ath10k_wmi_event_dcs_interference(ar, skb);
  5340. break;
  5341. case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
  5342. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  5343. break;
  5344. case WMI_10X_INST_RSSI_STATS_EVENTID:
  5345. ath10k_wmi_event_inst_rssi_stats(ar, skb);
  5346. break;
  5347. case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
  5348. ath10k_wmi_event_vdev_standby_req(ar, skb);
  5349. break;
  5350. case WMI_10X_VDEV_RESUME_REQ_EVENTID:
  5351. ath10k_wmi_event_vdev_resume_req(ar, skb);
  5352. break;
  5353. case WMI_10X_SERVICE_READY_EVENTID:
  5354. ath10k_wmi_event_service_ready(ar, skb);
  5355. return;
  5356. case WMI_10X_READY_EVENTID:
  5357. ath10k_wmi_event_ready(ar, skb);
  5358. ath10k_wmi_queue_set_coverage_class_work(ar);
  5359. break;
  5360. case WMI_10X_PDEV_UTF_EVENTID:
  5361. /* ignore utf events */
  5362. break;
  5363. default:
  5364. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  5365. break;
  5366. }
  5367. out:
  5368. dev_kfree_skb(skb);
  5369. }
  5370. static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb)
  5371. {
  5372. struct wmi_cmd_hdr *cmd_hdr;
  5373. enum wmi_10_2_event_id id;
  5374. bool consumed;
  5375. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  5376. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  5377. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  5378. goto out;
  5379. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  5380. consumed = ath10k_tm_event_wmi(ar, id, skb);
  5381. /* Ready event must be handled normally also in UTF mode so that we
  5382. * know the UTF firmware has booted, others we are just bypass WMI
  5383. * events to testmode.
  5384. */
  5385. if (consumed && id != WMI_10_2_READY_EVENTID) {
  5386. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5387. "wmi testmode consumed 0x%x\n", id);
  5388. goto out;
  5389. }
  5390. switch (id) {
  5391. case WMI_10_2_MGMT_RX_EVENTID:
  5392. ath10k_wmi_event_mgmt_rx(ar, skb);
  5393. /* mgmt_rx() owns the skb now! */
  5394. return;
  5395. case WMI_10_2_SCAN_EVENTID:
  5396. ath10k_wmi_event_scan(ar, skb);
  5397. ath10k_wmi_queue_set_coverage_class_work(ar);
  5398. break;
  5399. case WMI_10_2_CHAN_INFO_EVENTID:
  5400. ath10k_wmi_event_chan_info(ar, skb);
  5401. break;
  5402. case WMI_10_2_ECHO_EVENTID:
  5403. ath10k_wmi_event_echo(ar, skb);
  5404. break;
  5405. case WMI_10_2_DEBUG_MESG_EVENTID:
  5406. ath10k_wmi_event_debug_mesg(ar, skb);
  5407. ath10k_wmi_queue_set_coverage_class_work(ar);
  5408. break;
  5409. case WMI_10_2_UPDATE_STATS_EVENTID:
  5410. ath10k_wmi_event_update_stats(ar, skb);
  5411. break;
  5412. case WMI_10_2_VDEV_START_RESP_EVENTID:
  5413. ath10k_wmi_event_vdev_start_resp(ar, skb);
  5414. ath10k_wmi_queue_set_coverage_class_work(ar);
  5415. break;
  5416. case WMI_10_2_VDEV_STOPPED_EVENTID:
  5417. ath10k_wmi_event_vdev_stopped(ar, skb);
  5418. ath10k_wmi_queue_set_coverage_class_work(ar);
  5419. break;
  5420. case WMI_10_2_PEER_STA_KICKOUT_EVENTID:
  5421. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  5422. break;
  5423. case WMI_10_2_HOST_SWBA_EVENTID:
  5424. ath10k_wmi_event_host_swba(ar, skb);
  5425. break;
  5426. case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID:
  5427. ath10k_wmi_event_tbttoffset_update(ar, skb);
  5428. break;
  5429. case WMI_10_2_PHYERR_EVENTID:
  5430. ath10k_wmi_event_phyerr(ar, skb);
  5431. break;
  5432. case WMI_10_2_ROAM_EVENTID:
  5433. ath10k_wmi_event_roam(ar, skb);
  5434. ath10k_wmi_queue_set_coverage_class_work(ar);
  5435. break;
  5436. case WMI_10_2_PROFILE_MATCH:
  5437. ath10k_wmi_event_profile_match(ar, skb);
  5438. break;
  5439. case WMI_10_2_DEBUG_PRINT_EVENTID:
  5440. ath10k_wmi_event_debug_print(ar, skb);
  5441. ath10k_wmi_queue_set_coverage_class_work(ar);
  5442. break;
  5443. case WMI_10_2_PDEV_QVIT_EVENTID:
  5444. ath10k_wmi_event_pdev_qvit(ar, skb);
  5445. break;
  5446. case WMI_10_2_WLAN_PROFILE_DATA_EVENTID:
  5447. ath10k_wmi_event_wlan_profile_data(ar, skb);
  5448. break;
  5449. case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID:
  5450. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  5451. break;
  5452. case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID:
  5453. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  5454. break;
  5455. case WMI_10_2_RTT_ERROR_REPORT_EVENTID:
  5456. ath10k_wmi_event_rtt_error_report(ar, skb);
  5457. break;
  5458. case WMI_10_2_WOW_WAKEUP_HOST_EVENTID:
  5459. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  5460. break;
  5461. case WMI_10_2_DCS_INTERFERENCE_EVENTID:
  5462. ath10k_wmi_event_dcs_interference(ar, skb);
  5463. break;
  5464. case WMI_10_2_PDEV_TPC_CONFIG_EVENTID:
  5465. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  5466. break;
  5467. case WMI_10_2_INST_RSSI_STATS_EVENTID:
  5468. ath10k_wmi_event_inst_rssi_stats(ar, skb);
  5469. break;
  5470. case WMI_10_2_VDEV_STANDBY_REQ_EVENTID:
  5471. ath10k_wmi_event_vdev_standby_req(ar, skb);
  5472. ath10k_wmi_queue_set_coverage_class_work(ar);
  5473. break;
  5474. case WMI_10_2_VDEV_RESUME_REQ_EVENTID:
  5475. ath10k_wmi_event_vdev_resume_req(ar, skb);
  5476. ath10k_wmi_queue_set_coverage_class_work(ar);
  5477. break;
  5478. case WMI_10_2_SERVICE_READY_EVENTID:
  5479. ath10k_wmi_event_service_ready(ar, skb);
  5480. return;
  5481. case WMI_10_2_READY_EVENTID:
  5482. ath10k_wmi_event_ready(ar, skb);
  5483. ath10k_wmi_queue_set_coverage_class_work(ar);
  5484. break;
  5485. case WMI_10_2_PDEV_TEMPERATURE_EVENTID:
  5486. ath10k_wmi_event_temperature(ar, skb);
  5487. break;
  5488. case WMI_10_2_PDEV_BSS_CHAN_INFO_EVENTID:
  5489. ath10k_wmi_event_pdev_bss_chan_info(ar, skb);
  5490. break;
  5491. case WMI_10_2_RTT_KEEPALIVE_EVENTID:
  5492. case WMI_10_2_GPIO_INPUT_EVENTID:
  5493. case WMI_10_2_PEER_RATECODE_LIST_EVENTID:
  5494. case WMI_10_2_GENERIC_BUFFER_EVENTID:
  5495. case WMI_10_2_MCAST_BUF_RELEASE_EVENTID:
  5496. case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID:
  5497. case WMI_10_2_WDS_PEER_EVENTID:
  5498. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5499. "received event id %d not implemented\n", id);
  5500. break;
  5501. case WMI_10_2_PEER_STA_PS_STATECHG_EVENTID:
  5502. ath10k_wmi_event_peer_sta_ps_state_chg(ar, skb);
  5503. break;
  5504. default:
  5505. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  5506. break;
  5507. }
  5508. out:
  5509. dev_kfree_skb(skb);
  5510. }
  5511. static void ath10k_wmi_10_4_op_rx(struct ath10k *ar, struct sk_buff *skb)
  5512. {
  5513. struct wmi_cmd_hdr *cmd_hdr;
  5514. enum wmi_10_4_event_id id;
  5515. bool consumed;
  5516. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  5517. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  5518. if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr)))
  5519. goto out;
  5520. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  5521. consumed = ath10k_tm_event_wmi(ar, id, skb);
  5522. /* Ready event must be handled normally also in UTF mode so that we
  5523. * know the UTF firmware has booted, others we are just bypass WMI
  5524. * events to testmode.
  5525. */
  5526. if (consumed && id != WMI_10_4_READY_EVENTID) {
  5527. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5528. "wmi testmode consumed 0x%x\n", id);
  5529. goto out;
  5530. }
  5531. switch (id) {
  5532. case WMI_10_4_MGMT_RX_EVENTID:
  5533. ath10k_wmi_event_mgmt_rx(ar, skb);
  5534. /* mgmt_rx() owns the skb now! */
  5535. return;
  5536. case WMI_10_4_ECHO_EVENTID:
  5537. ath10k_wmi_event_echo(ar, skb);
  5538. break;
  5539. case WMI_10_4_DEBUG_MESG_EVENTID:
  5540. ath10k_wmi_event_debug_mesg(ar, skb);
  5541. ath10k_wmi_queue_set_coverage_class_work(ar);
  5542. break;
  5543. case WMI_10_4_SERVICE_READY_EVENTID:
  5544. ath10k_wmi_event_service_ready(ar, skb);
  5545. return;
  5546. case WMI_10_4_SCAN_EVENTID:
  5547. ath10k_wmi_event_scan(ar, skb);
  5548. ath10k_wmi_queue_set_coverage_class_work(ar);
  5549. break;
  5550. case WMI_10_4_CHAN_INFO_EVENTID:
  5551. ath10k_wmi_event_chan_info(ar, skb);
  5552. break;
  5553. case WMI_10_4_PHYERR_EVENTID:
  5554. ath10k_wmi_event_phyerr(ar, skb);
  5555. break;
  5556. case WMI_10_4_READY_EVENTID:
  5557. ath10k_wmi_event_ready(ar, skb);
  5558. ath10k_wmi_queue_set_coverage_class_work(ar);
  5559. break;
  5560. case WMI_10_4_PEER_STA_KICKOUT_EVENTID:
  5561. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  5562. break;
  5563. case WMI_10_4_ROAM_EVENTID:
  5564. ath10k_wmi_event_roam(ar, skb);
  5565. ath10k_wmi_queue_set_coverage_class_work(ar);
  5566. break;
  5567. case WMI_10_4_HOST_SWBA_EVENTID:
  5568. ath10k_wmi_event_host_swba(ar, skb);
  5569. break;
  5570. case WMI_10_4_TBTTOFFSET_UPDATE_EVENTID:
  5571. ath10k_wmi_event_tbttoffset_update(ar, skb);
  5572. break;
  5573. case WMI_10_4_DEBUG_PRINT_EVENTID:
  5574. ath10k_wmi_event_debug_print(ar, skb);
  5575. ath10k_wmi_queue_set_coverage_class_work(ar);
  5576. break;
  5577. case WMI_10_4_VDEV_START_RESP_EVENTID:
  5578. ath10k_wmi_event_vdev_start_resp(ar, skb);
  5579. ath10k_wmi_queue_set_coverage_class_work(ar);
  5580. break;
  5581. case WMI_10_4_VDEV_STOPPED_EVENTID:
  5582. ath10k_wmi_event_vdev_stopped(ar, skb);
  5583. ath10k_wmi_queue_set_coverage_class_work(ar);
  5584. break;
  5585. case WMI_10_4_WOW_WAKEUP_HOST_EVENTID:
  5586. case WMI_10_4_PEER_RATECODE_LIST_EVENTID:
  5587. case WMI_10_4_WDS_PEER_EVENTID:
  5588. case WMI_10_4_DEBUG_FATAL_CONDITION_EVENTID:
  5589. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5590. "received event id %d not implemented\n", id);
  5591. break;
  5592. case WMI_10_4_UPDATE_STATS_EVENTID:
  5593. ath10k_wmi_event_update_stats(ar, skb);
  5594. break;
  5595. case WMI_10_4_PDEV_TEMPERATURE_EVENTID:
  5596. ath10k_wmi_event_temperature(ar, skb);
  5597. break;
  5598. case WMI_10_4_PDEV_BSS_CHAN_INFO_EVENTID:
  5599. ath10k_wmi_event_pdev_bss_chan_info(ar, skb);
  5600. break;
  5601. case WMI_10_4_PDEV_TPC_CONFIG_EVENTID:
  5602. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  5603. break;
  5604. case WMI_10_4_TDLS_PEER_EVENTID:
  5605. ath10k_wmi_handle_tdls_peer_event(ar, skb);
  5606. break;
  5607. case WMI_10_4_PDEV_TPC_TABLE_EVENTID:
  5608. ath10k_wmi_event_tpc_final_table(ar, skb);
  5609. break;
  5610. case WMI_10_4_DFS_STATUS_CHECK_EVENTID:
  5611. ath10k_wmi_event_dfs_status_check(ar, skb);
  5612. break;
  5613. case WMI_10_4_PEER_STA_PS_STATECHG_EVENTID:
  5614. ath10k_wmi_event_peer_sta_ps_state_chg(ar, skb);
  5615. break;
  5616. default:
  5617. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  5618. break;
  5619. }
  5620. out:
  5621. dev_kfree_skb(skb);
  5622. }
  5623. static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
  5624. {
  5625. int ret;
  5626. ret = ath10k_wmi_rx(ar, skb);
  5627. if (ret)
  5628. ath10k_warn(ar, "failed to process wmi rx: %d\n", ret);
  5629. }
  5630. int ath10k_wmi_connect(struct ath10k *ar)
  5631. {
  5632. int status;
  5633. struct ath10k_htc_svc_conn_req conn_req;
  5634. struct ath10k_htc_svc_conn_resp conn_resp;
  5635. memset(&ar->wmi.svc_map, 0, sizeof(ar->wmi.svc_map));
  5636. memset(&conn_req, 0, sizeof(conn_req));
  5637. memset(&conn_resp, 0, sizeof(conn_resp));
  5638. /* these fields are the same for all service endpoints */
  5639. conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
  5640. conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
  5641. conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
  5642. /* connect to control service */
  5643. conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
  5644. status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
  5645. if (status) {
  5646. ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n",
  5647. status);
  5648. return status;
  5649. }
  5650. ar->wmi.eid = conn_resp.eid;
  5651. return 0;
  5652. }
  5653. static struct sk_buff *
  5654. ath10k_wmi_op_gen_pdev_set_base_macaddr(struct ath10k *ar,
  5655. const u8 macaddr[ETH_ALEN])
  5656. {
  5657. struct wmi_pdev_set_base_macaddr_cmd *cmd;
  5658. struct sk_buff *skb;
  5659. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5660. if (!skb)
  5661. return ERR_PTR(-ENOMEM);
  5662. cmd = (struct wmi_pdev_set_base_macaddr_cmd *)skb->data;
  5663. ether_addr_copy(cmd->mac_addr.addr, macaddr);
  5664. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5665. "wmi pdev basemac %pM\n", macaddr);
  5666. return skb;
  5667. }
  5668. static struct sk_buff *
  5669. ath10k_wmi_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd5g,
  5670. u16 ctl2g, u16 ctl5g,
  5671. enum wmi_dfs_region dfs_reg)
  5672. {
  5673. struct wmi_pdev_set_regdomain_cmd *cmd;
  5674. struct sk_buff *skb;
  5675. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5676. if (!skb)
  5677. return ERR_PTR(-ENOMEM);
  5678. cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
  5679. cmd->reg_domain = __cpu_to_le32(rd);
  5680. cmd->reg_domain_2G = __cpu_to_le32(rd2g);
  5681. cmd->reg_domain_5G = __cpu_to_le32(rd5g);
  5682. cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
  5683. cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
  5684. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5685. "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
  5686. rd, rd2g, rd5g, ctl2g, ctl5g);
  5687. return skb;
  5688. }
  5689. static struct sk_buff *
  5690. ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16
  5691. rd5g, u16 ctl2g, u16 ctl5g,
  5692. enum wmi_dfs_region dfs_reg)
  5693. {
  5694. struct wmi_pdev_set_regdomain_cmd_10x *cmd;
  5695. struct sk_buff *skb;
  5696. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5697. if (!skb)
  5698. return ERR_PTR(-ENOMEM);
  5699. cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data;
  5700. cmd->reg_domain = __cpu_to_le32(rd);
  5701. cmd->reg_domain_2G = __cpu_to_le32(rd2g);
  5702. cmd->reg_domain_5G = __cpu_to_le32(rd5g);
  5703. cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
  5704. cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
  5705. cmd->dfs_domain = __cpu_to_le32(dfs_reg);
  5706. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5707. "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n",
  5708. rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg);
  5709. return skb;
  5710. }
  5711. static struct sk_buff *
  5712. ath10k_wmi_op_gen_pdev_suspend(struct ath10k *ar, u32 suspend_opt)
  5713. {
  5714. struct wmi_pdev_suspend_cmd *cmd;
  5715. struct sk_buff *skb;
  5716. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5717. if (!skb)
  5718. return ERR_PTR(-ENOMEM);
  5719. cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
  5720. cmd->suspend_opt = __cpu_to_le32(suspend_opt);
  5721. return skb;
  5722. }
  5723. static struct sk_buff *
  5724. ath10k_wmi_op_gen_pdev_resume(struct ath10k *ar)
  5725. {
  5726. struct sk_buff *skb;
  5727. skb = ath10k_wmi_alloc_skb(ar, 0);
  5728. if (!skb)
  5729. return ERR_PTR(-ENOMEM);
  5730. return skb;
  5731. }
  5732. static struct sk_buff *
  5733. ath10k_wmi_op_gen_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
  5734. {
  5735. struct wmi_pdev_set_param_cmd *cmd;
  5736. struct sk_buff *skb;
  5737. if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
  5738. ath10k_warn(ar, "pdev param %d not supported by firmware\n",
  5739. id);
  5740. return ERR_PTR(-EOPNOTSUPP);
  5741. }
  5742. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5743. if (!skb)
  5744. return ERR_PTR(-ENOMEM);
  5745. cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
  5746. cmd->param_id = __cpu_to_le32(id);
  5747. cmd->param_value = __cpu_to_le32(value);
  5748. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
  5749. id, value);
  5750. return skb;
  5751. }
  5752. void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
  5753. struct wmi_host_mem_chunks *chunks)
  5754. {
  5755. struct host_memory_chunk *chunk;
  5756. int i;
  5757. chunks->count = __cpu_to_le32(ar->wmi.num_mem_chunks);
  5758. for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
  5759. chunk = &chunks->items[i];
  5760. chunk->ptr = __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
  5761. chunk->size = __cpu_to_le32(ar->wmi.mem_chunks[i].len);
  5762. chunk->req_id = __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
  5763. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5764. "wmi chunk %d len %d requested, addr 0x%llx\n",
  5765. i,
  5766. ar->wmi.mem_chunks[i].len,
  5767. (unsigned long long)ar->wmi.mem_chunks[i].paddr);
  5768. }
  5769. }
  5770. static struct sk_buff *ath10k_wmi_op_gen_init(struct ath10k *ar)
  5771. {
  5772. struct wmi_init_cmd *cmd;
  5773. struct sk_buff *buf;
  5774. struct wmi_resource_config config = {};
  5775. u32 val;
  5776. config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
  5777. config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS);
  5778. config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
  5779. config.num_offload_reorder_bufs =
  5780. __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
  5781. config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
  5782. config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
  5783. config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
  5784. config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
  5785. config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
  5786. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  5787. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  5788. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  5789. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
  5790. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  5791. config.scan_max_pending_reqs =
  5792. __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
  5793. config.bmiss_offload_max_vdev =
  5794. __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
  5795. config.roam_offload_max_vdev =
  5796. __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
  5797. config.roam_offload_max_ap_profiles =
  5798. __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
  5799. config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
  5800. config.num_mcast_table_elems =
  5801. __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
  5802. config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
  5803. config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
  5804. config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
  5805. config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
  5806. config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
  5807. val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  5808. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  5809. config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
  5810. config.gtk_offload_max_vdev =
  5811. __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
  5812. config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
  5813. config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
  5814. buf = ath10k_wmi_alloc_skb(ar, struct_size(cmd, mem_chunks.items,
  5815. ar->wmi.num_mem_chunks));
  5816. if (!buf)
  5817. return ERR_PTR(-ENOMEM);
  5818. cmd = (struct wmi_init_cmd *)buf->data;
  5819. memcpy(&cmd->resource_config, &config, sizeof(config));
  5820. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5821. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n");
  5822. return buf;
  5823. }
  5824. static struct sk_buff *ath10k_wmi_10_1_op_gen_init(struct ath10k *ar)
  5825. {
  5826. struct wmi_init_cmd_10x *cmd;
  5827. struct sk_buff *buf;
  5828. struct wmi_resource_config_10x config = {};
  5829. u32 val;
  5830. config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
  5831. config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
  5832. config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
  5833. config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
  5834. config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
  5835. config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
  5836. config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
  5837. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5838. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5839. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5840. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
  5841. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  5842. config.scan_max_pending_reqs =
  5843. __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
  5844. config.bmiss_offload_max_vdev =
  5845. __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
  5846. config.roam_offload_max_vdev =
  5847. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
  5848. config.roam_offload_max_ap_profiles =
  5849. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
  5850. config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
  5851. config.num_mcast_table_elems =
  5852. __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
  5853. config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
  5854. config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
  5855. config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
  5856. config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
  5857. config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
  5858. val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  5859. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  5860. config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
  5861. config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
  5862. config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
  5863. buf = ath10k_wmi_alloc_skb(ar, struct_size(cmd, mem_chunks.items,
  5864. ar->wmi.num_mem_chunks));
  5865. if (!buf)
  5866. return ERR_PTR(-ENOMEM);
  5867. cmd = (struct wmi_init_cmd_10x *)buf->data;
  5868. memcpy(&cmd->resource_config, &config, sizeof(config));
  5869. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5870. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n");
  5871. return buf;
  5872. }
  5873. static struct sk_buff *ath10k_wmi_10_2_op_gen_init(struct ath10k *ar)
  5874. {
  5875. struct wmi_init_cmd_10_2 *cmd;
  5876. struct sk_buff *buf;
  5877. struct wmi_resource_config_10x config = {};
  5878. u32 val, features;
  5879. config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
  5880. config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
  5881. if (ath10k_peer_stats_enabled(ar)) {
  5882. config.num_peers = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_PEERS);
  5883. config.num_tids = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_TIDS);
  5884. } else {
  5885. config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
  5886. config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
  5887. }
  5888. config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
  5889. config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
  5890. config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
  5891. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5892. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5893. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5894. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
  5895. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  5896. config.scan_max_pending_reqs =
  5897. __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
  5898. config.bmiss_offload_max_vdev =
  5899. __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
  5900. config.roam_offload_max_vdev =
  5901. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
  5902. config.roam_offload_max_ap_profiles =
  5903. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
  5904. config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
  5905. config.num_mcast_table_elems =
  5906. __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
  5907. config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
  5908. config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
  5909. config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
  5910. config.dma_burst_size = __cpu_to_le32(TARGET_10_2_DMA_BURST_SIZE);
  5911. config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
  5912. val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  5913. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  5914. config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
  5915. config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
  5916. config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
  5917. buf = ath10k_wmi_alloc_skb(ar, struct_size(cmd, mem_chunks.items,
  5918. ar->wmi.num_mem_chunks));
  5919. if (!buf)
  5920. return ERR_PTR(-ENOMEM);
  5921. cmd = (struct wmi_init_cmd_10_2 *)buf->data;
  5922. features = WMI_10_2_RX_BATCH_MODE;
  5923. if (test_bit(ATH10K_FLAG_BTCOEX, &ar->dev_flags) &&
  5924. test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map))
  5925. features |= WMI_10_2_COEX_GPIO;
  5926. if (ath10k_peer_stats_enabled(ar))
  5927. features |= WMI_10_2_PEER_STATS;
  5928. if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
  5929. features |= WMI_10_2_BSS_CHAN_INFO;
  5930. cmd->resource_config.feature_mask = __cpu_to_le32(features);
  5931. memcpy(&cmd->resource_config.common, &config, sizeof(config));
  5932. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5933. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n");
  5934. return buf;
  5935. }
  5936. static struct sk_buff *ath10k_wmi_10_4_op_gen_init(struct ath10k *ar)
  5937. {
  5938. struct wmi_init_cmd_10_4 *cmd;
  5939. struct sk_buff *buf;
  5940. struct wmi_resource_config_10_4 config = {};
  5941. config.num_vdevs = __cpu_to_le32(ar->max_num_vdevs);
  5942. config.num_peers = __cpu_to_le32(ar->max_num_peers);
  5943. config.num_active_peers = __cpu_to_le32(ar->num_active_peers);
  5944. config.num_tids = __cpu_to_le32(ar->num_tids);
  5945. config.num_offload_peers = __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_PEERS);
  5946. config.num_offload_reorder_buffs =
  5947. __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_REORDER_BUFFS);
  5948. config.num_peer_keys = __cpu_to_le32(TARGET_10_4_NUM_PEER_KEYS);
  5949. config.ast_skid_limit = __cpu_to_le32(TARGET_10_4_AST_SKID_LIMIT);
  5950. config.tx_chain_mask = __cpu_to_le32(ar->hw_params.tx_chain_mask);
  5951. config.rx_chain_mask = __cpu_to_le32(ar->hw_params.rx_chain_mask);
  5952. config.rx_timeout_pri[0] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
  5953. config.rx_timeout_pri[1] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
  5954. config.rx_timeout_pri[2] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
  5955. config.rx_timeout_pri[3] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_HI_PRI);
  5956. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  5957. config.scan_max_pending_req = __cpu_to_le32(TARGET_10_4_SCAN_MAX_REQS);
  5958. config.bmiss_offload_max_vdev =
  5959. __cpu_to_le32(TARGET_10_4_BMISS_OFFLOAD_MAX_VDEV);
  5960. config.roam_offload_max_vdev =
  5961. __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_VDEV);
  5962. config.roam_offload_max_ap_profiles =
  5963. __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_PROFILES);
  5964. config.num_mcast_groups = __cpu_to_le32(TARGET_10_4_NUM_MCAST_GROUPS);
  5965. config.num_mcast_table_elems =
  5966. __cpu_to_le32(TARGET_10_4_NUM_MCAST_TABLE_ELEMS);
  5967. config.mcast2ucast_mode = __cpu_to_le32(TARGET_10_4_MCAST2UCAST_MODE);
  5968. config.tx_dbg_log_size = __cpu_to_le32(TARGET_10_4_TX_DBG_LOG_SIZE);
  5969. config.num_wds_entries = __cpu_to_le32(TARGET_10_4_NUM_WDS_ENTRIES);
  5970. config.dma_burst_size = __cpu_to_le32(TARGET_10_4_DMA_BURST_SIZE);
  5971. config.mac_aggr_delim = __cpu_to_le32(TARGET_10_4_MAC_AGGR_DELIM);
  5972. config.rx_skip_defrag_timeout_dup_detection_check =
  5973. __cpu_to_le32(TARGET_10_4_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK);
  5974. config.vow_config = __cpu_to_le32(TARGET_10_4_VOW_CONFIG);
  5975. config.gtk_offload_max_vdev =
  5976. __cpu_to_le32(TARGET_10_4_GTK_OFFLOAD_MAX_VDEV);
  5977. config.num_msdu_desc = __cpu_to_le32(ar->htt.max_num_pending_tx);
  5978. config.max_frag_entries = __cpu_to_le32(TARGET_10_4_11AC_TX_MAX_FRAGS);
  5979. config.max_peer_ext_stats =
  5980. __cpu_to_le32(TARGET_10_4_MAX_PEER_EXT_STATS);
  5981. config.smart_ant_cap = __cpu_to_le32(TARGET_10_4_SMART_ANT_CAP);
  5982. config.bk_minfree = __cpu_to_le32(TARGET_10_4_BK_MIN_FREE);
  5983. config.be_minfree = __cpu_to_le32(TARGET_10_4_BE_MIN_FREE);
  5984. config.vi_minfree = __cpu_to_le32(TARGET_10_4_VI_MIN_FREE);
  5985. config.vo_minfree = __cpu_to_le32(TARGET_10_4_VO_MIN_FREE);
  5986. config.rx_batchmode = __cpu_to_le32(TARGET_10_4_RX_BATCH_MODE);
  5987. config.tt_support =
  5988. __cpu_to_le32(TARGET_10_4_THERMAL_THROTTLING_CONFIG);
  5989. config.atf_config = __cpu_to_le32(TARGET_10_4_ATF_CONFIG);
  5990. config.iphdr_pad_config = __cpu_to_le32(TARGET_10_4_IPHDR_PAD_CONFIG);
  5991. config.qwrap_config = __cpu_to_le32(TARGET_10_4_QWRAP_CONFIG);
  5992. buf = ath10k_wmi_alloc_skb(ar, struct_size(cmd, mem_chunks.items,
  5993. ar->wmi.num_mem_chunks));
  5994. if (!buf)
  5995. return ERR_PTR(-ENOMEM);
  5996. cmd = (struct wmi_init_cmd_10_4 *)buf->data;
  5997. memcpy(&cmd->resource_config, &config, sizeof(config));
  5998. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5999. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.4\n");
  6000. return buf;
  6001. }
  6002. int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg)
  6003. {
  6004. if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
  6005. return -EINVAL;
  6006. if (arg->n_channels > ARRAY_SIZE(arg->channels))
  6007. return -EINVAL;
  6008. if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
  6009. return -EINVAL;
  6010. if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
  6011. return -EINVAL;
  6012. return 0;
  6013. }
  6014. static size_t
  6015. ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg *arg)
  6016. {
  6017. int len = 0;
  6018. if (arg->ie_len) {
  6019. len += sizeof(struct wmi_ie_data);
  6020. len += roundup(arg->ie_len, 4);
  6021. }
  6022. if (arg->n_channels) {
  6023. len += sizeof(struct wmi_chan_list);
  6024. len += sizeof(__le32) * arg->n_channels;
  6025. }
  6026. if (arg->n_ssids) {
  6027. len += sizeof(struct wmi_ssid_list);
  6028. len += sizeof(struct wmi_ssid) * arg->n_ssids;
  6029. }
  6030. if (arg->n_bssids) {
  6031. len += sizeof(struct wmi_bssid_list);
  6032. len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
  6033. }
  6034. return len;
  6035. }
  6036. void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
  6037. const struct wmi_start_scan_arg *arg)
  6038. {
  6039. u32 scan_id;
  6040. u32 scan_req_id;
  6041. scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
  6042. scan_id |= arg->scan_id;
  6043. scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
  6044. scan_req_id |= arg->scan_req_id;
  6045. cmn->scan_id = __cpu_to_le32(scan_id);
  6046. cmn->scan_req_id = __cpu_to_le32(scan_req_id);
  6047. cmn->vdev_id = __cpu_to_le32(arg->vdev_id);
  6048. cmn->scan_priority = __cpu_to_le32(arg->scan_priority);
  6049. cmn->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
  6050. cmn->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
  6051. cmn->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
  6052. cmn->min_rest_time = __cpu_to_le32(arg->min_rest_time);
  6053. cmn->max_rest_time = __cpu_to_le32(arg->max_rest_time);
  6054. cmn->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
  6055. cmn->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
  6056. cmn->idle_time = __cpu_to_le32(arg->idle_time);
  6057. cmn->max_scan_time = __cpu_to_le32(arg->max_scan_time);
  6058. cmn->probe_delay = __cpu_to_le32(arg->probe_delay);
  6059. cmn->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
  6060. }
  6061. static void
  6062. ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs *tlvs,
  6063. const struct wmi_start_scan_arg *arg)
  6064. {
  6065. struct wmi_ie_data *ie;
  6066. struct wmi_chan_list *channels;
  6067. struct wmi_ssid_list *ssids;
  6068. struct wmi_bssid_list *bssids;
  6069. void *ptr = tlvs->tlvs;
  6070. int i;
  6071. if (arg->n_channels) {
  6072. channels = ptr;
  6073. channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
  6074. channels->num_chan = __cpu_to_le32(arg->n_channels);
  6075. for (i = 0; i < arg->n_channels; i++)
  6076. channels->channel_list[i].freq =
  6077. __cpu_to_le16(arg->channels[i]);
  6078. ptr += sizeof(*channels);
  6079. ptr += sizeof(__le32) * arg->n_channels;
  6080. }
  6081. if (arg->n_ssids) {
  6082. ssids = ptr;
  6083. ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
  6084. ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
  6085. for (i = 0; i < arg->n_ssids; i++) {
  6086. ssids->ssids[i].ssid_len =
  6087. __cpu_to_le32(arg->ssids[i].len);
  6088. memcpy(&ssids->ssids[i].ssid,
  6089. arg->ssids[i].ssid,
  6090. arg->ssids[i].len);
  6091. }
  6092. ptr += sizeof(*ssids);
  6093. ptr += sizeof(struct wmi_ssid) * arg->n_ssids;
  6094. }
  6095. if (arg->n_bssids) {
  6096. bssids = ptr;
  6097. bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
  6098. bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
  6099. for (i = 0; i < arg->n_bssids; i++)
  6100. ether_addr_copy(bssids->bssid_list[i].addr,
  6101. arg->bssids[i].bssid);
  6102. ptr += sizeof(*bssids);
  6103. ptr += sizeof(struct wmi_mac_addr) * arg->n_bssids;
  6104. }
  6105. if (arg->ie_len) {
  6106. ie = ptr;
  6107. ie->tag = __cpu_to_le32(WMI_IE_TAG);
  6108. ie->ie_len = __cpu_to_le32(arg->ie_len);
  6109. memcpy(ie->ie_data, arg->ie, arg->ie_len);
  6110. ptr += sizeof(*ie);
  6111. ptr += roundup(arg->ie_len, 4);
  6112. }
  6113. }
  6114. static struct sk_buff *
  6115. ath10k_wmi_op_gen_start_scan(struct ath10k *ar,
  6116. const struct wmi_start_scan_arg *arg)
  6117. {
  6118. struct wmi_start_scan_cmd *cmd;
  6119. struct sk_buff *skb;
  6120. size_t len;
  6121. int ret;
  6122. ret = ath10k_wmi_start_scan_verify(arg);
  6123. if (ret)
  6124. return ERR_PTR(ret);
  6125. len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
  6126. skb = ath10k_wmi_alloc_skb(ar, len);
  6127. if (!skb)
  6128. return ERR_PTR(-ENOMEM);
  6129. cmd = (struct wmi_start_scan_cmd *)skb->data;
  6130. ath10k_wmi_put_start_scan_common(&cmd->common, arg);
  6131. ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
  6132. cmd->burst_duration_ms = __cpu_to_le32(0);
  6133. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n");
  6134. return skb;
  6135. }
  6136. static struct sk_buff *
  6137. ath10k_wmi_10x_op_gen_start_scan(struct ath10k *ar,
  6138. const struct wmi_start_scan_arg *arg)
  6139. {
  6140. struct wmi_10x_start_scan_cmd *cmd;
  6141. struct sk_buff *skb;
  6142. size_t len;
  6143. int ret;
  6144. ret = ath10k_wmi_start_scan_verify(arg);
  6145. if (ret)
  6146. return ERR_PTR(ret);
  6147. len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
  6148. skb = ath10k_wmi_alloc_skb(ar, len);
  6149. if (!skb)
  6150. return ERR_PTR(-ENOMEM);
  6151. cmd = (struct wmi_10x_start_scan_cmd *)skb->data;
  6152. ath10k_wmi_put_start_scan_common(&cmd->common, arg);
  6153. ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
  6154. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi 10x start scan\n");
  6155. return skb;
  6156. }
  6157. void ath10k_wmi_start_scan_init(struct ath10k *ar,
  6158. struct wmi_start_scan_arg *arg)
  6159. {
  6160. /* setup commonly used values */
  6161. arg->scan_req_id = 1;
  6162. arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
  6163. arg->dwell_time_active = 50;
  6164. arg->dwell_time_passive = 150;
  6165. arg->min_rest_time = 50;
  6166. arg->max_rest_time = 500;
  6167. arg->repeat_probe_time = 0;
  6168. arg->probe_spacing_time = 0;
  6169. arg->idle_time = 0;
  6170. arg->max_scan_time = 20000;
  6171. arg->probe_delay = 5;
  6172. arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
  6173. | WMI_SCAN_EVENT_COMPLETED
  6174. | WMI_SCAN_EVENT_BSS_CHANNEL
  6175. | WMI_SCAN_EVENT_FOREIGN_CHANNEL
  6176. | WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT
  6177. | WMI_SCAN_EVENT_DEQUEUED;
  6178. arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
  6179. arg->n_bssids = 1;
  6180. arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
  6181. }
  6182. static struct sk_buff *
  6183. ath10k_wmi_op_gen_stop_scan(struct ath10k *ar,
  6184. const struct wmi_stop_scan_arg *arg)
  6185. {
  6186. struct wmi_stop_scan_cmd *cmd;
  6187. struct sk_buff *skb;
  6188. u32 scan_id;
  6189. u32 req_id;
  6190. if (arg->req_id > 0xFFF)
  6191. return ERR_PTR(-EINVAL);
  6192. if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
  6193. return ERR_PTR(-EINVAL);
  6194. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6195. if (!skb)
  6196. return ERR_PTR(-ENOMEM);
  6197. scan_id = arg->u.scan_id;
  6198. scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
  6199. req_id = arg->req_id;
  6200. req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
  6201. cmd = (struct wmi_stop_scan_cmd *)skb->data;
  6202. cmd->req_type = __cpu_to_le32(arg->req_type);
  6203. cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
  6204. cmd->scan_id = __cpu_to_le32(scan_id);
  6205. cmd->scan_req_id = __cpu_to_le32(req_id);
  6206. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6207. "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
  6208. arg->req_id, arg->req_type, arg->u.scan_id);
  6209. return skb;
  6210. }
  6211. static struct sk_buff *
  6212. ath10k_wmi_op_gen_vdev_create(struct ath10k *ar, u32 vdev_id,
  6213. enum wmi_vdev_type type,
  6214. enum wmi_vdev_subtype subtype,
  6215. const u8 macaddr[ETH_ALEN])
  6216. {
  6217. struct wmi_vdev_create_cmd *cmd;
  6218. struct sk_buff *skb;
  6219. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6220. if (!skb)
  6221. return ERR_PTR(-ENOMEM);
  6222. cmd = (struct wmi_vdev_create_cmd *)skb->data;
  6223. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6224. cmd->vdev_type = __cpu_to_le32(type);
  6225. cmd->vdev_subtype = __cpu_to_le32(subtype);
  6226. ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
  6227. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6228. "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
  6229. vdev_id, type, subtype, macaddr);
  6230. return skb;
  6231. }
  6232. static struct sk_buff *
  6233. ath10k_wmi_op_gen_vdev_delete(struct ath10k *ar, u32 vdev_id)
  6234. {
  6235. struct wmi_vdev_delete_cmd *cmd;
  6236. struct sk_buff *skb;
  6237. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6238. if (!skb)
  6239. return ERR_PTR(-ENOMEM);
  6240. cmd = (struct wmi_vdev_delete_cmd *)skb->data;
  6241. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6242. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6243. "WMI vdev delete id %d\n", vdev_id);
  6244. return skb;
  6245. }
  6246. static struct sk_buff *
  6247. ath10k_wmi_op_gen_vdev_start(struct ath10k *ar,
  6248. const struct wmi_vdev_start_request_arg *arg,
  6249. bool restart)
  6250. {
  6251. struct wmi_vdev_start_request_cmd *cmd;
  6252. struct sk_buff *skb;
  6253. const char *cmdname;
  6254. u32 flags = 0;
  6255. if (WARN_ON(arg->hidden_ssid && !arg->ssid))
  6256. return ERR_PTR(-EINVAL);
  6257. if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
  6258. return ERR_PTR(-EINVAL);
  6259. if (restart)
  6260. cmdname = "restart";
  6261. else
  6262. cmdname = "start";
  6263. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6264. if (!skb)
  6265. return ERR_PTR(-ENOMEM);
  6266. if (arg->hidden_ssid)
  6267. flags |= WMI_VDEV_START_HIDDEN_SSID;
  6268. if (arg->pmf_enabled)
  6269. flags |= WMI_VDEV_START_PMF_ENABLED;
  6270. cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
  6271. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  6272. cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
  6273. cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
  6274. cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
  6275. cmd->flags = __cpu_to_le32(flags);
  6276. cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
  6277. cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
  6278. if (arg->ssid) {
  6279. cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
  6280. memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
  6281. }
  6282. ath10k_wmi_put_wmi_channel(ar, &cmd->chan, &arg->channel);
  6283. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6284. "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n",
  6285. cmdname, arg->vdev_id,
  6286. flags, arg->channel.freq, arg->channel.mode,
  6287. cmd->chan.flags, arg->channel.max_power);
  6288. return skb;
  6289. }
  6290. static struct sk_buff *
  6291. ath10k_wmi_op_gen_vdev_stop(struct ath10k *ar, u32 vdev_id)
  6292. {
  6293. struct wmi_vdev_stop_cmd *cmd;
  6294. struct sk_buff *skb;
  6295. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6296. if (!skb)
  6297. return ERR_PTR(-ENOMEM);
  6298. cmd = (struct wmi_vdev_stop_cmd *)skb->data;
  6299. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6300. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
  6301. return skb;
  6302. }
  6303. static struct sk_buff *
  6304. ath10k_wmi_op_gen_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid,
  6305. const u8 *bssid)
  6306. {
  6307. struct wmi_vdev_up_cmd *cmd;
  6308. struct sk_buff *skb;
  6309. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6310. if (!skb)
  6311. return ERR_PTR(-ENOMEM);
  6312. cmd = (struct wmi_vdev_up_cmd *)skb->data;
  6313. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6314. cmd->vdev_assoc_id = __cpu_to_le32(aid);
  6315. ether_addr_copy(cmd->vdev_bssid.addr, bssid);
  6316. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6317. "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
  6318. vdev_id, aid, bssid);
  6319. return skb;
  6320. }
  6321. static struct sk_buff *
  6322. ath10k_wmi_op_gen_vdev_down(struct ath10k *ar, u32 vdev_id)
  6323. {
  6324. struct wmi_vdev_down_cmd *cmd;
  6325. struct sk_buff *skb;
  6326. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6327. if (!skb)
  6328. return ERR_PTR(-ENOMEM);
  6329. cmd = (struct wmi_vdev_down_cmd *)skb->data;
  6330. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6331. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6332. "wmi mgmt vdev down id 0x%x\n", vdev_id);
  6333. return skb;
  6334. }
  6335. static struct sk_buff *
  6336. ath10k_wmi_op_gen_vdev_set_param(struct ath10k *ar, u32 vdev_id,
  6337. u32 param_id, u32 param_value)
  6338. {
  6339. struct wmi_vdev_set_param_cmd *cmd;
  6340. struct sk_buff *skb;
  6341. if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
  6342. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6343. "vdev param %d not supported by firmware\n",
  6344. param_id);
  6345. return ERR_PTR(-EOPNOTSUPP);
  6346. }
  6347. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6348. if (!skb)
  6349. return ERR_PTR(-ENOMEM);
  6350. cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
  6351. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6352. cmd->param_id = __cpu_to_le32(param_id);
  6353. cmd->param_value = __cpu_to_le32(param_value);
  6354. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6355. "wmi vdev id 0x%x set param %d value %d\n",
  6356. vdev_id, param_id, param_value);
  6357. return skb;
  6358. }
  6359. static struct sk_buff *
  6360. ath10k_wmi_op_gen_vdev_install_key(struct ath10k *ar,
  6361. const struct wmi_vdev_install_key_arg *arg)
  6362. {
  6363. struct wmi_vdev_install_key_cmd *cmd;
  6364. struct sk_buff *skb;
  6365. if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
  6366. return ERR_PTR(-EINVAL);
  6367. if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
  6368. return ERR_PTR(-EINVAL);
  6369. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len);
  6370. if (!skb)
  6371. return ERR_PTR(-ENOMEM);
  6372. cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
  6373. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  6374. cmd->key_idx = __cpu_to_le32(arg->key_idx);
  6375. cmd->key_flags = __cpu_to_le32(arg->key_flags);
  6376. cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
  6377. cmd->key_len = __cpu_to_le32(arg->key_len);
  6378. cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
  6379. cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
  6380. if (arg->macaddr)
  6381. ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
  6382. if (arg->key_data)
  6383. memcpy(cmd->key_data, arg->key_data, arg->key_len);
  6384. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6385. "wmi vdev install key idx %d cipher %d len %d\n",
  6386. arg->key_idx, arg->key_cipher, arg->key_len);
  6387. return skb;
  6388. }
  6389. static struct sk_buff *
  6390. ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k *ar,
  6391. const struct wmi_vdev_spectral_conf_arg *arg)
  6392. {
  6393. struct wmi_vdev_spectral_conf_cmd *cmd;
  6394. struct sk_buff *skb;
  6395. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6396. if (!skb)
  6397. return ERR_PTR(-ENOMEM);
  6398. cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data;
  6399. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  6400. cmd->scan_count = __cpu_to_le32(arg->scan_count);
  6401. cmd->scan_period = __cpu_to_le32(arg->scan_period);
  6402. cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
  6403. cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size);
  6404. cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena);
  6405. cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena);
  6406. cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref);
  6407. cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay);
  6408. cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr);
  6409. cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr);
  6410. cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode);
  6411. cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode);
  6412. cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr);
  6413. cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format);
  6414. cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode);
  6415. cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale);
  6416. cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj);
  6417. cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask);
  6418. return skb;
  6419. }
  6420. static struct sk_buff *
  6421. ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id,
  6422. u32 trigger, u32 enable)
  6423. {
  6424. struct wmi_vdev_spectral_enable_cmd *cmd;
  6425. struct sk_buff *skb;
  6426. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6427. if (!skb)
  6428. return ERR_PTR(-ENOMEM);
  6429. cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data;
  6430. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6431. cmd->trigger_cmd = __cpu_to_le32(trigger);
  6432. cmd->enable_cmd = __cpu_to_le32(enable);
  6433. return skb;
  6434. }
  6435. static struct sk_buff *
  6436. ath10k_wmi_op_gen_peer_create(struct ath10k *ar, u32 vdev_id,
  6437. const u8 peer_addr[ETH_ALEN],
  6438. enum wmi_peer_type peer_type)
  6439. {
  6440. struct wmi_peer_create_cmd *cmd;
  6441. struct sk_buff *skb;
  6442. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6443. if (!skb)
  6444. return ERR_PTR(-ENOMEM);
  6445. cmd = (struct wmi_peer_create_cmd *)skb->data;
  6446. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6447. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  6448. cmd->peer_type = __cpu_to_le32(peer_type);
  6449. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6450. "wmi peer create vdev_id %d peer_addr %pM\n",
  6451. vdev_id, peer_addr);
  6452. return skb;
  6453. }
  6454. static struct sk_buff *
  6455. ath10k_wmi_op_gen_peer_delete(struct ath10k *ar, u32 vdev_id,
  6456. const u8 peer_addr[ETH_ALEN])
  6457. {
  6458. struct wmi_peer_delete_cmd *cmd;
  6459. struct sk_buff *skb;
  6460. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6461. if (!skb)
  6462. return ERR_PTR(-ENOMEM);
  6463. cmd = (struct wmi_peer_delete_cmd *)skb->data;
  6464. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6465. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  6466. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6467. "wmi peer delete vdev_id %d peer_addr %pM\n",
  6468. vdev_id, peer_addr);
  6469. return skb;
  6470. }
  6471. static struct sk_buff *
  6472. ath10k_wmi_op_gen_peer_flush(struct ath10k *ar, u32 vdev_id,
  6473. const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
  6474. {
  6475. struct wmi_peer_flush_tids_cmd *cmd;
  6476. struct sk_buff *skb;
  6477. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6478. if (!skb)
  6479. return ERR_PTR(-ENOMEM);
  6480. cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
  6481. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6482. cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
  6483. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  6484. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6485. "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
  6486. vdev_id, peer_addr, tid_bitmap);
  6487. return skb;
  6488. }
  6489. static struct sk_buff *
  6490. ath10k_wmi_op_gen_peer_set_param(struct ath10k *ar, u32 vdev_id,
  6491. const u8 *peer_addr,
  6492. enum wmi_peer_param param_id,
  6493. u32 param_value)
  6494. {
  6495. struct wmi_peer_set_param_cmd *cmd;
  6496. struct sk_buff *skb;
  6497. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6498. if (!skb)
  6499. return ERR_PTR(-ENOMEM);
  6500. cmd = (struct wmi_peer_set_param_cmd *)skb->data;
  6501. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6502. cmd->param_id = __cpu_to_le32(param_id);
  6503. cmd->param_value = __cpu_to_le32(param_value);
  6504. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  6505. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6506. "wmi vdev %d peer 0x%pM set param %d value %d\n",
  6507. vdev_id, peer_addr, param_id, param_value);
  6508. return skb;
  6509. }
  6510. static struct sk_buff *
  6511. ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id,
  6512. enum wmi_sta_ps_mode psmode)
  6513. {
  6514. struct wmi_sta_powersave_mode_cmd *cmd;
  6515. struct sk_buff *skb;
  6516. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6517. if (!skb)
  6518. return ERR_PTR(-ENOMEM);
  6519. cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
  6520. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6521. cmd->sta_ps_mode = __cpu_to_le32(psmode);
  6522. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6523. "wmi set powersave id 0x%x mode %d\n",
  6524. vdev_id, psmode);
  6525. return skb;
  6526. }
  6527. static struct sk_buff *
  6528. ath10k_wmi_op_gen_set_sta_ps(struct ath10k *ar, u32 vdev_id,
  6529. enum wmi_sta_powersave_param param_id,
  6530. u32 value)
  6531. {
  6532. struct wmi_sta_powersave_param_cmd *cmd;
  6533. struct sk_buff *skb;
  6534. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6535. if (!skb)
  6536. return ERR_PTR(-ENOMEM);
  6537. cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
  6538. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6539. cmd->param_id = __cpu_to_le32(param_id);
  6540. cmd->param_value = __cpu_to_le32(value);
  6541. ath10k_dbg(ar, ATH10K_DBG_STA,
  6542. "wmi sta ps param vdev_id 0x%x param %d value %d\n",
  6543. vdev_id, param_id, value);
  6544. return skb;
  6545. }
  6546. static struct sk_buff *
  6547. ath10k_wmi_op_gen_set_ap_ps(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  6548. enum wmi_ap_ps_peer_param param_id, u32 value)
  6549. {
  6550. struct wmi_ap_ps_peer_cmd *cmd;
  6551. struct sk_buff *skb;
  6552. if (!mac)
  6553. return ERR_PTR(-EINVAL);
  6554. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6555. if (!skb)
  6556. return ERR_PTR(-ENOMEM);
  6557. cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
  6558. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6559. cmd->param_id = __cpu_to_le32(param_id);
  6560. cmd->param_value = __cpu_to_le32(value);
  6561. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6562. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6563. "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
  6564. vdev_id, param_id, value, mac);
  6565. return skb;
  6566. }
  6567. static struct sk_buff *
  6568. ath10k_wmi_op_gen_scan_chan_list(struct ath10k *ar,
  6569. const struct wmi_scan_chan_list_arg *arg)
  6570. {
  6571. struct wmi_scan_chan_list_cmd *cmd;
  6572. struct sk_buff *skb;
  6573. struct wmi_channel_arg *ch;
  6574. struct wmi_channel *ci;
  6575. int i;
  6576. skb = ath10k_wmi_alloc_skb(ar, struct_size(cmd, chan_info, arg->n_channels));
  6577. if (!skb)
  6578. return ERR_PTR(-EINVAL);
  6579. cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
  6580. cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
  6581. for (i = 0; i < arg->n_channels; i++) {
  6582. ch = &arg->channels[i];
  6583. ci = &cmd->chan_info[i];
  6584. ath10k_wmi_put_wmi_channel(ar, ci, ch);
  6585. }
  6586. return skb;
  6587. }
  6588. static void
  6589. ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf,
  6590. const struct wmi_peer_assoc_complete_arg *arg)
  6591. {
  6592. struct wmi_common_peer_assoc_complete_cmd *cmd = buf;
  6593. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  6594. cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
  6595. cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
  6596. cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
  6597. cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
  6598. cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
  6599. cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
  6600. cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
  6601. cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
  6602. cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
  6603. cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
  6604. cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
  6605. cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
  6606. ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
  6607. cmd->peer_legacy_rates.num_rates =
  6608. __cpu_to_le32(arg->peer_legacy_rates.num_rates);
  6609. memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
  6610. arg->peer_legacy_rates.num_rates);
  6611. cmd->peer_ht_rates.num_rates =
  6612. __cpu_to_le32(arg->peer_ht_rates.num_rates);
  6613. memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
  6614. arg->peer_ht_rates.num_rates);
  6615. cmd->peer_vht_rates.rx_max_rate =
  6616. __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
  6617. cmd->peer_vht_rates.rx_mcs_set =
  6618. __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
  6619. cmd->peer_vht_rates.tx_max_rate =
  6620. __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
  6621. cmd->peer_vht_rates.tx_mcs_set =
  6622. __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
  6623. }
  6624. static void
  6625. ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf,
  6626. const struct wmi_peer_assoc_complete_arg *arg)
  6627. {
  6628. struct wmi_main_peer_assoc_complete_cmd *cmd = buf;
  6629. ath10k_wmi_peer_assoc_fill(ar, buf, arg);
  6630. memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info));
  6631. }
  6632. static void
  6633. ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf,
  6634. const struct wmi_peer_assoc_complete_arg *arg)
  6635. {
  6636. ath10k_wmi_peer_assoc_fill(ar, buf, arg);
  6637. }
  6638. static void
  6639. ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf,
  6640. const struct wmi_peer_assoc_complete_arg *arg)
  6641. {
  6642. struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf;
  6643. int max_mcs, max_nss;
  6644. u32 info0;
  6645. /* TODO: Is using max values okay with firmware? */
  6646. max_mcs = 0xf;
  6647. max_nss = 0xf;
  6648. info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) |
  6649. SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS);
  6650. ath10k_wmi_peer_assoc_fill(ar, buf, arg);
  6651. cmd->info0 = __cpu_to_le32(info0);
  6652. }
  6653. static void
  6654. ath10k_wmi_peer_assoc_fill_10_4(struct ath10k *ar, void *buf,
  6655. const struct wmi_peer_assoc_complete_arg *arg)
  6656. {
  6657. struct wmi_10_4_peer_assoc_complete_cmd *cmd = buf;
  6658. ath10k_wmi_peer_assoc_fill_10_2(ar, buf, arg);
  6659. cmd->peer_bw_rxnss_override =
  6660. __cpu_to_le32(arg->peer_bw_rxnss_override);
  6661. }
  6662. static int
  6663. ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg *arg)
  6664. {
  6665. if (arg->peer_mpdu_density > 16)
  6666. return -EINVAL;
  6667. if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
  6668. return -EINVAL;
  6669. if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
  6670. return -EINVAL;
  6671. return 0;
  6672. }
  6673. static struct sk_buff *
  6674. ath10k_wmi_op_gen_peer_assoc(struct ath10k *ar,
  6675. const struct wmi_peer_assoc_complete_arg *arg)
  6676. {
  6677. size_t len = sizeof(struct wmi_main_peer_assoc_complete_cmd);
  6678. struct sk_buff *skb;
  6679. int ret;
  6680. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  6681. if (ret)
  6682. return ERR_PTR(ret);
  6683. skb = ath10k_wmi_alloc_skb(ar, len);
  6684. if (!skb)
  6685. return ERR_PTR(-ENOMEM);
  6686. ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg);
  6687. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6688. "wmi peer assoc vdev %d addr %pM (%s)\n",
  6689. arg->vdev_id, arg->addr,
  6690. arg->peer_reassoc ? "reassociate" : "new");
  6691. return skb;
  6692. }
  6693. static struct sk_buff *
  6694. ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k *ar,
  6695. const struct wmi_peer_assoc_complete_arg *arg)
  6696. {
  6697. size_t len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd);
  6698. struct sk_buff *skb;
  6699. int ret;
  6700. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  6701. if (ret)
  6702. return ERR_PTR(ret);
  6703. skb = ath10k_wmi_alloc_skb(ar, len);
  6704. if (!skb)
  6705. return ERR_PTR(-ENOMEM);
  6706. ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg);
  6707. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6708. "wmi peer assoc vdev %d addr %pM (%s)\n",
  6709. arg->vdev_id, arg->addr,
  6710. arg->peer_reassoc ? "reassociate" : "new");
  6711. return skb;
  6712. }
  6713. static struct sk_buff *
  6714. ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k *ar,
  6715. const struct wmi_peer_assoc_complete_arg *arg)
  6716. {
  6717. size_t len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd);
  6718. struct sk_buff *skb;
  6719. int ret;
  6720. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  6721. if (ret)
  6722. return ERR_PTR(ret);
  6723. skb = ath10k_wmi_alloc_skb(ar, len);
  6724. if (!skb)
  6725. return ERR_PTR(-ENOMEM);
  6726. ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg);
  6727. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6728. "wmi peer assoc vdev %d addr %pM (%s)\n",
  6729. arg->vdev_id, arg->addr,
  6730. arg->peer_reassoc ? "reassociate" : "new");
  6731. return skb;
  6732. }
  6733. static struct sk_buff *
  6734. ath10k_wmi_10_4_op_gen_peer_assoc(struct ath10k *ar,
  6735. const struct wmi_peer_assoc_complete_arg *arg)
  6736. {
  6737. size_t len = sizeof(struct wmi_10_4_peer_assoc_complete_cmd);
  6738. struct sk_buff *skb;
  6739. int ret;
  6740. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  6741. if (ret)
  6742. return ERR_PTR(ret);
  6743. skb = ath10k_wmi_alloc_skb(ar, len);
  6744. if (!skb)
  6745. return ERR_PTR(-ENOMEM);
  6746. ath10k_wmi_peer_assoc_fill_10_4(ar, skb->data, arg);
  6747. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6748. "wmi peer assoc vdev %d addr %pM (%s)\n",
  6749. arg->vdev_id, arg->addr,
  6750. arg->peer_reassoc ? "reassociate" : "new");
  6751. return skb;
  6752. }
  6753. static struct sk_buff *
  6754. ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k *ar)
  6755. {
  6756. struct sk_buff *skb;
  6757. skb = ath10k_wmi_alloc_skb(ar, 0);
  6758. if (!skb)
  6759. return ERR_PTR(-ENOMEM);
  6760. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev get temperature\n");
  6761. return skb;
  6762. }
  6763. static struct sk_buff *
  6764. ath10k_wmi_10_2_op_gen_pdev_bss_chan_info(struct ath10k *ar,
  6765. enum wmi_bss_survey_req_type type)
  6766. {
  6767. struct wmi_pdev_chan_info_req_cmd *cmd;
  6768. struct sk_buff *skb;
  6769. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6770. if (!skb)
  6771. return ERR_PTR(-ENOMEM);
  6772. cmd = (struct wmi_pdev_chan_info_req_cmd *)skb->data;
  6773. cmd->type = __cpu_to_le32(type);
  6774. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6775. "wmi pdev bss info request type %d\n", type);
  6776. return skb;
  6777. }
  6778. /* This function assumes the beacon is already DMA mapped */
  6779. static struct sk_buff *
  6780. ath10k_wmi_op_gen_beacon_dma(struct ath10k *ar, u32 vdev_id, const void *bcn,
  6781. size_t bcn_len, u32 bcn_paddr, bool dtim_zero,
  6782. bool deliver_cab)
  6783. {
  6784. struct wmi_bcn_tx_ref_cmd *cmd;
  6785. struct sk_buff *skb;
  6786. struct ieee80211_hdr *hdr;
  6787. u16 fc;
  6788. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6789. if (!skb)
  6790. return ERR_PTR(-ENOMEM);
  6791. hdr = (struct ieee80211_hdr *)bcn;
  6792. fc = le16_to_cpu(hdr->frame_control);
  6793. cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data;
  6794. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6795. cmd->data_len = __cpu_to_le32(bcn_len);
  6796. cmd->data_ptr = __cpu_to_le32(bcn_paddr);
  6797. cmd->msdu_id = 0;
  6798. cmd->frame_control = __cpu_to_le32(fc);
  6799. cmd->flags = 0;
  6800. cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA);
  6801. if (dtim_zero)
  6802. cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO);
  6803. if (deliver_cab)
  6804. cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB);
  6805. return skb;
  6806. }
  6807. void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
  6808. const struct wmi_wmm_params_arg *arg)
  6809. {
  6810. params->cwmin = __cpu_to_le32(arg->cwmin);
  6811. params->cwmax = __cpu_to_le32(arg->cwmax);
  6812. params->aifs = __cpu_to_le32(arg->aifs);
  6813. params->txop = __cpu_to_le32(arg->txop);
  6814. params->acm = __cpu_to_le32(arg->acm);
  6815. params->no_ack = __cpu_to_le32(arg->no_ack);
  6816. }
  6817. static struct sk_buff *
  6818. ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k *ar,
  6819. const struct wmi_wmm_params_all_arg *arg)
  6820. {
  6821. struct wmi_pdev_set_wmm_params *cmd;
  6822. struct sk_buff *skb;
  6823. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6824. if (!skb)
  6825. return ERR_PTR(-ENOMEM);
  6826. cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
  6827. ath10k_wmi_set_wmm_param(&cmd->ac_be, &arg->ac_be);
  6828. ath10k_wmi_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
  6829. ath10k_wmi_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
  6830. ath10k_wmi_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
  6831. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
  6832. return skb;
  6833. }
  6834. static struct sk_buff *
  6835. ath10k_wmi_op_gen_request_stats(struct ath10k *ar, u32 stats_mask)
  6836. {
  6837. struct wmi_request_stats_cmd *cmd;
  6838. struct sk_buff *skb;
  6839. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6840. if (!skb)
  6841. return ERR_PTR(-ENOMEM);
  6842. cmd = (struct wmi_request_stats_cmd *)skb->data;
  6843. cmd->stats_id = __cpu_to_le32(stats_mask);
  6844. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats 0x%08x\n",
  6845. stats_mask);
  6846. return skb;
  6847. }
  6848. static struct sk_buff *
  6849. ath10k_wmi_op_gen_force_fw_hang(struct ath10k *ar,
  6850. enum wmi_force_fw_hang_type type, u32 delay_ms)
  6851. {
  6852. struct wmi_force_fw_hang_cmd *cmd;
  6853. struct sk_buff *skb;
  6854. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6855. if (!skb)
  6856. return ERR_PTR(-ENOMEM);
  6857. cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
  6858. cmd->type = __cpu_to_le32(type);
  6859. cmd->delay_ms = __cpu_to_le32(delay_ms);
  6860. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
  6861. type, delay_ms);
  6862. return skb;
  6863. }
  6864. static struct sk_buff *
  6865. ath10k_wmi_op_gen_dbglog_cfg(struct ath10k *ar, u64 module_enable,
  6866. u32 log_level)
  6867. {
  6868. struct wmi_dbglog_cfg_cmd *cmd;
  6869. struct sk_buff *skb;
  6870. u32 cfg;
  6871. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6872. if (!skb)
  6873. return ERR_PTR(-ENOMEM);
  6874. cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
  6875. if (module_enable) {
  6876. cfg = SM(log_level,
  6877. ATH10K_DBGLOG_CFG_LOG_LVL);
  6878. } else {
  6879. /* set back defaults, all modules with WARN level */
  6880. cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
  6881. ATH10K_DBGLOG_CFG_LOG_LVL);
  6882. module_enable = ~0;
  6883. }
  6884. cmd->module_enable = __cpu_to_le32(module_enable);
  6885. cmd->module_valid = __cpu_to_le32(~0);
  6886. cmd->config_enable = __cpu_to_le32(cfg);
  6887. cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
  6888. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6889. "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
  6890. __le32_to_cpu(cmd->module_enable),
  6891. __le32_to_cpu(cmd->module_valid),
  6892. __le32_to_cpu(cmd->config_enable),
  6893. __le32_to_cpu(cmd->config_valid));
  6894. return skb;
  6895. }
  6896. static struct sk_buff *
  6897. ath10k_wmi_10_4_op_gen_dbglog_cfg(struct ath10k *ar, u64 module_enable,
  6898. u32 log_level)
  6899. {
  6900. struct wmi_10_4_dbglog_cfg_cmd *cmd;
  6901. struct sk_buff *skb;
  6902. u32 cfg;
  6903. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6904. if (!skb)
  6905. return ERR_PTR(-ENOMEM);
  6906. cmd = (struct wmi_10_4_dbglog_cfg_cmd *)skb->data;
  6907. if (module_enable) {
  6908. cfg = SM(log_level,
  6909. ATH10K_DBGLOG_CFG_LOG_LVL);
  6910. } else {
  6911. /* set back defaults, all modules with WARN level */
  6912. cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
  6913. ATH10K_DBGLOG_CFG_LOG_LVL);
  6914. module_enable = ~0;
  6915. }
  6916. cmd->module_enable = __cpu_to_le64(module_enable);
  6917. cmd->module_valid = __cpu_to_le64(~0);
  6918. cmd->config_enable = __cpu_to_le32(cfg);
  6919. cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
  6920. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6921. "wmi dbglog cfg modules 0x%016llx 0x%016llx config %08x %08x\n",
  6922. __le64_to_cpu(cmd->module_enable),
  6923. __le64_to_cpu(cmd->module_valid),
  6924. __le32_to_cpu(cmd->config_enable),
  6925. __le32_to_cpu(cmd->config_valid));
  6926. return skb;
  6927. }
  6928. static struct sk_buff *
  6929. ath10k_wmi_op_gen_pktlog_enable(struct ath10k *ar, u32 ev_bitmap)
  6930. {
  6931. struct wmi_pdev_pktlog_enable_cmd *cmd;
  6932. struct sk_buff *skb;
  6933. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6934. if (!skb)
  6935. return ERR_PTR(-ENOMEM);
  6936. ev_bitmap &= ATH10K_PKTLOG_ANY;
  6937. cmd = (struct wmi_pdev_pktlog_enable_cmd *)skb->data;
  6938. cmd->ev_bitmap = __cpu_to_le32(ev_bitmap);
  6939. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi enable pktlog filter 0x%08x\n",
  6940. ev_bitmap);
  6941. return skb;
  6942. }
  6943. static struct sk_buff *
  6944. ath10k_wmi_op_gen_pktlog_disable(struct ath10k *ar)
  6945. {
  6946. struct sk_buff *skb;
  6947. skb = ath10k_wmi_alloc_skb(ar, 0);
  6948. if (!skb)
  6949. return ERR_PTR(-ENOMEM);
  6950. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi disable pktlog\n");
  6951. return skb;
  6952. }
  6953. static struct sk_buff *
  6954. ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k *ar, u32 period,
  6955. u32 duration, u32 next_offset,
  6956. u32 enabled)
  6957. {
  6958. struct wmi_pdev_set_quiet_cmd *cmd;
  6959. struct sk_buff *skb;
  6960. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6961. if (!skb)
  6962. return ERR_PTR(-ENOMEM);
  6963. cmd = (struct wmi_pdev_set_quiet_cmd *)skb->data;
  6964. cmd->period = __cpu_to_le32(period);
  6965. cmd->duration = __cpu_to_le32(duration);
  6966. cmd->next_start = __cpu_to_le32(next_offset);
  6967. cmd->enabled = __cpu_to_le32(enabled);
  6968. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6969. "wmi quiet param: period %u duration %u enabled %d\n",
  6970. period, duration, enabled);
  6971. return skb;
  6972. }
  6973. static struct sk_buff *
  6974. ath10k_wmi_op_gen_addba_clear_resp(struct ath10k *ar, u32 vdev_id,
  6975. const u8 *mac)
  6976. {
  6977. struct wmi_addba_clear_resp_cmd *cmd;
  6978. struct sk_buff *skb;
  6979. if (!mac)
  6980. return ERR_PTR(-EINVAL);
  6981. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6982. if (!skb)
  6983. return ERR_PTR(-ENOMEM);
  6984. cmd = (struct wmi_addba_clear_resp_cmd *)skb->data;
  6985. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6986. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6987. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6988. "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n",
  6989. vdev_id, mac);
  6990. return skb;
  6991. }
  6992. static struct sk_buff *
  6993. ath10k_wmi_op_gen_addba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  6994. u32 tid, u32 buf_size)
  6995. {
  6996. struct wmi_addba_send_cmd *cmd;
  6997. struct sk_buff *skb;
  6998. if (!mac)
  6999. return ERR_PTR(-EINVAL);
  7000. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  7001. if (!skb)
  7002. return ERR_PTR(-ENOMEM);
  7003. cmd = (struct wmi_addba_send_cmd *)skb->data;
  7004. cmd->vdev_id = __cpu_to_le32(vdev_id);
  7005. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  7006. cmd->tid = __cpu_to_le32(tid);
  7007. cmd->buffersize = __cpu_to_le32(buf_size);
  7008. ath10k_dbg(ar, ATH10K_DBG_WMI,
  7009. "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n",
  7010. vdev_id, mac, tid, buf_size);
  7011. return skb;
  7012. }
  7013. static struct sk_buff *
  7014. ath10k_wmi_op_gen_addba_set_resp(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  7015. u32 tid, u32 status)
  7016. {
  7017. struct wmi_addba_setresponse_cmd *cmd;
  7018. struct sk_buff *skb;
  7019. if (!mac)
  7020. return ERR_PTR(-EINVAL);
  7021. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  7022. if (!skb)
  7023. return ERR_PTR(-ENOMEM);
  7024. cmd = (struct wmi_addba_setresponse_cmd *)skb->data;
  7025. cmd->vdev_id = __cpu_to_le32(vdev_id);
  7026. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  7027. cmd->tid = __cpu_to_le32(tid);
  7028. cmd->statuscode = __cpu_to_le32(status);
  7029. ath10k_dbg(ar, ATH10K_DBG_WMI,
  7030. "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n",
  7031. vdev_id, mac, tid, status);
  7032. return skb;
  7033. }
  7034. static struct sk_buff *
  7035. ath10k_wmi_op_gen_delba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  7036. u32 tid, u32 initiator, u32 reason)
  7037. {
  7038. struct wmi_delba_send_cmd *cmd;
  7039. struct sk_buff *skb;
  7040. if (!mac)
  7041. return ERR_PTR(-EINVAL);
  7042. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  7043. if (!skb)
  7044. return ERR_PTR(-ENOMEM);
  7045. cmd = (struct wmi_delba_send_cmd *)skb->data;
  7046. cmd->vdev_id = __cpu_to_le32(vdev_id);
  7047. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  7048. cmd->tid = __cpu_to_le32(tid);
  7049. cmd->initiator = __cpu_to_le32(initiator);
  7050. cmd->reasoncode = __cpu_to_le32(reason);
  7051. ath10k_dbg(ar, ATH10K_DBG_WMI,
  7052. "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n",
  7053. vdev_id, mac, tid, initiator, reason);
  7054. return skb;
  7055. }
  7056. static struct sk_buff *
  7057. ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config(struct ath10k *ar, u32 param)
  7058. {
  7059. struct wmi_pdev_get_tpc_config_cmd *cmd;
  7060. struct sk_buff *skb;
  7061. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  7062. if (!skb)
  7063. return ERR_PTR(-ENOMEM);
  7064. cmd = (struct wmi_pdev_get_tpc_config_cmd *)skb->data;
  7065. cmd->param = __cpu_to_le32(param);
  7066. ath10k_dbg(ar, ATH10K_DBG_WMI,
  7067. "wmi pdev get tpc config param %d\n", param);
  7068. return skb;
  7069. }
  7070. size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head)
  7071. {
  7072. struct ath10k_fw_stats_peer *i;
  7073. size_t num = 0;
  7074. list_for_each_entry(i, head, list)
  7075. ++num;
  7076. return num;
  7077. }
  7078. size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head)
  7079. {
  7080. struct ath10k_fw_stats_vdev *i;
  7081. size_t num = 0;
  7082. list_for_each_entry(i, head, list)
  7083. ++num;
  7084. return num;
  7085. }
  7086. static void
  7087. ath10k_wmi_fw_pdev_base_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  7088. char *buf, u32 *length)
  7089. {
  7090. u32 len = *length;
  7091. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  7092. len += scnprintf(buf + len, buf_len - len, "\n");
  7093. len += scnprintf(buf + len, buf_len - len, "%30s\n",
  7094. "ath10k PDEV stats");
  7095. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  7096. "=================");
  7097. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7098. "Channel noise floor", pdev->ch_noise_floor);
  7099. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  7100. "Channel TX power", pdev->chan_tx_power);
  7101. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  7102. "TX frame count", pdev->tx_frame_count);
  7103. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  7104. "RX frame count", pdev->rx_frame_count);
  7105. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  7106. "RX clear count", pdev->rx_clear_count);
  7107. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  7108. "Cycle count", pdev->cycle_count);
  7109. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  7110. "PHY error count", pdev->phy_err_count);
  7111. *length = len;
  7112. }
  7113. static void
  7114. ath10k_wmi_fw_pdev_extra_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  7115. char *buf, u32 *length)
  7116. {
  7117. u32 len = *length;
  7118. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  7119. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  7120. "RTS bad count", pdev->rts_bad);
  7121. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  7122. "RTS good count", pdev->rts_good);
  7123. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  7124. "FCS bad count", pdev->fcs_bad);
  7125. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  7126. "No beacon count", pdev->no_beacons);
  7127. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  7128. "MIB int count", pdev->mib_int_count);
  7129. len += scnprintf(buf + len, buf_len - len, "\n");
  7130. *length = len;
  7131. }
  7132. static void
  7133. ath10k_wmi_fw_pdev_tx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  7134. char *buf, u32 *length)
  7135. {
  7136. u32 len = *length;
  7137. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  7138. len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
  7139. "ath10k PDEV TX stats");
  7140. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  7141. "=================");
  7142. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7143. "HTT cookies queued", pdev->comp_queued);
  7144. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7145. "HTT cookies disp.", pdev->comp_delivered);
  7146. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7147. "MSDU queued", pdev->msdu_enqued);
  7148. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7149. "MPDU queued", pdev->mpdu_enqued);
  7150. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7151. "MSDUs dropped", pdev->wmm_drop);
  7152. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7153. "Local enqued", pdev->local_enqued);
  7154. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7155. "Local freed", pdev->local_freed);
  7156. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7157. "HW queued", pdev->hw_queued);
  7158. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7159. "PPDUs reaped", pdev->hw_reaped);
  7160. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7161. "Num underruns", pdev->underrun);
  7162. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7163. "PPDUs cleaned", pdev->tx_abort);
  7164. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7165. "MPDUs requeued", pdev->mpdus_requeued);
  7166. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7167. "Excessive retries", pdev->tx_ko);
  7168. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7169. "HW rate", pdev->data_rc);
  7170. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7171. "Sched self triggers", pdev->self_triggers);
  7172. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7173. "Dropped due to SW retries",
  7174. pdev->sw_retry_failure);
  7175. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7176. "Illegal rate phy errors",
  7177. pdev->illgl_rate_phy_err);
  7178. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7179. "Pdev continuous xretry", pdev->pdev_cont_xretry);
  7180. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7181. "TX timeout", pdev->pdev_tx_timeout);
  7182. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7183. "PDEV resets", pdev->pdev_resets);
  7184. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7185. "PHY underrun", pdev->phy_underrun);
  7186. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7187. "MPDU is more than txop limit", pdev->txop_ovf);
  7188. *length = len;
  7189. }
  7190. static void
  7191. ath10k_wmi_fw_pdev_rx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  7192. char *buf, u32 *length)
  7193. {
  7194. u32 len = *length;
  7195. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  7196. len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
  7197. "ath10k PDEV RX stats");
  7198. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  7199. "=================");
  7200. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7201. "Mid PPDU route change",
  7202. pdev->mid_ppdu_route_change);
  7203. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7204. "Tot. number of statuses", pdev->status_rcvd);
  7205. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7206. "Extra frags on rings 0", pdev->r0_frags);
  7207. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7208. "Extra frags on rings 1", pdev->r1_frags);
  7209. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7210. "Extra frags on rings 2", pdev->r2_frags);
  7211. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7212. "Extra frags on rings 3", pdev->r3_frags);
  7213. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7214. "MSDUs delivered to HTT", pdev->htt_msdus);
  7215. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7216. "MPDUs delivered to HTT", pdev->htt_mpdus);
  7217. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7218. "MSDUs delivered to stack", pdev->loc_msdus);
  7219. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7220. "MPDUs delivered to stack", pdev->loc_mpdus);
  7221. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7222. "Oversized AMSDUs", pdev->oversize_amsdu);
  7223. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7224. "PHY errors", pdev->phy_errs);
  7225. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7226. "PHY errors drops", pdev->phy_err_drop);
  7227. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7228. "MPDU errors (FCS, MIC, ENC)", pdev->mpdu_errs);
  7229. *length = len;
  7230. }
  7231. static void
  7232. ath10k_wmi_fw_vdev_stats_fill(const struct ath10k_fw_stats_vdev *vdev,
  7233. char *buf, u32 *length)
  7234. {
  7235. u32 len = *length;
  7236. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  7237. int i;
  7238. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7239. "vdev id", vdev->vdev_id);
  7240. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7241. "beacon snr", vdev->beacon_snr);
  7242. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7243. "data snr", vdev->data_snr);
  7244. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7245. "num rx frames", vdev->num_rx_frames);
  7246. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7247. "num rts fail", vdev->num_rts_fail);
  7248. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7249. "num rts success", vdev->num_rts_success);
  7250. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7251. "num rx err", vdev->num_rx_err);
  7252. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7253. "num rx discard", vdev->num_rx_discard);
  7254. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7255. "num tx not acked", vdev->num_tx_not_acked);
  7256. for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames); i++)
  7257. len += scnprintf(buf + len, buf_len - len,
  7258. "%25s [%02d] %u\n",
  7259. "num tx frames", i,
  7260. vdev->num_tx_frames[i]);
  7261. for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_retries); i++)
  7262. len += scnprintf(buf + len, buf_len - len,
  7263. "%25s [%02d] %u\n",
  7264. "num tx frames retries", i,
  7265. vdev->num_tx_frames_retries[i]);
  7266. for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_failures); i++)
  7267. len += scnprintf(buf + len, buf_len - len,
  7268. "%25s [%02d] %u\n",
  7269. "num tx frames failures", i,
  7270. vdev->num_tx_frames_failures[i]);
  7271. for (i = 0 ; i < ARRAY_SIZE(vdev->tx_rate_history); i++)
  7272. len += scnprintf(buf + len, buf_len - len,
  7273. "%25s [%02d] 0x%08x\n",
  7274. "tx rate history", i,
  7275. vdev->tx_rate_history[i]);
  7276. for (i = 0 ; i < ARRAY_SIZE(vdev->beacon_rssi_history); i++)
  7277. len += scnprintf(buf + len, buf_len - len,
  7278. "%25s [%02d] %u\n",
  7279. "beacon rssi history", i,
  7280. vdev->beacon_rssi_history[i]);
  7281. len += scnprintf(buf + len, buf_len - len, "\n");
  7282. *length = len;
  7283. }
  7284. static void
  7285. ath10k_wmi_fw_peer_stats_fill(const struct ath10k_fw_stats_peer *peer,
  7286. char *buf, u32 *length, bool extended_peer)
  7287. {
  7288. u32 len = *length;
  7289. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  7290. len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
  7291. "Peer MAC address", peer->peer_macaddr);
  7292. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7293. "Peer RSSI", peer->peer_rssi);
  7294. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7295. "Peer TX rate", peer->peer_tx_rate);
  7296. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7297. "Peer RX rate", peer->peer_rx_rate);
  7298. if (!extended_peer)
  7299. len += scnprintf(buf + len, buf_len - len, "%30s %llu\n",
  7300. "Peer RX duration", peer->rx_duration);
  7301. len += scnprintf(buf + len, buf_len - len, "\n");
  7302. *length = len;
  7303. }
  7304. static void
  7305. ath10k_wmi_fw_extd_peer_stats_fill(const struct ath10k_fw_extd_stats_peer *peer,
  7306. char *buf, u32 *length)
  7307. {
  7308. u32 len = *length;
  7309. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  7310. len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
  7311. "Peer MAC address", peer->peer_macaddr);
  7312. len += scnprintf(buf + len, buf_len - len, "%30s %llu\n",
  7313. "Peer RX duration", peer->rx_duration);
  7314. }
  7315. void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar,
  7316. struct ath10k_fw_stats *fw_stats,
  7317. char *buf)
  7318. {
  7319. u32 len = 0;
  7320. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  7321. const struct ath10k_fw_stats_pdev *pdev;
  7322. const struct ath10k_fw_stats_vdev *vdev;
  7323. const struct ath10k_fw_stats_peer *peer;
  7324. size_t num_peers;
  7325. size_t num_vdevs;
  7326. spin_lock_bh(&ar->data_lock);
  7327. pdev = list_first_entry_or_null(&fw_stats->pdevs,
  7328. struct ath10k_fw_stats_pdev, list);
  7329. if (!pdev) {
  7330. ath10k_warn(ar, "failed to get pdev stats\n");
  7331. goto unlock;
  7332. }
  7333. num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
  7334. num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
  7335. ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
  7336. ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
  7337. ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
  7338. len += scnprintf(buf + len, buf_len - len, "\n");
  7339. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  7340. "ath10k VDEV stats", num_vdevs);
  7341. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  7342. "=================");
  7343. list_for_each_entry(vdev, &fw_stats->vdevs, list) {
  7344. ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
  7345. }
  7346. len += scnprintf(buf + len, buf_len - len, "\n");
  7347. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  7348. "ath10k PEER stats", num_peers);
  7349. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  7350. "=================");
  7351. list_for_each_entry(peer, &fw_stats->peers, list) {
  7352. ath10k_wmi_fw_peer_stats_fill(peer, buf, &len,
  7353. fw_stats->extended);
  7354. }
  7355. unlock:
  7356. spin_unlock_bh(&ar->data_lock);
  7357. if (len >= buf_len)
  7358. buf[len - 1] = 0;
  7359. else
  7360. buf[len] = 0;
  7361. }
  7362. void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar,
  7363. struct ath10k_fw_stats *fw_stats,
  7364. char *buf)
  7365. {
  7366. unsigned int len = 0;
  7367. unsigned int buf_len = ATH10K_FW_STATS_BUF_SIZE;
  7368. const struct ath10k_fw_stats_pdev *pdev;
  7369. const struct ath10k_fw_stats_vdev *vdev;
  7370. const struct ath10k_fw_stats_peer *peer;
  7371. size_t num_peers;
  7372. size_t num_vdevs;
  7373. spin_lock_bh(&ar->data_lock);
  7374. pdev = list_first_entry_or_null(&fw_stats->pdevs,
  7375. struct ath10k_fw_stats_pdev, list);
  7376. if (!pdev) {
  7377. ath10k_warn(ar, "failed to get pdev stats\n");
  7378. goto unlock;
  7379. }
  7380. num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
  7381. num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
  7382. ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
  7383. ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
  7384. ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
  7385. ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
  7386. len += scnprintf(buf + len, buf_len - len, "\n");
  7387. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  7388. "ath10k VDEV stats", num_vdevs);
  7389. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  7390. "=================");
  7391. list_for_each_entry(vdev, &fw_stats->vdevs, list) {
  7392. ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
  7393. }
  7394. len += scnprintf(buf + len, buf_len - len, "\n");
  7395. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  7396. "ath10k PEER stats", num_peers);
  7397. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  7398. "=================");
  7399. list_for_each_entry(peer, &fw_stats->peers, list) {
  7400. ath10k_wmi_fw_peer_stats_fill(peer, buf, &len,
  7401. fw_stats->extended);
  7402. }
  7403. unlock:
  7404. spin_unlock_bh(&ar->data_lock);
  7405. if (len >= buf_len)
  7406. buf[len - 1] = 0;
  7407. else
  7408. buf[len] = 0;
  7409. }
  7410. static struct sk_buff *
  7411. ath10k_wmi_op_gen_pdev_enable_adaptive_cca(struct ath10k *ar, u8 enable,
  7412. u32 detect_level, u32 detect_margin)
  7413. {
  7414. struct wmi_pdev_set_adaptive_cca_params *cmd;
  7415. struct sk_buff *skb;
  7416. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  7417. if (!skb)
  7418. return ERR_PTR(-ENOMEM);
  7419. cmd = (struct wmi_pdev_set_adaptive_cca_params *)skb->data;
  7420. cmd->enable = __cpu_to_le32(enable);
  7421. cmd->cca_detect_level = __cpu_to_le32(detect_level);
  7422. cmd->cca_detect_margin = __cpu_to_le32(detect_margin);
  7423. ath10k_dbg(ar, ATH10K_DBG_WMI,
  7424. "wmi pdev set adaptive cca params enable:%d detection level:%d detection margin:%d\n",
  7425. enable, detect_level, detect_margin);
  7426. return skb;
  7427. }
  7428. static void
  7429. ath10k_wmi_fw_vdev_stats_extd_fill(const struct ath10k_fw_stats_vdev_extd *vdev,
  7430. char *buf, u32 *length)
  7431. {
  7432. u32 len = *length;
  7433. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  7434. u32 val;
  7435. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7436. "vdev id", vdev->vdev_id);
  7437. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7438. "ppdu aggr count", vdev->ppdu_aggr_cnt);
  7439. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7440. "ppdu noack", vdev->ppdu_noack);
  7441. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7442. "mpdu queued", vdev->mpdu_queued);
  7443. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7444. "ppdu nonaggr count", vdev->ppdu_nonaggr_cnt);
  7445. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7446. "mpdu sw requeued", vdev->mpdu_sw_requeued);
  7447. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7448. "mpdu success retry", vdev->mpdu_suc_retry);
  7449. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7450. "mpdu success multitry", vdev->mpdu_suc_multitry);
  7451. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7452. "mpdu fail retry", vdev->mpdu_fail_retry);
  7453. val = vdev->tx_ftm_suc;
  7454. if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
  7455. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7456. "tx ftm success",
  7457. MS(val, WMI_VDEV_STATS_FTM_COUNT));
  7458. val = vdev->tx_ftm_suc_retry;
  7459. if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
  7460. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7461. "tx ftm success retry",
  7462. MS(val, WMI_VDEV_STATS_FTM_COUNT));
  7463. val = vdev->tx_ftm_fail;
  7464. if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
  7465. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7466. "tx ftm fail",
  7467. MS(val, WMI_VDEV_STATS_FTM_COUNT));
  7468. val = vdev->rx_ftmr_cnt;
  7469. if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
  7470. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7471. "rx ftm request count",
  7472. MS(val, WMI_VDEV_STATS_FTM_COUNT));
  7473. val = vdev->rx_ftmr_dup_cnt;
  7474. if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
  7475. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7476. "rx ftm request dup count",
  7477. MS(val, WMI_VDEV_STATS_FTM_COUNT));
  7478. val = vdev->rx_iftmr_cnt;
  7479. if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
  7480. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7481. "rx initial ftm req count",
  7482. MS(val, WMI_VDEV_STATS_FTM_COUNT));
  7483. val = vdev->rx_iftmr_dup_cnt;
  7484. if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
  7485. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7486. "rx initial ftm req dup cnt",
  7487. MS(val, WMI_VDEV_STATS_FTM_COUNT));
  7488. len += scnprintf(buf + len, buf_len - len, "\n");
  7489. *length = len;
  7490. }
  7491. void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar,
  7492. struct ath10k_fw_stats *fw_stats,
  7493. char *buf)
  7494. {
  7495. u32 len = 0;
  7496. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  7497. const struct ath10k_fw_stats_pdev *pdev;
  7498. const struct ath10k_fw_stats_vdev_extd *vdev;
  7499. const struct ath10k_fw_stats_peer *peer;
  7500. const struct ath10k_fw_extd_stats_peer *extd_peer;
  7501. size_t num_peers;
  7502. size_t num_vdevs;
  7503. spin_lock_bh(&ar->data_lock);
  7504. pdev = list_first_entry_or_null(&fw_stats->pdevs,
  7505. struct ath10k_fw_stats_pdev, list);
  7506. if (!pdev) {
  7507. ath10k_warn(ar, "failed to get pdev stats\n");
  7508. goto unlock;
  7509. }
  7510. num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
  7511. num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
  7512. ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
  7513. ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
  7514. ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
  7515. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7516. "HW paused", pdev->hw_paused);
  7517. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7518. "Seqs posted", pdev->seq_posted);
  7519. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7520. "Seqs failed queueing", pdev->seq_failed_queueing);
  7521. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7522. "Seqs completed", pdev->seq_completed);
  7523. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7524. "Seqs restarted", pdev->seq_restarted);
  7525. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7526. "MU Seqs posted", pdev->mu_seq_posted);
  7527. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7528. "MPDUs SW flushed", pdev->mpdus_sw_flush);
  7529. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7530. "MPDUs HW filtered", pdev->mpdus_hw_filter);
  7531. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7532. "MPDUs truncated", pdev->mpdus_truncated);
  7533. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7534. "MPDUs receive no ACK", pdev->mpdus_ack_failed);
  7535. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7536. "MPDUs expired", pdev->mpdus_expired);
  7537. ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
  7538. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7539. "Num Rx Overflow errors", pdev->rx_ovfl_errs);
  7540. len += scnprintf(buf + len, buf_len - len, "\n");
  7541. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  7542. "ath10k VDEV stats", num_vdevs);
  7543. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  7544. "=================");
  7545. list_for_each_entry(vdev, &fw_stats->vdevs, list) {
  7546. ath10k_wmi_fw_vdev_stats_extd_fill(vdev, buf, &len);
  7547. }
  7548. len += scnprintf(buf + len, buf_len - len, "\n");
  7549. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  7550. "ath10k PEER stats", num_peers);
  7551. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  7552. "=================");
  7553. list_for_each_entry(peer, &fw_stats->peers, list) {
  7554. ath10k_wmi_fw_peer_stats_fill(peer, buf, &len,
  7555. fw_stats->extended);
  7556. }
  7557. if (fw_stats->extended) {
  7558. list_for_each_entry(extd_peer, &fw_stats->peers_extd, list) {
  7559. ath10k_wmi_fw_extd_peer_stats_fill(extd_peer, buf,
  7560. &len);
  7561. }
  7562. }
  7563. unlock:
  7564. spin_unlock_bh(&ar->data_lock);
  7565. if (len >= buf_len)
  7566. buf[len - 1] = 0;
  7567. else
  7568. buf[len] = 0;
  7569. }
  7570. int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar,
  7571. enum wmi_vdev_subtype subtype)
  7572. {
  7573. switch (subtype) {
  7574. case WMI_VDEV_SUBTYPE_NONE:
  7575. return WMI_VDEV_SUBTYPE_LEGACY_NONE;
  7576. case WMI_VDEV_SUBTYPE_P2P_DEVICE:
  7577. return WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV;
  7578. case WMI_VDEV_SUBTYPE_P2P_CLIENT:
  7579. return WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI;
  7580. case WMI_VDEV_SUBTYPE_P2P_GO:
  7581. return WMI_VDEV_SUBTYPE_LEGACY_P2P_GO;
  7582. case WMI_VDEV_SUBTYPE_PROXY_STA:
  7583. return WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA;
  7584. case WMI_VDEV_SUBTYPE_MESH_11S:
  7585. case WMI_VDEV_SUBTYPE_MESH_NON_11S:
  7586. return -ENOTSUPP;
  7587. }
  7588. return -ENOTSUPP;
  7589. }
  7590. static int ath10k_wmi_10_2_4_op_get_vdev_subtype(struct ath10k *ar,
  7591. enum wmi_vdev_subtype subtype)
  7592. {
  7593. switch (subtype) {
  7594. case WMI_VDEV_SUBTYPE_NONE:
  7595. return WMI_VDEV_SUBTYPE_10_2_4_NONE;
  7596. case WMI_VDEV_SUBTYPE_P2P_DEVICE:
  7597. return WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV;
  7598. case WMI_VDEV_SUBTYPE_P2P_CLIENT:
  7599. return WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI;
  7600. case WMI_VDEV_SUBTYPE_P2P_GO:
  7601. return WMI_VDEV_SUBTYPE_10_2_4_P2P_GO;
  7602. case WMI_VDEV_SUBTYPE_PROXY_STA:
  7603. return WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA;
  7604. case WMI_VDEV_SUBTYPE_MESH_11S:
  7605. return WMI_VDEV_SUBTYPE_10_2_4_MESH_11S;
  7606. case WMI_VDEV_SUBTYPE_MESH_NON_11S:
  7607. return -ENOTSUPP;
  7608. }
  7609. return -ENOTSUPP;
  7610. }
  7611. static int ath10k_wmi_10_4_op_get_vdev_subtype(struct ath10k *ar,
  7612. enum wmi_vdev_subtype subtype)
  7613. {
  7614. switch (subtype) {
  7615. case WMI_VDEV_SUBTYPE_NONE:
  7616. return WMI_VDEV_SUBTYPE_10_4_NONE;
  7617. case WMI_VDEV_SUBTYPE_P2P_DEVICE:
  7618. return WMI_VDEV_SUBTYPE_10_4_P2P_DEV;
  7619. case WMI_VDEV_SUBTYPE_P2P_CLIENT:
  7620. return WMI_VDEV_SUBTYPE_10_4_P2P_CLI;
  7621. case WMI_VDEV_SUBTYPE_P2P_GO:
  7622. return WMI_VDEV_SUBTYPE_10_4_P2P_GO;
  7623. case WMI_VDEV_SUBTYPE_PROXY_STA:
  7624. return WMI_VDEV_SUBTYPE_10_4_PROXY_STA;
  7625. case WMI_VDEV_SUBTYPE_MESH_11S:
  7626. return WMI_VDEV_SUBTYPE_10_4_MESH_11S;
  7627. case WMI_VDEV_SUBTYPE_MESH_NON_11S:
  7628. return WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S;
  7629. }
  7630. return -ENOTSUPP;
  7631. }
  7632. static struct sk_buff *
  7633. ath10k_wmi_10_4_ext_resource_config(struct ath10k *ar,
  7634. enum wmi_host_platform_type type,
  7635. u32 fw_feature_bitmap)
  7636. {
  7637. struct wmi_ext_resource_config_10_4_cmd *cmd;
  7638. struct sk_buff *skb;
  7639. u32 num_tdls_sleep_sta = 0;
  7640. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  7641. if (!skb)
  7642. return ERR_PTR(-ENOMEM);
  7643. if (test_bit(WMI_SERVICE_TDLS_UAPSD_SLEEP_STA, ar->wmi.svc_map))
  7644. num_tdls_sleep_sta = TARGET_10_4_NUM_TDLS_SLEEP_STA;
  7645. cmd = (struct wmi_ext_resource_config_10_4_cmd *)skb->data;
  7646. cmd->host_platform_config = __cpu_to_le32(type);
  7647. cmd->fw_feature_bitmap = __cpu_to_le32(fw_feature_bitmap);
  7648. cmd->wlan_gpio_priority = __cpu_to_le32(ar->coex_gpio_pin);
  7649. cmd->coex_version = __cpu_to_le32(WMI_NO_COEX_VERSION_SUPPORT);
  7650. cmd->coex_gpio_pin1 = __cpu_to_le32(-1);
  7651. cmd->coex_gpio_pin2 = __cpu_to_le32(-1);
  7652. cmd->coex_gpio_pin3 = __cpu_to_le32(-1);
  7653. cmd->num_tdls_vdevs = __cpu_to_le32(TARGET_10_4_NUM_TDLS_VDEVS);
  7654. cmd->num_tdls_conn_table_entries = __cpu_to_le32(20);
  7655. cmd->max_tdls_concurrent_sleep_sta = __cpu_to_le32(num_tdls_sleep_sta);
  7656. cmd->max_tdls_concurrent_buffer_sta =
  7657. __cpu_to_le32(TARGET_10_4_NUM_TDLS_BUFFER_STA);
  7658. ath10k_dbg(ar, ATH10K_DBG_WMI,
  7659. "wmi ext resource config host type %d firmware feature bitmap %08x\n",
  7660. type, fw_feature_bitmap);
  7661. return skb;
  7662. }
  7663. static struct sk_buff *
  7664. ath10k_wmi_10_4_gen_update_fw_tdls_state(struct ath10k *ar, u32 vdev_id,
  7665. enum wmi_tdls_state state)
  7666. {
  7667. struct wmi_10_4_tdls_set_state_cmd *cmd;
  7668. struct sk_buff *skb;
  7669. u32 options = 0;
  7670. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  7671. if (!skb)
  7672. return ERR_PTR(-ENOMEM);
  7673. if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, ar->wmi.svc_map) &&
  7674. state == WMI_TDLS_ENABLE_ACTIVE)
  7675. state = WMI_TDLS_ENABLE_PASSIVE;
  7676. if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, ar->wmi.svc_map))
  7677. options |= WMI_TDLS_BUFFER_STA_EN;
  7678. cmd = (struct wmi_10_4_tdls_set_state_cmd *)skb->data;
  7679. cmd->vdev_id = __cpu_to_le32(vdev_id);
  7680. cmd->state = __cpu_to_le32(state);
  7681. cmd->notification_interval_ms = __cpu_to_le32(5000);
  7682. cmd->tx_discovery_threshold = __cpu_to_le32(100);
  7683. cmd->tx_teardown_threshold = __cpu_to_le32(5);
  7684. cmd->rssi_teardown_threshold = __cpu_to_le32(-75);
  7685. cmd->rssi_delta = __cpu_to_le32(-20);
  7686. cmd->tdls_options = __cpu_to_le32(options);
  7687. cmd->tdls_peer_traffic_ind_window = __cpu_to_le32(2);
  7688. cmd->tdls_peer_traffic_response_timeout_ms = __cpu_to_le32(5000);
  7689. cmd->tdls_puapsd_mask = __cpu_to_le32(0xf);
  7690. cmd->tdls_puapsd_inactivity_time_ms = __cpu_to_le32(0);
  7691. cmd->tdls_puapsd_rx_frame_threshold = __cpu_to_le32(10);
  7692. cmd->teardown_notification_ms = __cpu_to_le32(10);
  7693. cmd->tdls_peer_kickout_threshold = __cpu_to_le32(96);
  7694. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi update fw tdls state %d for vdev %i\n",
  7695. state, vdev_id);
  7696. return skb;
  7697. }
  7698. static u32 ath10k_wmi_prepare_peer_qos(u8 uapsd_queues, u8 sp)
  7699. {
  7700. u32 peer_qos = 0;
  7701. if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VO)
  7702. peer_qos |= WMI_TDLS_PEER_QOS_AC_VO;
  7703. if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VI)
  7704. peer_qos |= WMI_TDLS_PEER_QOS_AC_VI;
  7705. if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BK)
  7706. peer_qos |= WMI_TDLS_PEER_QOS_AC_BK;
  7707. if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BE)
  7708. peer_qos |= WMI_TDLS_PEER_QOS_AC_BE;
  7709. peer_qos |= SM(sp, WMI_TDLS_PEER_SP);
  7710. return peer_qos;
  7711. }
  7712. static struct sk_buff *
  7713. ath10k_wmi_10_4_op_gen_pdev_get_tpc_table_cmdid(struct ath10k *ar, u32 param)
  7714. {
  7715. struct wmi_pdev_get_tpc_table_cmd *cmd;
  7716. struct sk_buff *skb;
  7717. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  7718. if (!skb)
  7719. return ERR_PTR(-ENOMEM);
  7720. cmd = (struct wmi_pdev_get_tpc_table_cmd *)skb->data;
  7721. cmd->param = __cpu_to_le32(param);
  7722. ath10k_dbg(ar, ATH10K_DBG_WMI,
  7723. "wmi pdev get tpc table param:%d\n", param);
  7724. return skb;
  7725. }
  7726. static struct sk_buff *
  7727. ath10k_wmi_10_4_gen_tdls_peer_update(struct ath10k *ar,
  7728. const struct wmi_tdls_peer_update_cmd_arg *arg,
  7729. const struct wmi_tdls_peer_capab_arg *cap,
  7730. const struct wmi_channel_arg *chan_arg)
  7731. {
  7732. struct wmi_10_4_tdls_peer_update_cmd *cmd;
  7733. struct wmi_tdls_peer_capabilities *peer_cap;
  7734. struct wmi_channel *chan;
  7735. struct sk_buff *skb;
  7736. u32 peer_qos;
  7737. int len, chan_len;
  7738. int i;
  7739. /* tdls peer update cmd has place holder for one channel*/
  7740. chan_len = cap->peer_chan_len ? (cap->peer_chan_len - 1) : 0;
  7741. len = sizeof(*cmd) + chan_len * sizeof(*chan);
  7742. skb = ath10k_wmi_alloc_skb(ar, len);
  7743. if (!skb)
  7744. return ERR_PTR(-ENOMEM);
  7745. memset(skb->data, 0, sizeof(*cmd));
  7746. cmd = (struct wmi_10_4_tdls_peer_update_cmd *)skb->data;
  7747. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  7748. ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
  7749. cmd->peer_state = __cpu_to_le32(arg->peer_state);
  7750. peer_qos = ath10k_wmi_prepare_peer_qos(cap->peer_uapsd_queues,
  7751. cap->peer_max_sp);
  7752. peer_cap = &cmd->peer_capab;
  7753. peer_cap->peer_qos = __cpu_to_le32(peer_qos);
  7754. peer_cap->buff_sta_support = __cpu_to_le32(cap->buff_sta_support);
  7755. peer_cap->off_chan_support = __cpu_to_le32(cap->off_chan_support);
  7756. peer_cap->peer_curr_operclass = __cpu_to_le32(cap->peer_curr_operclass);
  7757. peer_cap->self_curr_operclass = __cpu_to_le32(cap->self_curr_operclass);
  7758. peer_cap->peer_chan_len = __cpu_to_le32(cap->peer_chan_len);
  7759. peer_cap->peer_operclass_len = __cpu_to_le32(cap->peer_operclass_len);
  7760. for (i = 0; i < WMI_TDLS_MAX_SUPP_OPER_CLASSES; i++)
  7761. peer_cap->peer_operclass[i] = cap->peer_operclass[i];
  7762. peer_cap->is_peer_responder = __cpu_to_le32(cap->is_peer_responder);
  7763. peer_cap->pref_offchan_num = __cpu_to_le32(cap->pref_offchan_num);
  7764. peer_cap->pref_offchan_bw = __cpu_to_le32(cap->pref_offchan_bw);
  7765. for (i = 0; i < cap->peer_chan_len; i++) {
  7766. chan = (struct wmi_channel *)&peer_cap->peer_chan_list[i];
  7767. ath10k_wmi_put_wmi_channel(ar, chan, &chan_arg[i]);
  7768. }
  7769. ath10k_dbg(ar, ATH10K_DBG_WMI,
  7770. "wmi tdls peer update vdev %i state %d n_chans %u\n",
  7771. arg->vdev_id, arg->peer_state, cap->peer_chan_len);
  7772. return skb;
  7773. }
  7774. static struct sk_buff *
  7775. ath10k_wmi_10_4_gen_radar_found(struct ath10k *ar,
  7776. const struct ath10k_radar_found_info *arg)
  7777. {
  7778. struct wmi_radar_found_info *cmd;
  7779. struct sk_buff *skb;
  7780. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  7781. if (!skb)
  7782. return ERR_PTR(-ENOMEM);
  7783. cmd = (struct wmi_radar_found_info *)skb->data;
  7784. cmd->pri_min = __cpu_to_le32(arg->pri_min);
  7785. cmd->pri_max = __cpu_to_le32(arg->pri_max);
  7786. cmd->width_min = __cpu_to_le32(arg->width_min);
  7787. cmd->width_max = __cpu_to_le32(arg->width_max);
  7788. cmd->sidx_min = __cpu_to_le32(arg->sidx_min);
  7789. cmd->sidx_max = __cpu_to_le32(arg->sidx_max);
  7790. ath10k_dbg(ar, ATH10K_DBG_WMI,
  7791. "wmi radar found pri_min %d pri_max %d width_min %d width_max %d sidx_min %d sidx_max %d\n",
  7792. arg->pri_min, arg->pri_max, arg->width_min,
  7793. arg->width_max, arg->sidx_min, arg->sidx_max);
  7794. return skb;
  7795. }
  7796. static struct sk_buff *
  7797. ath10k_wmi_10_4_gen_per_peer_per_tid_cfg(struct ath10k *ar,
  7798. const struct wmi_per_peer_per_tid_cfg_arg *arg)
  7799. {
  7800. struct wmi_peer_per_tid_cfg_cmd *cmd;
  7801. struct sk_buff *skb;
  7802. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  7803. if (!skb)
  7804. return ERR_PTR(-ENOMEM);
  7805. memset(skb->data, 0, sizeof(*cmd));
  7806. cmd = (struct wmi_peer_per_tid_cfg_cmd *)skb->data;
  7807. cmd->vdev_id = cpu_to_le32(arg->vdev_id);
  7808. ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_macaddr.addr);
  7809. cmd->tid = cpu_to_le32(arg->tid);
  7810. cmd->ack_policy = cpu_to_le32(arg->ack_policy);
  7811. cmd->aggr_control = cpu_to_le32(arg->aggr_control);
  7812. cmd->rate_control = cpu_to_le32(arg->rate_ctrl);
  7813. cmd->retry_count = cpu_to_le32(arg->retry_count);
  7814. cmd->rcode_flags = cpu_to_le32(arg->rcode_flags);
  7815. cmd->ext_tid_cfg_bitmap = cpu_to_le32(arg->ext_tid_cfg_bitmap);
  7816. cmd->rtscts_ctrl = cpu_to_le32(arg->rtscts_ctrl);
  7817. ath10k_dbg(ar, ATH10K_DBG_WMI,
  7818. "wmi noack tid %d vdev id %d ack_policy %d aggr %u rate_ctrl %u rcflag %u retry_count %d rtscts %d ext_tid_cfg_bitmap %d mac_addr %pM\n",
  7819. arg->tid, arg->vdev_id, arg->ack_policy, arg->aggr_control,
  7820. arg->rate_ctrl, arg->rcode_flags, arg->retry_count,
  7821. arg->rtscts_ctrl, arg->ext_tid_cfg_bitmap, arg->peer_macaddr.addr);
  7822. return skb;
  7823. }
  7824. static struct sk_buff *
  7825. ath10k_wmi_op_gen_echo(struct ath10k *ar, u32 value)
  7826. {
  7827. struct wmi_echo_cmd *cmd;
  7828. struct sk_buff *skb;
  7829. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  7830. if (!skb)
  7831. return ERR_PTR(-ENOMEM);
  7832. cmd = (struct wmi_echo_cmd *)skb->data;
  7833. cmd->value = cpu_to_le32(value);
  7834. ath10k_dbg(ar, ATH10K_DBG_WMI,
  7835. "wmi echo value 0x%08x\n", value);
  7836. return skb;
  7837. }
  7838. int
  7839. ath10k_wmi_barrier(struct ath10k *ar)
  7840. {
  7841. int ret;
  7842. int time_left;
  7843. spin_lock_bh(&ar->data_lock);
  7844. reinit_completion(&ar->wmi.barrier);
  7845. spin_unlock_bh(&ar->data_lock);
  7846. ret = ath10k_wmi_echo(ar, ATH10K_WMI_BARRIER_ECHO_ID);
  7847. if (ret) {
  7848. ath10k_warn(ar, "failed to submit wmi echo: %d\n", ret);
  7849. return ret;
  7850. }
  7851. time_left = wait_for_completion_timeout(&ar->wmi.barrier,
  7852. ATH10K_WMI_BARRIER_TIMEOUT_HZ);
  7853. if (!time_left)
  7854. return -ETIMEDOUT;
  7855. return 0;
  7856. }
  7857. static struct sk_buff *
  7858. ath10k_wmi_10_2_4_op_gen_bb_timing(struct ath10k *ar,
  7859. const struct wmi_bb_timing_cfg_arg *arg)
  7860. {
  7861. struct wmi_pdev_bb_timing_cfg_cmd *cmd;
  7862. struct sk_buff *skb;
  7863. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  7864. if (!skb)
  7865. return ERR_PTR(-ENOMEM);
  7866. cmd = (struct wmi_pdev_bb_timing_cfg_cmd *)skb->data;
  7867. cmd->bb_tx_timing = __cpu_to_le32(arg->bb_tx_timing);
  7868. cmd->bb_xpa_timing = __cpu_to_le32(arg->bb_xpa_timing);
  7869. ath10k_dbg(ar, ATH10K_DBG_WMI,
  7870. "wmi pdev bb_tx_timing 0x%x bb_xpa_timing 0x%x\n",
  7871. arg->bb_tx_timing, arg->bb_xpa_timing);
  7872. return skb;
  7873. }
  7874. static const struct wmi_ops wmi_ops = {
  7875. .rx = ath10k_wmi_op_rx,
  7876. .map_svc = wmi_main_svc_map,
  7877. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  7878. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  7879. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  7880. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  7881. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  7882. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  7883. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  7884. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  7885. .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
  7886. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  7887. .pull_fw_stats = ath10k_wmi_main_op_pull_fw_stats,
  7888. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  7889. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  7890. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  7891. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  7892. .gen_pdev_set_rd = ath10k_wmi_op_gen_pdev_set_rd,
  7893. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  7894. .gen_init = ath10k_wmi_op_gen_init,
  7895. .gen_start_scan = ath10k_wmi_op_gen_start_scan,
  7896. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  7897. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  7898. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  7899. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  7900. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  7901. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  7902. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  7903. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  7904. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  7905. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  7906. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  7907. /* .gen_vdev_wmm_conf not implemented */
  7908. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  7909. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  7910. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  7911. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  7912. .gen_peer_assoc = ath10k_wmi_op_gen_peer_assoc,
  7913. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  7914. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  7915. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  7916. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  7917. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  7918. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  7919. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  7920. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  7921. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  7922. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  7923. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  7924. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  7925. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  7926. /* .gen_pdev_get_temperature not implemented */
  7927. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  7928. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  7929. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  7930. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  7931. .fw_stats_fill = ath10k_wmi_main_op_fw_stats_fill,
  7932. .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
  7933. .gen_echo = ath10k_wmi_op_gen_echo,
  7934. /* .gen_bcn_tmpl not implemented */
  7935. /* .gen_prb_tmpl not implemented */
  7936. /* .gen_p2p_go_bcn_ie not implemented */
  7937. /* .gen_adaptive_qcs not implemented */
  7938. /* .gen_pdev_enable_adaptive_cca not implemented */
  7939. };
  7940. static const struct wmi_ops wmi_10_1_ops = {
  7941. .rx = ath10k_wmi_10_1_op_rx,
  7942. .map_svc = wmi_10x_svc_map,
  7943. .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
  7944. .pull_fw_stats = ath10k_wmi_10x_op_pull_fw_stats,
  7945. .gen_init = ath10k_wmi_10_1_op_gen_init,
  7946. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  7947. .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
  7948. .gen_peer_assoc = ath10k_wmi_10_1_op_gen_peer_assoc,
  7949. /* .gen_pdev_get_temperature not implemented */
  7950. /* shared with main branch */
  7951. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  7952. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  7953. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  7954. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  7955. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  7956. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  7957. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  7958. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  7959. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  7960. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  7961. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  7962. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  7963. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  7964. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  7965. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  7966. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  7967. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  7968. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  7969. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  7970. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  7971. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  7972. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  7973. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  7974. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  7975. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  7976. /* .gen_vdev_wmm_conf not implemented */
  7977. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  7978. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  7979. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  7980. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  7981. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  7982. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  7983. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  7984. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  7985. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  7986. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  7987. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  7988. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  7989. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  7990. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  7991. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  7992. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  7993. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  7994. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  7995. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  7996. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  7997. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  7998. .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
  7999. .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
  8000. .gen_echo = ath10k_wmi_op_gen_echo,
  8001. /* .gen_bcn_tmpl not implemented */
  8002. /* .gen_prb_tmpl not implemented */
  8003. /* .gen_p2p_go_bcn_ie not implemented */
  8004. /* .gen_adaptive_qcs not implemented */
  8005. /* .gen_pdev_enable_adaptive_cca not implemented */
  8006. };
  8007. static const struct wmi_ops wmi_10_2_ops = {
  8008. .rx = ath10k_wmi_10_2_op_rx,
  8009. .pull_fw_stats = ath10k_wmi_10_2_op_pull_fw_stats,
  8010. .gen_init = ath10k_wmi_10_2_op_gen_init,
  8011. .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
  8012. /* .gen_pdev_get_temperature not implemented */
  8013. /* shared with 10.1 */
  8014. .map_svc = wmi_10x_svc_map,
  8015. .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
  8016. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  8017. .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
  8018. .gen_echo = ath10k_wmi_op_gen_echo,
  8019. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  8020. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  8021. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  8022. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  8023. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  8024. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  8025. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  8026. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  8027. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  8028. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  8029. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  8030. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  8031. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  8032. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  8033. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  8034. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  8035. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  8036. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  8037. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  8038. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  8039. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  8040. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  8041. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  8042. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  8043. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  8044. /* .gen_vdev_wmm_conf not implemented */
  8045. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  8046. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  8047. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  8048. .gen_pdev_set_base_macaddr = ath10k_wmi_op_gen_pdev_set_base_macaddr,
  8049. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  8050. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  8051. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  8052. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  8053. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  8054. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  8055. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  8056. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  8057. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  8058. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  8059. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  8060. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  8061. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  8062. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  8063. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  8064. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  8065. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  8066. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  8067. .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
  8068. .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
  8069. /* .gen_pdev_enable_adaptive_cca not implemented */
  8070. };
  8071. static const struct wmi_ops wmi_10_2_4_ops = {
  8072. .rx = ath10k_wmi_10_2_op_rx,
  8073. .pull_fw_stats = ath10k_wmi_10_2_4_op_pull_fw_stats,
  8074. .gen_init = ath10k_wmi_10_2_op_gen_init,
  8075. .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
  8076. .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
  8077. .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
  8078. /* shared with 10.1 */
  8079. .map_svc = wmi_10x_svc_map,
  8080. .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
  8081. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  8082. .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
  8083. .gen_echo = ath10k_wmi_op_gen_echo,
  8084. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  8085. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  8086. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  8087. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  8088. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  8089. .pull_swba = ath10k_wmi_10_2_4_op_pull_swba_ev,
  8090. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  8091. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  8092. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  8093. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  8094. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  8095. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  8096. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  8097. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  8098. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  8099. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  8100. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  8101. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  8102. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  8103. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  8104. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  8105. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  8106. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  8107. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  8108. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  8109. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  8110. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  8111. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  8112. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  8113. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  8114. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  8115. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  8116. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  8117. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  8118. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  8119. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  8120. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  8121. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  8122. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  8123. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  8124. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  8125. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  8126. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  8127. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  8128. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  8129. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  8130. .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
  8131. .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
  8132. .gen_pdev_enable_adaptive_cca =
  8133. ath10k_wmi_op_gen_pdev_enable_adaptive_cca,
  8134. .get_vdev_subtype = ath10k_wmi_10_2_4_op_get_vdev_subtype,
  8135. .gen_bb_timing = ath10k_wmi_10_2_4_op_gen_bb_timing,
  8136. /* .gen_bcn_tmpl not implemented */
  8137. /* .gen_prb_tmpl not implemented */
  8138. /* .gen_p2p_go_bcn_ie not implemented */
  8139. /* .gen_adaptive_qcs not implemented */
  8140. };
  8141. static const struct wmi_ops wmi_10_4_ops = {
  8142. .rx = ath10k_wmi_10_4_op_rx,
  8143. .map_svc = wmi_10_4_svc_map,
  8144. .pull_fw_stats = ath10k_wmi_10_4_op_pull_fw_stats,
  8145. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  8146. .pull_mgmt_rx = ath10k_wmi_10_4_op_pull_mgmt_rx_ev,
  8147. .pull_ch_info = ath10k_wmi_10_4_op_pull_ch_info_ev,
  8148. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  8149. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  8150. .pull_swba = ath10k_wmi_10_4_op_pull_swba_ev,
  8151. .pull_phyerr_hdr = ath10k_wmi_10_4_op_pull_phyerr_ev_hdr,
  8152. .pull_phyerr = ath10k_wmi_10_4_op_pull_phyerr_ev,
  8153. .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
  8154. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  8155. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  8156. .pull_dfs_status_ev = ath10k_wmi_10_4_op_pull_dfs_status_ev,
  8157. .get_txbf_conf_scheme = ath10k_wmi_10_4_txbf_conf_scheme,
  8158. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  8159. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  8160. .gen_pdev_set_base_macaddr = ath10k_wmi_op_gen_pdev_set_base_macaddr,
  8161. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  8162. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  8163. .gen_init = ath10k_wmi_10_4_op_gen_init,
  8164. .gen_start_scan = ath10k_wmi_op_gen_start_scan,
  8165. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  8166. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  8167. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  8168. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  8169. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  8170. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  8171. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  8172. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  8173. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  8174. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  8175. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  8176. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  8177. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  8178. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  8179. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  8180. .gen_peer_assoc = ath10k_wmi_10_4_op_gen_peer_assoc,
  8181. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  8182. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  8183. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  8184. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  8185. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  8186. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  8187. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  8188. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  8189. .gen_dbglog_cfg = ath10k_wmi_10_4_op_gen_dbglog_cfg,
  8190. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  8191. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  8192. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  8193. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  8194. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  8195. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  8196. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  8197. .fw_stats_fill = ath10k_wmi_10_4_op_fw_stats_fill,
  8198. .ext_resource_config = ath10k_wmi_10_4_ext_resource_config,
  8199. .gen_update_fw_tdls_state = ath10k_wmi_10_4_gen_update_fw_tdls_state,
  8200. .gen_tdls_peer_update = ath10k_wmi_10_4_gen_tdls_peer_update,
  8201. .gen_pdev_get_tpc_table_cmdid =
  8202. ath10k_wmi_10_4_op_gen_pdev_get_tpc_table_cmdid,
  8203. .gen_radar_found = ath10k_wmi_10_4_gen_radar_found,
  8204. .gen_per_peer_per_tid_cfg = ath10k_wmi_10_4_gen_per_peer_per_tid_cfg,
  8205. /* shared with 10.2 */
  8206. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  8207. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  8208. .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
  8209. .get_vdev_subtype = ath10k_wmi_10_4_op_get_vdev_subtype,
  8210. .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
  8211. .gen_echo = ath10k_wmi_op_gen_echo,
  8212. .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
  8213. };
  8214. int ath10k_wmi_attach(struct ath10k *ar)
  8215. {
  8216. switch (ar->running_fw->fw_file.wmi_op_version) {
  8217. case ATH10K_FW_WMI_OP_VERSION_10_4:
  8218. ar->wmi.ops = &wmi_10_4_ops;
  8219. ar->wmi.cmd = &wmi_10_4_cmd_map;
  8220. ar->wmi.vdev_param = &wmi_10_4_vdev_param_map;
  8221. ar->wmi.pdev_param = &wmi_10_4_pdev_param_map;
  8222. ar->wmi.peer_param = &wmi_peer_param_map;
  8223. ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
  8224. ar->wmi_key_cipher = wmi_key_cipher_suites;
  8225. break;
  8226. case ATH10K_FW_WMI_OP_VERSION_10_2_4:
  8227. ar->wmi.cmd = &wmi_10_2_4_cmd_map;
  8228. ar->wmi.ops = &wmi_10_2_4_ops;
  8229. ar->wmi.vdev_param = &wmi_10_2_4_vdev_param_map;
  8230. ar->wmi.pdev_param = &wmi_10_2_4_pdev_param_map;
  8231. ar->wmi.peer_param = &wmi_peer_param_map;
  8232. ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
  8233. ar->wmi_key_cipher = wmi_key_cipher_suites;
  8234. break;
  8235. case ATH10K_FW_WMI_OP_VERSION_10_2:
  8236. ar->wmi.cmd = &wmi_10_2_cmd_map;
  8237. ar->wmi.ops = &wmi_10_2_ops;
  8238. ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
  8239. ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
  8240. ar->wmi.peer_param = &wmi_peer_param_map;
  8241. ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
  8242. ar->wmi_key_cipher = wmi_key_cipher_suites;
  8243. break;
  8244. case ATH10K_FW_WMI_OP_VERSION_10_1:
  8245. ar->wmi.cmd = &wmi_10x_cmd_map;
  8246. ar->wmi.ops = &wmi_10_1_ops;
  8247. ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
  8248. ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
  8249. ar->wmi.peer_param = &wmi_peer_param_map;
  8250. ar->wmi.peer_flags = &wmi_10x_peer_flags_map;
  8251. ar->wmi_key_cipher = wmi_key_cipher_suites;
  8252. break;
  8253. case ATH10K_FW_WMI_OP_VERSION_MAIN:
  8254. ar->wmi.cmd = &wmi_cmd_map;
  8255. ar->wmi.ops = &wmi_ops;
  8256. ar->wmi.vdev_param = &wmi_vdev_param_map;
  8257. ar->wmi.pdev_param = &wmi_pdev_param_map;
  8258. ar->wmi.peer_param = &wmi_peer_param_map;
  8259. ar->wmi.peer_flags = &wmi_peer_flags_map;
  8260. ar->wmi_key_cipher = wmi_key_cipher_suites;
  8261. break;
  8262. case ATH10K_FW_WMI_OP_VERSION_TLV:
  8263. ath10k_wmi_tlv_attach(ar);
  8264. ar->wmi_key_cipher = wmi_tlv_key_cipher_suites;
  8265. break;
  8266. case ATH10K_FW_WMI_OP_VERSION_UNSET:
  8267. case ATH10K_FW_WMI_OP_VERSION_MAX:
  8268. ath10k_err(ar, "unsupported WMI op version: %d\n",
  8269. ar->running_fw->fw_file.wmi_op_version);
  8270. return -EINVAL;
  8271. }
  8272. init_completion(&ar->wmi.service_ready);
  8273. init_completion(&ar->wmi.unified_ready);
  8274. init_completion(&ar->wmi.barrier);
  8275. init_completion(&ar->wmi.radar_confirm);
  8276. INIT_WORK(&ar->svc_rdy_work, ath10k_wmi_event_service_ready_work);
  8277. INIT_WORK(&ar->radar_confirmation_work,
  8278. ath10k_radar_confirmation_work);
  8279. if (test_bit(ATH10K_FW_FEATURE_MGMT_TX_BY_REF,
  8280. ar->running_fw->fw_file.fw_features)) {
  8281. idr_init(&ar->wmi.mgmt_pending_tx);
  8282. }
  8283. return 0;
  8284. }
  8285. void ath10k_wmi_free_host_mem(struct ath10k *ar)
  8286. {
  8287. int i;
  8288. /* free the host memory chunks requested by firmware */
  8289. for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
  8290. dma_free_coherent(ar->dev,
  8291. ar->wmi.mem_chunks[i].len,
  8292. ar->wmi.mem_chunks[i].vaddr,
  8293. ar->wmi.mem_chunks[i].paddr);
  8294. }
  8295. ar->wmi.num_mem_chunks = 0;
  8296. }
  8297. static int ath10k_wmi_mgmt_tx_clean_up_pending(int msdu_id, void *ptr,
  8298. void *ctx)
  8299. {
  8300. struct ath10k_mgmt_tx_pkt_addr *pkt_addr = ptr;
  8301. struct ath10k *ar = ctx;
  8302. struct sk_buff *msdu;
  8303. ath10k_dbg(ar, ATH10K_DBG_WMI,
  8304. "force cleanup mgmt msdu_id %u\n", msdu_id);
  8305. msdu = pkt_addr->vaddr;
  8306. dma_unmap_single(ar->dev, pkt_addr->paddr,
  8307. msdu->len, DMA_TO_DEVICE);
  8308. ieee80211_free_txskb(ar->hw, msdu);
  8309. return 0;
  8310. }
  8311. void ath10k_wmi_detach(struct ath10k *ar)
  8312. {
  8313. if (test_bit(ATH10K_FW_FEATURE_MGMT_TX_BY_REF,
  8314. ar->running_fw->fw_file.fw_features)) {
  8315. spin_lock_bh(&ar->data_lock);
  8316. idr_for_each(&ar->wmi.mgmt_pending_tx,
  8317. ath10k_wmi_mgmt_tx_clean_up_pending, ar);
  8318. idr_destroy(&ar->wmi.mgmt_pending_tx);
  8319. spin_unlock_bh(&ar->data_lock);
  8320. }
  8321. cancel_work_sync(&ar->svc_rdy_work);
  8322. dev_kfree_skb(ar->svc_rdy_skb);
  8323. }