swap.h 1.5 KB

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  1. /* SPDX-License-Identifier: ISC */
  2. /*
  3. * Copyright (c) 2015-2016 Qualcomm Atheros, Inc.
  4. */
  5. #ifndef _SWAP_H_
  6. #define _SWAP_H_
  7. #define ATH10K_SWAP_CODE_SEG_BIN_LEN_MAX (512 * 1024)
  8. #define ATH10K_SWAP_CODE_SEG_MAGIC_BYTES_SZ 12
  9. #define ATH10K_SWAP_CODE_SEG_NUM_MAX 16
  10. /* Currently only one swap segment is supported */
  11. #define ATH10K_SWAP_CODE_SEG_NUM_SUPPORTED 1
  12. struct ath10k_fw_file;
  13. struct ath10k_swap_code_seg_tlv {
  14. __le32 address;
  15. __le32 length;
  16. u8 data[];
  17. } __packed;
  18. struct ath10k_swap_code_seg_tail {
  19. u8 magic_signature[ATH10K_SWAP_CODE_SEG_MAGIC_BYTES_SZ];
  20. __le32 bmi_write_addr;
  21. } __packed;
  22. union ath10k_swap_code_seg_item {
  23. struct ath10k_swap_code_seg_tlv tlv;
  24. struct ath10k_swap_code_seg_tail tail;
  25. } __packed;
  26. struct ath10k_swap_code_seg_hw_info {
  27. /* Swap binary image size */
  28. __le32 swap_size;
  29. __le32 num_segs;
  30. /* Swap data size */
  31. __le32 size;
  32. __le32 size_log2;
  33. __le32 bus_addr[ATH10K_SWAP_CODE_SEG_NUM_MAX];
  34. __le64 reserved[ATH10K_SWAP_CODE_SEG_NUM_MAX];
  35. } __packed;
  36. struct ath10k_swap_code_seg_info {
  37. struct ath10k_swap_code_seg_hw_info seg_hw_info;
  38. void *virt_address[ATH10K_SWAP_CODE_SEG_NUM_SUPPORTED];
  39. u32 target_addr;
  40. dma_addr_t paddr[ATH10K_SWAP_CODE_SEG_NUM_SUPPORTED];
  41. };
  42. int ath10k_swap_code_seg_configure(struct ath10k *ar,
  43. const struct ath10k_fw_file *fw_file);
  44. void ath10k_swap_code_seg_release(struct ath10k *ar,
  45. struct ath10k_fw_file *fw_file);
  46. int ath10k_swap_code_seg_init(struct ath10k *ar,
  47. struct ath10k_fw_file *fw_file);
  48. #endif