sdio.h 6.7 KB

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  1. /* SPDX-License-Identifier: ISC */
  2. /*
  3. * Copyright (c) 2004-2011 Atheros Communications Inc.
  4. * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
  5. * Copyright (c) 2016-2017 Erik Stromdahl <[email protected]>
  6. */
  7. #ifndef _SDIO_H_
  8. #define _SDIO_H_
  9. #define ATH10K_HIF_MBOX_BLOCK_SIZE 256
  10. #define ATH10K_SDIO_MAX_BUFFER_SIZE 4096 /*Unsure of this constant*/
  11. /* Mailbox address in SDIO address space */
  12. #define ATH10K_HIF_MBOX_BASE_ADDR 0x1000
  13. #define ATH10K_HIF_MBOX_WIDTH 0x800
  14. #define ATH10K_HIF_MBOX_TOT_WIDTH \
  15. (ATH10K_HIF_MBOX_NUM_MAX * ATH10K_HIF_MBOX_WIDTH)
  16. #define ATH10K_HIF_MBOX0_EXT_BASE_ADDR 0x5000
  17. #define ATH10K_HIF_MBOX0_EXT_WIDTH (36 * 1024)
  18. #define ATH10K_HIF_MBOX0_EXT_WIDTH_ROME_2_0 (56 * 1024)
  19. #define ATH10K_HIF_MBOX1_EXT_WIDTH (36 * 1024)
  20. #define ATH10K_HIF_MBOX_DUMMY_SPACE_SIZE (2 * 1024)
  21. #define ATH10K_HTC_MBOX_MAX_PAYLOAD_LENGTH \
  22. (ATH10K_SDIO_MAX_BUFFER_SIZE - sizeof(struct ath10k_htc_hdr))
  23. #define ATH10K_HIF_MBOX_NUM_MAX 4
  24. #define ATH10K_SDIO_BUS_REQUEST_MAX_NUM 1024
  25. #define ATH10K_SDIO_HIF_COMMUNICATION_TIMEOUT_HZ (100 * HZ)
  26. /* HTC runs over mailbox 0 */
  27. #define ATH10K_HTC_MAILBOX 0
  28. #define ATH10K_HTC_MAILBOX_MASK BIT(ATH10K_HTC_MAILBOX)
  29. /* GMBOX addresses */
  30. #define ATH10K_HIF_GMBOX_BASE_ADDR 0x7000
  31. #define ATH10K_HIF_GMBOX_WIDTH 0x4000
  32. /* Modified versions of the sdio.h macros.
  33. * The macros in sdio.h can't be used easily with the FIELD_{PREP|GET}
  34. * macros in bitfield.h, so we define our own macros here.
  35. */
  36. #define ATH10K_SDIO_DRIVE_DTSX_MASK \
  37. (SDIO_DRIVE_DTSx_MASK << SDIO_DRIVE_DTSx_SHIFT)
  38. #define ATH10K_SDIO_DRIVE_DTSX_TYPE_B 0
  39. #define ATH10K_SDIO_DRIVE_DTSX_TYPE_A 1
  40. #define ATH10K_SDIO_DRIVE_DTSX_TYPE_C 2
  41. #define ATH10K_SDIO_DRIVE_DTSX_TYPE_D 3
  42. /* SDIO CCCR register definitions */
  43. #define CCCR_SDIO_IRQ_MODE_REG 0xF0
  44. #define CCCR_SDIO_IRQ_MODE_REG_SDIO3 0x16
  45. #define CCCR_SDIO_DRIVER_STRENGTH_ENABLE_ADDR 0xF2
  46. #define CCCR_SDIO_DRIVER_STRENGTH_ENABLE_A 0x02
  47. #define CCCR_SDIO_DRIVER_STRENGTH_ENABLE_C 0x04
  48. #define CCCR_SDIO_DRIVER_STRENGTH_ENABLE_D 0x08
  49. #define CCCR_SDIO_ASYNC_INT_DELAY_ADDRESS 0xF0
  50. #define CCCR_SDIO_ASYNC_INT_DELAY_MASK 0xC0
  51. /* mode to enable special 4-bit interrupt assertion without clock */
  52. #define SDIO_IRQ_MODE_ASYNC_4BIT_IRQ BIT(0)
  53. #define SDIO_IRQ_MODE_ASYNC_4BIT_IRQ_SDIO3 BIT(1)
  54. #define ATH10K_SDIO_TARGET_DEBUG_INTR_MASK 0x01
  55. /* The theoretical maximum number of RX messages that can be fetched
  56. * from the mbox interrupt handler in one loop is derived in the following
  57. * way:
  58. *
  59. * Let's assume that each packet in a bundle of the maximum bundle size
  60. * (HTC_HOST_MAX_MSG_PER_RX_BUNDLE) has the HTC header bundle count set
  61. * to the maximum value (HTC_HOST_MAX_MSG_PER_RX_BUNDLE).
  62. *
  63. * in this case the driver must allocate
  64. * (HTC_HOST_MAX_MSG_PER_RX_BUNDLE * 2) skb's.
  65. */
  66. #define ATH10K_SDIO_MAX_RX_MSGS \
  67. (HTC_HOST_MAX_MSG_PER_RX_BUNDLE * 2)
  68. #define ATH10K_FIFO_TIMEOUT_AND_CHIP_CONTROL 0x00000868u
  69. #define ATH10K_FIFO_TIMEOUT_AND_CHIP_CONTROL_DISABLE_SLEEP_OFF 0xFFFEFFFF
  70. #define ATH10K_FIFO_TIMEOUT_AND_CHIP_CONTROL_DISABLE_SLEEP_ON 0x10000
  71. enum sdio_mbox_state {
  72. SDIO_MBOX_UNKNOWN_STATE = 0,
  73. SDIO_MBOX_REQUEST_TO_SLEEP_STATE = 1,
  74. SDIO_MBOX_SLEEP_STATE = 2,
  75. SDIO_MBOX_AWAKE_STATE = 3,
  76. };
  77. #define ATH10K_CIS_READ_WAIT_4_RTC_CYCLE_IN_US 125
  78. #define ATH10K_CIS_RTC_STATE_ADDR 0x1138
  79. #define ATH10K_CIS_RTC_STATE_ON 0x01
  80. #define ATH10K_CIS_XTAL_SETTLE_DURATION_IN_US 1500
  81. #define ATH10K_CIS_READ_RETRY 10
  82. #define ATH10K_MIN_SLEEP_INACTIVITY_TIME_MS 50
  83. /* TODO: remove this and use skb->cb instead, much cleaner approach */
  84. struct ath10k_sdio_bus_request {
  85. struct list_head list;
  86. /* sdio address */
  87. u32 address;
  88. struct sk_buff *skb;
  89. enum ath10k_htc_ep_id eid;
  90. int status;
  91. /* Specifies if the current request is an HTC message.
  92. * If not, the eid is not applicable an the TX completion handler
  93. * associated with the endpoint will not be invoked.
  94. */
  95. bool htc_msg;
  96. /* Completion that (if set) will be invoked for non HTC requests
  97. * (htc_msg == false) when the request has been processed.
  98. */
  99. struct completion *comp;
  100. };
  101. struct ath10k_sdio_rx_data {
  102. struct sk_buff *skb;
  103. size_t alloc_len;
  104. size_t act_len;
  105. enum ath10k_htc_ep_id eid;
  106. bool part_of_bundle;
  107. bool last_in_bundle;
  108. bool trailer_only;
  109. };
  110. struct ath10k_sdio_irq_proc_regs {
  111. u8 host_int_status;
  112. u8 cpu_int_status;
  113. u8 error_int_status;
  114. u8 counter_int_status;
  115. u8 mbox_frame;
  116. u8 rx_lookahead_valid;
  117. u8 host_int_status2;
  118. u8 gmbox_rx_avail;
  119. __le32 rx_lookahead[2 * ATH10K_HIF_MBOX_NUM_MAX];
  120. __le32 int_status_enable;
  121. };
  122. struct ath10k_sdio_irq_enable_regs {
  123. u8 int_status_en;
  124. u8 cpu_int_status_en;
  125. u8 err_int_status_en;
  126. u8 cntr_int_status_en;
  127. };
  128. struct ath10k_sdio_irq_data {
  129. /* protects irq_proc_reg and irq_en_reg below.
  130. * We use a mutex here and not a spinlock since we will have the
  131. * mutex locked while calling the sdio_memcpy_ functions.
  132. * These function require non atomic context, and hence, spinlocks
  133. * can be held while calling these functions.
  134. */
  135. struct mutex mtx;
  136. struct ath10k_sdio_irq_proc_regs *irq_proc_reg;
  137. struct ath10k_sdio_irq_enable_regs *irq_en_reg;
  138. };
  139. struct ath10k_mbox_ext_info {
  140. u32 htc_ext_addr;
  141. u32 htc_ext_sz;
  142. };
  143. struct ath10k_mbox_info {
  144. u32 htc_addr;
  145. struct ath10k_mbox_ext_info ext_info[2];
  146. u32 block_size;
  147. u32 block_mask;
  148. u32 gmbox_addr;
  149. u32 gmbox_sz;
  150. };
  151. struct ath10k_sdio {
  152. struct sdio_func *func;
  153. struct ath10k_mbox_info mbox_info;
  154. bool swap_mbox;
  155. u32 mbox_addr[ATH10K_HTC_EP_COUNT];
  156. u32 mbox_size[ATH10K_HTC_EP_COUNT];
  157. /* available bus requests */
  158. struct ath10k_sdio_bus_request bus_req[ATH10K_SDIO_BUS_REQUEST_MAX_NUM];
  159. /* free list of bus requests */
  160. struct list_head bus_req_freeq;
  161. struct sk_buff_head rx_head;
  162. /* protects access to bus_req_freeq */
  163. spinlock_t lock;
  164. struct ath10k_sdio_rx_data rx_pkts[ATH10K_SDIO_MAX_RX_MSGS];
  165. size_t n_rx_pkts;
  166. struct ath10k *ar;
  167. struct ath10k_sdio_irq_data irq_data;
  168. /* temporary buffer for sdio read.
  169. * It is allocated when probe, and used for receive bundled packets,
  170. * the read for bundled packets is not parallel, so it does not need
  171. * protected.
  172. */
  173. u8 *vsg_buffer;
  174. /* temporary buffer for BMI requests */
  175. u8 *bmi_buf;
  176. bool is_disabled;
  177. struct workqueue_struct *workqueue;
  178. struct work_struct wr_async_work;
  179. struct list_head wr_asyncq;
  180. /* protects access to wr_asyncq */
  181. spinlock_t wr_async_lock;
  182. struct work_struct async_work_rx;
  183. struct timer_list sleep_timer;
  184. enum sdio_mbox_state mbox_state;
  185. };
  186. static inline struct ath10k_sdio *ath10k_sdio_priv(struct ath10k *ar)
  187. {
  188. return (struct ath10k_sdio *)ar->drv_priv;
  189. }
  190. #endif