qmi.h 2.7 KB

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  1. /* SPDX-License-Identifier: ISC */
  2. /*
  3. * Copyright (c) 2018 The Linux Foundation. All rights reserved.
  4. */
  5. #ifndef _ATH10K_QMI_H_
  6. #define _ATH10K_QMI_H_
  7. #include <linux/soc/qcom/qmi.h>
  8. #include <linux/qrtr.h>
  9. #include "qmi_wlfw_v01.h"
  10. #define MAX_NUM_MEMORY_REGIONS 2
  11. #define MAX_TIMESTAMP_LEN 32
  12. #define MAX_BUILD_ID_LEN 128
  13. #define MAX_NUM_CAL_V01 5
  14. enum ath10k_qmi_driver_event_type {
  15. ATH10K_QMI_EVENT_SERVER_ARRIVE,
  16. ATH10K_QMI_EVENT_SERVER_EXIT,
  17. ATH10K_QMI_EVENT_FW_READY_IND,
  18. ATH10K_QMI_EVENT_FW_DOWN_IND,
  19. ATH10K_QMI_EVENT_MSA_READY_IND,
  20. ATH10K_QMI_EVENT_MAX,
  21. };
  22. struct ath10k_msa_mem_info {
  23. phys_addr_t addr;
  24. u32 size;
  25. bool secure;
  26. };
  27. struct ath10k_qmi_chip_info {
  28. u32 chip_id;
  29. u32 chip_family;
  30. };
  31. struct ath10k_qmi_board_info {
  32. u32 board_id;
  33. };
  34. struct ath10k_qmi_soc_info {
  35. u32 soc_id;
  36. };
  37. struct ath10k_qmi_cal_data {
  38. u32 cal_id;
  39. u32 total_size;
  40. u8 *data;
  41. };
  42. struct ath10k_tgt_pipe_cfg {
  43. __le32 pipe_num;
  44. __le32 pipe_dir;
  45. __le32 nentries;
  46. __le32 nbytes_max;
  47. __le32 flags;
  48. __le32 reserved;
  49. };
  50. struct ath10k_svc_pipe_cfg {
  51. __le32 service_id;
  52. __le32 pipe_dir;
  53. __le32 pipe_num;
  54. };
  55. struct ath10k_shadow_reg_cfg {
  56. __le16 ce_id;
  57. __le16 reg_offset;
  58. };
  59. struct ath10k_qmi_wlan_enable_cfg {
  60. u32 num_ce_tgt_cfg;
  61. struct ath10k_tgt_pipe_cfg *ce_tgt_cfg;
  62. u32 num_ce_svc_pipe_cfg;
  63. struct ath10k_svc_pipe_cfg *ce_svc_cfg;
  64. u32 num_shadow_reg_cfg;
  65. struct ath10k_shadow_reg_cfg *shadow_reg_cfg;
  66. };
  67. struct ath10k_qmi_driver_event {
  68. struct list_head list;
  69. enum ath10k_qmi_driver_event_type type;
  70. void *data;
  71. };
  72. enum ath10k_qmi_state {
  73. ATH10K_QMI_STATE_INIT_DONE,
  74. ATH10K_QMI_STATE_DEINIT,
  75. };
  76. struct ath10k_qmi {
  77. struct ath10k *ar;
  78. struct qmi_handle qmi_hdl;
  79. struct sockaddr_qrtr sq;
  80. struct work_struct event_work;
  81. struct workqueue_struct *event_wq;
  82. struct list_head event_list;
  83. spinlock_t event_lock; /* spinlock for qmi event list */
  84. u32 nr_mem_region;
  85. struct ath10k_msa_mem_info mem_region[MAX_NUM_MEMORY_REGIONS];
  86. struct ath10k_qmi_chip_info chip_info;
  87. struct ath10k_qmi_board_info board_info;
  88. struct ath10k_qmi_soc_info soc_info;
  89. char fw_build_id[MAX_BUILD_ID_LEN + 1];
  90. u32 fw_version;
  91. bool fw_ready;
  92. char fw_build_timestamp[MAX_TIMESTAMP_LEN + 1];
  93. struct ath10k_qmi_cal_data cal_data[MAX_NUM_CAL_V01];
  94. bool msa_fixed_perm;
  95. enum ath10k_qmi_state state;
  96. };
  97. int ath10k_qmi_wlan_enable(struct ath10k *ar,
  98. struct ath10k_qmi_wlan_enable_cfg *config,
  99. enum wlfw_driver_mode_enum_v01 mode,
  100. const char *version);
  101. int ath10k_qmi_wlan_disable(struct ath10k *ar);
  102. int ath10k_qmi_init(struct ath10k *ar, u32 msa_size);
  103. int ath10k_qmi_deinit(struct ath10k *ar);
  104. int ath10k_qmi_set_fw_log_mode(struct ath10k *ar, u8 fw_log_mode);
  105. #endif /* ATH10K_QMI_H */