htt.c 15 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436
  1. // SPDX-License-Identifier: ISC
  2. /*
  3. * Copyright (c) 2005-2011 Atheros Communications Inc.
  4. * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
  5. */
  6. #include <linux/slab.h>
  7. #include <linux/if_ether.h>
  8. #include "htt.h"
  9. #include "core.h"
  10. #include "debug.h"
  11. #include "hif.h"
  12. static const enum htt_t2h_msg_type htt_main_t2h_msg_types[] = {
  13. [HTT_MAIN_T2H_MSG_TYPE_VERSION_CONF] = HTT_T2H_MSG_TYPE_VERSION_CONF,
  14. [HTT_MAIN_T2H_MSG_TYPE_RX_IND] = HTT_T2H_MSG_TYPE_RX_IND,
  15. [HTT_MAIN_T2H_MSG_TYPE_RX_FLUSH] = HTT_T2H_MSG_TYPE_RX_FLUSH,
  16. [HTT_MAIN_T2H_MSG_TYPE_PEER_MAP] = HTT_T2H_MSG_TYPE_PEER_MAP,
  17. [HTT_MAIN_T2H_MSG_TYPE_PEER_UNMAP] = HTT_T2H_MSG_TYPE_PEER_UNMAP,
  18. [HTT_MAIN_T2H_MSG_TYPE_RX_ADDBA] = HTT_T2H_MSG_TYPE_RX_ADDBA,
  19. [HTT_MAIN_T2H_MSG_TYPE_RX_DELBA] = HTT_T2H_MSG_TYPE_RX_DELBA,
  20. [HTT_MAIN_T2H_MSG_TYPE_TX_COMPL_IND] = HTT_T2H_MSG_TYPE_TX_COMPL_IND,
  21. [HTT_MAIN_T2H_MSG_TYPE_PKTLOG] = HTT_T2H_MSG_TYPE_PKTLOG,
  22. [HTT_MAIN_T2H_MSG_TYPE_STATS_CONF] = HTT_T2H_MSG_TYPE_STATS_CONF,
  23. [HTT_MAIN_T2H_MSG_TYPE_RX_FRAG_IND] = HTT_T2H_MSG_TYPE_RX_FRAG_IND,
  24. [HTT_MAIN_T2H_MSG_TYPE_SEC_IND] = HTT_T2H_MSG_TYPE_SEC_IND,
  25. [HTT_MAIN_T2H_MSG_TYPE_TX_INSPECT_IND] =
  26. HTT_T2H_MSG_TYPE_TX_INSPECT_IND,
  27. [HTT_MAIN_T2H_MSG_TYPE_MGMT_TX_COMPL_IND] =
  28. HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION,
  29. [HTT_MAIN_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND] =
  30. HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND,
  31. [HTT_MAIN_T2H_MSG_TYPE_RX_PN_IND] = HTT_T2H_MSG_TYPE_RX_PN_IND,
  32. [HTT_MAIN_T2H_MSG_TYPE_RX_OFFLOAD_DELIVER_IND] =
  33. HTT_T2H_MSG_TYPE_RX_OFFLOAD_DELIVER_IND,
  34. [HTT_MAIN_T2H_MSG_TYPE_TEST] = HTT_T2H_MSG_TYPE_TEST,
  35. };
  36. static const enum htt_t2h_msg_type htt_10x_t2h_msg_types[] = {
  37. [HTT_10X_T2H_MSG_TYPE_VERSION_CONF] = HTT_T2H_MSG_TYPE_VERSION_CONF,
  38. [HTT_10X_T2H_MSG_TYPE_RX_IND] = HTT_T2H_MSG_TYPE_RX_IND,
  39. [HTT_10X_T2H_MSG_TYPE_RX_FLUSH] = HTT_T2H_MSG_TYPE_RX_FLUSH,
  40. [HTT_10X_T2H_MSG_TYPE_PEER_MAP] = HTT_T2H_MSG_TYPE_PEER_MAP,
  41. [HTT_10X_T2H_MSG_TYPE_PEER_UNMAP] = HTT_T2H_MSG_TYPE_PEER_UNMAP,
  42. [HTT_10X_T2H_MSG_TYPE_RX_ADDBA] = HTT_T2H_MSG_TYPE_RX_ADDBA,
  43. [HTT_10X_T2H_MSG_TYPE_RX_DELBA] = HTT_T2H_MSG_TYPE_RX_DELBA,
  44. [HTT_10X_T2H_MSG_TYPE_TX_COMPL_IND] = HTT_T2H_MSG_TYPE_TX_COMPL_IND,
  45. [HTT_10X_T2H_MSG_TYPE_PKTLOG] = HTT_T2H_MSG_TYPE_PKTLOG,
  46. [HTT_10X_T2H_MSG_TYPE_STATS_CONF] = HTT_T2H_MSG_TYPE_STATS_CONF,
  47. [HTT_10X_T2H_MSG_TYPE_RX_FRAG_IND] = HTT_T2H_MSG_TYPE_RX_FRAG_IND,
  48. [HTT_10X_T2H_MSG_TYPE_SEC_IND] = HTT_T2H_MSG_TYPE_SEC_IND,
  49. [HTT_10X_T2H_MSG_TYPE_RC_UPDATE_IND] = HTT_T2H_MSG_TYPE_RC_UPDATE_IND,
  50. [HTT_10X_T2H_MSG_TYPE_TX_INSPECT_IND] = HTT_T2H_MSG_TYPE_TX_INSPECT_IND,
  51. [HTT_10X_T2H_MSG_TYPE_TEST] = HTT_T2H_MSG_TYPE_TEST,
  52. [HTT_10X_T2H_MSG_TYPE_CHAN_CHANGE] = HTT_T2H_MSG_TYPE_CHAN_CHANGE,
  53. [HTT_10X_T2H_MSG_TYPE_AGGR_CONF] = HTT_T2H_MSG_TYPE_AGGR_CONF,
  54. [HTT_10X_T2H_MSG_TYPE_STATS_NOUPLOAD] = HTT_T2H_MSG_TYPE_STATS_NOUPLOAD,
  55. [HTT_10X_T2H_MSG_TYPE_MGMT_TX_COMPL_IND] =
  56. HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION,
  57. };
  58. static const enum htt_t2h_msg_type htt_tlv_t2h_msg_types[] = {
  59. [HTT_TLV_T2H_MSG_TYPE_VERSION_CONF] = HTT_T2H_MSG_TYPE_VERSION_CONF,
  60. [HTT_TLV_T2H_MSG_TYPE_RX_IND] = HTT_T2H_MSG_TYPE_RX_IND,
  61. [HTT_TLV_T2H_MSG_TYPE_RX_FLUSH] = HTT_T2H_MSG_TYPE_RX_FLUSH,
  62. [HTT_TLV_T2H_MSG_TYPE_PEER_MAP] = HTT_T2H_MSG_TYPE_PEER_MAP,
  63. [HTT_TLV_T2H_MSG_TYPE_PEER_UNMAP] = HTT_T2H_MSG_TYPE_PEER_UNMAP,
  64. [HTT_TLV_T2H_MSG_TYPE_RX_ADDBA] = HTT_T2H_MSG_TYPE_RX_ADDBA,
  65. [HTT_TLV_T2H_MSG_TYPE_RX_DELBA] = HTT_T2H_MSG_TYPE_RX_DELBA,
  66. [HTT_TLV_T2H_MSG_TYPE_TX_COMPL_IND] = HTT_T2H_MSG_TYPE_TX_COMPL_IND,
  67. [HTT_TLV_T2H_MSG_TYPE_PKTLOG] = HTT_T2H_MSG_TYPE_PKTLOG,
  68. [HTT_TLV_T2H_MSG_TYPE_STATS_CONF] = HTT_T2H_MSG_TYPE_STATS_CONF,
  69. [HTT_TLV_T2H_MSG_TYPE_RX_FRAG_IND] = HTT_T2H_MSG_TYPE_RX_FRAG_IND,
  70. [HTT_TLV_T2H_MSG_TYPE_SEC_IND] = HTT_T2H_MSG_TYPE_SEC_IND,
  71. [HTT_TLV_T2H_MSG_TYPE_RC_UPDATE_IND] = HTT_T2H_MSG_TYPE_RC_UPDATE_IND,
  72. [HTT_TLV_T2H_MSG_TYPE_TX_INSPECT_IND] = HTT_T2H_MSG_TYPE_TX_INSPECT_IND,
  73. [HTT_TLV_T2H_MSG_TYPE_MGMT_TX_COMPL_IND] =
  74. HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION,
  75. [HTT_TLV_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND] =
  76. HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND,
  77. [HTT_TLV_T2H_MSG_TYPE_RX_PN_IND] = HTT_T2H_MSG_TYPE_RX_PN_IND,
  78. [HTT_TLV_T2H_MSG_TYPE_RX_OFFLOAD_DELIVER_IND] =
  79. HTT_T2H_MSG_TYPE_RX_OFFLOAD_DELIVER_IND,
  80. [HTT_TLV_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND] =
  81. HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND,
  82. [HTT_TLV_T2H_MSG_TYPE_WDI_IPA_OP_RESPONSE] =
  83. HTT_T2H_MSG_TYPE_WDI_IPA_OP_RESPONSE,
  84. [HTT_TLV_T2H_MSG_TYPE_CHAN_CHANGE] = HTT_T2H_MSG_TYPE_CHAN_CHANGE,
  85. [HTT_TLV_T2H_MSG_TYPE_RX_OFLD_PKT_ERR] =
  86. HTT_T2H_MSG_TYPE_RX_OFLD_PKT_ERR,
  87. [HTT_TLV_T2H_MSG_TYPE_TEST] = HTT_T2H_MSG_TYPE_TEST,
  88. };
  89. static const enum htt_t2h_msg_type htt_10_4_t2h_msg_types[] = {
  90. [HTT_10_4_T2H_MSG_TYPE_VERSION_CONF] = HTT_T2H_MSG_TYPE_VERSION_CONF,
  91. [HTT_10_4_T2H_MSG_TYPE_RX_IND] = HTT_T2H_MSG_TYPE_RX_IND,
  92. [HTT_10_4_T2H_MSG_TYPE_RX_FLUSH] = HTT_T2H_MSG_TYPE_RX_FLUSH,
  93. [HTT_10_4_T2H_MSG_TYPE_PEER_MAP] = HTT_T2H_MSG_TYPE_PEER_MAP,
  94. [HTT_10_4_T2H_MSG_TYPE_PEER_UNMAP] = HTT_T2H_MSG_TYPE_PEER_UNMAP,
  95. [HTT_10_4_T2H_MSG_TYPE_RX_ADDBA] = HTT_T2H_MSG_TYPE_RX_ADDBA,
  96. [HTT_10_4_T2H_MSG_TYPE_RX_DELBA] = HTT_T2H_MSG_TYPE_RX_DELBA,
  97. [HTT_10_4_T2H_MSG_TYPE_TX_COMPL_IND] = HTT_T2H_MSG_TYPE_TX_COMPL_IND,
  98. [HTT_10_4_T2H_MSG_TYPE_PKTLOG] = HTT_T2H_MSG_TYPE_PKTLOG,
  99. [HTT_10_4_T2H_MSG_TYPE_STATS_CONF] = HTT_T2H_MSG_TYPE_STATS_CONF,
  100. [HTT_10_4_T2H_MSG_TYPE_RX_FRAG_IND] = HTT_T2H_MSG_TYPE_RX_FRAG_IND,
  101. [HTT_10_4_T2H_MSG_TYPE_SEC_IND] = HTT_T2H_MSG_TYPE_SEC_IND,
  102. [HTT_10_4_T2H_MSG_TYPE_RC_UPDATE_IND] = HTT_T2H_MSG_TYPE_RC_UPDATE_IND,
  103. [HTT_10_4_T2H_MSG_TYPE_TX_INSPECT_IND] =
  104. HTT_T2H_MSG_TYPE_TX_INSPECT_IND,
  105. [HTT_10_4_T2H_MSG_TYPE_MGMT_TX_COMPL_IND] =
  106. HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION,
  107. [HTT_10_4_T2H_MSG_TYPE_CHAN_CHANGE] = HTT_T2H_MSG_TYPE_CHAN_CHANGE,
  108. [HTT_10_4_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND] =
  109. HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND,
  110. [HTT_10_4_T2H_MSG_TYPE_RX_PN_IND] = HTT_T2H_MSG_TYPE_RX_PN_IND,
  111. [HTT_10_4_T2H_MSG_TYPE_RX_OFFLOAD_DELIVER_IND] =
  112. HTT_T2H_MSG_TYPE_RX_OFFLOAD_DELIVER_IND,
  113. [HTT_10_4_T2H_MSG_TYPE_TEST] = HTT_T2H_MSG_TYPE_TEST,
  114. [HTT_10_4_T2H_MSG_TYPE_EN_STATS] = HTT_T2H_MSG_TYPE_EN_STATS,
  115. [HTT_10_4_T2H_MSG_TYPE_AGGR_CONF] = HTT_T2H_MSG_TYPE_AGGR_CONF,
  116. [HTT_10_4_T2H_MSG_TYPE_TX_FETCH_IND] =
  117. HTT_T2H_MSG_TYPE_TX_FETCH_IND,
  118. [HTT_10_4_T2H_MSG_TYPE_TX_FETCH_CONFIRM] =
  119. HTT_T2H_MSG_TYPE_TX_FETCH_CONFIRM,
  120. [HTT_10_4_T2H_MSG_TYPE_STATS_NOUPLOAD] =
  121. HTT_T2H_MSG_TYPE_STATS_NOUPLOAD,
  122. [HTT_10_4_T2H_MSG_TYPE_TX_MODE_SWITCH_IND] =
  123. HTT_T2H_MSG_TYPE_TX_MODE_SWITCH_IND,
  124. [HTT_10_4_T2H_MSG_TYPE_PEER_STATS] =
  125. HTT_T2H_MSG_TYPE_PEER_STATS,
  126. };
  127. const struct ath10k_htt_rx_desc_ops qca988x_rx_desc_ops = {
  128. .rx_desc_size = sizeof(struct htt_rx_desc_v1),
  129. .rx_desc_msdu_payload_offset = offsetof(struct htt_rx_desc_v1, msdu_payload)
  130. };
  131. static int ath10k_qca99x0_rx_desc_get_l3_pad_bytes(struct htt_rx_desc *rxd)
  132. {
  133. struct htt_rx_desc_v1 *rx_desc = container_of(rxd,
  134. struct htt_rx_desc_v1,
  135. base);
  136. return MS(__le32_to_cpu(rx_desc->msdu_end.qca99x0.info1),
  137. RX_MSDU_END_INFO1_L3_HDR_PAD);
  138. }
  139. static bool ath10k_qca99x0_rx_desc_msdu_limit_error(struct htt_rx_desc *rxd)
  140. {
  141. struct htt_rx_desc_v1 *rx_desc = container_of(rxd,
  142. struct htt_rx_desc_v1,
  143. base);
  144. return !!(rx_desc->msdu_end.common.info0 &
  145. __cpu_to_le32(RX_MSDU_END_INFO0_MSDU_LIMIT_ERR));
  146. }
  147. const struct ath10k_htt_rx_desc_ops qca99x0_rx_desc_ops = {
  148. .rx_desc_size = sizeof(struct htt_rx_desc_v1),
  149. .rx_desc_msdu_payload_offset = offsetof(struct htt_rx_desc_v1, msdu_payload),
  150. .rx_desc_get_l3_pad_bytes = ath10k_qca99x0_rx_desc_get_l3_pad_bytes,
  151. .rx_desc_get_msdu_limit_error = ath10k_qca99x0_rx_desc_msdu_limit_error,
  152. };
  153. static void ath10k_rx_desc_wcn3990_get_offsets(struct htt_rx_ring_rx_desc_offsets *off)
  154. {
  155. #define desc_offset(x) (offsetof(struct htt_rx_desc_v2, x) / 4)
  156. off->mac80211_hdr_offset = __cpu_to_le16(desc_offset(rx_hdr_status));
  157. off->msdu_payload_offset = __cpu_to_le16(desc_offset(msdu_payload));
  158. off->ppdu_start_offset = __cpu_to_le16(desc_offset(ppdu_start));
  159. off->ppdu_end_offset = __cpu_to_le16(desc_offset(ppdu_end));
  160. off->mpdu_start_offset = __cpu_to_le16(desc_offset(mpdu_start));
  161. off->mpdu_end_offset = __cpu_to_le16(desc_offset(mpdu_end));
  162. off->msdu_start_offset = __cpu_to_le16(desc_offset(msdu_start));
  163. off->msdu_end_offset = __cpu_to_le16(desc_offset(msdu_end));
  164. off->rx_attention_offset = __cpu_to_le16(desc_offset(attention));
  165. off->frag_info_offset = __cpu_to_le16(desc_offset(frag_info));
  166. #undef desc_offset
  167. }
  168. static struct htt_rx_desc *
  169. ath10k_rx_desc_wcn3990_from_raw_buffer(void *buff)
  170. {
  171. return &((struct htt_rx_desc_v2 *)buff)->base;
  172. }
  173. static struct rx_attention *
  174. ath10k_rx_desc_wcn3990_get_attention(struct htt_rx_desc *rxd)
  175. {
  176. struct htt_rx_desc_v2 *rx_desc = container_of(rxd, struct htt_rx_desc_v2, base);
  177. return &rx_desc->attention;
  178. }
  179. static struct rx_frag_info_common *
  180. ath10k_rx_desc_wcn3990_get_frag_info(struct htt_rx_desc *rxd)
  181. {
  182. struct htt_rx_desc_v2 *rx_desc = container_of(rxd, struct htt_rx_desc_v2, base);
  183. return &rx_desc->frag_info.common;
  184. }
  185. static struct rx_mpdu_start *
  186. ath10k_rx_desc_wcn3990_get_mpdu_start(struct htt_rx_desc *rxd)
  187. {
  188. struct htt_rx_desc_v2 *rx_desc = container_of(rxd, struct htt_rx_desc_v2, base);
  189. return &rx_desc->mpdu_start;
  190. }
  191. static struct rx_mpdu_end *
  192. ath10k_rx_desc_wcn3990_get_mpdu_end(struct htt_rx_desc *rxd)
  193. {
  194. struct htt_rx_desc_v2 *rx_desc = container_of(rxd, struct htt_rx_desc_v2, base);
  195. return &rx_desc->mpdu_end;
  196. }
  197. static struct rx_msdu_start_common *
  198. ath10k_rx_desc_wcn3990_get_msdu_start(struct htt_rx_desc *rxd)
  199. {
  200. struct htt_rx_desc_v2 *rx_desc = container_of(rxd, struct htt_rx_desc_v2, base);
  201. return &rx_desc->msdu_start.common;
  202. }
  203. static struct rx_msdu_end_common *
  204. ath10k_rx_desc_wcn3990_get_msdu_end(struct htt_rx_desc *rxd)
  205. {
  206. struct htt_rx_desc_v2 *rx_desc = container_of(rxd, struct htt_rx_desc_v2, base);
  207. return &rx_desc->msdu_end.common;
  208. }
  209. static struct rx_ppdu_start *
  210. ath10k_rx_desc_wcn3990_get_ppdu_start(struct htt_rx_desc *rxd)
  211. {
  212. struct htt_rx_desc_v2 *rx_desc = container_of(rxd, struct htt_rx_desc_v2, base);
  213. return &rx_desc->ppdu_start;
  214. }
  215. static struct rx_ppdu_end_common *
  216. ath10k_rx_desc_wcn3990_get_ppdu_end(struct htt_rx_desc *rxd)
  217. {
  218. struct htt_rx_desc_v2 *rx_desc = container_of(rxd, struct htt_rx_desc_v2, base);
  219. return &rx_desc->ppdu_end.common;
  220. }
  221. static u8 *
  222. ath10k_rx_desc_wcn3990_get_rx_hdr_status(struct htt_rx_desc *rxd)
  223. {
  224. struct htt_rx_desc_v2 *rx_desc = container_of(rxd, struct htt_rx_desc_v2, base);
  225. return rx_desc->rx_hdr_status;
  226. }
  227. static u8 *
  228. ath10k_rx_desc_wcn3990_get_msdu_payload(struct htt_rx_desc *rxd)
  229. {
  230. struct htt_rx_desc_v2 *rx_desc = container_of(rxd, struct htt_rx_desc_v2, base);
  231. return rx_desc->msdu_payload;
  232. }
  233. const struct ath10k_htt_rx_desc_ops wcn3990_rx_desc_ops = {
  234. .rx_desc_size = sizeof(struct htt_rx_desc_v2),
  235. .rx_desc_msdu_payload_offset = offsetof(struct htt_rx_desc_v2, msdu_payload),
  236. .rx_desc_from_raw_buffer = ath10k_rx_desc_wcn3990_from_raw_buffer,
  237. .rx_desc_get_offsets = ath10k_rx_desc_wcn3990_get_offsets,
  238. .rx_desc_get_attention = ath10k_rx_desc_wcn3990_get_attention,
  239. .rx_desc_get_frag_info = ath10k_rx_desc_wcn3990_get_frag_info,
  240. .rx_desc_get_mpdu_start = ath10k_rx_desc_wcn3990_get_mpdu_start,
  241. .rx_desc_get_mpdu_end = ath10k_rx_desc_wcn3990_get_mpdu_end,
  242. .rx_desc_get_msdu_start = ath10k_rx_desc_wcn3990_get_msdu_start,
  243. .rx_desc_get_msdu_end = ath10k_rx_desc_wcn3990_get_msdu_end,
  244. .rx_desc_get_ppdu_start = ath10k_rx_desc_wcn3990_get_ppdu_start,
  245. .rx_desc_get_ppdu_end = ath10k_rx_desc_wcn3990_get_ppdu_end,
  246. .rx_desc_get_rx_hdr_status = ath10k_rx_desc_wcn3990_get_rx_hdr_status,
  247. .rx_desc_get_msdu_payload = ath10k_rx_desc_wcn3990_get_msdu_payload,
  248. };
  249. int ath10k_htt_connect(struct ath10k_htt *htt)
  250. {
  251. struct ath10k_htc_svc_conn_req conn_req;
  252. struct ath10k_htc_svc_conn_resp conn_resp;
  253. struct ath10k *ar = htt->ar;
  254. struct ath10k_htc_ep *ep;
  255. int status;
  256. memset(&conn_req, 0, sizeof(conn_req));
  257. memset(&conn_resp, 0, sizeof(conn_resp));
  258. conn_req.ep_ops.ep_tx_complete = ath10k_htt_htc_tx_complete;
  259. conn_req.ep_ops.ep_rx_complete = ath10k_htt_htc_t2h_msg_handler;
  260. conn_req.ep_ops.ep_tx_credits = ath10k_htt_op_ep_tx_credits;
  261. /* connect to control service */
  262. conn_req.service_id = ATH10K_HTC_SVC_ID_HTT_DATA_MSG;
  263. status = ath10k_htc_connect_service(&htt->ar->htc, &conn_req,
  264. &conn_resp);
  265. if (status)
  266. return status;
  267. htt->eid = conn_resp.eid;
  268. if (ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL) {
  269. ep = &ar->htc.endpoint[htt->eid];
  270. ath10k_htc_setup_tx_req(ep);
  271. }
  272. htt->disable_tx_comp = ath10k_hif_get_htt_tx_complete(htt->ar);
  273. if (htt->disable_tx_comp)
  274. ath10k_htc_change_tx_credit_flow(&htt->ar->htc, htt->eid, true);
  275. return 0;
  276. }
  277. int ath10k_htt_init(struct ath10k *ar)
  278. {
  279. struct ath10k_htt *htt = &ar->htt;
  280. htt->ar = ar;
  281. /*
  282. * Prefetch enough data to satisfy target
  283. * classification engine.
  284. * This is for LL chips. HL chips will probably
  285. * transfer all frame in the tx fragment.
  286. */
  287. htt->prefetch_len =
  288. 36 + /* 802.11 + qos + ht */
  289. 4 + /* 802.1q */
  290. 8 + /* llc snap */
  291. 2; /* ip4 dscp or ip6 priority */
  292. switch (ar->running_fw->fw_file.htt_op_version) {
  293. case ATH10K_FW_HTT_OP_VERSION_10_4:
  294. ar->htt.t2h_msg_types = htt_10_4_t2h_msg_types;
  295. ar->htt.t2h_msg_types_max = HTT_10_4_T2H_NUM_MSGS;
  296. break;
  297. case ATH10K_FW_HTT_OP_VERSION_10_1:
  298. ar->htt.t2h_msg_types = htt_10x_t2h_msg_types;
  299. ar->htt.t2h_msg_types_max = HTT_10X_T2H_NUM_MSGS;
  300. break;
  301. case ATH10K_FW_HTT_OP_VERSION_TLV:
  302. ar->htt.t2h_msg_types = htt_tlv_t2h_msg_types;
  303. ar->htt.t2h_msg_types_max = HTT_TLV_T2H_NUM_MSGS;
  304. break;
  305. case ATH10K_FW_HTT_OP_VERSION_MAIN:
  306. ar->htt.t2h_msg_types = htt_main_t2h_msg_types;
  307. ar->htt.t2h_msg_types_max = HTT_MAIN_T2H_NUM_MSGS;
  308. break;
  309. case ATH10K_FW_HTT_OP_VERSION_MAX:
  310. case ATH10K_FW_HTT_OP_VERSION_UNSET:
  311. WARN_ON(1);
  312. return -EINVAL;
  313. }
  314. ath10k_htt_set_tx_ops(htt);
  315. ath10k_htt_set_rx_ops(htt);
  316. return 0;
  317. }
  318. #define HTT_TARGET_VERSION_TIMEOUT_HZ (3 * HZ)
  319. static int ath10k_htt_verify_version(struct ath10k_htt *htt)
  320. {
  321. struct ath10k *ar = htt->ar;
  322. ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt target version %d.%d\n",
  323. htt->target_version_major, htt->target_version_minor);
  324. if (htt->target_version_major != 2 &&
  325. htt->target_version_major != 3) {
  326. ath10k_err(ar, "unsupported htt major version %d. supported versions are 2 and 3\n",
  327. htt->target_version_major);
  328. return -ENOTSUPP;
  329. }
  330. return 0;
  331. }
  332. int ath10k_htt_setup(struct ath10k_htt *htt)
  333. {
  334. struct ath10k *ar = htt->ar;
  335. int status;
  336. init_completion(&htt->target_version_received);
  337. status = ath10k_htt_h2t_ver_req_msg(htt);
  338. if (status)
  339. return status;
  340. status = wait_for_completion_timeout(&htt->target_version_received,
  341. HTT_TARGET_VERSION_TIMEOUT_HZ);
  342. if (status == 0) {
  343. ath10k_warn(ar, "htt version request timed out\n");
  344. return -ETIMEDOUT;
  345. }
  346. status = ath10k_htt_verify_version(htt);
  347. if (status) {
  348. ath10k_warn(ar, "failed to verify htt version: %d\n",
  349. status);
  350. return status;
  351. }
  352. status = ath10k_htt_send_frag_desc_bank_cfg(htt);
  353. if (status)
  354. return status;
  355. status = ath10k_htt_send_rx_ring_cfg(htt);
  356. if (status) {
  357. ath10k_warn(ar, "failed to setup rx ring: %d\n",
  358. status);
  359. return status;
  360. }
  361. status = ath10k_htt_h2t_aggr_cfg_msg(htt,
  362. htt->max_num_ampdu,
  363. htt->max_num_amsdu);
  364. if (status) {
  365. ath10k_warn(ar, "failed to setup amsdu/ampdu limit: %d\n",
  366. status);
  367. return status;
  368. }
  369. return 0;
  370. }