hif.h 6.6 KB

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  1. /* SPDX-License-Identifier: ISC */
  2. /*
  3. * Copyright (c) 2005-2011 Atheros Communications Inc.
  4. * Copyright (c) 2011-2015,2017 Qualcomm Atheros, Inc.
  5. */
  6. #ifndef _HIF_H_
  7. #define _HIF_H_
  8. #include <linux/kernel.h>
  9. #include "core.h"
  10. #include "bmi.h"
  11. #include "debug.h"
  12. /* Types of fw logging mode */
  13. enum ath_dbg_mode {
  14. ATH10K_ENABLE_FW_LOG_DIAG,
  15. ATH10K_ENABLE_FW_LOG_CE,
  16. };
  17. struct ath10k_hif_sg_item {
  18. u16 transfer_id;
  19. void *transfer_context; /* NULL = tx completion callback not called */
  20. void *vaddr; /* for debugging mostly */
  21. dma_addr_t paddr;
  22. u16 len;
  23. };
  24. struct ath10k_hif_ops {
  25. /* send a scatter-gather list to the target */
  26. int (*tx_sg)(struct ath10k *ar, u8 pipe_id,
  27. struct ath10k_hif_sg_item *items, int n_items);
  28. /* read firmware memory through the diagnose interface */
  29. int (*diag_read)(struct ath10k *ar, u32 address, void *buf,
  30. size_t buf_len);
  31. int (*diag_write)(struct ath10k *ar, u32 address, const void *data,
  32. int nbytes);
  33. /*
  34. * API to handle HIF-specific BMI message exchanges, this API is
  35. * synchronous and only allowed to be called from a context that
  36. * can block (sleep)
  37. */
  38. int (*exchange_bmi_msg)(struct ath10k *ar,
  39. void *request, u32 request_len,
  40. void *response, u32 *response_len);
  41. /* Post BMI phase, after FW is loaded. Starts regular operation */
  42. int (*start)(struct ath10k *ar);
  43. /* Clean up what start() did. This does not revert to BMI phase. If
  44. * desired so, call power_down() and power_up()
  45. */
  46. void (*stop)(struct ath10k *ar);
  47. int (*start_post)(struct ath10k *ar);
  48. int (*get_htt_tx_complete)(struct ath10k *ar);
  49. int (*map_service_to_pipe)(struct ath10k *ar, u16 service_id,
  50. u8 *ul_pipe, u8 *dl_pipe);
  51. void (*get_default_pipe)(struct ath10k *ar, u8 *ul_pipe, u8 *dl_pipe);
  52. /*
  53. * Check if prior sends have completed.
  54. *
  55. * Check whether the pipe in question has any completed
  56. * sends that have not yet been processed.
  57. * This function is only relevant for HIF pipes that are configured
  58. * to be polled rather than interrupt-driven.
  59. */
  60. void (*send_complete_check)(struct ath10k *ar, u8 pipe_id, int force);
  61. u16 (*get_free_queue_number)(struct ath10k *ar, u8 pipe_id);
  62. u32 (*read32)(struct ath10k *ar, u32 address);
  63. void (*write32)(struct ath10k *ar, u32 address, u32 value);
  64. /* Power up the device and enter BMI transfer mode for FW download */
  65. int (*power_up)(struct ath10k *ar, enum ath10k_firmware_mode fw_mode);
  66. /* Power down the device and free up resources. stop() must be called
  67. * before this if start() was called earlier
  68. */
  69. void (*power_down)(struct ath10k *ar);
  70. int (*suspend)(struct ath10k *ar);
  71. int (*resume)(struct ath10k *ar);
  72. /* fetch calibration data from target eeprom */
  73. int (*fetch_cal_eeprom)(struct ath10k *ar, void **data,
  74. size_t *data_len);
  75. int (*get_target_info)(struct ath10k *ar,
  76. struct bmi_target_info *target_info);
  77. int (*set_target_log_mode)(struct ath10k *ar, u8 fw_log_mode);
  78. };
  79. static inline int ath10k_hif_tx_sg(struct ath10k *ar, u8 pipe_id,
  80. struct ath10k_hif_sg_item *items,
  81. int n_items)
  82. {
  83. return ar->hif.ops->tx_sg(ar, pipe_id, items, n_items);
  84. }
  85. static inline int ath10k_hif_diag_read(struct ath10k *ar, u32 address, void *buf,
  86. size_t buf_len)
  87. {
  88. return ar->hif.ops->diag_read(ar, address, buf, buf_len);
  89. }
  90. static inline int ath10k_hif_diag_write(struct ath10k *ar, u32 address,
  91. const void *data, int nbytes)
  92. {
  93. if (!ar->hif.ops->diag_write)
  94. return -EOPNOTSUPP;
  95. return ar->hif.ops->diag_write(ar, address, data, nbytes);
  96. }
  97. static inline int ath10k_hif_exchange_bmi_msg(struct ath10k *ar,
  98. void *request, u32 request_len,
  99. void *response, u32 *response_len)
  100. {
  101. return ar->hif.ops->exchange_bmi_msg(ar, request, request_len,
  102. response, response_len);
  103. }
  104. static inline int ath10k_hif_start(struct ath10k *ar)
  105. {
  106. return ar->hif.ops->start(ar);
  107. }
  108. static inline void ath10k_hif_stop(struct ath10k *ar)
  109. {
  110. return ar->hif.ops->stop(ar);
  111. }
  112. static inline int ath10k_hif_start_post(struct ath10k *ar)
  113. {
  114. if (ar->hif.ops->start_post)
  115. return ar->hif.ops->start_post(ar);
  116. return 0;
  117. }
  118. static inline int ath10k_hif_get_htt_tx_complete(struct ath10k *ar)
  119. {
  120. if (ar->hif.ops->get_htt_tx_complete)
  121. return ar->hif.ops->get_htt_tx_complete(ar);
  122. return 0;
  123. }
  124. static inline int ath10k_hif_map_service_to_pipe(struct ath10k *ar,
  125. u16 service_id,
  126. u8 *ul_pipe, u8 *dl_pipe)
  127. {
  128. return ar->hif.ops->map_service_to_pipe(ar, service_id,
  129. ul_pipe, dl_pipe);
  130. }
  131. static inline void ath10k_hif_get_default_pipe(struct ath10k *ar,
  132. u8 *ul_pipe, u8 *dl_pipe)
  133. {
  134. ar->hif.ops->get_default_pipe(ar, ul_pipe, dl_pipe);
  135. }
  136. static inline void ath10k_hif_send_complete_check(struct ath10k *ar,
  137. u8 pipe_id, int force)
  138. {
  139. if (ar->hif.ops->send_complete_check)
  140. ar->hif.ops->send_complete_check(ar, pipe_id, force);
  141. }
  142. static inline u16 ath10k_hif_get_free_queue_number(struct ath10k *ar,
  143. u8 pipe_id)
  144. {
  145. return ar->hif.ops->get_free_queue_number(ar, pipe_id);
  146. }
  147. static inline int ath10k_hif_power_up(struct ath10k *ar,
  148. enum ath10k_firmware_mode fw_mode)
  149. {
  150. return ar->hif.ops->power_up(ar, fw_mode);
  151. }
  152. static inline void ath10k_hif_power_down(struct ath10k *ar)
  153. {
  154. ar->hif.ops->power_down(ar);
  155. }
  156. static inline int ath10k_hif_suspend(struct ath10k *ar)
  157. {
  158. if (!ar->hif.ops->suspend)
  159. return -EOPNOTSUPP;
  160. return ar->hif.ops->suspend(ar);
  161. }
  162. static inline int ath10k_hif_resume(struct ath10k *ar)
  163. {
  164. if (!ar->hif.ops->resume)
  165. return -EOPNOTSUPP;
  166. return ar->hif.ops->resume(ar);
  167. }
  168. static inline u32 ath10k_hif_read32(struct ath10k *ar, u32 address)
  169. {
  170. if (!ar->hif.ops->read32) {
  171. ath10k_warn(ar, "hif read32 not supported\n");
  172. return 0xdeaddead;
  173. }
  174. return ar->hif.ops->read32(ar, address);
  175. }
  176. static inline void ath10k_hif_write32(struct ath10k *ar,
  177. u32 address, u32 data)
  178. {
  179. if (!ar->hif.ops->write32) {
  180. ath10k_warn(ar, "hif write32 not supported\n");
  181. return;
  182. }
  183. ar->hif.ops->write32(ar, address, data);
  184. }
  185. static inline int ath10k_hif_fetch_cal_eeprom(struct ath10k *ar,
  186. void **data,
  187. size_t *data_len)
  188. {
  189. if (!ar->hif.ops->fetch_cal_eeprom)
  190. return -EOPNOTSUPP;
  191. return ar->hif.ops->fetch_cal_eeprom(ar, data, data_len);
  192. }
  193. static inline int ath10k_hif_get_target_info(struct ath10k *ar,
  194. struct bmi_target_info *tgt_info)
  195. {
  196. if (!ar->hif.ops->get_target_info)
  197. return -EOPNOTSUPP;
  198. return ar->hif.ops->get_target_info(ar, tgt_info);
  199. }
  200. static inline int ath10k_hif_set_target_log_mode(struct ath10k *ar,
  201. u8 fw_log_mode)
  202. {
  203. if (!ar->hif.ops->set_target_log_mode)
  204. return -EOPNOTSUPP;
  205. return ar->hif.ops->set_target_log_mode(ar, fw_log_mode);
  206. }
  207. #endif /* _HIF_H_ */