smsc95xx.c 52 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133
  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /***************************************************************************
  3. *
  4. * Copyright (C) 2007-2008 SMSC
  5. *
  6. *****************************************************************************/
  7. #include <linux/module.h>
  8. #include <linux/kmod.h>
  9. #include <linux/netdevice.h>
  10. #include <linux/etherdevice.h>
  11. #include <linux/ethtool.h>
  12. #include <linux/mii.h>
  13. #include <linux/usb.h>
  14. #include <linux/bitrev.h>
  15. #include <linux/crc16.h>
  16. #include <linux/crc32.h>
  17. #include <linux/usb/usbnet.h>
  18. #include <linux/slab.h>
  19. #include <linux/of_net.h>
  20. #include <linux/irq.h>
  21. #include <linux/irqdomain.h>
  22. #include <linux/mdio.h>
  23. #include <linux/phy.h>
  24. #include <net/selftests.h>
  25. #include "smsc95xx.h"
  26. #define SMSC_CHIPNAME "smsc95xx"
  27. #define SMSC_DRIVER_VERSION "2.0.0"
  28. #define HS_USB_PKT_SIZE (512)
  29. #define FS_USB_PKT_SIZE (64)
  30. #define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE)
  31. #define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE)
  32. #define DEFAULT_BULK_IN_DELAY (0x00002000)
  33. #define MAX_SINGLE_PACKET_SIZE (2048)
  34. #define LAN95XX_EEPROM_MAGIC (0x9500)
  35. #define EEPROM_MAC_OFFSET (0x01)
  36. #define DEFAULT_TX_CSUM_ENABLE (true)
  37. #define DEFAULT_RX_CSUM_ENABLE (true)
  38. #define SMSC95XX_INTERNAL_PHY_ID (1)
  39. #define SMSC95XX_TX_OVERHEAD (8)
  40. #define SMSC95XX_TX_OVERHEAD_CSUM (12)
  41. #define SUPPORTED_WAKE (WAKE_PHY | WAKE_UCAST | WAKE_BCAST | \
  42. WAKE_MCAST | WAKE_ARP | WAKE_MAGIC)
  43. #define FEATURE_8_WAKEUP_FILTERS (0x01)
  44. #define FEATURE_PHY_NLP_CROSSOVER (0x02)
  45. #define FEATURE_REMOTE_WAKEUP (0x04)
  46. #define SUSPEND_SUSPEND0 (0x01)
  47. #define SUSPEND_SUSPEND1 (0x02)
  48. #define SUSPEND_SUSPEND2 (0x04)
  49. #define SUSPEND_SUSPEND3 (0x08)
  50. #define SUSPEND_ALLMODES (SUSPEND_SUSPEND0 | SUSPEND_SUSPEND1 | \
  51. SUSPEND_SUSPEND2 | SUSPEND_SUSPEND3)
  52. #define SMSC95XX_NR_IRQS (1) /* raise to 12 for GPIOs */
  53. #define PHY_HWIRQ (SMSC95XX_NR_IRQS - 1)
  54. struct smsc95xx_priv {
  55. u32 mac_cr;
  56. u32 hash_hi;
  57. u32 hash_lo;
  58. u32 wolopts;
  59. spinlock_t mac_cr_lock;
  60. u8 features;
  61. u8 suspend_flags;
  62. bool is_internal_phy;
  63. struct irq_chip irqchip;
  64. struct irq_domain *irqdomain;
  65. struct fwnode_handle *irqfwnode;
  66. struct mii_bus *mdiobus;
  67. struct phy_device *phydev;
  68. struct task_struct *pm_task;
  69. };
  70. static bool turbo_mode = true;
  71. module_param(turbo_mode, bool, 0644);
  72. MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
  73. static int __must_check smsc95xx_read_reg(struct usbnet *dev, u32 index,
  74. u32 *data)
  75. {
  76. struct smsc95xx_priv *pdata = dev->driver_priv;
  77. u32 buf;
  78. int ret;
  79. int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
  80. if (current != pdata->pm_task)
  81. fn = usbnet_read_cmd;
  82. else
  83. fn = usbnet_read_cmd_nopm;
  84. ret = fn(dev, USB_VENDOR_REQUEST_READ_REGISTER, USB_DIR_IN
  85. | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  86. 0, index, &buf, 4);
  87. if (ret < 4) {
  88. ret = ret < 0 ? ret : -ENODATA;
  89. if (ret != -ENODEV)
  90. netdev_warn(dev->net, "Failed to read reg index 0x%08x: %d\n",
  91. index, ret);
  92. return ret;
  93. }
  94. le32_to_cpus(&buf);
  95. *data = buf;
  96. return ret;
  97. }
  98. static int __must_check smsc95xx_write_reg(struct usbnet *dev, u32 index,
  99. u32 data)
  100. {
  101. struct smsc95xx_priv *pdata = dev->driver_priv;
  102. u32 buf;
  103. int ret;
  104. int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
  105. if (current != pdata->pm_task)
  106. fn = usbnet_write_cmd;
  107. else
  108. fn = usbnet_write_cmd_nopm;
  109. buf = data;
  110. cpu_to_le32s(&buf);
  111. ret = fn(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, USB_DIR_OUT
  112. | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  113. 0, index, &buf, 4);
  114. if (ret < 0 && ret != -ENODEV)
  115. netdev_warn(dev->net, "Failed to write reg index 0x%08x: %d\n",
  116. index, ret);
  117. return ret;
  118. }
  119. /* Loop until the read is completed with timeout
  120. * called with phy_mutex held */
  121. static int __must_check smsc95xx_phy_wait_not_busy(struct usbnet *dev)
  122. {
  123. unsigned long start_time = jiffies;
  124. u32 val;
  125. int ret;
  126. do {
  127. ret = smsc95xx_read_reg(dev, MII_ADDR, &val);
  128. if (ret < 0) {
  129. /* Ignore -ENODEV error during disconnect() */
  130. if (ret == -ENODEV)
  131. return 0;
  132. netdev_warn(dev->net, "Error reading MII_ACCESS\n");
  133. return ret;
  134. }
  135. if (!(val & MII_BUSY_))
  136. return 0;
  137. } while (!time_after(jiffies, start_time + HZ));
  138. return -EIO;
  139. }
  140. static u32 mii_address_cmd(int phy_id, int idx, u16 op)
  141. {
  142. return (phy_id & 0x1f) << 11 | (idx & 0x1f) << 6 | op;
  143. }
  144. static int smsc95xx_mdio_read(struct usbnet *dev, int phy_id, int idx)
  145. {
  146. u32 val, addr;
  147. int ret;
  148. mutex_lock(&dev->phy_mutex);
  149. /* confirm MII not busy */
  150. ret = smsc95xx_phy_wait_not_busy(dev);
  151. if (ret < 0) {
  152. netdev_warn(dev->net, "%s: MII is busy\n", __func__);
  153. goto done;
  154. }
  155. /* set the address, index & direction (read from PHY) */
  156. addr = mii_address_cmd(phy_id, idx, MII_READ_ | MII_BUSY_);
  157. ret = smsc95xx_write_reg(dev, MII_ADDR, addr);
  158. if (ret < 0) {
  159. if (ret != -ENODEV)
  160. netdev_warn(dev->net, "Error writing MII_ADDR\n");
  161. goto done;
  162. }
  163. ret = smsc95xx_phy_wait_not_busy(dev);
  164. if (ret < 0) {
  165. netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx);
  166. goto done;
  167. }
  168. ret = smsc95xx_read_reg(dev, MII_DATA, &val);
  169. if (ret < 0) {
  170. if (ret != -ENODEV)
  171. netdev_warn(dev->net, "Error reading MII_DATA\n");
  172. goto done;
  173. }
  174. ret = (u16)(val & 0xFFFF);
  175. done:
  176. mutex_unlock(&dev->phy_mutex);
  177. /* Ignore -ENODEV error during disconnect() */
  178. if (ret == -ENODEV)
  179. return 0;
  180. return ret;
  181. }
  182. static void smsc95xx_mdio_write(struct usbnet *dev, int phy_id, int idx,
  183. int regval)
  184. {
  185. u32 val, addr;
  186. int ret;
  187. mutex_lock(&dev->phy_mutex);
  188. /* confirm MII not busy */
  189. ret = smsc95xx_phy_wait_not_busy(dev);
  190. if (ret < 0) {
  191. netdev_warn(dev->net, "%s: MII is busy\n", __func__);
  192. goto done;
  193. }
  194. val = regval;
  195. ret = smsc95xx_write_reg(dev, MII_DATA, val);
  196. if (ret < 0) {
  197. if (ret != -ENODEV)
  198. netdev_warn(dev->net, "Error writing MII_DATA\n");
  199. goto done;
  200. }
  201. /* set the address, index & direction (write to PHY) */
  202. addr = mii_address_cmd(phy_id, idx, MII_WRITE_ | MII_BUSY_);
  203. ret = smsc95xx_write_reg(dev, MII_ADDR, addr);
  204. if (ret < 0) {
  205. if (ret != -ENODEV)
  206. netdev_warn(dev->net, "Error writing MII_ADDR\n");
  207. goto done;
  208. }
  209. ret = smsc95xx_phy_wait_not_busy(dev);
  210. if (ret < 0) {
  211. netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx);
  212. goto done;
  213. }
  214. done:
  215. mutex_unlock(&dev->phy_mutex);
  216. }
  217. static int smsc95xx_mdiobus_reset(struct mii_bus *bus)
  218. {
  219. struct smsc95xx_priv *pdata;
  220. struct usbnet *dev;
  221. u32 val;
  222. int ret;
  223. dev = bus->priv;
  224. pdata = dev->driver_priv;
  225. if (pdata->is_internal_phy)
  226. return 0;
  227. mutex_lock(&dev->phy_mutex);
  228. ret = smsc95xx_read_reg(dev, PM_CTRL, &val);
  229. if (ret < 0)
  230. goto reset_out;
  231. val |= PM_CTL_PHY_RST_;
  232. ret = smsc95xx_write_reg(dev, PM_CTRL, val);
  233. if (ret < 0)
  234. goto reset_out;
  235. /* Driver has no knowledge at this point about the external PHY.
  236. * The 802.3 specifies that the reset process shall
  237. * be completed within 0.5 s.
  238. */
  239. fsleep(500000);
  240. reset_out:
  241. mutex_unlock(&dev->phy_mutex);
  242. return 0;
  243. }
  244. static int smsc95xx_mdiobus_read(struct mii_bus *bus, int phy_id, int idx)
  245. {
  246. struct usbnet *dev = bus->priv;
  247. return smsc95xx_mdio_read(dev, phy_id, idx);
  248. }
  249. static int smsc95xx_mdiobus_write(struct mii_bus *bus, int phy_id, int idx,
  250. u16 regval)
  251. {
  252. struct usbnet *dev = bus->priv;
  253. smsc95xx_mdio_write(dev, phy_id, idx, regval);
  254. return 0;
  255. }
  256. static int __must_check smsc95xx_wait_eeprom(struct usbnet *dev)
  257. {
  258. unsigned long start_time = jiffies;
  259. u32 val;
  260. int ret;
  261. do {
  262. ret = smsc95xx_read_reg(dev, E2P_CMD, &val);
  263. if (ret < 0) {
  264. netdev_warn(dev->net, "Error reading E2P_CMD\n");
  265. return ret;
  266. }
  267. if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_))
  268. break;
  269. udelay(40);
  270. } while (!time_after(jiffies, start_time + HZ));
  271. if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) {
  272. netdev_warn(dev->net, "EEPROM read operation timeout\n");
  273. return -EIO;
  274. }
  275. return 0;
  276. }
  277. static int __must_check smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev)
  278. {
  279. unsigned long start_time = jiffies;
  280. u32 val;
  281. int ret;
  282. do {
  283. ret = smsc95xx_read_reg(dev, E2P_CMD, &val);
  284. if (ret < 0) {
  285. netdev_warn(dev->net, "Error reading E2P_CMD\n");
  286. return ret;
  287. }
  288. if (!(val & E2P_CMD_BUSY_))
  289. return 0;
  290. udelay(40);
  291. } while (!time_after(jiffies, start_time + HZ));
  292. netdev_warn(dev->net, "EEPROM is busy\n");
  293. return -EIO;
  294. }
  295. static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
  296. u8 *data)
  297. {
  298. u32 val;
  299. int i, ret;
  300. BUG_ON(!dev);
  301. BUG_ON(!data);
  302. ret = smsc95xx_eeprom_confirm_not_busy(dev);
  303. if (ret)
  304. return ret;
  305. for (i = 0; i < length; i++) {
  306. val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_);
  307. ret = smsc95xx_write_reg(dev, E2P_CMD, val);
  308. if (ret < 0) {
  309. netdev_warn(dev->net, "Error writing E2P_CMD\n");
  310. return ret;
  311. }
  312. ret = smsc95xx_wait_eeprom(dev);
  313. if (ret < 0)
  314. return ret;
  315. ret = smsc95xx_read_reg(dev, E2P_DATA, &val);
  316. if (ret < 0) {
  317. netdev_warn(dev->net, "Error reading E2P_DATA\n");
  318. return ret;
  319. }
  320. data[i] = val & 0xFF;
  321. offset++;
  322. }
  323. return 0;
  324. }
  325. static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
  326. u8 *data)
  327. {
  328. u32 val;
  329. int i, ret;
  330. BUG_ON(!dev);
  331. BUG_ON(!data);
  332. ret = smsc95xx_eeprom_confirm_not_busy(dev);
  333. if (ret)
  334. return ret;
  335. /* Issue write/erase enable command */
  336. val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_;
  337. ret = smsc95xx_write_reg(dev, E2P_CMD, val);
  338. if (ret < 0) {
  339. netdev_warn(dev->net, "Error writing E2P_DATA\n");
  340. return ret;
  341. }
  342. ret = smsc95xx_wait_eeprom(dev);
  343. if (ret < 0)
  344. return ret;
  345. for (i = 0; i < length; i++) {
  346. /* Fill data register */
  347. val = data[i];
  348. ret = smsc95xx_write_reg(dev, E2P_DATA, val);
  349. if (ret < 0) {
  350. netdev_warn(dev->net, "Error writing E2P_DATA\n");
  351. return ret;
  352. }
  353. /* Send "write" command */
  354. val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_);
  355. ret = smsc95xx_write_reg(dev, E2P_CMD, val);
  356. if (ret < 0) {
  357. netdev_warn(dev->net, "Error writing E2P_CMD\n");
  358. return ret;
  359. }
  360. ret = smsc95xx_wait_eeprom(dev);
  361. if (ret < 0)
  362. return ret;
  363. offset++;
  364. }
  365. return 0;
  366. }
  367. static int __must_check smsc95xx_write_reg_async(struct usbnet *dev, u16 index,
  368. u32 data)
  369. {
  370. const u16 size = 4;
  371. u32 buf;
  372. int ret;
  373. buf = data;
  374. cpu_to_le32s(&buf);
  375. ret = usbnet_write_cmd_async(dev, USB_VENDOR_REQUEST_WRITE_REGISTER,
  376. USB_DIR_OUT | USB_TYPE_VENDOR |
  377. USB_RECIP_DEVICE,
  378. 0, index, &buf, size);
  379. if (ret < 0)
  380. netdev_warn(dev->net, "Error write async cmd, sts=%d\n",
  381. ret);
  382. return ret;
  383. }
  384. /* returns hash bit number for given MAC address
  385. * example:
  386. * 01 00 5E 00 00 01 -> returns bit number 31 */
  387. static unsigned int smsc95xx_hash(char addr[ETH_ALEN])
  388. {
  389. return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
  390. }
  391. static void smsc95xx_set_multicast(struct net_device *netdev)
  392. {
  393. struct usbnet *dev = netdev_priv(netdev);
  394. struct smsc95xx_priv *pdata = dev->driver_priv;
  395. unsigned long flags;
  396. int ret;
  397. pdata->hash_hi = 0;
  398. pdata->hash_lo = 0;
  399. spin_lock_irqsave(&pdata->mac_cr_lock, flags);
  400. if (dev->net->flags & IFF_PROMISC) {
  401. netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n");
  402. pdata->mac_cr |= MAC_CR_PRMS_;
  403. pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
  404. } else if (dev->net->flags & IFF_ALLMULTI) {
  405. netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n");
  406. pdata->mac_cr |= MAC_CR_MCPAS_;
  407. pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_);
  408. } else if (!netdev_mc_empty(dev->net)) {
  409. struct netdev_hw_addr *ha;
  410. pdata->mac_cr |= MAC_CR_HPFILT_;
  411. pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
  412. netdev_for_each_mc_addr(ha, netdev) {
  413. u32 bitnum = smsc95xx_hash(ha->addr);
  414. u32 mask = 0x01 << (bitnum & 0x1F);
  415. if (bitnum & 0x20)
  416. pdata->hash_hi |= mask;
  417. else
  418. pdata->hash_lo |= mask;
  419. }
  420. netif_dbg(dev, drv, dev->net, "HASHH=0x%08X, HASHL=0x%08X\n",
  421. pdata->hash_hi, pdata->hash_lo);
  422. } else {
  423. netif_dbg(dev, drv, dev->net, "receive own packets only\n");
  424. pdata->mac_cr &=
  425. ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
  426. }
  427. spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
  428. /* Initiate async writes, as we can't wait for completion here */
  429. ret = smsc95xx_write_reg_async(dev, HASHH, pdata->hash_hi);
  430. if (ret < 0)
  431. netdev_warn(dev->net, "failed to initiate async write to HASHH\n");
  432. ret = smsc95xx_write_reg_async(dev, HASHL, pdata->hash_lo);
  433. if (ret < 0)
  434. netdev_warn(dev->net, "failed to initiate async write to HASHL\n");
  435. ret = smsc95xx_write_reg_async(dev, MAC_CR, pdata->mac_cr);
  436. if (ret < 0)
  437. netdev_warn(dev->net, "failed to initiate async write to MAC_CR\n");
  438. }
  439. static int smsc95xx_phy_update_flowcontrol(struct usbnet *dev)
  440. {
  441. u32 flow = 0, afc_cfg;
  442. struct smsc95xx_priv *pdata = dev->driver_priv;
  443. bool tx_pause, rx_pause;
  444. int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg);
  445. if (ret < 0)
  446. return ret;
  447. if (pdata->phydev->duplex == DUPLEX_FULL) {
  448. phy_get_pause(pdata->phydev, &tx_pause, &rx_pause);
  449. if (rx_pause)
  450. flow = 0xFFFF0002;
  451. if (tx_pause) {
  452. afc_cfg |= 0xF;
  453. flow |= 0xFFFF0000;
  454. } else {
  455. afc_cfg &= ~0xF;
  456. }
  457. netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n",
  458. rx_pause ? "enabled" : "disabled",
  459. tx_pause ? "enabled" : "disabled");
  460. } else {
  461. netif_dbg(dev, link, dev->net, "half duplex\n");
  462. afc_cfg |= 0xF;
  463. }
  464. ret = smsc95xx_write_reg(dev, FLOW, flow);
  465. if (ret < 0)
  466. return ret;
  467. return smsc95xx_write_reg(dev, AFC_CFG, afc_cfg);
  468. }
  469. static void smsc95xx_mac_update_fullduplex(struct usbnet *dev)
  470. {
  471. struct smsc95xx_priv *pdata = dev->driver_priv;
  472. unsigned long flags;
  473. int ret;
  474. spin_lock_irqsave(&pdata->mac_cr_lock, flags);
  475. if (pdata->phydev->duplex != DUPLEX_FULL) {
  476. pdata->mac_cr &= ~MAC_CR_FDPX_;
  477. pdata->mac_cr |= MAC_CR_RCVOWN_;
  478. } else {
  479. pdata->mac_cr &= ~MAC_CR_RCVOWN_;
  480. pdata->mac_cr |= MAC_CR_FDPX_;
  481. }
  482. spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
  483. ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
  484. if (ret < 0) {
  485. if (ret != -ENODEV)
  486. netdev_warn(dev->net,
  487. "Error updating MAC full duplex mode\n");
  488. return;
  489. }
  490. ret = smsc95xx_phy_update_flowcontrol(dev);
  491. if (ret < 0)
  492. netdev_warn(dev->net, "Error updating PHY flow control\n");
  493. }
  494. static void smsc95xx_status(struct usbnet *dev, struct urb *urb)
  495. {
  496. struct smsc95xx_priv *pdata = dev->driver_priv;
  497. unsigned long flags;
  498. u32 intdata;
  499. if (urb->actual_length != 4) {
  500. netdev_warn(dev->net, "unexpected urb length %d\n",
  501. urb->actual_length);
  502. return;
  503. }
  504. intdata = get_unaligned_le32(urb->transfer_buffer);
  505. netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata);
  506. local_irq_save(flags);
  507. if (intdata & INT_ENP_PHY_INT_)
  508. generic_handle_domain_irq(pdata->irqdomain, PHY_HWIRQ);
  509. else
  510. netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n",
  511. intdata);
  512. local_irq_restore(flags);
  513. }
  514. /* Enable or disable Tx & Rx checksum offload engines */
  515. static int smsc95xx_set_features(struct net_device *netdev,
  516. netdev_features_t features)
  517. {
  518. struct usbnet *dev = netdev_priv(netdev);
  519. u32 read_buf;
  520. int ret;
  521. ret = smsc95xx_read_reg(dev, COE_CR, &read_buf);
  522. if (ret < 0)
  523. return ret;
  524. if (features & NETIF_F_IP_CSUM)
  525. read_buf |= Tx_COE_EN_;
  526. else
  527. read_buf &= ~Tx_COE_EN_;
  528. if (features & NETIF_F_RXCSUM)
  529. read_buf |= Rx_COE_EN_;
  530. else
  531. read_buf &= ~Rx_COE_EN_;
  532. ret = smsc95xx_write_reg(dev, COE_CR, read_buf);
  533. if (ret < 0)
  534. return ret;
  535. netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf);
  536. return 0;
  537. }
  538. static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net)
  539. {
  540. return MAX_EEPROM_SIZE;
  541. }
  542. static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev,
  543. struct ethtool_eeprom *ee, u8 *data)
  544. {
  545. struct usbnet *dev = netdev_priv(netdev);
  546. ee->magic = LAN95XX_EEPROM_MAGIC;
  547. return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data);
  548. }
  549. static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev,
  550. struct ethtool_eeprom *ee, u8 *data)
  551. {
  552. struct usbnet *dev = netdev_priv(netdev);
  553. if (ee->magic != LAN95XX_EEPROM_MAGIC) {
  554. netdev_warn(dev->net, "EEPROM: magic value mismatch, magic = 0x%x\n",
  555. ee->magic);
  556. return -EINVAL;
  557. }
  558. return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data);
  559. }
  560. static int smsc95xx_ethtool_getregslen(struct net_device *netdev)
  561. {
  562. /* all smsc95xx registers */
  563. return COE_CR - ID_REV + sizeof(u32);
  564. }
  565. static void
  566. smsc95xx_ethtool_getregs(struct net_device *netdev, struct ethtool_regs *regs,
  567. void *buf)
  568. {
  569. struct usbnet *dev = netdev_priv(netdev);
  570. unsigned int i, j;
  571. int retval;
  572. u32 *data = buf;
  573. retval = smsc95xx_read_reg(dev, ID_REV, &regs->version);
  574. if (retval < 0) {
  575. netdev_warn(netdev, "REGS: cannot read ID_REV\n");
  576. return;
  577. }
  578. for (i = ID_REV, j = 0; i <= COE_CR; i += (sizeof(u32)), j++) {
  579. retval = smsc95xx_read_reg(dev, i, &data[j]);
  580. if (retval < 0) {
  581. netdev_warn(netdev, "REGS: cannot read reg[%x]\n", i);
  582. return;
  583. }
  584. }
  585. }
  586. static void smsc95xx_ethtool_get_wol(struct net_device *net,
  587. struct ethtool_wolinfo *wolinfo)
  588. {
  589. struct usbnet *dev = netdev_priv(net);
  590. struct smsc95xx_priv *pdata = dev->driver_priv;
  591. wolinfo->supported = SUPPORTED_WAKE;
  592. wolinfo->wolopts = pdata->wolopts;
  593. }
  594. static int smsc95xx_ethtool_set_wol(struct net_device *net,
  595. struct ethtool_wolinfo *wolinfo)
  596. {
  597. struct usbnet *dev = netdev_priv(net);
  598. struct smsc95xx_priv *pdata = dev->driver_priv;
  599. int ret;
  600. if (wolinfo->wolopts & ~SUPPORTED_WAKE)
  601. return -EINVAL;
  602. pdata->wolopts = wolinfo->wolopts & SUPPORTED_WAKE;
  603. ret = device_set_wakeup_enable(&dev->udev->dev, pdata->wolopts);
  604. if (ret < 0)
  605. netdev_warn(dev->net, "device_set_wakeup_enable error %d\n", ret);
  606. return ret;
  607. }
  608. static u32 smsc95xx_get_link(struct net_device *net)
  609. {
  610. phy_read_status(net->phydev);
  611. return net->phydev->link;
  612. }
  613. static void smsc95xx_ethtool_get_strings(struct net_device *netdev, u32 sset,
  614. u8 *data)
  615. {
  616. switch (sset) {
  617. case ETH_SS_TEST:
  618. net_selftest_get_strings(data);
  619. break;
  620. }
  621. }
  622. static int smsc95xx_ethtool_get_sset_count(struct net_device *ndev, int sset)
  623. {
  624. switch (sset) {
  625. case ETH_SS_TEST:
  626. return net_selftest_get_count();
  627. default:
  628. return -EOPNOTSUPP;
  629. }
  630. }
  631. static const struct ethtool_ops smsc95xx_ethtool_ops = {
  632. .get_link = smsc95xx_get_link,
  633. .nway_reset = phy_ethtool_nway_reset,
  634. .get_drvinfo = usbnet_get_drvinfo,
  635. .get_msglevel = usbnet_get_msglevel,
  636. .set_msglevel = usbnet_set_msglevel,
  637. .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len,
  638. .get_eeprom = smsc95xx_ethtool_get_eeprom,
  639. .set_eeprom = smsc95xx_ethtool_set_eeprom,
  640. .get_regs_len = smsc95xx_ethtool_getregslen,
  641. .get_regs = smsc95xx_ethtool_getregs,
  642. .get_wol = smsc95xx_ethtool_get_wol,
  643. .set_wol = smsc95xx_ethtool_set_wol,
  644. .get_link_ksettings = phy_ethtool_get_link_ksettings,
  645. .set_link_ksettings = phy_ethtool_set_link_ksettings,
  646. .get_ts_info = ethtool_op_get_ts_info,
  647. .self_test = net_selftest,
  648. .get_strings = smsc95xx_ethtool_get_strings,
  649. .get_sset_count = smsc95xx_ethtool_get_sset_count,
  650. };
  651. static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
  652. {
  653. if (!netif_running(netdev))
  654. return -EINVAL;
  655. return phy_mii_ioctl(netdev->phydev, rq, cmd);
  656. }
  657. static void smsc95xx_init_mac_address(struct usbnet *dev)
  658. {
  659. u8 addr[ETH_ALEN];
  660. /* maybe the boot loader passed the MAC address in devicetree */
  661. if (!platform_get_ethdev_address(&dev->udev->dev, dev->net)) {
  662. if (is_valid_ether_addr(dev->net->dev_addr)) {
  663. /* device tree values are valid so use them */
  664. netif_dbg(dev, ifup, dev->net, "MAC address read from the device tree\n");
  665. return;
  666. }
  667. }
  668. /* try reading mac address from EEPROM */
  669. if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN, addr) == 0) {
  670. eth_hw_addr_set(dev->net, addr);
  671. if (is_valid_ether_addr(dev->net->dev_addr)) {
  672. /* eeprom values are valid so use them */
  673. netif_dbg(dev, ifup, dev->net, "MAC address read from EEPROM\n");
  674. return;
  675. }
  676. }
  677. /* no useful static MAC address found. generate a random one */
  678. eth_hw_addr_random(dev->net);
  679. netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n");
  680. }
  681. static int smsc95xx_set_mac_address(struct usbnet *dev)
  682. {
  683. u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
  684. dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
  685. u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
  686. int ret;
  687. ret = smsc95xx_write_reg(dev, ADDRL, addr_lo);
  688. if (ret < 0)
  689. return ret;
  690. return smsc95xx_write_reg(dev, ADDRH, addr_hi);
  691. }
  692. /* starts the TX path */
  693. static int smsc95xx_start_tx_path(struct usbnet *dev)
  694. {
  695. struct smsc95xx_priv *pdata = dev->driver_priv;
  696. unsigned long flags;
  697. int ret;
  698. /* Enable Tx at MAC */
  699. spin_lock_irqsave(&pdata->mac_cr_lock, flags);
  700. pdata->mac_cr |= MAC_CR_TXEN_;
  701. spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
  702. ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
  703. if (ret < 0)
  704. return ret;
  705. /* Enable Tx at SCSRs */
  706. return smsc95xx_write_reg(dev, TX_CFG, TX_CFG_ON_);
  707. }
  708. /* Starts the Receive path */
  709. static int smsc95xx_start_rx_path(struct usbnet *dev)
  710. {
  711. struct smsc95xx_priv *pdata = dev->driver_priv;
  712. unsigned long flags;
  713. spin_lock_irqsave(&pdata->mac_cr_lock, flags);
  714. pdata->mac_cr |= MAC_CR_RXEN_;
  715. spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
  716. return smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
  717. }
  718. static int smsc95xx_reset(struct usbnet *dev)
  719. {
  720. struct smsc95xx_priv *pdata = dev->driver_priv;
  721. u32 read_buf, write_buf, burst_cap;
  722. int ret = 0, timeout;
  723. netif_dbg(dev, ifup, dev->net, "entering smsc95xx_reset\n");
  724. ret = smsc95xx_write_reg(dev, HW_CFG, HW_CFG_LRST_);
  725. if (ret < 0)
  726. return ret;
  727. timeout = 0;
  728. do {
  729. msleep(10);
  730. ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
  731. if (ret < 0)
  732. return ret;
  733. timeout++;
  734. } while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
  735. if (timeout >= 100) {
  736. netdev_warn(dev->net, "timeout waiting for completion of Lite Reset\n");
  737. return -ETIMEDOUT;
  738. }
  739. ret = smsc95xx_set_mac_address(dev);
  740. if (ret < 0)
  741. return ret;
  742. netif_dbg(dev, ifup, dev->net, "MAC Address: %pM\n",
  743. dev->net->dev_addr);
  744. ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
  745. if (ret < 0)
  746. return ret;
  747. netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x\n",
  748. read_buf);
  749. read_buf |= HW_CFG_BIR_;
  750. ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
  751. if (ret < 0)
  752. return ret;
  753. ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
  754. if (ret < 0)
  755. return ret;
  756. netif_dbg(dev, ifup, dev->net,
  757. "Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x\n",
  758. read_buf);
  759. if (!turbo_mode) {
  760. burst_cap = 0;
  761. dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
  762. } else if (dev->udev->speed == USB_SPEED_HIGH) {
  763. burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
  764. dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
  765. } else {
  766. burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
  767. dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
  768. }
  769. netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld\n",
  770. (ulong)dev->rx_urb_size);
  771. ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap);
  772. if (ret < 0)
  773. return ret;
  774. ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf);
  775. if (ret < 0)
  776. return ret;
  777. netif_dbg(dev, ifup, dev->net,
  778. "Read Value from BURST_CAP after writing: 0x%08x\n",
  779. read_buf);
  780. ret = smsc95xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
  781. if (ret < 0)
  782. return ret;
  783. ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf);
  784. if (ret < 0)
  785. return ret;
  786. netif_dbg(dev, ifup, dev->net,
  787. "Read Value from BULK_IN_DLY after writing: 0x%08x\n",
  788. read_buf);
  789. ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
  790. if (ret < 0)
  791. return ret;
  792. netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG: 0x%08x\n",
  793. read_buf);
  794. if (turbo_mode)
  795. read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);
  796. read_buf &= ~HW_CFG_RXDOFF_;
  797. /* set Rx data offset=2, Make IP header aligns on word boundary. */
  798. read_buf |= NET_IP_ALIGN << 9;
  799. ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
  800. if (ret < 0)
  801. return ret;
  802. ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
  803. if (ret < 0)
  804. return ret;
  805. netif_dbg(dev, ifup, dev->net,
  806. "Read Value from HW_CFG after writing: 0x%08x\n", read_buf);
  807. ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
  808. if (ret < 0)
  809. return ret;
  810. ret = smsc95xx_read_reg(dev, ID_REV, &read_buf);
  811. if (ret < 0)
  812. return ret;
  813. netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf);
  814. /* Configure GPIO pins as LED outputs */
  815. write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED |
  816. LED_GPIO_CFG_FDX_LED;
  817. ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf);
  818. if (ret < 0)
  819. return ret;
  820. /* Init Tx */
  821. ret = smsc95xx_write_reg(dev, FLOW, 0);
  822. if (ret < 0)
  823. return ret;
  824. ret = smsc95xx_write_reg(dev, AFC_CFG, AFC_CFG_DEFAULT);
  825. if (ret < 0)
  826. return ret;
  827. /* Don't need mac_cr_lock during initialisation */
  828. ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr);
  829. if (ret < 0)
  830. return ret;
  831. /* Init Rx */
  832. /* Set Vlan */
  833. ret = smsc95xx_write_reg(dev, VLAN1, (u32)ETH_P_8021Q);
  834. if (ret < 0)
  835. return ret;
  836. /* Enable or disable checksum offload engines */
  837. ret = smsc95xx_set_features(dev->net, dev->net->features);
  838. if (ret < 0) {
  839. netdev_warn(dev->net, "Failed to set checksum offload features\n");
  840. return ret;
  841. }
  842. smsc95xx_set_multicast(dev->net);
  843. ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf);
  844. if (ret < 0)
  845. return ret;
  846. /* enable PHY interrupts */
  847. read_buf |= INT_EP_CTL_PHY_INT_;
  848. ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);
  849. if (ret < 0)
  850. return ret;
  851. ret = smsc95xx_start_tx_path(dev);
  852. if (ret < 0) {
  853. netdev_warn(dev->net, "Failed to start TX path\n");
  854. return ret;
  855. }
  856. ret = smsc95xx_start_rx_path(dev);
  857. if (ret < 0) {
  858. netdev_warn(dev->net, "Failed to start RX path\n");
  859. return ret;
  860. }
  861. netif_dbg(dev, ifup, dev->net, "smsc95xx_reset, return 0\n");
  862. return 0;
  863. }
  864. static const struct net_device_ops smsc95xx_netdev_ops = {
  865. .ndo_open = usbnet_open,
  866. .ndo_stop = usbnet_stop,
  867. .ndo_start_xmit = usbnet_start_xmit,
  868. .ndo_tx_timeout = usbnet_tx_timeout,
  869. .ndo_change_mtu = usbnet_change_mtu,
  870. .ndo_get_stats64 = dev_get_tstats64,
  871. .ndo_set_mac_address = eth_mac_addr,
  872. .ndo_validate_addr = eth_validate_addr,
  873. .ndo_eth_ioctl = smsc95xx_ioctl,
  874. .ndo_set_rx_mode = smsc95xx_set_multicast,
  875. .ndo_set_features = smsc95xx_set_features,
  876. };
  877. static void smsc95xx_handle_link_change(struct net_device *net)
  878. {
  879. struct usbnet *dev = netdev_priv(net);
  880. phy_print_status(net->phydev);
  881. smsc95xx_mac_update_fullduplex(dev);
  882. usbnet_defer_kevent(dev, EVENT_LINK_CHANGE);
  883. }
  884. static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf)
  885. {
  886. struct smsc95xx_priv *pdata;
  887. char usb_path[64];
  888. int ret, phy_irq;
  889. u32 val;
  890. printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
  891. ret = usbnet_get_endpoints(dev, intf);
  892. if (ret < 0) {
  893. netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret);
  894. return ret;
  895. }
  896. pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
  897. if (!pdata)
  898. return -ENOMEM;
  899. dev->driver_priv = pdata;
  900. spin_lock_init(&pdata->mac_cr_lock);
  901. /* LAN95xx devices do not alter the computed checksum of 0 to 0xffff.
  902. * RFC 2460, ipv6 UDP calculated checksum yields a result of zero must
  903. * be changed to 0xffff. RFC 768, ipv4 UDP computed checksum is zero,
  904. * it is transmitted as all ones. The zero transmitted checksum means
  905. * transmitter generated no checksum. Hence, enable csum offload only
  906. * for ipv4 packets.
  907. */
  908. if (DEFAULT_TX_CSUM_ENABLE)
  909. dev->net->features |= NETIF_F_IP_CSUM;
  910. if (DEFAULT_RX_CSUM_ENABLE)
  911. dev->net->features |= NETIF_F_RXCSUM;
  912. dev->net->hw_features = NETIF_F_IP_CSUM | NETIF_F_RXCSUM;
  913. set_bit(EVENT_NO_IP_ALIGN, &dev->flags);
  914. smsc95xx_init_mac_address(dev);
  915. /* Init all registers */
  916. ret = smsc95xx_reset(dev);
  917. if (ret)
  918. goto free_pdata;
  919. /* create irq domain for use by PHY driver and GPIO consumers */
  920. usb_make_path(dev->udev, usb_path, sizeof(usb_path));
  921. pdata->irqfwnode = irq_domain_alloc_named_fwnode(usb_path);
  922. if (!pdata->irqfwnode) {
  923. ret = -ENOMEM;
  924. goto free_pdata;
  925. }
  926. pdata->irqdomain = irq_domain_create_linear(pdata->irqfwnode,
  927. SMSC95XX_NR_IRQS,
  928. &irq_domain_simple_ops,
  929. pdata);
  930. if (!pdata->irqdomain) {
  931. ret = -ENOMEM;
  932. goto free_irqfwnode;
  933. }
  934. phy_irq = irq_create_mapping(pdata->irqdomain, PHY_HWIRQ);
  935. if (!phy_irq) {
  936. ret = -ENOENT;
  937. goto remove_irqdomain;
  938. }
  939. pdata->irqchip = dummy_irq_chip;
  940. pdata->irqchip.name = SMSC_CHIPNAME;
  941. irq_set_chip_and_handler_name(phy_irq, &pdata->irqchip,
  942. handle_simple_irq, "phy");
  943. pdata->mdiobus = mdiobus_alloc();
  944. if (!pdata->mdiobus) {
  945. ret = -ENOMEM;
  946. goto dispose_irq;
  947. }
  948. ret = smsc95xx_read_reg(dev, HW_CFG, &val);
  949. if (ret < 0)
  950. goto free_mdio;
  951. pdata->is_internal_phy = !(val & HW_CFG_PSEL_);
  952. if (pdata->is_internal_phy)
  953. pdata->mdiobus->phy_mask = ~(1u << SMSC95XX_INTERNAL_PHY_ID);
  954. pdata->mdiobus->priv = dev;
  955. pdata->mdiobus->read = smsc95xx_mdiobus_read;
  956. pdata->mdiobus->write = smsc95xx_mdiobus_write;
  957. pdata->mdiobus->reset = smsc95xx_mdiobus_reset;
  958. pdata->mdiobus->name = "smsc95xx-mdiobus";
  959. pdata->mdiobus->parent = &dev->udev->dev;
  960. snprintf(pdata->mdiobus->id, ARRAY_SIZE(pdata->mdiobus->id),
  961. "usb-%03d:%03d", dev->udev->bus->busnum, dev->udev->devnum);
  962. ret = mdiobus_register(pdata->mdiobus);
  963. if (ret) {
  964. netdev_err(dev->net, "Could not register MDIO bus\n");
  965. goto free_mdio;
  966. }
  967. pdata->phydev = phy_find_first(pdata->mdiobus);
  968. if (!pdata->phydev) {
  969. netdev_err(dev->net, "no PHY found\n");
  970. ret = -ENODEV;
  971. goto unregister_mdio;
  972. }
  973. pdata->phydev->irq = phy_irq;
  974. pdata->phydev->is_internal = pdata->is_internal_phy;
  975. /* detect device revision as different features may be available */
  976. ret = smsc95xx_read_reg(dev, ID_REV, &val);
  977. if (ret < 0)
  978. goto unregister_mdio;
  979. val >>= 16;
  980. if ((val == ID_REV_CHIP_ID_9500A_) || (val == ID_REV_CHIP_ID_9530_) ||
  981. (val == ID_REV_CHIP_ID_89530_) || (val == ID_REV_CHIP_ID_9730_))
  982. pdata->features = (FEATURE_8_WAKEUP_FILTERS |
  983. FEATURE_PHY_NLP_CROSSOVER |
  984. FEATURE_REMOTE_WAKEUP);
  985. else if (val == ID_REV_CHIP_ID_9512_)
  986. pdata->features = FEATURE_8_WAKEUP_FILTERS;
  987. dev->net->netdev_ops = &smsc95xx_netdev_ops;
  988. dev->net->ethtool_ops = &smsc95xx_ethtool_ops;
  989. dev->net->flags |= IFF_MULTICAST;
  990. dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD_CSUM;
  991. dev->net->min_mtu = ETH_MIN_MTU;
  992. dev->net->max_mtu = ETH_DATA_LEN;
  993. dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
  994. ret = phy_connect_direct(dev->net, pdata->phydev,
  995. &smsc95xx_handle_link_change,
  996. PHY_INTERFACE_MODE_MII);
  997. if (ret) {
  998. netdev_err(dev->net, "can't attach PHY to %s\n", pdata->mdiobus->id);
  999. goto unregister_mdio;
  1000. }
  1001. phy_attached_info(dev->net->phydev);
  1002. return 0;
  1003. unregister_mdio:
  1004. mdiobus_unregister(pdata->mdiobus);
  1005. free_mdio:
  1006. mdiobus_free(pdata->mdiobus);
  1007. dispose_irq:
  1008. irq_dispose_mapping(phy_irq);
  1009. remove_irqdomain:
  1010. irq_domain_remove(pdata->irqdomain);
  1011. free_irqfwnode:
  1012. irq_domain_free_fwnode(pdata->irqfwnode);
  1013. free_pdata:
  1014. kfree(pdata);
  1015. return ret;
  1016. }
  1017. static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf)
  1018. {
  1019. struct smsc95xx_priv *pdata = dev->driver_priv;
  1020. phy_disconnect(dev->net->phydev);
  1021. mdiobus_unregister(pdata->mdiobus);
  1022. mdiobus_free(pdata->mdiobus);
  1023. irq_dispose_mapping(irq_find_mapping(pdata->irqdomain, PHY_HWIRQ));
  1024. irq_domain_remove(pdata->irqdomain);
  1025. irq_domain_free_fwnode(pdata->irqfwnode);
  1026. netif_dbg(dev, ifdown, dev->net, "free pdata\n");
  1027. kfree(pdata);
  1028. }
  1029. static int smsc95xx_start_phy(struct usbnet *dev)
  1030. {
  1031. phy_start(dev->net->phydev);
  1032. return 0;
  1033. }
  1034. static int smsc95xx_stop(struct usbnet *dev)
  1035. {
  1036. phy_stop(dev->net->phydev);
  1037. return 0;
  1038. }
  1039. static u32 smsc_crc(const u8 *buffer, size_t len, int filter)
  1040. {
  1041. u32 crc = bitrev16(crc16(0xFFFF, buffer, len));
  1042. return crc << ((filter % 2) * 16);
  1043. }
  1044. static int smsc95xx_link_ok(struct usbnet *dev)
  1045. {
  1046. struct smsc95xx_priv *pdata = dev->driver_priv;
  1047. int ret;
  1048. /* first, a dummy read, needed to latch some MII phys */
  1049. ret = smsc95xx_mdio_read(dev, pdata->phydev->mdio.addr, MII_BMSR);
  1050. if (ret < 0)
  1051. return ret;
  1052. ret = smsc95xx_mdio_read(dev, pdata->phydev->mdio.addr, MII_BMSR);
  1053. if (ret < 0)
  1054. return ret;
  1055. return !!(ret & BMSR_LSTATUS);
  1056. }
  1057. static int smsc95xx_enter_suspend0(struct usbnet *dev)
  1058. {
  1059. struct smsc95xx_priv *pdata = dev->driver_priv;
  1060. u32 val;
  1061. int ret;
  1062. ret = smsc95xx_read_reg(dev, PM_CTRL, &val);
  1063. if (ret < 0)
  1064. return ret;
  1065. val &= (~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_));
  1066. val |= PM_CTL_SUS_MODE_0;
  1067. ret = smsc95xx_write_reg(dev, PM_CTRL, val);
  1068. if (ret < 0)
  1069. return ret;
  1070. /* clear wol status */
  1071. val &= ~PM_CTL_WUPS_;
  1072. val |= PM_CTL_WUPS_WOL_;
  1073. /* enable energy detection */
  1074. if (pdata->wolopts & WAKE_PHY)
  1075. val |= PM_CTL_WUPS_ED_;
  1076. ret = smsc95xx_write_reg(dev, PM_CTRL, val);
  1077. if (ret < 0)
  1078. return ret;
  1079. /* read back PM_CTRL */
  1080. ret = smsc95xx_read_reg(dev, PM_CTRL, &val);
  1081. if (ret < 0)
  1082. return ret;
  1083. pdata->suspend_flags |= SUSPEND_SUSPEND0;
  1084. return 0;
  1085. }
  1086. static int smsc95xx_enter_suspend1(struct usbnet *dev)
  1087. {
  1088. struct smsc95xx_priv *pdata = dev->driver_priv;
  1089. int ret, phy_id = pdata->phydev->mdio.addr;
  1090. u32 val;
  1091. /* reconfigure link pulse detection timing for
  1092. * compatibility with non-standard link partners
  1093. */
  1094. if (pdata->features & FEATURE_PHY_NLP_CROSSOVER)
  1095. smsc95xx_mdio_write(dev, phy_id, PHY_EDPD_CONFIG,
  1096. PHY_EDPD_CONFIG_DEFAULT);
  1097. /* enable energy detect power-down mode */
  1098. ret = smsc95xx_mdio_read(dev, phy_id, PHY_MODE_CTRL_STS);
  1099. if (ret < 0)
  1100. return ret;
  1101. ret |= MODE_CTRL_STS_EDPWRDOWN_;
  1102. smsc95xx_mdio_write(dev, phy_id, PHY_MODE_CTRL_STS, ret);
  1103. /* enter SUSPEND1 mode */
  1104. ret = smsc95xx_read_reg(dev, PM_CTRL, &val);
  1105. if (ret < 0)
  1106. return ret;
  1107. val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_);
  1108. val |= PM_CTL_SUS_MODE_1;
  1109. ret = smsc95xx_write_reg(dev, PM_CTRL, val);
  1110. if (ret < 0)
  1111. return ret;
  1112. /* clear wol status, enable energy detection */
  1113. val &= ~PM_CTL_WUPS_;
  1114. val |= (PM_CTL_WUPS_ED_ | PM_CTL_ED_EN_);
  1115. ret = smsc95xx_write_reg(dev, PM_CTRL, val);
  1116. if (ret < 0)
  1117. return ret;
  1118. pdata->suspend_flags |= SUSPEND_SUSPEND1;
  1119. return 0;
  1120. }
  1121. static int smsc95xx_enter_suspend2(struct usbnet *dev)
  1122. {
  1123. struct smsc95xx_priv *pdata = dev->driver_priv;
  1124. u32 val;
  1125. int ret;
  1126. ret = smsc95xx_read_reg(dev, PM_CTRL, &val);
  1127. if (ret < 0)
  1128. return ret;
  1129. val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_);
  1130. val |= PM_CTL_SUS_MODE_2;
  1131. ret = smsc95xx_write_reg(dev, PM_CTRL, val);
  1132. if (ret < 0)
  1133. return ret;
  1134. pdata->suspend_flags |= SUSPEND_SUSPEND2;
  1135. return 0;
  1136. }
  1137. static int smsc95xx_enter_suspend3(struct usbnet *dev)
  1138. {
  1139. struct smsc95xx_priv *pdata = dev->driver_priv;
  1140. u32 val;
  1141. int ret;
  1142. ret = smsc95xx_read_reg(dev, RX_FIFO_INF, &val);
  1143. if (ret < 0)
  1144. return ret;
  1145. if (val & RX_FIFO_INF_USED_) {
  1146. netdev_info(dev->net, "rx fifo not empty in autosuspend\n");
  1147. return -EBUSY;
  1148. }
  1149. ret = smsc95xx_read_reg(dev, PM_CTRL, &val);
  1150. if (ret < 0)
  1151. return ret;
  1152. val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_);
  1153. val |= PM_CTL_SUS_MODE_3 | PM_CTL_RES_CLR_WKP_STS;
  1154. ret = smsc95xx_write_reg(dev, PM_CTRL, val);
  1155. if (ret < 0)
  1156. return ret;
  1157. /* clear wol status */
  1158. val &= ~PM_CTL_WUPS_;
  1159. val |= PM_CTL_WUPS_WOL_;
  1160. ret = smsc95xx_write_reg(dev, PM_CTRL, val);
  1161. if (ret < 0)
  1162. return ret;
  1163. pdata->suspend_flags |= SUSPEND_SUSPEND3;
  1164. return 0;
  1165. }
  1166. static int smsc95xx_autosuspend(struct usbnet *dev, u32 link_up)
  1167. {
  1168. struct smsc95xx_priv *pdata = dev->driver_priv;
  1169. if (!netif_running(dev->net)) {
  1170. /* interface is ifconfig down so fully power down hw */
  1171. netdev_dbg(dev->net, "autosuspend entering SUSPEND2\n");
  1172. return smsc95xx_enter_suspend2(dev);
  1173. }
  1174. if (!link_up) {
  1175. /* link is down so enter EDPD mode, but only if device can
  1176. * reliably resume from it. This check should be redundant
  1177. * as current FEATURE_REMOTE_WAKEUP parts also support
  1178. * FEATURE_PHY_NLP_CROSSOVER but it's included for clarity */
  1179. if (!(pdata->features & FEATURE_PHY_NLP_CROSSOVER)) {
  1180. netdev_warn(dev->net, "EDPD not supported\n");
  1181. return -EBUSY;
  1182. }
  1183. netdev_dbg(dev->net, "autosuspend entering SUSPEND1\n");
  1184. netdev_info(dev->net, "entering SUSPEND1 mode\n");
  1185. return smsc95xx_enter_suspend1(dev);
  1186. }
  1187. netdev_dbg(dev->net, "autosuspend entering SUSPEND3\n");
  1188. return smsc95xx_enter_suspend3(dev);
  1189. }
  1190. static int smsc95xx_suspend(struct usb_interface *intf, pm_message_t message)
  1191. {
  1192. struct usbnet *dev = usb_get_intfdata(intf);
  1193. struct smsc95xx_priv *pdata = dev->driver_priv;
  1194. u32 val, link_up;
  1195. int ret;
  1196. pdata->pm_task = current;
  1197. ret = usbnet_suspend(intf, message);
  1198. if (ret < 0) {
  1199. netdev_warn(dev->net, "usbnet_suspend error\n");
  1200. pdata->pm_task = NULL;
  1201. return ret;
  1202. }
  1203. if (pdata->suspend_flags) {
  1204. netdev_warn(dev->net, "error during last resume\n");
  1205. pdata->suspend_flags = 0;
  1206. }
  1207. link_up = smsc95xx_link_ok(dev);
  1208. if (message.event == PM_EVENT_AUTO_SUSPEND &&
  1209. (pdata->features & FEATURE_REMOTE_WAKEUP)) {
  1210. ret = smsc95xx_autosuspend(dev, link_up);
  1211. goto done;
  1212. }
  1213. /* if we get this far we're not autosuspending */
  1214. /* if no wol options set, or if link is down and we're not waking on
  1215. * PHY activity, enter lowest power SUSPEND2 mode
  1216. */
  1217. if (!(pdata->wolopts & SUPPORTED_WAKE) ||
  1218. !(link_up || (pdata->wolopts & WAKE_PHY))) {
  1219. netdev_info(dev->net, "entering SUSPEND2 mode\n");
  1220. /* disable energy detect (link up) & wake up events */
  1221. ret = smsc95xx_read_reg(dev, WUCSR, &val);
  1222. if (ret < 0)
  1223. goto done;
  1224. val &= ~(WUCSR_MPEN_ | WUCSR_WAKE_EN_);
  1225. ret = smsc95xx_write_reg(dev, WUCSR, val);
  1226. if (ret < 0)
  1227. goto done;
  1228. ret = smsc95xx_read_reg(dev, PM_CTRL, &val);
  1229. if (ret < 0)
  1230. goto done;
  1231. val &= ~(PM_CTL_ED_EN_ | PM_CTL_WOL_EN_);
  1232. ret = smsc95xx_write_reg(dev, PM_CTRL, val);
  1233. if (ret < 0)
  1234. goto done;
  1235. ret = smsc95xx_enter_suspend2(dev);
  1236. goto done;
  1237. }
  1238. if (pdata->wolopts & WAKE_PHY) {
  1239. /* if link is down then configure EDPD and enter SUSPEND1,
  1240. * otherwise enter SUSPEND0 below
  1241. */
  1242. if (!link_up) {
  1243. netdev_info(dev->net, "entering SUSPEND1 mode\n");
  1244. ret = smsc95xx_enter_suspend1(dev);
  1245. goto done;
  1246. }
  1247. }
  1248. if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) {
  1249. u32 *filter_mask = kcalloc(32, sizeof(u32), GFP_KERNEL);
  1250. u32 command[2];
  1251. u32 offset[2];
  1252. u32 crc[4];
  1253. int wuff_filter_count =
  1254. (pdata->features & FEATURE_8_WAKEUP_FILTERS) ?
  1255. LAN9500A_WUFF_NUM : LAN9500_WUFF_NUM;
  1256. int i, filter = 0;
  1257. if (!filter_mask) {
  1258. netdev_warn(dev->net, "Unable to allocate filter_mask\n");
  1259. ret = -ENOMEM;
  1260. goto done;
  1261. }
  1262. memset(command, 0, sizeof(command));
  1263. memset(offset, 0, sizeof(offset));
  1264. memset(crc, 0, sizeof(crc));
  1265. if (pdata->wolopts & WAKE_BCAST) {
  1266. const u8 bcast[] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
  1267. netdev_info(dev->net, "enabling broadcast detection\n");
  1268. filter_mask[filter * 4] = 0x003F;
  1269. filter_mask[filter * 4 + 1] = 0x00;
  1270. filter_mask[filter * 4 + 2] = 0x00;
  1271. filter_mask[filter * 4 + 3] = 0x00;
  1272. command[filter/4] |= 0x05UL << ((filter % 4) * 8);
  1273. offset[filter/4] |= 0x00 << ((filter % 4) * 8);
  1274. crc[filter/2] |= smsc_crc(bcast, 6, filter);
  1275. filter++;
  1276. }
  1277. if (pdata->wolopts & WAKE_MCAST) {
  1278. const u8 mcast[] = {0x01, 0x00, 0x5E};
  1279. netdev_info(dev->net, "enabling multicast detection\n");
  1280. filter_mask[filter * 4] = 0x0007;
  1281. filter_mask[filter * 4 + 1] = 0x00;
  1282. filter_mask[filter * 4 + 2] = 0x00;
  1283. filter_mask[filter * 4 + 3] = 0x00;
  1284. command[filter/4] |= 0x09UL << ((filter % 4) * 8);
  1285. offset[filter/4] |= 0x00 << ((filter % 4) * 8);
  1286. crc[filter/2] |= smsc_crc(mcast, 3, filter);
  1287. filter++;
  1288. }
  1289. if (pdata->wolopts & WAKE_ARP) {
  1290. const u8 arp[] = {0x08, 0x06};
  1291. netdev_info(dev->net, "enabling ARP detection\n");
  1292. filter_mask[filter * 4] = 0x0003;
  1293. filter_mask[filter * 4 + 1] = 0x00;
  1294. filter_mask[filter * 4 + 2] = 0x00;
  1295. filter_mask[filter * 4 + 3] = 0x00;
  1296. command[filter/4] |= 0x05UL << ((filter % 4) * 8);
  1297. offset[filter/4] |= 0x0C << ((filter % 4) * 8);
  1298. crc[filter/2] |= smsc_crc(arp, 2, filter);
  1299. filter++;
  1300. }
  1301. if (pdata->wolopts & WAKE_UCAST) {
  1302. netdev_info(dev->net, "enabling unicast detection\n");
  1303. filter_mask[filter * 4] = 0x003F;
  1304. filter_mask[filter * 4 + 1] = 0x00;
  1305. filter_mask[filter * 4 + 2] = 0x00;
  1306. filter_mask[filter * 4 + 3] = 0x00;
  1307. command[filter/4] |= 0x01UL << ((filter % 4) * 8);
  1308. offset[filter/4] |= 0x00 << ((filter % 4) * 8);
  1309. crc[filter/2] |= smsc_crc(dev->net->dev_addr, ETH_ALEN, filter);
  1310. filter++;
  1311. }
  1312. for (i = 0; i < (wuff_filter_count * 4); i++) {
  1313. ret = smsc95xx_write_reg(dev, WUFF, filter_mask[i]);
  1314. if (ret < 0) {
  1315. kfree(filter_mask);
  1316. goto done;
  1317. }
  1318. }
  1319. kfree(filter_mask);
  1320. for (i = 0; i < (wuff_filter_count / 4); i++) {
  1321. ret = smsc95xx_write_reg(dev, WUFF, command[i]);
  1322. if (ret < 0)
  1323. goto done;
  1324. }
  1325. for (i = 0; i < (wuff_filter_count / 4); i++) {
  1326. ret = smsc95xx_write_reg(dev, WUFF, offset[i]);
  1327. if (ret < 0)
  1328. goto done;
  1329. }
  1330. for (i = 0; i < (wuff_filter_count / 2); i++) {
  1331. ret = smsc95xx_write_reg(dev, WUFF, crc[i]);
  1332. if (ret < 0)
  1333. goto done;
  1334. }
  1335. /* clear any pending pattern match packet status */
  1336. ret = smsc95xx_read_reg(dev, WUCSR, &val);
  1337. if (ret < 0)
  1338. goto done;
  1339. val |= WUCSR_WUFR_;
  1340. ret = smsc95xx_write_reg(dev, WUCSR, val);
  1341. if (ret < 0)
  1342. goto done;
  1343. }
  1344. if (pdata->wolopts & WAKE_MAGIC) {
  1345. /* clear any pending magic packet status */
  1346. ret = smsc95xx_read_reg(dev, WUCSR, &val);
  1347. if (ret < 0)
  1348. goto done;
  1349. val |= WUCSR_MPR_;
  1350. ret = smsc95xx_write_reg(dev, WUCSR, val);
  1351. if (ret < 0)
  1352. goto done;
  1353. }
  1354. /* enable/disable wakeup sources */
  1355. ret = smsc95xx_read_reg(dev, WUCSR, &val);
  1356. if (ret < 0)
  1357. goto done;
  1358. if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) {
  1359. netdev_info(dev->net, "enabling pattern match wakeup\n");
  1360. val |= WUCSR_WAKE_EN_;
  1361. } else {
  1362. netdev_info(dev->net, "disabling pattern match wakeup\n");
  1363. val &= ~WUCSR_WAKE_EN_;
  1364. }
  1365. if (pdata->wolopts & WAKE_MAGIC) {
  1366. netdev_info(dev->net, "enabling magic packet wakeup\n");
  1367. val |= WUCSR_MPEN_;
  1368. } else {
  1369. netdev_info(dev->net, "disabling magic packet wakeup\n");
  1370. val &= ~WUCSR_MPEN_;
  1371. }
  1372. ret = smsc95xx_write_reg(dev, WUCSR, val);
  1373. if (ret < 0)
  1374. goto done;
  1375. /* enable wol wakeup source */
  1376. ret = smsc95xx_read_reg(dev, PM_CTRL, &val);
  1377. if (ret < 0)
  1378. goto done;
  1379. val |= PM_CTL_WOL_EN_;
  1380. /* phy energy detect wakeup source */
  1381. if (pdata->wolopts & WAKE_PHY)
  1382. val |= PM_CTL_ED_EN_;
  1383. ret = smsc95xx_write_reg(dev, PM_CTRL, val);
  1384. if (ret < 0)
  1385. goto done;
  1386. /* enable receiver to enable frame reception */
  1387. smsc95xx_start_rx_path(dev);
  1388. /* some wol options are enabled, so enter SUSPEND0 */
  1389. netdev_info(dev->net, "entering SUSPEND0 mode\n");
  1390. ret = smsc95xx_enter_suspend0(dev);
  1391. done:
  1392. /*
  1393. * TODO: resume() might need to handle the suspend failure
  1394. * in system sleep
  1395. */
  1396. if (ret && PMSG_IS_AUTO(message))
  1397. usbnet_resume(intf);
  1398. pdata->pm_task = NULL;
  1399. return ret;
  1400. }
  1401. static int smsc95xx_resume(struct usb_interface *intf)
  1402. {
  1403. struct usbnet *dev = usb_get_intfdata(intf);
  1404. struct smsc95xx_priv *pdata;
  1405. u8 suspend_flags;
  1406. int ret;
  1407. u32 val;
  1408. BUG_ON(!dev);
  1409. pdata = dev->driver_priv;
  1410. suspend_flags = pdata->suspend_flags;
  1411. netdev_dbg(dev->net, "resume suspend_flags=0x%02x\n", suspend_flags);
  1412. /* do this first to ensure it's cleared even in error case */
  1413. pdata->suspend_flags = 0;
  1414. pdata->pm_task = current;
  1415. if (suspend_flags & SUSPEND_ALLMODES) {
  1416. /* clear wake-up sources */
  1417. ret = smsc95xx_read_reg(dev, WUCSR, &val);
  1418. if (ret < 0)
  1419. goto done;
  1420. val &= ~(WUCSR_WAKE_EN_ | WUCSR_MPEN_);
  1421. ret = smsc95xx_write_reg(dev, WUCSR, val);
  1422. if (ret < 0)
  1423. goto done;
  1424. /* clear wake-up status */
  1425. ret = smsc95xx_read_reg(dev, PM_CTRL, &val);
  1426. if (ret < 0)
  1427. goto done;
  1428. val &= ~PM_CTL_WOL_EN_;
  1429. val |= PM_CTL_WUPS_;
  1430. ret = smsc95xx_write_reg(dev, PM_CTRL, val);
  1431. if (ret < 0)
  1432. goto done;
  1433. }
  1434. phy_init_hw(pdata->phydev);
  1435. ret = usbnet_resume(intf);
  1436. if (ret < 0)
  1437. netdev_warn(dev->net, "usbnet_resume error\n");
  1438. done:
  1439. pdata->pm_task = NULL;
  1440. return ret;
  1441. }
  1442. static int smsc95xx_reset_resume(struct usb_interface *intf)
  1443. {
  1444. struct usbnet *dev = usb_get_intfdata(intf);
  1445. struct smsc95xx_priv *pdata = dev->driver_priv;
  1446. int ret;
  1447. pdata->pm_task = current;
  1448. ret = smsc95xx_reset(dev);
  1449. pdata->pm_task = NULL;
  1450. if (ret < 0)
  1451. return ret;
  1452. return smsc95xx_resume(intf);
  1453. }
  1454. static void smsc95xx_rx_csum_offload(struct sk_buff *skb)
  1455. {
  1456. skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2);
  1457. skb->ip_summed = CHECKSUM_COMPLETE;
  1458. skb_trim(skb, skb->len - 2);
  1459. }
  1460. static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
  1461. {
  1462. /* This check is no longer done by usbnet */
  1463. if (skb->len < dev->net->hard_header_len)
  1464. return 0;
  1465. while (skb->len > 0) {
  1466. u32 header, align_count;
  1467. struct sk_buff *ax_skb;
  1468. unsigned char *packet;
  1469. u16 size;
  1470. header = get_unaligned_le32(skb->data);
  1471. skb_pull(skb, 4 + NET_IP_ALIGN);
  1472. packet = skb->data;
  1473. /* get the packet length */
  1474. size = (u16)((header & RX_STS_FL_) >> 16);
  1475. align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4;
  1476. if (unlikely(size > skb->len)) {
  1477. netif_dbg(dev, rx_err, dev->net,
  1478. "size err header=0x%08x\n", header);
  1479. return 0;
  1480. }
  1481. if (unlikely(header & RX_STS_ES_)) {
  1482. netif_dbg(dev, rx_err, dev->net,
  1483. "Error header=0x%08x\n", header);
  1484. dev->net->stats.rx_errors++;
  1485. dev->net->stats.rx_dropped++;
  1486. if (header & RX_STS_CRC_) {
  1487. dev->net->stats.rx_crc_errors++;
  1488. } else {
  1489. if (header & (RX_STS_TL_ | RX_STS_RF_))
  1490. dev->net->stats.rx_frame_errors++;
  1491. if ((header & RX_STS_LE_) &&
  1492. (!(header & RX_STS_FT_)))
  1493. dev->net->stats.rx_length_errors++;
  1494. }
  1495. } else {
  1496. /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */
  1497. if (unlikely(size > (ETH_FRAME_LEN + 12))) {
  1498. netif_dbg(dev, rx_err, dev->net,
  1499. "size err header=0x%08x\n", header);
  1500. return 0;
  1501. }
  1502. /* last frame in this batch */
  1503. if (skb->len == size) {
  1504. if (dev->net->features & NETIF_F_RXCSUM)
  1505. smsc95xx_rx_csum_offload(skb);
  1506. skb_trim(skb, skb->len - 4); /* remove fcs */
  1507. skb->truesize = size + sizeof(struct sk_buff);
  1508. return 1;
  1509. }
  1510. ax_skb = skb_clone(skb, GFP_ATOMIC);
  1511. if (unlikely(!ax_skb)) {
  1512. netdev_warn(dev->net, "Error allocating skb\n");
  1513. return 0;
  1514. }
  1515. ax_skb->len = size;
  1516. ax_skb->data = packet;
  1517. skb_set_tail_pointer(ax_skb, size);
  1518. if (dev->net->features & NETIF_F_RXCSUM)
  1519. smsc95xx_rx_csum_offload(ax_skb);
  1520. skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
  1521. ax_skb->truesize = size + sizeof(struct sk_buff);
  1522. usbnet_skb_return(dev, ax_skb);
  1523. }
  1524. skb_pull(skb, size);
  1525. /* padding bytes before the next frame starts */
  1526. if (skb->len)
  1527. skb_pull(skb, align_count);
  1528. }
  1529. return 1;
  1530. }
  1531. static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb)
  1532. {
  1533. u16 low_16 = (u16)skb_checksum_start_offset(skb);
  1534. u16 high_16 = low_16 + skb->csum_offset;
  1535. return (high_16 << 16) | low_16;
  1536. }
  1537. /* The TX CSUM won't work if the checksum lies in the last 4 bytes of the
  1538. * transmission. This is fairly unlikely, only seems to trigger with some
  1539. * short TCP ACK packets sent.
  1540. *
  1541. * Note, this calculation should probably check for the alignment of the
  1542. * data as well, but a straight check for csum being in the last four bytes
  1543. * of the packet should be ok for now.
  1544. */
  1545. static bool smsc95xx_can_tx_checksum(struct sk_buff *skb)
  1546. {
  1547. unsigned int len = skb->len - skb_checksum_start_offset(skb);
  1548. if (skb->len <= 45)
  1549. return false;
  1550. return skb->csum_offset < (len - (4 + 1));
  1551. }
  1552. static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev,
  1553. struct sk_buff *skb, gfp_t flags)
  1554. {
  1555. bool csum = skb->ip_summed == CHECKSUM_PARTIAL;
  1556. int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD;
  1557. u32 tx_cmd_a, tx_cmd_b;
  1558. void *ptr;
  1559. /* We do not advertise SG, so skbs should be already linearized */
  1560. BUG_ON(skb_shinfo(skb)->nr_frags);
  1561. /* Make writable and expand header space by overhead if required */
  1562. if (skb_cow_head(skb, overhead)) {
  1563. /* Must deallocate here as returning NULL to indicate error
  1564. * means the skb won't be deallocated in the caller.
  1565. */
  1566. dev_kfree_skb_any(skb);
  1567. return NULL;
  1568. }
  1569. tx_cmd_b = (u32)skb->len;
  1570. tx_cmd_a = tx_cmd_b | TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
  1571. if (csum) {
  1572. if (!smsc95xx_can_tx_checksum(skb)) {
  1573. /* workaround - hardware tx checksum does not work
  1574. * properly with extremely small packets */
  1575. long csstart = skb_checksum_start_offset(skb);
  1576. __wsum calc = csum_partial(skb->data + csstart,
  1577. skb->len - csstart, 0);
  1578. *((__sum16 *)(skb->data + csstart
  1579. + skb->csum_offset)) = csum_fold(calc);
  1580. csum = false;
  1581. } else {
  1582. u32 csum_preamble = smsc95xx_calc_csum_preamble(skb);
  1583. ptr = skb_push(skb, 4);
  1584. put_unaligned_le32(csum_preamble, ptr);
  1585. tx_cmd_a += 4;
  1586. tx_cmd_b += 4;
  1587. tx_cmd_b |= TX_CMD_B_CSUM_ENABLE;
  1588. }
  1589. }
  1590. ptr = skb_push(skb, 8);
  1591. put_unaligned_le32(tx_cmd_a, ptr);
  1592. put_unaligned_le32(tx_cmd_b, ptr+4);
  1593. return skb;
  1594. }
  1595. static int smsc95xx_manage_power(struct usbnet *dev, int on)
  1596. {
  1597. struct smsc95xx_priv *pdata = dev->driver_priv;
  1598. dev->intf->needs_remote_wakeup = on;
  1599. if (pdata->features & FEATURE_REMOTE_WAKEUP)
  1600. return 0;
  1601. /* this chip revision isn't capable of remote wakeup */
  1602. netdev_info(dev->net, "hardware isn't capable of remote wakeup\n");
  1603. if (on)
  1604. usb_autopm_get_interface_no_resume(dev->intf);
  1605. else
  1606. usb_autopm_put_interface(dev->intf);
  1607. return 0;
  1608. }
  1609. static const struct driver_info smsc95xx_info = {
  1610. .description = "smsc95xx USB 2.0 Ethernet",
  1611. .bind = smsc95xx_bind,
  1612. .unbind = smsc95xx_unbind,
  1613. .reset = smsc95xx_reset,
  1614. .check_connect = smsc95xx_start_phy,
  1615. .stop = smsc95xx_stop,
  1616. .rx_fixup = smsc95xx_rx_fixup,
  1617. .tx_fixup = smsc95xx_tx_fixup,
  1618. .status = smsc95xx_status,
  1619. .manage_power = smsc95xx_manage_power,
  1620. .flags = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR,
  1621. };
  1622. static const struct usb_device_id products[] = {
  1623. {
  1624. /* SMSC9500 USB Ethernet Device */
  1625. USB_DEVICE(0x0424, 0x9500),
  1626. .driver_info = (unsigned long) &smsc95xx_info,
  1627. },
  1628. {
  1629. /* SMSC9505 USB Ethernet Device */
  1630. USB_DEVICE(0x0424, 0x9505),
  1631. .driver_info = (unsigned long) &smsc95xx_info,
  1632. },
  1633. {
  1634. /* SMSC9500A USB Ethernet Device */
  1635. USB_DEVICE(0x0424, 0x9E00),
  1636. .driver_info = (unsigned long) &smsc95xx_info,
  1637. },
  1638. {
  1639. /* SMSC9505A USB Ethernet Device */
  1640. USB_DEVICE(0x0424, 0x9E01),
  1641. .driver_info = (unsigned long) &smsc95xx_info,
  1642. },
  1643. {
  1644. /* SMSC9512/9514 USB Hub & Ethernet Device */
  1645. USB_DEVICE(0x0424, 0xec00),
  1646. .driver_info = (unsigned long) &smsc95xx_info,
  1647. },
  1648. {
  1649. /* SMSC9500 USB Ethernet Device (SAL10) */
  1650. USB_DEVICE(0x0424, 0x9900),
  1651. .driver_info = (unsigned long) &smsc95xx_info,
  1652. },
  1653. {
  1654. /* SMSC9505 USB Ethernet Device (SAL10) */
  1655. USB_DEVICE(0x0424, 0x9901),
  1656. .driver_info = (unsigned long) &smsc95xx_info,
  1657. },
  1658. {
  1659. /* SMSC9500A USB Ethernet Device (SAL10) */
  1660. USB_DEVICE(0x0424, 0x9902),
  1661. .driver_info = (unsigned long) &smsc95xx_info,
  1662. },
  1663. {
  1664. /* SMSC9505A USB Ethernet Device (SAL10) */
  1665. USB_DEVICE(0x0424, 0x9903),
  1666. .driver_info = (unsigned long) &smsc95xx_info,
  1667. },
  1668. {
  1669. /* SMSC9512/9514 USB Hub & Ethernet Device (SAL10) */
  1670. USB_DEVICE(0x0424, 0x9904),
  1671. .driver_info = (unsigned long) &smsc95xx_info,
  1672. },
  1673. {
  1674. /* SMSC9500A USB Ethernet Device (HAL) */
  1675. USB_DEVICE(0x0424, 0x9905),
  1676. .driver_info = (unsigned long) &smsc95xx_info,
  1677. },
  1678. {
  1679. /* SMSC9505A USB Ethernet Device (HAL) */
  1680. USB_DEVICE(0x0424, 0x9906),
  1681. .driver_info = (unsigned long) &smsc95xx_info,
  1682. },
  1683. {
  1684. /* SMSC9500 USB Ethernet Device (Alternate ID) */
  1685. USB_DEVICE(0x0424, 0x9907),
  1686. .driver_info = (unsigned long) &smsc95xx_info,
  1687. },
  1688. {
  1689. /* SMSC9500A USB Ethernet Device (Alternate ID) */
  1690. USB_DEVICE(0x0424, 0x9908),
  1691. .driver_info = (unsigned long) &smsc95xx_info,
  1692. },
  1693. {
  1694. /* SMSC9512/9514 USB Hub & Ethernet Device (Alternate ID) */
  1695. USB_DEVICE(0x0424, 0x9909),
  1696. .driver_info = (unsigned long) &smsc95xx_info,
  1697. },
  1698. {
  1699. /* SMSC LAN9530 USB Ethernet Device */
  1700. USB_DEVICE(0x0424, 0x9530),
  1701. .driver_info = (unsigned long) &smsc95xx_info,
  1702. },
  1703. {
  1704. /* SMSC LAN9730 USB Ethernet Device */
  1705. USB_DEVICE(0x0424, 0x9730),
  1706. .driver_info = (unsigned long) &smsc95xx_info,
  1707. },
  1708. {
  1709. /* SMSC LAN89530 USB Ethernet Device */
  1710. USB_DEVICE(0x0424, 0x9E08),
  1711. .driver_info = (unsigned long) &smsc95xx_info,
  1712. },
  1713. {
  1714. /* Microchip's EVB-LAN8670-USB 10BASE-T1S Ethernet Device */
  1715. USB_DEVICE(0x184F, 0x0051),
  1716. .driver_info = (unsigned long)&smsc95xx_info,
  1717. },
  1718. { }, /* END */
  1719. };
  1720. MODULE_DEVICE_TABLE(usb, products);
  1721. static struct usb_driver smsc95xx_driver = {
  1722. .name = "smsc95xx",
  1723. .id_table = products,
  1724. .probe = usbnet_probe,
  1725. .suspend = smsc95xx_suspend,
  1726. .resume = smsc95xx_resume,
  1727. .reset_resume = smsc95xx_reset_resume,
  1728. .disconnect = usbnet_disconnect,
  1729. .disable_hub_initiated_lpm = 1,
  1730. .supports_autosuspend = 1,
  1731. };
  1732. module_usb_driver(smsc95xx_driver);
  1733. MODULE_AUTHOR("Nancy Lin");
  1734. MODULE_AUTHOR("Steve Glendinning <[email protected]>");
  1735. MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices");
  1736. MODULE_LICENSE("GPL");