bcm87xx.c 4.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2011 - 2012 Cavium, Inc.
  4. */
  5. #include <linux/module.h>
  6. #include <linux/phy.h>
  7. #include <linux/of.h>
  8. #define PHY_ID_BCM8706 0x0143bdc1
  9. #define PHY_ID_BCM8727 0x0143bff0
  10. #define BCM87XX_PMD_RX_SIGNAL_DETECT 0x000a
  11. #define BCM87XX_10GBASER_PCS_STATUS 0x0020
  12. #define BCM87XX_XGXS_LANE_STATUS 0x0018
  13. #define BCM87XX_LASI_CONTROL 0x9002
  14. #define BCM87XX_LASI_STATUS 0x9005
  15. #if IS_ENABLED(CONFIG_OF_MDIO)
  16. /* Set and/or override some configuration registers based on the
  17. * broadcom,c45-reg-init property stored in the of_node for the phydev.
  18. *
  19. * broadcom,c45-reg-init = <devid reg mask value>,...;
  20. *
  21. * There may be one or more sets of <devid reg mask value>:
  22. *
  23. * devid: which sub-device to use.
  24. * reg: the register.
  25. * mask: if non-zero, ANDed with existing register value.
  26. * value: ORed with the masked value and written to the regiser.
  27. *
  28. */
  29. static int bcm87xx_of_reg_init(struct phy_device *phydev)
  30. {
  31. const __be32 *paddr;
  32. const __be32 *paddr_end;
  33. int len, ret;
  34. if (!phydev->mdio.dev.of_node)
  35. return 0;
  36. paddr = of_get_property(phydev->mdio.dev.of_node,
  37. "broadcom,c45-reg-init", &len);
  38. if (!paddr)
  39. return 0;
  40. paddr_end = paddr + (len /= sizeof(*paddr));
  41. ret = 0;
  42. while (paddr + 3 < paddr_end) {
  43. u16 devid = be32_to_cpup(paddr++);
  44. u16 reg = be32_to_cpup(paddr++);
  45. u16 mask = be32_to_cpup(paddr++);
  46. u16 val_bits = be32_to_cpup(paddr++);
  47. int val = 0;
  48. if (mask) {
  49. val = phy_read_mmd(phydev, devid, reg);
  50. if (val < 0) {
  51. ret = val;
  52. goto err;
  53. }
  54. val &= mask;
  55. }
  56. val |= val_bits;
  57. ret = phy_write_mmd(phydev, devid, reg, val);
  58. if (ret < 0)
  59. goto err;
  60. }
  61. err:
  62. return ret;
  63. }
  64. #else
  65. static int bcm87xx_of_reg_init(struct phy_device *phydev)
  66. {
  67. return 0;
  68. }
  69. #endif /* CONFIG_OF_MDIO */
  70. static int bcm87xx_get_features(struct phy_device *phydev)
  71. {
  72. linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT,
  73. phydev->supported);
  74. return 0;
  75. }
  76. static int bcm87xx_config_init(struct phy_device *phydev)
  77. {
  78. return bcm87xx_of_reg_init(phydev);
  79. }
  80. static int bcm87xx_config_aneg(struct phy_device *phydev)
  81. {
  82. return -EINVAL;
  83. }
  84. static int bcm87xx_read_status(struct phy_device *phydev)
  85. {
  86. int rx_signal_detect;
  87. int pcs_status;
  88. int xgxs_lane_status;
  89. rx_signal_detect = phy_read_mmd(phydev, MDIO_MMD_PMAPMD,
  90. BCM87XX_PMD_RX_SIGNAL_DETECT);
  91. if (rx_signal_detect < 0)
  92. return rx_signal_detect;
  93. if ((rx_signal_detect & 1) == 0)
  94. goto no_link;
  95. pcs_status = phy_read_mmd(phydev, MDIO_MMD_PCS,
  96. BCM87XX_10GBASER_PCS_STATUS);
  97. if (pcs_status < 0)
  98. return pcs_status;
  99. if ((pcs_status & 1) == 0)
  100. goto no_link;
  101. xgxs_lane_status = phy_read_mmd(phydev, MDIO_MMD_PHYXS,
  102. BCM87XX_XGXS_LANE_STATUS);
  103. if (xgxs_lane_status < 0)
  104. return xgxs_lane_status;
  105. if ((xgxs_lane_status & 0x1000) == 0)
  106. goto no_link;
  107. phydev->speed = 10000;
  108. phydev->link = 1;
  109. phydev->duplex = 1;
  110. return 0;
  111. no_link:
  112. phydev->link = 0;
  113. return 0;
  114. }
  115. static int bcm87xx_config_intr(struct phy_device *phydev)
  116. {
  117. int reg, err;
  118. reg = phy_read_mmd(phydev, MDIO_MMD_PCS, BCM87XX_LASI_CONTROL);
  119. if (reg < 0)
  120. return reg;
  121. if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
  122. err = phy_read_mmd(phydev, MDIO_MMD_PCS, BCM87XX_LASI_STATUS);
  123. if (err)
  124. return err;
  125. reg |= 1;
  126. err = phy_write_mmd(phydev, MDIO_MMD_PCS,
  127. BCM87XX_LASI_CONTROL, reg);
  128. } else {
  129. reg &= ~1;
  130. err = phy_write_mmd(phydev, MDIO_MMD_PCS,
  131. BCM87XX_LASI_CONTROL, reg);
  132. if (err)
  133. return err;
  134. err = phy_read_mmd(phydev, MDIO_MMD_PCS, BCM87XX_LASI_STATUS);
  135. }
  136. return err;
  137. }
  138. static irqreturn_t bcm87xx_handle_interrupt(struct phy_device *phydev)
  139. {
  140. int irq_status;
  141. irq_status = phy_read(phydev, BCM87XX_LASI_STATUS);
  142. if (irq_status < 0) {
  143. phy_error(phydev);
  144. return IRQ_NONE;
  145. }
  146. if (irq_status == 0)
  147. return IRQ_NONE;
  148. phy_trigger_machine(phydev);
  149. return IRQ_HANDLED;
  150. }
  151. static int bcm8706_match_phy_device(struct phy_device *phydev)
  152. {
  153. return phydev->c45_ids.device_ids[4] == PHY_ID_BCM8706;
  154. }
  155. static int bcm8727_match_phy_device(struct phy_device *phydev)
  156. {
  157. return phydev->c45_ids.device_ids[4] == PHY_ID_BCM8727;
  158. }
  159. static struct phy_driver bcm87xx_driver[] = {
  160. {
  161. .phy_id = PHY_ID_BCM8706,
  162. .phy_id_mask = 0xffffffff,
  163. .name = "Broadcom BCM8706",
  164. .get_features = bcm87xx_get_features,
  165. .config_init = bcm87xx_config_init,
  166. .config_aneg = bcm87xx_config_aneg,
  167. .read_status = bcm87xx_read_status,
  168. .config_intr = bcm87xx_config_intr,
  169. .handle_interrupt = bcm87xx_handle_interrupt,
  170. .match_phy_device = bcm8706_match_phy_device,
  171. }, {
  172. .phy_id = PHY_ID_BCM8727,
  173. .phy_id_mask = 0xffffffff,
  174. .name = "Broadcom BCM8727",
  175. .get_features = bcm87xx_get_features,
  176. .config_init = bcm87xx_config_init,
  177. .config_aneg = bcm87xx_config_aneg,
  178. .read_status = bcm87xx_read_status,
  179. .config_intr = bcm87xx_config_intr,
  180. .handle_interrupt = bcm87xx_handle_interrupt,
  181. .match_phy_device = bcm8727_match_phy_device,
  182. } };
  183. module_phy_driver(bcm87xx_driver);
  184. MODULE_LICENSE("GPL v2");