yam.c 31 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*****************************************************************************/
  3. /*
  4. * yam.c -- YAM radio modem driver.
  5. *
  6. * Copyright (C) 1998 Frederic Rible F1OAT ([email protected])
  7. * Adapted from baycom.c driver written by Thomas Sailer ([email protected])
  8. *
  9. * Please note that the GPL allows you to use the driver, NOT the radio.
  10. * In order to use the radio, you need a license from the communications
  11. * authority of your country.
  12. *
  13. * History:
  14. * 0.0 F1OAT 06.06.98 Begin of work with baycom.c source code V 0.3
  15. * 0.1 F1OAT 07.06.98 Add timer polling routine for channel arbitration
  16. * 0.2 F6FBB 08.06.98 Added delay after FPGA programming
  17. * 0.3 F6FBB 29.07.98 Delayed PTT implementation for dupmode=2
  18. * 0.4 F6FBB 30.07.98 Added TxTail, Slottime and Persistence
  19. * 0.5 F6FBB 01.08.98 Shared IRQs, /proc/net and network statistics
  20. * 0.6 F6FBB 25.08.98 Added 1200Bds format
  21. * 0.7 F6FBB 12.09.98 Added to the kernel configuration
  22. * 0.8 F6FBB 14.10.98 Fixed slottime/persistence timing bug
  23. * OK1ZIA 2.09.01 Fixed "kfree_skb on hard IRQ"
  24. * using dev_kfree_skb_any(). (important in 2.4 kernel)
  25. */
  26. /*****************************************************************************/
  27. #include <linux/module.h>
  28. #include <linux/types.h>
  29. #include <linux/net.h>
  30. #include <linux/in.h>
  31. #include <linux/if.h>
  32. #include <linux/slab.h>
  33. #include <linux/errno.h>
  34. #include <linux/bitops.h>
  35. #include <linux/random.h>
  36. #include <asm/io.h>
  37. #include <linux/interrupt.h>
  38. #include <linux/ioport.h>
  39. #include <linux/firmware.h>
  40. #include <linux/platform_device.h>
  41. #include <linux/netdevice.h>
  42. #include <linux/if_arp.h>
  43. #include <linux/etherdevice.h>
  44. #include <linux/skbuff.h>
  45. #include <net/ax25.h>
  46. #include <linux/kernel.h>
  47. #include <linux/proc_fs.h>
  48. #include <linux/seq_file.h>
  49. #include <net/net_namespace.h>
  50. #include <linux/uaccess.h>
  51. #include <linux/init.h>
  52. #include <linux/yam.h>
  53. /* --------------------------------------------------------------------- */
  54. static const char yam_drvname[] = "yam";
  55. static const char yam_drvinfo[] __initconst = KERN_INFO \
  56. "YAM driver version 0.8 by F1OAT/F6FBB\n";
  57. /* --------------------------------------------------------------------- */
  58. #define FIRMWARE_9600 "yam/9600.bin"
  59. #define FIRMWARE_1200 "yam/1200.bin"
  60. #define YAM_9600 1
  61. #define YAM_1200 2
  62. #define NR_PORTS 4
  63. #define YAM_MAGIC 0xF10A7654
  64. /* Transmitter states */
  65. #define TX_OFF 0
  66. #define TX_HEAD 1
  67. #define TX_DATA 2
  68. #define TX_CRC1 3
  69. #define TX_CRC2 4
  70. #define TX_TAIL 5
  71. #define YAM_MAX_FRAME 1024
  72. #define DEFAULT_BITRATE 9600 /* bps */
  73. #define DEFAULT_HOLDD 10 /* sec */
  74. #define DEFAULT_TXD 300 /* ms */
  75. #define DEFAULT_TXTAIL 10 /* ms */
  76. #define DEFAULT_SLOT 100 /* ms */
  77. #define DEFAULT_PERS 64 /* 0->255 */
  78. struct yam_port {
  79. int magic;
  80. int bitrate;
  81. int baudrate;
  82. int iobase;
  83. int irq;
  84. int dupmode;
  85. struct net_device *dev;
  86. int nb_rxint;
  87. int nb_mdint;
  88. /* Parameters section */
  89. int txd; /* tx delay */
  90. int holdd; /* duplex ptt delay */
  91. int txtail; /* txtail delay */
  92. int slot; /* slottime */
  93. int pers; /* persistence */
  94. /* Tx section */
  95. int tx_state;
  96. int tx_count;
  97. int slotcnt;
  98. unsigned char tx_buf[YAM_MAX_FRAME];
  99. int tx_len;
  100. int tx_crcl, tx_crch;
  101. struct sk_buff_head send_queue; /* Packets awaiting transmission */
  102. /* Rx section */
  103. int dcd;
  104. unsigned char rx_buf[YAM_MAX_FRAME];
  105. int rx_len;
  106. int rx_crcl, rx_crch;
  107. };
  108. struct yam_mcs {
  109. unsigned char bits[YAM_FPGA_SIZE];
  110. int bitrate;
  111. struct yam_mcs *next;
  112. };
  113. static struct net_device *yam_devs[NR_PORTS];
  114. static struct yam_mcs *yam_data;
  115. static DEFINE_TIMER(yam_timer, NULL);
  116. /* --------------------------------------------------------------------- */
  117. #define RBR(iobase) (iobase+0)
  118. #define THR(iobase) (iobase+0)
  119. #define IER(iobase) (iobase+1)
  120. #define IIR(iobase) (iobase+2)
  121. #define FCR(iobase) (iobase+2)
  122. #define LCR(iobase) (iobase+3)
  123. #define MCR(iobase) (iobase+4)
  124. #define LSR(iobase) (iobase+5)
  125. #define MSR(iobase) (iobase+6)
  126. #define SCR(iobase) (iobase+7)
  127. #define DLL(iobase) (iobase+0)
  128. #define DLM(iobase) (iobase+1)
  129. #define YAM_EXTENT 8
  130. /* Interrupt Identification Register Bit Masks */
  131. #define IIR_NOPEND 1
  132. #define IIR_MSR 0
  133. #define IIR_TX 2
  134. #define IIR_RX 4
  135. #define IIR_LSR 6
  136. #define IIR_TIMEOUT 12 /* Fifo mode only */
  137. #define IIR_MASK 0x0F
  138. /* Interrupt Enable Register Bit Masks */
  139. #define IER_RX 1 /* enable rx interrupt */
  140. #define IER_TX 2 /* enable tx interrupt */
  141. #define IER_LSR 4 /* enable line status interrupts */
  142. #define IER_MSR 8 /* enable modem status interrupts */
  143. /* Modem Control Register Bit Masks */
  144. #define MCR_DTR 0x01 /* DTR output */
  145. #define MCR_RTS 0x02 /* RTS output */
  146. #define MCR_OUT1 0x04 /* OUT1 output (not accessible in RS232) */
  147. #define MCR_OUT2 0x08 /* Master Interrupt enable (must be set on PCs) */
  148. #define MCR_LOOP 0x10 /* Loopback enable */
  149. /* Modem Status Register Bit Masks */
  150. #define MSR_DCTS 0x01 /* Delta CTS input */
  151. #define MSR_DDSR 0x02 /* Delta DSR */
  152. #define MSR_DRIN 0x04 /* Delta RI */
  153. #define MSR_DDCD 0x08 /* Delta DCD */
  154. #define MSR_CTS 0x10 /* CTS input */
  155. #define MSR_DSR 0x20 /* DSR input */
  156. #define MSR_RING 0x40 /* RI input */
  157. #define MSR_DCD 0x80 /* DCD input */
  158. /* line status register bit mask */
  159. #define LSR_RXC 0x01
  160. #define LSR_OE 0x02
  161. #define LSR_PE 0x04
  162. #define LSR_FE 0x08
  163. #define LSR_BREAK 0x10
  164. #define LSR_THRE 0x20
  165. #define LSR_TSRE 0x40
  166. /* Line Control Register Bit Masks */
  167. #define LCR_DLAB 0x80
  168. #define LCR_BREAK 0x40
  169. #define LCR_PZERO 0x28
  170. #define LCR_PEVEN 0x18
  171. #define LCR_PODD 0x08
  172. #define LCR_STOP1 0x00
  173. #define LCR_STOP2 0x04
  174. #define LCR_BIT5 0x00
  175. #define LCR_BIT6 0x02
  176. #define LCR_BIT7 0x01
  177. #define LCR_BIT8 0x03
  178. /* YAM Modem <-> UART Port mapping */
  179. #define TX_RDY MSR_DCTS /* transmitter ready to send */
  180. #define RX_DCD MSR_DCD /* carrier detect */
  181. #define RX_FLAG MSR_RING /* hdlc flag received */
  182. #define FPGA_DONE MSR_DSR /* FPGA is configured */
  183. #define PTT_ON (MCR_RTS|MCR_OUT2) /* activate PTT */
  184. #define PTT_OFF (MCR_DTR|MCR_OUT2) /* release PTT */
  185. #define ENABLE_RXINT IER_RX /* enable uart rx interrupt during rx */
  186. #define ENABLE_TXINT IER_MSR /* enable uart ms interrupt during tx */
  187. #define ENABLE_RTXINT (IER_RX|IER_MSR) /* full duplex operations */
  188. /*************************************************************************
  189. * CRC Tables
  190. ************************************************************************/
  191. static const unsigned char chktabl[256] =
  192. {0x00, 0x89, 0x12, 0x9b, 0x24, 0xad, 0x36, 0xbf, 0x48, 0xc1, 0x5a, 0xd3, 0x6c, 0xe5, 0x7e,
  193. 0xf7, 0x81, 0x08, 0x93, 0x1a, 0xa5, 0x2c, 0xb7, 0x3e, 0xc9, 0x40, 0xdb, 0x52, 0xed, 0x64,
  194. 0xff, 0x76, 0x02, 0x8b, 0x10, 0x99, 0x26, 0xaf, 0x34, 0xbd, 0x4a, 0xc3, 0x58, 0xd1, 0x6e,
  195. 0xe7, 0x7c, 0xf5, 0x83, 0x0a, 0x91, 0x18, 0xa7, 0x2e, 0xb5, 0x3c, 0xcb, 0x42, 0xd9, 0x50,
  196. 0xef, 0x66, 0xfd, 0x74, 0x04, 0x8d, 0x16, 0x9f, 0x20, 0xa9, 0x32, 0xbb, 0x4c, 0xc5, 0x5e,
  197. 0xd7, 0x68, 0xe1, 0x7a, 0xf3, 0x85, 0x0c, 0x97, 0x1e, 0xa1, 0x28, 0xb3, 0x3a, 0xcd, 0x44,
  198. 0xdf, 0x56, 0xe9, 0x60, 0xfb, 0x72, 0x06, 0x8f, 0x14, 0x9d, 0x22, 0xab, 0x30, 0xb9, 0x4e,
  199. 0xc7, 0x5c, 0xd5, 0x6a, 0xe3, 0x78, 0xf1, 0x87, 0x0e, 0x95, 0x1c, 0xa3, 0x2a, 0xb1, 0x38,
  200. 0xcf, 0x46, 0xdd, 0x54, 0xeb, 0x62, 0xf9, 0x70, 0x08, 0x81, 0x1a, 0x93, 0x2c, 0xa5, 0x3e,
  201. 0xb7, 0x40, 0xc9, 0x52, 0xdb, 0x64, 0xed, 0x76, 0xff, 0x89, 0x00, 0x9b, 0x12, 0xad, 0x24,
  202. 0xbf, 0x36, 0xc1, 0x48, 0xd3, 0x5a, 0xe5, 0x6c, 0xf7, 0x7e, 0x0a, 0x83, 0x18, 0x91, 0x2e,
  203. 0xa7, 0x3c, 0xb5, 0x42, 0xcb, 0x50, 0xd9, 0x66, 0xef, 0x74, 0xfd, 0x8b, 0x02, 0x99, 0x10,
  204. 0xaf, 0x26, 0xbd, 0x34, 0xc3, 0x4a, 0xd1, 0x58, 0xe7, 0x6e, 0xf5, 0x7c, 0x0c, 0x85, 0x1e,
  205. 0x97, 0x28, 0xa1, 0x3a, 0xb3, 0x44, 0xcd, 0x56, 0xdf, 0x60, 0xe9, 0x72, 0xfb, 0x8d, 0x04,
  206. 0x9f, 0x16, 0xa9, 0x20, 0xbb, 0x32, 0xc5, 0x4c, 0xd7, 0x5e, 0xe1, 0x68, 0xf3, 0x7a, 0x0e,
  207. 0x87, 0x1c, 0x95, 0x2a, 0xa3, 0x38, 0xb1, 0x46, 0xcf, 0x54, 0xdd, 0x62, 0xeb, 0x70, 0xf9,
  208. 0x8f, 0x06, 0x9d, 0x14, 0xab, 0x22, 0xb9, 0x30, 0xc7, 0x4e, 0xd5, 0x5c, 0xe3, 0x6a, 0xf1,
  209. 0x78};
  210. static const unsigned char chktabh[256] =
  211. {0x00, 0x11, 0x23, 0x32, 0x46, 0x57, 0x65, 0x74, 0x8c, 0x9d, 0xaf, 0xbe, 0xca, 0xdb, 0xe9,
  212. 0xf8, 0x10, 0x01, 0x33, 0x22, 0x56, 0x47, 0x75, 0x64, 0x9c, 0x8d, 0xbf, 0xae, 0xda, 0xcb,
  213. 0xf9, 0xe8, 0x21, 0x30, 0x02, 0x13, 0x67, 0x76, 0x44, 0x55, 0xad, 0xbc, 0x8e, 0x9f, 0xeb,
  214. 0xfa, 0xc8, 0xd9, 0x31, 0x20, 0x12, 0x03, 0x77, 0x66, 0x54, 0x45, 0xbd, 0xac, 0x9e, 0x8f,
  215. 0xfb, 0xea, 0xd8, 0xc9, 0x42, 0x53, 0x61, 0x70, 0x04, 0x15, 0x27, 0x36, 0xce, 0xdf, 0xed,
  216. 0xfc, 0x88, 0x99, 0xab, 0xba, 0x52, 0x43, 0x71, 0x60, 0x14, 0x05, 0x37, 0x26, 0xde, 0xcf,
  217. 0xfd, 0xec, 0x98, 0x89, 0xbb, 0xaa, 0x63, 0x72, 0x40, 0x51, 0x25, 0x34, 0x06, 0x17, 0xef,
  218. 0xfe, 0xcc, 0xdd, 0xa9, 0xb8, 0x8a, 0x9b, 0x73, 0x62, 0x50, 0x41, 0x35, 0x24, 0x16, 0x07,
  219. 0xff, 0xee, 0xdc, 0xcd, 0xb9, 0xa8, 0x9a, 0x8b, 0x84, 0x95, 0xa7, 0xb6, 0xc2, 0xd3, 0xe1,
  220. 0xf0, 0x08, 0x19, 0x2b, 0x3a, 0x4e, 0x5f, 0x6d, 0x7c, 0x94, 0x85, 0xb7, 0xa6, 0xd2, 0xc3,
  221. 0xf1, 0xe0, 0x18, 0x09, 0x3b, 0x2a, 0x5e, 0x4f, 0x7d, 0x6c, 0xa5, 0xb4, 0x86, 0x97, 0xe3,
  222. 0xf2, 0xc0, 0xd1, 0x29, 0x38, 0x0a, 0x1b, 0x6f, 0x7e, 0x4c, 0x5d, 0xb5, 0xa4, 0x96, 0x87,
  223. 0xf3, 0xe2, 0xd0, 0xc1, 0x39, 0x28, 0x1a, 0x0b, 0x7f, 0x6e, 0x5c, 0x4d, 0xc6, 0xd7, 0xe5,
  224. 0xf4, 0x80, 0x91, 0xa3, 0xb2, 0x4a, 0x5b, 0x69, 0x78, 0x0c, 0x1d, 0x2f, 0x3e, 0xd6, 0xc7,
  225. 0xf5, 0xe4, 0x90, 0x81, 0xb3, 0xa2, 0x5a, 0x4b, 0x79, 0x68, 0x1c, 0x0d, 0x3f, 0x2e, 0xe7,
  226. 0xf6, 0xc4, 0xd5, 0xa1, 0xb0, 0x82, 0x93, 0x6b, 0x7a, 0x48, 0x59, 0x2d, 0x3c, 0x0e, 0x1f,
  227. 0xf7, 0xe6, 0xd4, 0xc5, 0xb1, 0xa0, 0x92, 0x83, 0x7b, 0x6a, 0x58, 0x49, 0x3d, 0x2c, 0x1e,
  228. 0x0f};
  229. /*************************************************************************
  230. * FPGA functions
  231. ************************************************************************/
  232. static void delay(int ms)
  233. {
  234. unsigned long timeout = jiffies + ((ms * HZ) / 1000);
  235. while (time_before(jiffies, timeout))
  236. cpu_relax();
  237. }
  238. /*
  239. * reset FPGA
  240. */
  241. static void fpga_reset(int iobase)
  242. {
  243. outb(0, IER(iobase));
  244. outb(LCR_DLAB | LCR_BIT5, LCR(iobase));
  245. outb(1, DLL(iobase));
  246. outb(0, DLM(iobase));
  247. outb(LCR_BIT5, LCR(iobase));
  248. inb(LSR(iobase));
  249. inb(MSR(iobase));
  250. /* turn off FPGA supply voltage */
  251. outb(MCR_OUT1 | MCR_OUT2, MCR(iobase));
  252. delay(100);
  253. /* turn on FPGA supply voltage again */
  254. outb(MCR_DTR | MCR_RTS | MCR_OUT1 | MCR_OUT2, MCR(iobase));
  255. delay(100);
  256. }
  257. /*
  258. * send one byte to FPGA
  259. */
  260. static int fpga_write(int iobase, unsigned char wrd)
  261. {
  262. unsigned char bit;
  263. int k;
  264. unsigned long timeout = jiffies + HZ / 10;
  265. for (k = 0; k < 8; k++) {
  266. bit = (wrd & 0x80) ? (MCR_RTS | MCR_DTR) : MCR_DTR;
  267. outb(bit | MCR_OUT1 | MCR_OUT2, MCR(iobase));
  268. wrd <<= 1;
  269. outb(0xfc, THR(iobase));
  270. while ((inb(LSR(iobase)) & LSR_TSRE) == 0)
  271. if (time_after(jiffies, timeout))
  272. return -1;
  273. }
  274. return 0;
  275. }
  276. /*
  277. * predef should be 0 for loading user defined mcs
  278. * predef should be YAM_1200 for loading predef 1200 mcs
  279. * predef should be YAM_9600 for loading predef 9600 mcs
  280. */
  281. static unsigned char *add_mcs(unsigned char *bits, int bitrate,
  282. unsigned int predef)
  283. {
  284. const char *fw_name[2] = {FIRMWARE_9600, FIRMWARE_1200};
  285. const struct firmware *fw;
  286. struct platform_device *pdev;
  287. struct yam_mcs *p;
  288. int err;
  289. switch (predef) {
  290. case 0:
  291. fw = NULL;
  292. break;
  293. case YAM_1200:
  294. case YAM_9600:
  295. predef--;
  296. pdev = platform_device_register_simple("yam", 0, NULL, 0);
  297. if (IS_ERR(pdev)) {
  298. printk(KERN_ERR "yam: Failed to register firmware\n");
  299. return NULL;
  300. }
  301. err = request_firmware(&fw, fw_name[predef], &pdev->dev);
  302. platform_device_unregister(pdev);
  303. if (err) {
  304. printk(KERN_ERR "Failed to load firmware \"%s\"\n",
  305. fw_name[predef]);
  306. return NULL;
  307. }
  308. if (fw->size != YAM_FPGA_SIZE) {
  309. printk(KERN_ERR "Bogus length %zu in firmware \"%s\"\n",
  310. fw->size, fw_name[predef]);
  311. release_firmware(fw);
  312. return NULL;
  313. }
  314. bits = (unsigned char *)fw->data;
  315. break;
  316. default:
  317. printk(KERN_ERR "yam: Invalid predef number %u\n", predef);
  318. return NULL;
  319. }
  320. /* If it already exists, replace the bit data */
  321. p = yam_data;
  322. while (p) {
  323. if (p->bitrate == bitrate) {
  324. memcpy(p->bits, bits, YAM_FPGA_SIZE);
  325. goto out;
  326. }
  327. p = p->next;
  328. }
  329. /* Allocate a new mcs */
  330. if ((p = kmalloc(sizeof(struct yam_mcs), GFP_KERNEL)) == NULL) {
  331. release_firmware(fw);
  332. return NULL;
  333. }
  334. memcpy(p->bits, bits, YAM_FPGA_SIZE);
  335. p->bitrate = bitrate;
  336. p->next = yam_data;
  337. yam_data = p;
  338. out:
  339. release_firmware(fw);
  340. return p->bits;
  341. }
  342. static unsigned char *get_mcs(int bitrate)
  343. {
  344. struct yam_mcs *p;
  345. p = yam_data;
  346. while (p) {
  347. if (p->bitrate == bitrate)
  348. return p->bits;
  349. p = p->next;
  350. }
  351. /* Load predefined mcs data */
  352. switch (bitrate) {
  353. case 1200:
  354. /* setting predef as YAM_1200 for loading predef 1200 mcs */
  355. return add_mcs(NULL, bitrate, YAM_1200);
  356. default:
  357. /* setting predef as YAM_9600 for loading predef 9600 mcs */
  358. return add_mcs(NULL, bitrate, YAM_9600);
  359. }
  360. }
  361. /*
  362. * download bitstream to FPGA
  363. * data is contained in bits[] array in yam1200.h resp. yam9600.h
  364. */
  365. static int fpga_download(int iobase, int bitrate)
  366. {
  367. int i, rc;
  368. unsigned char *pbits;
  369. pbits = get_mcs(bitrate);
  370. if (pbits == NULL)
  371. return -1;
  372. fpga_reset(iobase);
  373. for (i = 0; i < YAM_FPGA_SIZE; i++) {
  374. if (fpga_write(iobase, pbits[i])) {
  375. printk(KERN_ERR "yam: error in write cycle\n");
  376. return -1; /* write... */
  377. }
  378. }
  379. fpga_write(iobase, 0xFF);
  380. rc = inb(MSR(iobase)); /* check DONE signal */
  381. /* Needed for some hardwares */
  382. delay(50);
  383. return (rc & MSR_DSR) ? 0 : -1;
  384. }
  385. /************************************************************************
  386. * Serial port init
  387. ************************************************************************/
  388. static void yam_set_uart(struct net_device *dev)
  389. {
  390. struct yam_port *yp = netdev_priv(dev);
  391. int divisor = 115200 / yp->baudrate;
  392. outb(0, IER(dev->base_addr));
  393. outb(LCR_DLAB | LCR_BIT8, LCR(dev->base_addr));
  394. outb(divisor, DLL(dev->base_addr));
  395. outb(0, DLM(dev->base_addr));
  396. outb(LCR_BIT8, LCR(dev->base_addr));
  397. outb(PTT_OFF, MCR(dev->base_addr));
  398. outb(0x00, FCR(dev->base_addr));
  399. /* Flush pending irq */
  400. inb(RBR(dev->base_addr));
  401. inb(MSR(dev->base_addr));
  402. /* Enable rx irq */
  403. outb(ENABLE_RTXINT, IER(dev->base_addr));
  404. }
  405. /* --------------------------------------------------------------------- */
  406. enum uart {
  407. c_uart_unknown, c_uart_8250,
  408. c_uart_16450, c_uart_16550, c_uart_16550A
  409. };
  410. static const char *uart_str[] =
  411. {"unknown", "8250", "16450", "16550", "16550A"};
  412. static enum uart yam_check_uart(unsigned int iobase)
  413. {
  414. unsigned char b1, b2, b3;
  415. enum uart u;
  416. enum uart uart_tab[] =
  417. {c_uart_16450, c_uart_unknown, c_uart_16550, c_uart_16550A};
  418. b1 = inb(MCR(iobase));
  419. outb(b1 | 0x10, MCR(iobase)); /* loopback mode */
  420. b2 = inb(MSR(iobase));
  421. outb(0x1a, MCR(iobase));
  422. b3 = inb(MSR(iobase)) & 0xf0;
  423. outb(b1, MCR(iobase)); /* restore old values */
  424. outb(b2, MSR(iobase));
  425. if (b3 != 0x90)
  426. return c_uart_unknown;
  427. inb(RBR(iobase));
  428. inb(RBR(iobase));
  429. outb(0x01, FCR(iobase)); /* enable FIFOs */
  430. u = uart_tab[(inb(IIR(iobase)) >> 6) & 3];
  431. if (u == c_uart_16450) {
  432. outb(0x5a, SCR(iobase));
  433. b1 = inb(SCR(iobase));
  434. outb(0xa5, SCR(iobase));
  435. b2 = inb(SCR(iobase));
  436. if ((b1 != 0x5a) || (b2 != 0xa5))
  437. u = c_uart_8250;
  438. }
  439. return u;
  440. }
  441. /******************************************************************************
  442. * Rx Section
  443. ******************************************************************************/
  444. static inline void yam_rx_flag(struct net_device *dev, struct yam_port *yp)
  445. {
  446. if (yp->dcd && yp->rx_len >= 3 && yp->rx_len < YAM_MAX_FRAME) {
  447. int pkt_len = yp->rx_len - 2 + 1; /* -CRC + kiss */
  448. struct sk_buff *skb;
  449. if ((yp->rx_crch & yp->rx_crcl) != 0xFF) {
  450. /* Bad crc */
  451. } else {
  452. if (!(skb = dev_alloc_skb(pkt_len))) {
  453. printk(KERN_WARNING "%s: memory squeeze, dropping packet\n", dev->name);
  454. ++dev->stats.rx_dropped;
  455. } else {
  456. unsigned char *cp;
  457. cp = skb_put(skb, pkt_len);
  458. *cp++ = 0; /* KISS kludge */
  459. memcpy(cp, yp->rx_buf, pkt_len - 1);
  460. skb->protocol = ax25_type_trans(skb, dev);
  461. netif_rx(skb);
  462. ++dev->stats.rx_packets;
  463. }
  464. }
  465. }
  466. yp->rx_len = 0;
  467. yp->rx_crcl = 0x21;
  468. yp->rx_crch = 0xf3;
  469. }
  470. static inline void yam_rx_byte(struct net_device *dev, struct yam_port *yp, unsigned char rxb)
  471. {
  472. if (yp->rx_len < YAM_MAX_FRAME) {
  473. unsigned char c = yp->rx_crcl;
  474. yp->rx_crcl = (chktabl[c] ^ yp->rx_crch);
  475. yp->rx_crch = (chktabh[c] ^ rxb);
  476. yp->rx_buf[yp->rx_len++] = rxb;
  477. }
  478. }
  479. /********************************************************************************
  480. * TX Section
  481. ********************************************************************************/
  482. static void ptt_on(struct net_device *dev)
  483. {
  484. outb(PTT_ON, MCR(dev->base_addr));
  485. }
  486. static void ptt_off(struct net_device *dev)
  487. {
  488. outb(PTT_OFF, MCR(dev->base_addr));
  489. }
  490. static netdev_tx_t yam_send_packet(struct sk_buff *skb,
  491. struct net_device *dev)
  492. {
  493. struct yam_port *yp = netdev_priv(dev);
  494. if (skb->protocol == htons(ETH_P_IP))
  495. return ax25_ip_xmit(skb);
  496. skb_queue_tail(&yp->send_queue, skb);
  497. netif_trans_update(dev);
  498. return NETDEV_TX_OK;
  499. }
  500. static void yam_start_tx(struct net_device *dev, struct yam_port *yp)
  501. {
  502. if ((yp->tx_state == TX_TAIL) || (yp->txd == 0))
  503. yp->tx_count = 1;
  504. else
  505. yp->tx_count = (yp->bitrate * yp->txd) / 8000;
  506. yp->tx_state = TX_HEAD;
  507. ptt_on(dev);
  508. }
  509. static void yam_arbitrate(struct net_device *dev)
  510. {
  511. struct yam_port *yp = netdev_priv(dev);
  512. if (yp->magic != YAM_MAGIC || yp->tx_state != TX_OFF ||
  513. skb_queue_empty(&yp->send_queue))
  514. return;
  515. /* tx_state is TX_OFF and there is data to send */
  516. if (yp->dupmode) {
  517. /* Full duplex mode, don't wait */
  518. yam_start_tx(dev, yp);
  519. return;
  520. }
  521. if (yp->dcd) {
  522. /* DCD on, wait slotime ... */
  523. yp->slotcnt = yp->slot / 10;
  524. return;
  525. }
  526. /* Is slottime passed ? */
  527. if ((--yp->slotcnt) > 0)
  528. return;
  529. yp->slotcnt = yp->slot / 10;
  530. /* is random > persist ? */
  531. if (get_random_u8() > yp->pers)
  532. return;
  533. yam_start_tx(dev, yp);
  534. }
  535. static void yam_dotimer(struct timer_list *unused)
  536. {
  537. int i;
  538. for (i = 0; i < NR_PORTS; i++) {
  539. struct net_device *dev = yam_devs[i];
  540. if (dev && netif_running(dev))
  541. yam_arbitrate(dev);
  542. }
  543. yam_timer.expires = jiffies + HZ / 100;
  544. add_timer(&yam_timer);
  545. }
  546. static void yam_tx_byte(struct net_device *dev, struct yam_port *yp)
  547. {
  548. struct sk_buff *skb;
  549. unsigned char b, temp;
  550. switch (yp->tx_state) {
  551. case TX_OFF:
  552. break;
  553. case TX_HEAD:
  554. if (--yp->tx_count <= 0) {
  555. if (!(skb = skb_dequeue(&yp->send_queue))) {
  556. ptt_off(dev);
  557. yp->tx_state = TX_OFF;
  558. break;
  559. }
  560. yp->tx_state = TX_DATA;
  561. if (skb->data[0] != 0) {
  562. /* do_kiss_params(s, skb->data, skb->len); */
  563. dev_kfree_skb_any(skb);
  564. break;
  565. }
  566. yp->tx_len = skb->len - 1; /* strip KISS byte */
  567. if (yp->tx_len >= YAM_MAX_FRAME || yp->tx_len < 2) {
  568. dev_kfree_skb_any(skb);
  569. break;
  570. }
  571. skb_copy_from_linear_data_offset(skb, 1,
  572. yp->tx_buf,
  573. yp->tx_len);
  574. dev_kfree_skb_any(skb);
  575. yp->tx_count = 0;
  576. yp->tx_crcl = 0x21;
  577. yp->tx_crch = 0xf3;
  578. yp->tx_state = TX_DATA;
  579. }
  580. break;
  581. case TX_DATA:
  582. b = yp->tx_buf[yp->tx_count++];
  583. outb(b, THR(dev->base_addr));
  584. temp = yp->tx_crcl;
  585. yp->tx_crcl = chktabl[temp] ^ yp->tx_crch;
  586. yp->tx_crch = chktabh[temp] ^ b;
  587. if (yp->tx_count >= yp->tx_len) {
  588. yp->tx_state = TX_CRC1;
  589. }
  590. break;
  591. case TX_CRC1:
  592. yp->tx_crch = chktabl[yp->tx_crcl] ^ yp->tx_crch;
  593. yp->tx_crcl = chktabh[yp->tx_crcl] ^ chktabl[yp->tx_crch] ^ 0xff;
  594. outb(yp->tx_crcl, THR(dev->base_addr));
  595. yp->tx_state = TX_CRC2;
  596. break;
  597. case TX_CRC2:
  598. outb(chktabh[yp->tx_crch] ^ 0xFF, THR(dev->base_addr));
  599. if (skb_queue_empty(&yp->send_queue)) {
  600. yp->tx_count = (yp->bitrate * yp->txtail) / 8000;
  601. if (yp->dupmode == 2)
  602. yp->tx_count += (yp->bitrate * yp->holdd) / 8;
  603. if (yp->tx_count == 0)
  604. yp->tx_count = 1;
  605. yp->tx_state = TX_TAIL;
  606. } else {
  607. yp->tx_count = 1;
  608. yp->tx_state = TX_HEAD;
  609. }
  610. ++dev->stats.tx_packets;
  611. break;
  612. case TX_TAIL:
  613. if (--yp->tx_count <= 0) {
  614. yp->tx_state = TX_OFF;
  615. ptt_off(dev);
  616. }
  617. break;
  618. }
  619. }
  620. /***********************************************************************************
  621. * ISR routine
  622. ************************************************************************************/
  623. static irqreturn_t yam_interrupt(int irq, void *dev_id)
  624. {
  625. struct net_device *dev;
  626. struct yam_port *yp;
  627. unsigned char iir;
  628. int counter = 100;
  629. int i;
  630. int handled = 0;
  631. for (i = 0; i < NR_PORTS; i++) {
  632. dev = yam_devs[i];
  633. yp = netdev_priv(dev);
  634. if (!netif_running(dev))
  635. continue;
  636. while ((iir = IIR_MASK & inb(IIR(dev->base_addr))) != IIR_NOPEND) {
  637. unsigned char msr = inb(MSR(dev->base_addr));
  638. unsigned char lsr = inb(LSR(dev->base_addr));
  639. unsigned char rxb;
  640. handled = 1;
  641. if (lsr & LSR_OE)
  642. ++dev->stats.rx_fifo_errors;
  643. yp->dcd = (msr & RX_DCD) ? 1 : 0;
  644. if (--counter <= 0) {
  645. printk(KERN_ERR "%s: too many irq iir=%d\n",
  646. dev->name, iir);
  647. goto out;
  648. }
  649. if (msr & TX_RDY) {
  650. ++yp->nb_mdint;
  651. yam_tx_byte(dev, yp);
  652. }
  653. if (lsr & LSR_RXC) {
  654. ++yp->nb_rxint;
  655. rxb = inb(RBR(dev->base_addr));
  656. if (msr & RX_FLAG)
  657. yam_rx_flag(dev, yp);
  658. else
  659. yam_rx_byte(dev, yp, rxb);
  660. }
  661. }
  662. }
  663. out:
  664. return IRQ_RETVAL(handled);
  665. }
  666. #ifdef CONFIG_PROC_FS
  667. static void *yam_seq_start(struct seq_file *seq, loff_t *pos)
  668. {
  669. return (*pos < NR_PORTS) ? yam_devs[*pos] : NULL;
  670. }
  671. static void *yam_seq_next(struct seq_file *seq, void *v, loff_t *pos)
  672. {
  673. ++*pos;
  674. return (*pos < NR_PORTS) ? yam_devs[*pos] : NULL;
  675. }
  676. static void yam_seq_stop(struct seq_file *seq, void *v)
  677. {
  678. }
  679. static int yam_seq_show(struct seq_file *seq, void *v)
  680. {
  681. struct net_device *dev = v;
  682. const struct yam_port *yp = netdev_priv(dev);
  683. seq_printf(seq, "Device %s\n", dev->name);
  684. seq_printf(seq, " Up %d\n", netif_running(dev));
  685. seq_printf(seq, " Speed %u\n", yp->bitrate);
  686. seq_printf(seq, " IoBase 0x%x\n", yp->iobase);
  687. seq_printf(seq, " BaudRate %u\n", yp->baudrate);
  688. seq_printf(seq, " IRQ %u\n", yp->irq);
  689. seq_printf(seq, " TxState %u\n", yp->tx_state);
  690. seq_printf(seq, " Duplex %u\n", yp->dupmode);
  691. seq_printf(seq, " HoldDly %u\n", yp->holdd);
  692. seq_printf(seq, " TxDelay %u\n", yp->txd);
  693. seq_printf(seq, " TxTail %u\n", yp->txtail);
  694. seq_printf(seq, " SlotTime %u\n", yp->slot);
  695. seq_printf(seq, " Persist %u\n", yp->pers);
  696. seq_printf(seq, " TxFrames %lu\n", dev->stats.tx_packets);
  697. seq_printf(seq, " RxFrames %lu\n", dev->stats.rx_packets);
  698. seq_printf(seq, " TxInt %u\n", yp->nb_mdint);
  699. seq_printf(seq, " RxInt %u\n", yp->nb_rxint);
  700. seq_printf(seq, " RxOver %lu\n", dev->stats.rx_fifo_errors);
  701. seq_printf(seq, "\n");
  702. return 0;
  703. }
  704. static const struct seq_operations yam_seqops = {
  705. .start = yam_seq_start,
  706. .next = yam_seq_next,
  707. .stop = yam_seq_stop,
  708. .show = yam_seq_show,
  709. };
  710. #endif
  711. /* --------------------------------------------------------------------- */
  712. static int yam_open(struct net_device *dev)
  713. {
  714. struct yam_port *yp = netdev_priv(dev);
  715. enum uart u;
  716. int i;
  717. int ret=0;
  718. printk(KERN_INFO "Trying %s at iobase 0x%lx irq %u\n", dev->name, dev->base_addr, dev->irq);
  719. if (!yp->bitrate)
  720. return -ENXIO;
  721. if (!dev->base_addr || dev->base_addr > 0x1000 - YAM_EXTENT ||
  722. dev->irq < 2 || dev->irq > 15) {
  723. return -ENXIO;
  724. }
  725. if (!request_region(dev->base_addr, YAM_EXTENT, dev->name))
  726. {
  727. printk(KERN_ERR "%s: cannot 0x%lx busy\n", dev->name, dev->base_addr);
  728. return -EACCES;
  729. }
  730. if ((u = yam_check_uart(dev->base_addr)) == c_uart_unknown) {
  731. printk(KERN_ERR "%s: cannot find uart type\n", dev->name);
  732. ret = -EIO;
  733. goto out_release_base;
  734. }
  735. if (fpga_download(dev->base_addr, yp->bitrate)) {
  736. printk(KERN_ERR "%s: cannot init FPGA\n", dev->name);
  737. ret = -EIO;
  738. goto out_release_base;
  739. }
  740. outb(0, IER(dev->base_addr));
  741. if (request_irq(dev->irq, yam_interrupt, IRQF_SHARED, dev->name, dev)) {
  742. printk(KERN_ERR "%s: irq %d busy\n", dev->name, dev->irq);
  743. ret = -EBUSY;
  744. goto out_release_base;
  745. }
  746. yam_set_uart(dev);
  747. netif_start_queue(dev);
  748. yp->slotcnt = yp->slot / 10;
  749. /* Reset overruns for all ports - FPGA programming makes overruns */
  750. for (i = 0; i < NR_PORTS; i++) {
  751. struct net_device *yam_dev = yam_devs[i];
  752. inb(LSR(yam_dev->base_addr));
  753. yam_dev->stats.rx_fifo_errors = 0;
  754. }
  755. printk(KERN_INFO "%s at iobase 0x%lx irq %u uart %s\n", dev->name, dev->base_addr, dev->irq,
  756. uart_str[u]);
  757. return 0;
  758. out_release_base:
  759. release_region(dev->base_addr, YAM_EXTENT);
  760. return ret;
  761. }
  762. /* --------------------------------------------------------------------- */
  763. static int yam_close(struct net_device *dev)
  764. {
  765. struct sk_buff *skb;
  766. struct yam_port *yp = netdev_priv(dev);
  767. if (!dev)
  768. return -EINVAL;
  769. /*
  770. * disable interrupts
  771. */
  772. outb(0, IER(dev->base_addr));
  773. outb(1, MCR(dev->base_addr));
  774. /* Remove IRQ handler if last */
  775. free_irq(dev->irq,dev);
  776. release_region(dev->base_addr, YAM_EXTENT);
  777. netif_stop_queue(dev);
  778. while ((skb = skb_dequeue(&yp->send_queue)))
  779. dev_kfree_skb(skb);
  780. printk(KERN_INFO "%s: close yam at iobase 0x%lx irq %u\n",
  781. yam_drvname, dev->base_addr, dev->irq);
  782. return 0;
  783. }
  784. /* --------------------------------------------------------------------- */
  785. static int yam_siocdevprivate(struct net_device *dev, struct ifreq *ifr, void __user *data, int cmd)
  786. {
  787. struct yam_port *yp = netdev_priv(dev);
  788. struct yamdrv_ioctl_cfg yi;
  789. struct yamdrv_ioctl_mcs *ym;
  790. int ioctl_cmd;
  791. if (copy_from_user(&ioctl_cmd, data, sizeof(int)))
  792. return -EFAULT;
  793. if (yp->magic != YAM_MAGIC)
  794. return -EINVAL;
  795. if (!capable(CAP_NET_ADMIN))
  796. return -EPERM;
  797. if (cmd != SIOCDEVPRIVATE)
  798. return -EINVAL;
  799. switch (ioctl_cmd) {
  800. case SIOCYAMRESERVED:
  801. return -EINVAL; /* unused */
  802. case SIOCYAMSMCS:
  803. if (netif_running(dev))
  804. return -EINVAL; /* Cannot change this parameter when up */
  805. ym = memdup_user(data, sizeof(struct yamdrv_ioctl_mcs));
  806. if (IS_ERR(ym))
  807. return PTR_ERR(ym);
  808. if (ym->cmd != SIOCYAMSMCS || ym->bitrate > YAM_MAXBITRATE) {
  809. kfree(ym);
  810. return -EINVAL;
  811. }
  812. /* setting predef as 0 for loading userdefined mcs data */
  813. add_mcs(ym->bits, ym->bitrate, 0);
  814. kfree(ym);
  815. break;
  816. case SIOCYAMSCFG:
  817. if (!capable(CAP_SYS_RAWIO))
  818. return -EPERM;
  819. if (copy_from_user(&yi, data, sizeof(struct yamdrv_ioctl_cfg)))
  820. return -EFAULT;
  821. if (yi.cmd != SIOCYAMSCFG)
  822. return -EINVAL;
  823. if ((yi.cfg.mask & YAM_IOBASE) && netif_running(dev))
  824. return -EINVAL; /* Cannot change this parameter when up */
  825. if ((yi.cfg.mask & YAM_IRQ) && netif_running(dev))
  826. return -EINVAL; /* Cannot change this parameter when up */
  827. if ((yi.cfg.mask & YAM_BITRATE) && netif_running(dev))
  828. return -EINVAL; /* Cannot change this parameter when up */
  829. if ((yi.cfg.mask & YAM_BAUDRATE) && netif_running(dev))
  830. return -EINVAL; /* Cannot change this parameter when up */
  831. if (yi.cfg.mask & YAM_IOBASE) {
  832. yp->iobase = yi.cfg.iobase;
  833. dev->base_addr = yi.cfg.iobase;
  834. }
  835. if (yi.cfg.mask & YAM_IRQ) {
  836. if (yi.cfg.irq > 15)
  837. return -EINVAL;
  838. yp->irq = yi.cfg.irq;
  839. dev->irq = yi.cfg.irq;
  840. }
  841. if (yi.cfg.mask & YAM_BITRATE) {
  842. if (yi.cfg.bitrate > YAM_MAXBITRATE)
  843. return -EINVAL;
  844. yp->bitrate = yi.cfg.bitrate;
  845. }
  846. if (yi.cfg.mask & YAM_BAUDRATE) {
  847. if (yi.cfg.baudrate > YAM_MAXBAUDRATE)
  848. return -EINVAL;
  849. yp->baudrate = yi.cfg.baudrate;
  850. }
  851. if (yi.cfg.mask & YAM_MODE) {
  852. if (yi.cfg.mode > YAM_MAXMODE)
  853. return -EINVAL;
  854. yp->dupmode = yi.cfg.mode;
  855. }
  856. if (yi.cfg.mask & YAM_HOLDDLY) {
  857. if (yi.cfg.holddly > YAM_MAXHOLDDLY)
  858. return -EINVAL;
  859. yp->holdd = yi.cfg.holddly;
  860. }
  861. if (yi.cfg.mask & YAM_TXDELAY) {
  862. if (yi.cfg.txdelay > YAM_MAXTXDELAY)
  863. return -EINVAL;
  864. yp->txd = yi.cfg.txdelay;
  865. }
  866. if (yi.cfg.mask & YAM_TXTAIL) {
  867. if (yi.cfg.txtail > YAM_MAXTXTAIL)
  868. return -EINVAL;
  869. yp->txtail = yi.cfg.txtail;
  870. }
  871. if (yi.cfg.mask & YAM_PERSIST) {
  872. if (yi.cfg.persist > YAM_MAXPERSIST)
  873. return -EINVAL;
  874. yp->pers = yi.cfg.persist;
  875. }
  876. if (yi.cfg.mask & YAM_SLOTTIME) {
  877. if (yi.cfg.slottime > YAM_MAXSLOTTIME)
  878. return -EINVAL;
  879. yp->slot = yi.cfg.slottime;
  880. yp->slotcnt = yp->slot / 10;
  881. }
  882. break;
  883. case SIOCYAMGCFG:
  884. memset(&yi, 0, sizeof(yi));
  885. yi.cfg.mask = 0xffffffff;
  886. yi.cfg.iobase = yp->iobase;
  887. yi.cfg.irq = yp->irq;
  888. yi.cfg.bitrate = yp->bitrate;
  889. yi.cfg.baudrate = yp->baudrate;
  890. yi.cfg.mode = yp->dupmode;
  891. yi.cfg.txdelay = yp->txd;
  892. yi.cfg.holddly = yp->holdd;
  893. yi.cfg.txtail = yp->txtail;
  894. yi.cfg.persist = yp->pers;
  895. yi.cfg.slottime = yp->slot;
  896. if (copy_to_user(data, &yi, sizeof(struct yamdrv_ioctl_cfg)))
  897. return -EFAULT;
  898. break;
  899. default:
  900. return -EINVAL;
  901. }
  902. return 0;
  903. }
  904. /* --------------------------------------------------------------------- */
  905. static int yam_set_mac_address(struct net_device *dev, void *addr)
  906. {
  907. struct sockaddr *sa = (struct sockaddr *) addr;
  908. /* addr is an AX.25 shifted ASCII mac address */
  909. dev_addr_set(dev, sa->sa_data);
  910. return 0;
  911. }
  912. /* --------------------------------------------------------------------- */
  913. static const struct net_device_ops yam_netdev_ops = {
  914. .ndo_open = yam_open,
  915. .ndo_stop = yam_close,
  916. .ndo_start_xmit = yam_send_packet,
  917. .ndo_siocdevprivate = yam_siocdevprivate,
  918. .ndo_set_mac_address = yam_set_mac_address,
  919. };
  920. static void yam_setup(struct net_device *dev)
  921. {
  922. struct yam_port *yp = netdev_priv(dev);
  923. yp->magic = YAM_MAGIC;
  924. yp->bitrate = DEFAULT_BITRATE;
  925. yp->baudrate = DEFAULT_BITRATE * 2;
  926. yp->iobase = 0;
  927. yp->irq = 0;
  928. yp->dupmode = 0;
  929. yp->holdd = DEFAULT_HOLDD;
  930. yp->txd = DEFAULT_TXD;
  931. yp->txtail = DEFAULT_TXTAIL;
  932. yp->slot = DEFAULT_SLOT;
  933. yp->pers = DEFAULT_PERS;
  934. yp->dev = dev;
  935. dev->base_addr = yp->iobase;
  936. dev->irq = yp->irq;
  937. skb_queue_head_init(&yp->send_queue);
  938. dev->netdev_ops = &yam_netdev_ops;
  939. dev->header_ops = &ax25_header_ops;
  940. dev->type = ARPHRD_AX25;
  941. dev->hard_header_len = AX25_MAX_HEADER_LEN;
  942. dev->mtu = AX25_MTU;
  943. dev->addr_len = AX25_ADDR_LEN;
  944. memcpy(dev->broadcast, &ax25_bcast, AX25_ADDR_LEN);
  945. dev_addr_set(dev, (u8 *)&ax25_defaddr);
  946. }
  947. static int __init yam_init_driver(void)
  948. {
  949. struct net_device *dev;
  950. int i, err;
  951. char name[IFNAMSIZ];
  952. printk(yam_drvinfo);
  953. for (i = 0; i < NR_PORTS; i++) {
  954. sprintf(name, "yam%d", i);
  955. dev = alloc_netdev(sizeof(struct yam_port), name,
  956. NET_NAME_UNKNOWN, yam_setup);
  957. if (!dev) {
  958. pr_err("yam: cannot allocate net device\n");
  959. err = -ENOMEM;
  960. goto error;
  961. }
  962. err = register_netdev(dev);
  963. if (err) {
  964. printk(KERN_WARNING "yam: cannot register net device %s\n", dev->name);
  965. free_netdev(dev);
  966. goto error;
  967. }
  968. yam_devs[i] = dev;
  969. }
  970. timer_setup(&yam_timer, yam_dotimer, 0);
  971. yam_timer.expires = jiffies + HZ / 100;
  972. add_timer(&yam_timer);
  973. proc_create_seq("yam", 0444, init_net.proc_net, &yam_seqops);
  974. return 0;
  975. error:
  976. while (--i >= 0) {
  977. unregister_netdev(yam_devs[i]);
  978. free_netdev(yam_devs[i]);
  979. }
  980. return err;
  981. }
  982. /* --------------------------------------------------------------------- */
  983. static void __exit yam_cleanup_driver(void)
  984. {
  985. struct yam_mcs *p;
  986. int i;
  987. del_timer_sync(&yam_timer);
  988. for (i = 0; i < NR_PORTS; i++) {
  989. struct net_device *dev = yam_devs[i];
  990. if (dev) {
  991. unregister_netdev(dev);
  992. free_netdev(dev);
  993. }
  994. }
  995. while (yam_data) {
  996. p = yam_data;
  997. yam_data = yam_data->next;
  998. kfree(p);
  999. }
  1000. remove_proc_entry("yam", init_net.proc_net);
  1001. }
  1002. /* --------------------------------------------------------------------- */
  1003. MODULE_AUTHOR("Frederic Rible F1OAT [email protected]");
  1004. MODULE_DESCRIPTION("Yam amateur radio modem driver");
  1005. MODULE_LICENSE("GPL");
  1006. MODULE_FIRMWARE(FIRMWARE_1200);
  1007. MODULE_FIRMWARE(FIRMWARE_9600);
  1008. module_init(yam_init_driver);
  1009. module_exit(yam_cleanup_driver);
  1010. /* --------------------------------------------------------------------- */