tsi108_eth.c 46 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*******************************************************************************
  3. Copyright(c) 2006 Tundra Semiconductor Corporation.
  4. *******************************************************************************/
  5. /* This driver is based on the driver code originally developed
  6. * for the Intel IOC80314 (ForestLake) Gigabit Ethernet by
  7. * [email protected] * Copyright (C) 2003 TimeSys Corporation
  8. *
  9. * Currently changes from original version are:
  10. * - porting to Tsi108-based platform and kernel 2.6 ([email protected])
  11. * - modifications to handle two ports independently and support for
  12. * additional PHY devices ([email protected])
  13. * - Get hardware information from platform device. ([email protected])
  14. *
  15. */
  16. #include <linux/module.h>
  17. #include <linux/types.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/net.h>
  20. #include <linux/netdevice.h>
  21. #include <linux/etherdevice.h>
  22. #include <linux/ethtool.h>
  23. #include <linux/skbuff.h>
  24. #include <linux/spinlock.h>
  25. #include <linux/delay.h>
  26. #include <linux/crc32.h>
  27. #include <linux/mii.h>
  28. #include <linux/device.h>
  29. #include <linux/pci.h>
  30. #include <linux/rtnetlink.h>
  31. #include <linux/timer.h>
  32. #include <linux/platform_device.h>
  33. #include <linux/gfp.h>
  34. #include <asm/io.h>
  35. #include <asm/tsi108.h>
  36. #include "tsi108_eth.h"
  37. #define MII_READ_DELAY 10000 /* max link wait time in msec */
  38. #define TSI108_RXRING_LEN 256
  39. /* NOTE: The driver currently does not support receiving packets
  40. * larger than the buffer size, so don't decrease this (unless you
  41. * want to add such support).
  42. */
  43. #define TSI108_RXBUF_SIZE 1536
  44. #define TSI108_TXRING_LEN 256
  45. #define TSI108_TX_INT_FREQ 64
  46. /* Check the phy status every half a second. */
  47. #define CHECK_PHY_INTERVAL (HZ/2)
  48. struct tsi108_prv_data {
  49. void __iomem *regs; /* Base of normal regs */
  50. void __iomem *phyregs; /* Base of register bank used for PHY access */
  51. struct net_device *dev;
  52. struct napi_struct napi;
  53. unsigned int phy; /* Index of PHY for this interface */
  54. unsigned int irq_num;
  55. unsigned int id;
  56. unsigned int phy_type;
  57. struct timer_list timer;/* Timer that triggers the check phy function */
  58. unsigned int rxtail; /* Next entry in rxring to read */
  59. unsigned int rxhead; /* Next entry in rxring to give a new buffer */
  60. unsigned int rxfree; /* Number of free, allocated RX buffers */
  61. unsigned int rxpending; /* Non-zero if there are still descriptors
  62. * to be processed from a previous descriptor
  63. * interrupt condition that has been cleared */
  64. unsigned int txtail; /* Next TX descriptor to check status on */
  65. unsigned int txhead; /* Next TX descriptor to use */
  66. /* Number of free TX descriptors. This could be calculated from
  67. * rxhead and rxtail if one descriptor were left unused to disambiguate
  68. * full and empty conditions, but it's simpler to just keep track
  69. * explicitly. */
  70. unsigned int txfree;
  71. unsigned int phy_ok; /* The PHY is currently powered on. */
  72. /* PHY status (duplex is 1 for half, 2 for full,
  73. * so that the default 0 indicates that neither has
  74. * yet been configured). */
  75. unsigned int link_up;
  76. unsigned int speed;
  77. unsigned int duplex;
  78. tx_desc *txring;
  79. rx_desc *rxring;
  80. struct sk_buff *txskbs[TSI108_TXRING_LEN];
  81. struct sk_buff *rxskbs[TSI108_RXRING_LEN];
  82. dma_addr_t txdma, rxdma;
  83. /* txlock nests in misclock and phy_lock */
  84. spinlock_t txlock, misclock;
  85. /* stats is used to hold the upper bits of each hardware counter,
  86. * and tmpstats is used to hold the full values for returning
  87. * to the caller of get_stats(). They must be separate in case
  88. * an overflow interrupt occurs before the stats are consumed.
  89. */
  90. struct net_device_stats stats;
  91. struct net_device_stats tmpstats;
  92. /* These stats are kept separate in hardware, thus require individual
  93. * fields for handling carry. They are combined in get_stats.
  94. */
  95. unsigned long rx_fcs; /* Add to rx_frame_errors */
  96. unsigned long rx_short_fcs; /* Add to rx_frame_errors */
  97. unsigned long rx_long_fcs; /* Add to rx_frame_errors */
  98. unsigned long rx_underruns; /* Add to rx_length_errors */
  99. unsigned long rx_overruns; /* Add to rx_length_errors */
  100. unsigned long tx_coll_abort; /* Add to tx_aborted_errors/collisions */
  101. unsigned long tx_pause_drop; /* Add to tx_aborted_errors */
  102. unsigned long mc_hash[16];
  103. u32 msg_enable; /* debug message level */
  104. struct mii_if_info mii_if;
  105. unsigned int init_media;
  106. struct platform_device *pdev;
  107. };
  108. static void tsi108_timed_checker(struct timer_list *t);
  109. #ifdef DEBUG
  110. static void dump_eth_one(struct net_device *dev)
  111. {
  112. struct tsi108_prv_data *data = netdev_priv(dev);
  113. printk("Dumping %s...\n", dev->name);
  114. printk("intstat %x intmask %x phy_ok %d"
  115. " link %d speed %d duplex %d\n",
  116. TSI_READ(TSI108_EC_INTSTAT),
  117. TSI_READ(TSI108_EC_INTMASK), data->phy_ok,
  118. data->link_up, data->speed, data->duplex);
  119. printk("TX: head %d, tail %d, free %d, stat %x, estat %x, err %x\n",
  120. data->txhead, data->txtail, data->txfree,
  121. TSI_READ(TSI108_EC_TXSTAT),
  122. TSI_READ(TSI108_EC_TXESTAT),
  123. TSI_READ(TSI108_EC_TXERR));
  124. printk("RX: head %d, tail %d, free %d, stat %x,"
  125. " estat %x, err %x, pending %d\n\n",
  126. data->rxhead, data->rxtail, data->rxfree,
  127. TSI_READ(TSI108_EC_RXSTAT),
  128. TSI_READ(TSI108_EC_RXESTAT),
  129. TSI_READ(TSI108_EC_RXERR), data->rxpending);
  130. }
  131. #endif
  132. /* Synchronization is needed between the thread and up/down events.
  133. * Note that the PHY is accessed through the same registers for both
  134. * interfaces, so this can't be made interface-specific.
  135. */
  136. static DEFINE_SPINLOCK(phy_lock);
  137. static int tsi108_read_mii(struct tsi108_prv_data *data, int reg)
  138. {
  139. unsigned i;
  140. TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
  141. (data->phy << TSI108_MAC_MII_ADDR_PHY) |
  142. (reg << TSI108_MAC_MII_ADDR_REG));
  143. TSI_WRITE_PHY(TSI108_MAC_MII_CMD, 0);
  144. TSI_WRITE_PHY(TSI108_MAC_MII_CMD, TSI108_MAC_MII_CMD_READ);
  145. for (i = 0; i < 100; i++) {
  146. if (!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
  147. (TSI108_MAC_MII_IND_NOTVALID | TSI108_MAC_MII_IND_BUSY)))
  148. break;
  149. udelay(10);
  150. }
  151. if (i == 100)
  152. return 0xffff;
  153. else
  154. return TSI_READ_PHY(TSI108_MAC_MII_DATAIN);
  155. }
  156. static void tsi108_write_mii(struct tsi108_prv_data *data,
  157. int reg, u16 val)
  158. {
  159. unsigned i = 100;
  160. TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
  161. (data->phy << TSI108_MAC_MII_ADDR_PHY) |
  162. (reg << TSI108_MAC_MII_ADDR_REG));
  163. TSI_WRITE_PHY(TSI108_MAC_MII_DATAOUT, val);
  164. while (i--) {
  165. if(!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
  166. TSI108_MAC_MII_IND_BUSY))
  167. break;
  168. udelay(10);
  169. }
  170. }
  171. static int tsi108_mdio_read(struct net_device *dev, int addr, int reg)
  172. {
  173. struct tsi108_prv_data *data = netdev_priv(dev);
  174. return tsi108_read_mii(data, reg);
  175. }
  176. static void tsi108_mdio_write(struct net_device *dev, int addr, int reg, int val)
  177. {
  178. struct tsi108_prv_data *data = netdev_priv(dev);
  179. tsi108_write_mii(data, reg, val);
  180. }
  181. static inline void tsi108_write_tbi(struct tsi108_prv_data *data,
  182. int reg, u16 val)
  183. {
  184. unsigned i = 1000;
  185. TSI_WRITE(TSI108_MAC_MII_ADDR,
  186. (0x1e << TSI108_MAC_MII_ADDR_PHY)
  187. | (reg << TSI108_MAC_MII_ADDR_REG));
  188. TSI_WRITE(TSI108_MAC_MII_DATAOUT, val);
  189. while(i--) {
  190. if(!(TSI_READ(TSI108_MAC_MII_IND) & TSI108_MAC_MII_IND_BUSY))
  191. return;
  192. udelay(10);
  193. }
  194. printk(KERN_ERR "%s function time out\n", __func__);
  195. }
  196. static int mii_speed(struct mii_if_info *mii)
  197. {
  198. int advert, lpa, val, media;
  199. int lpa2 = 0;
  200. int speed;
  201. if (!mii_link_ok(mii))
  202. return 0;
  203. val = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_BMSR);
  204. if ((val & BMSR_ANEGCOMPLETE) == 0)
  205. return 0;
  206. advert = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_ADVERTISE);
  207. lpa = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_LPA);
  208. media = mii_nway_result(advert & lpa);
  209. if (mii->supports_gmii)
  210. lpa2 = mii->mdio_read(mii->dev, mii->phy_id, MII_STAT1000);
  211. speed = lpa2 & (LPA_1000FULL | LPA_1000HALF) ? 1000 :
  212. (media & (ADVERTISE_100FULL | ADVERTISE_100HALF) ? 100 : 10);
  213. return speed;
  214. }
  215. static void tsi108_check_phy(struct net_device *dev)
  216. {
  217. struct tsi108_prv_data *data = netdev_priv(dev);
  218. u32 mac_cfg2_reg, portctrl_reg;
  219. u32 duplex;
  220. u32 speed;
  221. unsigned long flags;
  222. spin_lock_irqsave(&phy_lock, flags);
  223. if (!data->phy_ok)
  224. goto out;
  225. duplex = mii_check_media(&data->mii_if, netif_msg_link(data), data->init_media);
  226. data->init_media = 0;
  227. if (netif_carrier_ok(dev)) {
  228. speed = mii_speed(&data->mii_if);
  229. if ((speed != data->speed) || duplex) {
  230. mac_cfg2_reg = TSI_READ(TSI108_MAC_CFG2);
  231. portctrl_reg = TSI_READ(TSI108_EC_PORTCTRL);
  232. mac_cfg2_reg &= ~TSI108_MAC_CFG2_IFACE_MASK;
  233. if (speed == 1000) {
  234. mac_cfg2_reg |= TSI108_MAC_CFG2_GIG;
  235. portctrl_reg &= ~TSI108_EC_PORTCTRL_NOGIG;
  236. } else {
  237. mac_cfg2_reg |= TSI108_MAC_CFG2_NOGIG;
  238. portctrl_reg |= TSI108_EC_PORTCTRL_NOGIG;
  239. }
  240. data->speed = speed;
  241. if (data->mii_if.full_duplex) {
  242. mac_cfg2_reg |= TSI108_MAC_CFG2_FULLDUPLEX;
  243. portctrl_reg &= ~TSI108_EC_PORTCTRL_HALFDUPLEX;
  244. data->duplex = 2;
  245. } else {
  246. mac_cfg2_reg &= ~TSI108_MAC_CFG2_FULLDUPLEX;
  247. portctrl_reg |= TSI108_EC_PORTCTRL_HALFDUPLEX;
  248. data->duplex = 1;
  249. }
  250. TSI_WRITE(TSI108_MAC_CFG2, mac_cfg2_reg);
  251. TSI_WRITE(TSI108_EC_PORTCTRL, portctrl_reg);
  252. }
  253. if (data->link_up == 0) {
  254. /* The manual says it can take 3-4 usecs for the speed change
  255. * to take effect.
  256. */
  257. udelay(5);
  258. spin_lock(&data->txlock);
  259. if (is_valid_ether_addr(dev->dev_addr) && data->txfree)
  260. netif_wake_queue(dev);
  261. data->link_up = 1;
  262. spin_unlock(&data->txlock);
  263. }
  264. } else {
  265. if (data->link_up == 1) {
  266. netif_stop_queue(dev);
  267. data->link_up = 0;
  268. printk(KERN_NOTICE "%s : link is down\n", dev->name);
  269. }
  270. goto out;
  271. }
  272. out:
  273. spin_unlock_irqrestore(&phy_lock, flags);
  274. }
  275. static inline void
  276. tsi108_stat_carry_one(int carry, int carry_bit, int carry_shift,
  277. unsigned long *upper)
  278. {
  279. if (carry & carry_bit)
  280. *upper += carry_shift;
  281. }
  282. static void tsi108_stat_carry(struct net_device *dev)
  283. {
  284. struct tsi108_prv_data *data = netdev_priv(dev);
  285. unsigned long flags;
  286. u32 carry1, carry2;
  287. spin_lock_irqsave(&data->misclock, flags);
  288. carry1 = TSI_READ(TSI108_STAT_CARRY1);
  289. carry2 = TSI_READ(TSI108_STAT_CARRY2);
  290. TSI_WRITE(TSI108_STAT_CARRY1, carry1);
  291. TSI_WRITE(TSI108_STAT_CARRY2, carry2);
  292. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXBYTES,
  293. TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
  294. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXPKTS,
  295. TSI108_STAT_RXPKTS_CARRY,
  296. &data->stats.rx_packets);
  297. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFCS,
  298. TSI108_STAT_RXFCS_CARRY, &data->rx_fcs);
  299. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXMCAST,
  300. TSI108_STAT_RXMCAST_CARRY,
  301. &data->stats.multicast);
  302. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXALIGN,
  303. TSI108_STAT_RXALIGN_CARRY,
  304. &data->stats.rx_frame_errors);
  305. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXLENGTH,
  306. TSI108_STAT_RXLENGTH_CARRY,
  307. &data->stats.rx_length_errors);
  308. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXRUNT,
  309. TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
  310. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJUMBO,
  311. TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
  312. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFRAG,
  313. TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
  314. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJABBER,
  315. TSI108_STAT_RXJABBER_CARRY, &data->rx_long_fcs);
  316. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXDROP,
  317. TSI108_STAT_RXDROP_CARRY,
  318. &data->stats.rx_missed_errors);
  319. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXBYTES,
  320. TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
  321. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPKTS,
  322. TSI108_STAT_TXPKTS_CARRY,
  323. &data->stats.tx_packets);
  324. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXDEF,
  325. TSI108_STAT_TXEXDEF_CARRY,
  326. &data->stats.tx_aborted_errors);
  327. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXCOL,
  328. TSI108_STAT_TXEXCOL_CARRY, &data->tx_coll_abort);
  329. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXTCOL,
  330. TSI108_STAT_TXTCOL_CARRY,
  331. &data->stats.collisions);
  332. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPAUSE,
  333. TSI108_STAT_TXPAUSEDROP_CARRY,
  334. &data->tx_pause_drop);
  335. spin_unlock_irqrestore(&data->misclock, flags);
  336. }
  337. /* Read a stat counter atomically with respect to carries.
  338. * data->misclock must be held.
  339. */
  340. static inline unsigned long
  341. tsi108_read_stat(struct tsi108_prv_data * data, int reg, int carry_bit,
  342. int carry_shift, unsigned long *upper)
  343. {
  344. int carryreg;
  345. unsigned long val;
  346. if (reg < 0xb0)
  347. carryreg = TSI108_STAT_CARRY1;
  348. else
  349. carryreg = TSI108_STAT_CARRY2;
  350. again:
  351. val = TSI_READ(reg) | *upper;
  352. /* Check to see if it overflowed, but the interrupt hasn't
  353. * been serviced yet. If so, handle the carry here, and
  354. * try again.
  355. */
  356. if (unlikely(TSI_READ(carryreg) & carry_bit)) {
  357. *upper += carry_shift;
  358. TSI_WRITE(carryreg, carry_bit);
  359. goto again;
  360. }
  361. return val;
  362. }
  363. static struct net_device_stats *tsi108_get_stats(struct net_device *dev)
  364. {
  365. unsigned long excol;
  366. struct tsi108_prv_data *data = netdev_priv(dev);
  367. spin_lock_irq(&data->misclock);
  368. data->tmpstats.rx_packets =
  369. tsi108_read_stat(data, TSI108_STAT_RXPKTS,
  370. TSI108_STAT_CARRY1_RXPKTS,
  371. TSI108_STAT_RXPKTS_CARRY, &data->stats.rx_packets);
  372. data->tmpstats.tx_packets =
  373. tsi108_read_stat(data, TSI108_STAT_TXPKTS,
  374. TSI108_STAT_CARRY2_TXPKTS,
  375. TSI108_STAT_TXPKTS_CARRY, &data->stats.tx_packets);
  376. data->tmpstats.rx_bytes =
  377. tsi108_read_stat(data, TSI108_STAT_RXBYTES,
  378. TSI108_STAT_CARRY1_RXBYTES,
  379. TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
  380. data->tmpstats.tx_bytes =
  381. tsi108_read_stat(data, TSI108_STAT_TXBYTES,
  382. TSI108_STAT_CARRY2_TXBYTES,
  383. TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
  384. data->tmpstats.multicast =
  385. tsi108_read_stat(data, TSI108_STAT_RXMCAST,
  386. TSI108_STAT_CARRY1_RXMCAST,
  387. TSI108_STAT_RXMCAST_CARRY, &data->stats.multicast);
  388. excol = tsi108_read_stat(data, TSI108_STAT_TXEXCOL,
  389. TSI108_STAT_CARRY2_TXEXCOL,
  390. TSI108_STAT_TXEXCOL_CARRY,
  391. &data->tx_coll_abort);
  392. data->tmpstats.collisions =
  393. tsi108_read_stat(data, TSI108_STAT_TXTCOL,
  394. TSI108_STAT_CARRY2_TXTCOL,
  395. TSI108_STAT_TXTCOL_CARRY, &data->stats.collisions);
  396. data->tmpstats.collisions += excol;
  397. data->tmpstats.rx_length_errors =
  398. tsi108_read_stat(data, TSI108_STAT_RXLENGTH,
  399. TSI108_STAT_CARRY1_RXLENGTH,
  400. TSI108_STAT_RXLENGTH_CARRY,
  401. &data->stats.rx_length_errors);
  402. data->tmpstats.rx_length_errors +=
  403. tsi108_read_stat(data, TSI108_STAT_RXRUNT,
  404. TSI108_STAT_CARRY1_RXRUNT,
  405. TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
  406. data->tmpstats.rx_length_errors +=
  407. tsi108_read_stat(data, TSI108_STAT_RXJUMBO,
  408. TSI108_STAT_CARRY1_RXJUMBO,
  409. TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
  410. data->tmpstats.rx_frame_errors =
  411. tsi108_read_stat(data, TSI108_STAT_RXALIGN,
  412. TSI108_STAT_CARRY1_RXALIGN,
  413. TSI108_STAT_RXALIGN_CARRY,
  414. &data->stats.rx_frame_errors);
  415. data->tmpstats.rx_frame_errors +=
  416. tsi108_read_stat(data, TSI108_STAT_RXFCS,
  417. TSI108_STAT_CARRY1_RXFCS, TSI108_STAT_RXFCS_CARRY,
  418. &data->rx_fcs);
  419. data->tmpstats.rx_frame_errors +=
  420. tsi108_read_stat(data, TSI108_STAT_RXFRAG,
  421. TSI108_STAT_CARRY1_RXFRAG,
  422. TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
  423. data->tmpstats.rx_missed_errors =
  424. tsi108_read_stat(data, TSI108_STAT_RXDROP,
  425. TSI108_STAT_CARRY1_RXDROP,
  426. TSI108_STAT_RXDROP_CARRY,
  427. &data->stats.rx_missed_errors);
  428. /* These three are maintained by software. */
  429. data->tmpstats.rx_fifo_errors = data->stats.rx_fifo_errors;
  430. data->tmpstats.rx_crc_errors = data->stats.rx_crc_errors;
  431. data->tmpstats.tx_aborted_errors =
  432. tsi108_read_stat(data, TSI108_STAT_TXEXDEF,
  433. TSI108_STAT_CARRY2_TXEXDEF,
  434. TSI108_STAT_TXEXDEF_CARRY,
  435. &data->stats.tx_aborted_errors);
  436. data->tmpstats.tx_aborted_errors +=
  437. tsi108_read_stat(data, TSI108_STAT_TXPAUSEDROP,
  438. TSI108_STAT_CARRY2_TXPAUSE,
  439. TSI108_STAT_TXPAUSEDROP_CARRY,
  440. &data->tx_pause_drop);
  441. data->tmpstats.tx_aborted_errors += excol;
  442. data->tmpstats.tx_errors = data->tmpstats.tx_aborted_errors;
  443. data->tmpstats.rx_errors = data->tmpstats.rx_length_errors +
  444. data->tmpstats.rx_crc_errors +
  445. data->tmpstats.rx_frame_errors +
  446. data->tmpstats.rx_fifo_errors + data->tmpstats.rx_missed_errors;
  447. spin_unlock_irq(&data->misclock);
  448. return &data->tmpstats;
  449. }
  450. static void tsi108_restart_rx(struct tsi108_prv_data * data, struct net_device *dev)
  451. {
  452. TSI_WRITE(TSI108_EC_RXQ_PTRHIGH,
  453. TSI108_EC_RXQ_PTRHIGH_VALID);
  454. TSI_WRITE(TSI108_EC_RXCTRL, TSI108_EC_RXCTRL_GO
  455. | TSI108_EC_RXCTRL_QUEUE0);
  456. }
  457. static void tsi108_restart_tx(struct tsi108_prv_data * data)
  458. {
  459. TSI_WRITE(TSI108_EC_TXQ_PTRHIGH,
  460. TSI108_EC_TXQ_PTRHIGH_VALID);
  461. TSI_WRITE(TSI108_EC_TXCTRL, TSI108_EC_TXCTRL_IDLEINT |
  462. TSI108_EC_TXCTRL_GO | TSI108_EC_TXCTRL_QUEUE0);
  463. }
  464. /* txlock must be held by caller, with IRQs disabled, and
  465. * with permission to re-enable them when the lock is dropped.
  466. */
  467. static void tsi108_complete_tx(struct net_device *dev)
  468. {
  469. struct tsi108_prv_data *data = netdev_priv(dev);
  470. int tx;
  471. struct sk_buff *skb;
  472. int release = 0;
  473. while (!data->txfree || data->txhead != data->txtail) {
  474. tx = data->txtail;
  475. if (data->txring[tx].misc & TSI108_TX_OWN)
  476. break;
  477. skb = data->txskbs[tx];
  478. if (!(data->txring[tx].misc & TSI108_TX_OK))
  479. printk("%s: bad tx packet, misc %x\n",
  480. dev->name, data->txring[tx].misc);
  481. data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
  482. data->txfree++;
  483. if (data->txring[tx].misc & TSI108_TX_EOF) {
  484. dev_kfree_skb_any(skb);
  485. release++;
  486. }
  487. }
  488. if (release) {
  489. if (is_valid_ether_addr(dev->dev_addr) && data->link_up)
  490. netif_wake_queue(dev);
  491. }
  492. }
  493. static int tsi108_send_packet(struct sk_buff * skb, struct net_device *dev)
  494. {
  495. struct tsi108_prv_data *data = netdev_priv(dev);
  496. int frags = skb_shinfo(skb)->nr_frags + 1;
  497. int i;
  498. if (!data->phy_ok && net_ratelimit())
  499. printk(KERN_ERR "%s: Transmit while PHY is down!\n", dev->name);
  500. if (!data->link_up) {
  501. printk(KERN_ERR "%s: Transmit while link is down!\n",
  502. dev->name);
  503. netif_stop_queue(dev);
  504. return NETDEV_TX_BUSY;
  505. }
  506. if (data->txfree < MAX_SKB_FRAGS + 1) {
  507. netif_stop_queue(dev);
  508. if (net_ratelimit())
  509. printk(KERN_ERR "%s: Transmit with full tx ring!\n",
  510. dev->name);
  511. return NETDEV_TX_BUSY;
  512. }
  513. if (data->txfree - frags < MAX_SKB_FRAGS + 1) {
  514. netif_stop_queue(dev);
  515. }
  516. spin_lock_irq(&data->txlock);
  517. for (i = 0; i < frags; i++) {
  518. int misc = 0;
  519. int tx = data->txhead;
  520. /* This is done to mark every TSI108_TX_INT_FREQ tx buffers with
  521. * the interrupt bit. TX descriptor-complete interrupts are
  522. * enabled when the queue fills up, and masked when there is
  523. * still free space. This way, when saturating the outbound
  524. * link, the tx interrupts are kept to a reasonable level.
  525. * When the queue is not full, reclamation of skbs still occurs
  526. * as new packets are transmitted, or on a queue-empty
  527. * interrupt.
  528. */
  529. if ((tx % TSI108_TX_INT_FREQ == 0) &&
  530. ((TSI108_TXRING_LEN - data->txfree) >= TSI108_TX_INT_FREQ))
  531. misc = TSI108_TX_INT;
  532. data->txskbs[tx] = skb;
  533. if (i == 0) {
  534. data->txring[tx].buf0 = dma_map_single(&data->pdev->dev,
  535. skb->data, skb_headlen(skb),
  536. DMA_TO_DEVICE);
  537. data->txring[tx].len = skb_headlen(skb);
  538. misc |= TSI108_TX_SOF;
  539. } else {
  540. const skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1];
  541. data->txring[tx].buf0 =
  542. skb_frag_dma_map(&data->pdev->dev, frag,
  543. 0, skb_frag_size(frag),
  544. DMA_TO_DEVICE);
  545. data->txring[tx].len = skb_frag_size(frag);
  546. }
  547. if (i == frags - 1)
  548. misc |= TSI108_TX_EOF;
  549. if (netif_msg_pktdata(data)) {
  550. int i;
  551. printk("%s: Tx Frame contents (%d)\n", dev->name,
  552. skb->len);
  553. for (i = 0; i < skb->len; i++)
  554. printk(" %2.2x", skb->data[i]);
  555. printk(".\n");
  556. }
  557. data->txring[tx].misc = misc | TSI108_TX_OWN;
  558. data->txhead = (data->txhead + 1) % TSI108_TXRING_LEN;
  559. data->txfree--;
  560. }
  561. tsi108_complete_tx(dev);
  562. /* This must be done after the check for completed tx descriptors,
  563. * so that the tail pointer is correct.
  564. */
  565. if (!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_QUEUE0))
  566. tsi108_restart_tx(data);
  567. spin_unlock_irq(&data->txlock);
  568. return NETDEV_TX_OK;
  569. }
  570. static int tsi108_complete_rx(struct net_device *dev, int budget)
  571. {
  572. struct tsi108_prv_data *data = netdev_priv(dev);
  573. int done = 0;
  574. while (data->rxfree && done != budget) {
  575. int rx = data->rxtail;
  576. struct sk_buff *skb;
  577. if (data->rxring[rx].misc & TSI108_RX_OWN)
  578. break;
  579. skb = data->rxskbs[rx];
  580. data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
  581. data->rxfree--;
  582. done++;
  583. if (data->rxring[rx].misc & TSI108_RX_BAD) {
  584. spin_lock_irq(&data->misclock);
  585. if (data->rxring[rx].misc & TSI108_RX_CRC)
  586. data->stats.rx_crc_errors++;
  587. if (data->rxring[rx].misc & TSI108_RX_OVER)
  588. data->stats.rx_fifo_errors++;
  589. spin_unlock_irq(&data->misclock);
  590. dev_kfree_skb_any(skb);
  591. continue;
  592. }
  593. if (netif_msg_pktdata(data)) {
  594. int i;
  595. printk("%s: Rx Frame contents (%d)\n",
  596. dev->name, data->rxring[rx].len);
  597. for (i = 0; i < data->rxring[rx].len; i++)
  598. printk(" %2.2x", skb->data[i]);
  599. printk(".\n");
  600. }
  601. skb_put(skb, data->rxring[rx].len);
  602. skb->protocol = eth_type_trans(skb, dev);
  603. netif_receive_skb(skb);
  604. }
  605. return done;
  606. }
  607. static int tsi108_refill_rx(struct net_device *dev, int budget)
  608. {
  609. struct tsi108_prv_data *data = netdev_priv(dev);
  610. int done = 0;
  611. while (data->rxfree != TSI108_RXRING_LEN && done != budget) {
  612. int rx = data->rxhead;
  613. struct sk_buff *skb;
  614. skb = netdev_alloc_skb_ip_align(dev, TSI108_RXBUF_SIZE);
  615. data->rxskbs[rx] = skb;
  616. if (!skb)
  617. break;
  618. data->rxring[rx].buf0 = dma_map_single(&data->pdev->dev,
  619. skb->data, TSI108_RX_SKB_SIZE,
  620. DMA_FROM_DEVICE);
  621. /* Sometimes the hardware sets blen to zero after packet
  622. * reception, even though the manual says that it's only ever
  623. * modified by the driver.
  624. */
  625. data->rxring[rx].blen = TSI108_RX_SKB_SIZE;
  626. data->rxring[rx].misc = TSI108_RX_OWN | TSI108_RX_INT;
  627. data->rxhead = (data->rxhead + 1) % TSI108_RXRING_LEN;
  628. data->rxfree++;
  629. done++;
  630. }
  631. if (done != 0 && !(TSI_READ(TSI108_EC_RXSTAT) &
  632. TSI108_EC_RXSTAT_QUEUE0))
  633. tsi108_restart_rx(data, dev);
  634. return done;
  635. }
  636. static int tsi108_poll(struct napi_struct *napi, int budget)
  637. {
  638. struct tsi108_prv_data *data = container_of(napi, struct tsi108_prv_data, napi);
  639. struct net_device *dev = data->dev;
  640. u32 estat = TSI_READ(TSI108_EC_RXESTAT);
  641. u32 intstat = TSI_READ(TSI108_EC_INTSTAT);
  642. int num_received = 0, num_filled = 0;
  643. intstat &= TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
  644. TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR | TSI108_INT_RXWAIT;
  645. TSI_WRITE(TSI108_EC_RXESTAT, estat);
  646. TSI_WRITE(TSI108_EC_INTSTAT, intstat);
  647. if (data->rxpending || (estat & TSI108_EC_RXESTAT_Q0_DESCINT))
  648. num_received = tsi108_complete_rx(dev, budget);
  649. /* This should normally fill no more slots than the number of
  650. * packets received in tsi108_complete_rx(). The exception
  651. * is when we previously ran out of memory for RX SKBs. In that
  652. * case, it's helpful to obey the budget, not only so that the
  653. * CPU isn't hogged, but so that memory (which may still be low)
  654. * is not hogged by one device.
  655. *
  656. * A work unit is considered to be two SKBs to allow us to catch
  657. * up when the ring has shrunk due to out-of-memory but we're
  658. * still removing the full budget's worth of packets each time.
  659. */
  660. if (data->rxfree < TSI108_RXRING_LEN)
  661. num_filled = tsi108_refill_rx(dev, budget * 2);
  662. if (intstat & TSI108_INT_RXERROR) {
  663. u32 err = TSI_READ(TSI108_EC_RXERR);
  664. TSI_WRITE(TSI108_EC_RXERR, err);
  665. if (err) {
  666. if (net_ratelimit())
  667. printk(KERN_DEBUG "%s: RX error %x\n",
  668. dev->name, err);
  669. if (!(TSI_READ(TSI108_EC_RXSTAT) &
  670. TSI108_EC_RXSTAT_QUEUE0))
  671. tsi108_restart_rx(data, dev);
  672. }
  673. }
  674. if (intstat & TSI108_INT_RXOVERRUN) {
  675. spin_lock_irq(&data->misclock);
  676. data->stats.rx_fifo_errors++;
  677. spin_unlock_irq(&data->misclock);
  678. }
  679. if (num_received < budget) {
  680. data->rxpending = 0;
  681. napi_complete_done(napi, num_received);
  682. TSI_WRITE(TSI108_EC_INTMASK,
  683. TSI_READ(TSI108_EC_INTMASK)
  684. & ~(TSI108_INT_RXQUEUE0
  685. | TSI108_INT_RXTHRESH |
  686. TSI108_INT_RXOVERRUN |
  687. TSI108_INT_RXERROR |
  688. TSI108_INT_RXWAIT));
  689. } else {
  690. data->rxpending = 1;
  691. }
  692. return num_received;
  693. }
  694. static void tsi108_rx_int(struct net_device *dev)
  695. {
  696. struct tsi108_prv_data *data = netdev_priv(dev);
  697. /* A race could cause dev to already be scheduled, so it's not an
  698. * error if that happens (and interrupts shouldn't be re-masked,
  699. * because that can cause harmful races, if poll has already
  700. * unmasked them but not cleared LINK_STATE_SCHED).
  701. *
  702. * This can happen if this code races with tsi108_poll(), which masks
  703. * the interrupts after tsi108_irq_one() read the mask, but before
  704. * napi_schedule is called. It could also happen due to calls
  705. * from tsi108_check_rxring().
  706. */
  707. if (napi_schedule_prep(&data->napi)) {
  708. /* Mask, rather than ack, the receive interrupts. The ack
  709. * will happen in tsi108_poll().
  710. */
  711. TSI_WRITE(TSI108_EC_INTMASK,
  712. TSI_READ(TSI108_EC_INTMASK) |
  713. TSI108_INT_RXQUEUE0
  714. | TSI108_INT_RXTHRESH |
  715. TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR |
  716. TSI108_INT_RXWAIT);
  717. __napi_schedule(&data->napi);
  718. } else {
  719. if (!netif_running(dev)) {
  720. /* This can happen if an interrupt occurs while the
  721. * interface is being brought down, as the START
  722. * bit is cleared before the stop function is called.
  723. *
  724. * In this case, the interrupts must be masked, or
  725. * they will continue indefinitely.
  726. *
  727. * There's a race here if the interface is brought down
  728. * and then up in rapid succession, as the device could
  729. * be made running after the above check and before
  730. * the masking below. This will only happen if the IRQ
  731. * thread has a lower priority than the task brining
  732. * up the interface. Fixing this race would likely
  733. * require changes in generic code.
  734. */
  735. TSI_WRITE(TSI108_EC_INTMASK,
  736. TSI_READ
  737. (TSI108_EC_INTMASK) |
  738. TSI108_INT_RXQUEUE0 |
  739. TSI108_INT_RXTHRESH |
  740. TSI108_INT_RXOVERRUN |
  741. TSI108_INT_RXERROR |
  742. TSI108_INT_RXWAIT);
  743. }
  744. }
  745. }
  746. /* If the RX ring has run out of memory, try periodically
  747. * to allocate some more, as otherwise poll would never
  748. * get called (apart from the initial end-of-queue condition).
  749. *
  750. * This is called once per second (by default) from the thread.
  751. */
  752. static void tsi108_check_rxring(struct net_device *dev)
  753. {
  754. struct tsi108_prv_data *data = netdev_priv(dev);
  755. /* A poll is scheduled, as opposed to caling tsi108_refill_rx
  756. * directly, so as to keep the receive path single-threaded
  757. * (and thus not needing a lock).
  758. */
  759. if (netif_running(dev) && data->rxfree < TSI108_RXRING_LEN / 4)
  760. tsi108_rx_int(dev);
  761. }
  762. static void tsi108_tx_int(struct net_device *dev)
  763. {
  764. struct tsi108_prv_data *data = netdev_priv(dev);
  765. u32 estat = TSI_READ(TSI108_EC_TXESTAT);
  766. TSI_WRITE(TSI108_EC_TXESTAT, estat);
  767. TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_TXQUEUE0 |
  768. TSI108_INT_TXIDLE | TSI108_INT_TXERROR);
  769. if (estat & TSI108_EC_TXESTAT_Q0_ERR) {
  770. u32 err = TSI_READ(TSI108_EC_TXERR);
  771. TSI_WRITE(TSI108_EC_TXERR, err);
  772. if (err && net_ratelimit())
  773. printk(KERN_ERR "%s: TX error %x\n", dev->name, err);
  774. }
  775. if (estat & (TSI108_EC_TXESTAT_Q0_DESCINT | TSI108_EC_TXESTAT_Q0_EOQ)) {
  776. spin_lock(&data->txlock);
  777. tsi108_complete_tx(dev);
  778. spin_unlock(&data->txlock);
  779. }
  780. }
  781. static irqreturn_t tsi108_irq(int irq, void *dev_id)
  782. {
  783. struct net_device *dev = dev_id;
  784. struct tsi108_prv_data *data = netdev_priv(dev);
  785. u32 stat = TSI_READ(TSI108_EC_INTSTAT);
  786. if (!(stat & TSI108_INT_ANY))
  787. return IRQ_NONE; /* Not our interrupt */
  788. stat &= ~TSI_READ(TSI108_EC_INTMASK);
  789. if (stat & (TSI108_INT_TXQUEUE0 | TSI108_INT_TXIDLE |
  790. TSI108_INT_TXERROR))
  791. tsi108_tx_int(dev);
  792. if (stat & (TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
  793. TSI108_INT_RXWAIT | TSI108_INT_RXOVERRUN |
  794. TSI108_INT_RXERROR))
  795. tsi108_rx_int(dev);
  796. if (stat & TSI108_INT_SFN) {
  797. if (net_ratelimit())
  798. printk(KERN_DEBUG "%s: SFN error\n", dev->name);
  799. TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_SFN);
  800. }
  801. if (stat & TSI108_INT_STATCARRY) {
  802. tsi108_stat_carry(dev);
  803. TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_STATCARRY);
  804. }
  805. return IRQ_HANDLED;
  806. }
  807. static void tsi108_stop_ethernet(struct net_device *dev)
  808. {
  809. struct tsi108_prv_data *data = netdev_priv(dev);
  810. int i = 1000;
  811. /* Disable all TX and RX queues ... */
  812. TSI_WRITE(TSI108_EC_TXCTRL, 0);
  813. TSI_WRITE(TSI108_EC_RXCTRL, 0);
  814. /* ...and wait for them to become idle */
  815. while(i--) {
  816. if(!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_ACTIVE))
  817. break;
  818. udelay(10);
  819. }
  820. i = 1000;
  821. while(i--){
  822. if(!(TSI_READ(TSI108_EC_RXSTAT) & TSI108_EC_RXSTAT_ACTIVE))
  823. return;
  824. udelay(10);
  825. }
  826. printk(KERN_ERR "%s function time out\n", __func__);
  827. }
  828. static void tsi108_reset_ether(struct tsi108_prv_data * data)
  829. {
  830. TSI_WRITE(TSI108_MAC_CFG1, TSI108_MAC_CFG1_SOFTRST);
  831. udelay(100);
  832. TSI_WRITE(TSI108_MAC_CFG1, 0);
  833. TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATRST);
  834. udelay(100);
  835. TSI_WRITE(TSI108_EC_PORTCTRL,
  836. TSI_READ(TSI108_EC_PORTCTRL) &
  837. ~TSI108_EC_PORTCTRL_STATRST);
  838. TSI_WRITE(TSI108_EC_TXCFG, TSI108_EC_TXCFG_RST);
  839. udelay(100);
  840. TSI_WRITE(TSI108_EC_TXCFG,
  841. TSI_READ(TSI108_EC_TXCFG) &
  842. ~TSI108_EC_TXCFG_RST);
  843. TSI_WRITE(TSI108_EC_RXCFG, TSI108_EC_RXCFG_RST);
  844. udelay(100);
  845. TSI_WRITE(TSI108_EC_RXCFG,
  846. TSI_READ(TSI108_EC_RXCFG) &
  847. ~TSI108_EC_RXCFG_RST);
  848. TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
  849. TSI_READ(TSI108_MAC_MII_MGMT_CFG) |
  850. TSI108_MAC_MII_MGMT_RST);
  851. udelay(100);
  852. TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
  853. (TSI_READ(TSI108_MAC_MII_MGMT_CFG) &
  854. ~(TSI108_MAC_MII_MGMT_RST |
  855. TSI108_MAC_MII_MGMT_CLK)) | 0x07);
  856. }
  857. static int tsi108_get_mac(struct net_device *dev)
  858. {
  859. struct tsi108_prv_data *data = netdev_priv(dev);
  860. u32 word1 = TSI_READ(TSI108_MAC_ADDR1);
  861. u32 word2 = TSI_READ(TSI108_MAC_ADDR2);
  862. u8 addr[ETH_ALEN];
  863. /* Note that the octets are reversed from what the manual says,
  864. * producing an even weirder ordering...
  865. */
  866. if (word2 == 0 && word1 == 0) {
  867. addr[0] = 0x00;
  868. addr[1] = 0x06;
  869. addr[2] = 0xd2;
  870. addr[3] = 0x00;
  871. addr[4] = 0x00;
  872. if (0x8 == data->phy)
  873. addr[5] = 0x01;
  874. else
  875. addr[5] = 0x02;
  876. eth_hw_addr_set(dev, addr);
  877. word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
  878. word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
  879. (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
  880. TSI_WRITE(TSI108_MAC_ADDR1, word1);
  881. TSI_WRITE(TSI108_MAC_ADDR2, word2);
  882. } else {
  883. addr[0] = (word2 >> 16) & 0xff;
  884. addr[1] = (word2 >> 24) & 0xff;
  885. addr[2] = (word1 >> 0) & 0xff;
  886. addr[3] = (word1 >> 8) & 0xff;
  887. addr[4] = (word1 >> 16) & 0xff;
  888. addr[5] = (word1 >> 24) & 0xff;
  889. eth_hw_addr_set(dev, addr);
  890. }
  891. if (!is_valid_ether_addr(dev->dev_addr)) {
  892. printk(KERN_ERR
  893. "%s: Invalid MAC address. word1: %08x, word2: %08x\n",
  894. dev->name, word1, word2);
  895. return -EINVAL;
  896. }
  897. return 0;
  898. }
  899. static int tsi108_set_mac(struct net_device *dev, void *addr)
  900. {
  901. struct tsi108_prv_data *data = netdev_priv(dev);
  902. u32 word1, word2;
  903. if (!is_valid_ether_addr(addr))
  904. return -EADDRNOTAVAIL;
  905. /* +2 is for the offset of the HW addr type */
  906. eth_hw_addr_set(dev, ((unsigned char *)addr) + 2);
  907. word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
  908. word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
  909. (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
  910. spin_lock_irq(&data->misclock);
  911. TSI_WRITE(TSI108_MAC_ADDR1, word1);
  912. TSI_WRITE(TSI108_MAC_ADDR2, word2);
  913. spin_lock(&data->txlock);
  914. if (data->txfree && data->link_up)
  915. netif_wake_queue(dev);
  916. spin_unlock(&data->txlock);
  917. spin_unlock_irq(&data->misclock);
  918. return 0;
  919. }
  920. /* Protected by dev->xmit_lock. */
  921. static void tsi108_set_rx_mode(struct net_device *dev)
  922. {
  923. struct tsi108_prv_data *data = netdev_priv(dev);
  924. u32 rxcfg = TSI_READ(TSI108_EC_RXCFG);
  925. if (dev->flags & IFF_PROMISC) {
  926. rxcfg &= ~(TSI108_EC_RXCFG_UC_HASH | TSI108_EC_RXCFG_MC_HASH);
  927. rxcfg |= TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE;
  928. goto out;
  929. }
  930. rxcfg &= ~(TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE);
  931. if (dev->flags & IFF_ALLMULTI || !netdev_mc_empty(dev)) {
  932. int i;
  933. struct netdev_hw_addr *ha;
  934. rxcfg |= TSI108_EC_RXCFG_MFE | TSI108_EC_RXCFG_MC_HASH;
  935. memset(data->mc_hash, 0, sizeof(data->mc_hash));
  936. netdev_for_each_mc_addr(ha, dev) {
  937. u32 hash, crc;
  938. crc = ether_crc(6, ha->addr);
  939. hash = crc >> 23;
  940. __set_bit(hash, &data->mc_hash[0]);
  941. }
  942. TSI_WRITE(TSI108_EC_HASHADDR,
  943. TSI108_EC_HASHADDR_AUTOINC |
  944. TSI108_EC_HASHADDR_MCAST);
  945. for (i = 0; i < 16; i++) {
  946. /* The manual says that the hardware may drop
  947. * back-to-back writes to the data register.
  948. */
  949. udelay(1);
  950. TSI_WRITE(TSI108_EC_HASHDATA,
  951. data->mc_hash[i]);
  952. }
  953. }
  954. out:
  955. TSI_WRITE(TSI108_EC_RXCFG, rxcfg);
  956. }
  957. static void tsi108_init_phy(struct net_device *dev)
  958. {
  959. struct tsi108_prv_data *data = netdev_priv(dev);
  960. u32 i = 0;
  961. u16 phyval = 0;
  962. unsigned long flags;
  963. spin_lock_irqsave(&phy_lock, flags);
  964. tsi108_write_mii(data, MII_BMCR, BMCR_RESET);
  965. while (--i) {
  966. if(!(tsi108_read_mii(data, MII_BMCR) & BMCR_RESET))
  967. break;
  968. udelay(10);
  969. }
  970. if (i == 0)
  971. printk(KERN_ERR "%s function time out\n", __func__);
  972. if (data->phy_type == TSI108_PHY_BCM54XX) {
  973. tsi108_write_mii(data, 0x09, 0x0300);
  974. tsi108_write_mii(data, 0x10, 0x1020);
  975. tsi108_write_mii(data, 0x1c, 0x8c00);
  976. }
  977. tsi108_write_mii(data,
  978. MII_BMCR,
  979. BMCR_ANENABLE | BMCR_ANRESTART);
  980. while (tsi108_read_mii(data, MII_BMCR) & BMCR_ANRESTART)
  981. cpu_relax();
  982. /* Set G/MII mode and receive clock select in TBI control #2. The
  983. * second port won't work if this isn't done, even though we don't
  984. * use TBI mode.
  985. */
  986. tsi108_write_tbi(data, 0x11, 0x30);
  987. /* FIXME: It seems to take more than 2 back-to-back reads to the
  988. * PHY_STAT register before the link up status bit is set.
  989. */
  990. data->link_up = 0;
  991. while (!((phyval = tsi108_read_mii(data, MII_BMSR)) &
  992. BMSR_LSTATUS)) {
  993. if (i++ > (MII_READ_DELAY / 10)) {
  994. break;
  995. }
  996. spin_unlock_irqrestore(&phy_lock, flags);
  997. msleep(10);
  998. spin_lock_irqsave(&phy_lock, flags);
  999. }
  1000. data->mii_if.supports_gmii = mii_check_gmii_support(&data->mii_if);
  1001. printk(KERN_DEBUG "PHY_STAT reg contains %08x\n", phyval);
  1002. data->phy_ok = 1;
  1003. data->init_media = 1;
  1004. spin_unlock_irqrestore(&phy_lock, flags);
  1005. }
  1006. static void tsi108_kill_phy(struct net_device *dev)
  1007. {
  1008. struct tsi108_prv_data *data = netdev_priv(dev);
  1009. unsigned long flags;
  1010. spin_lock_irqsave(&phy_lock, flags);
  1011. tsi108_write_mii(data, MII_BMCR, BMCR_PDOWN);
  1012. data->phy_ok = 0;
  1013. spin_unlock_irqrestore(&phy_lock, flags);
  1014. }
  1015. static int tsi108_open(struct net_device *dev)
  1016. {
  1017. int i;
  1018. struct tsi108_prv_data *data = netdev_priv(dev);
  1019. unsigned int rxring_size = TSI108_RXRING_LEN * sizeof(rx_desc);
  1020. unsigned int txring_size = TSI108_TXRING_LEN * sizeof(tx_desc);
  1021. i = request_irq(data->irq_num, tsi108_irq, 0, dev->name, dev);
  1022. if (i != 0) {
  1023. printk(KERN_ERR "tsi108_eth%d: Could not allocate IRQ%d.\n",
  1024. data->id, data->irq_num);
  1025. return i;
  1026. } else {
  1027. dev->irq = data->irq_num;
  1028. printk(KERN_NOTICE
  1029. "tsi108_open : Port %d Assigned IRQ %d to %s\n",
  1030. data->id, dev->irq, dev->name);
  1031. }
  1032. data->rxring = dma_alloc_coherent(&data->pdev->dev, rxring_size,
  1033. &data->rxdma, GFP_KERNEL);
  1034. if (!data->rxring) {
  1035. free_irq(data->irq_num, dev);
  1036. return -ENOMEM;
  1037. }
  1038. data->txring = dma_alloc_coherent(&data->pdev->dev, txring_size,
  1039. &data->txdma, GFP_KERNEL);
  1040. if (!data->txring) {
  1041. free_irq(data->irq_num, dev);
  1042. dma_free_coherent(&data->pdev->dev, rxring_size, data->rxring,
  1043. data->rxdma);
  1044. return -ENOMEM;
  1045. }
  1046. for (i = 0; i < TSI108_RXRING_LEN; i++) {
  1047. data->rxring[i].next0 = data->rxdma + (i + 1) * sizeof(rx_desc);
  1048. data->rxring[i].blen = TSI108_RXBUF_SIZE;
  1049. data->rxring[i].vlan = 0;
  1050. }
  1051. data->rxring[TSI108_RXRING_LEN - 1].next0 = data->rxdma;
  1052. data->rxtail = 0;
  1053. data->rxhead = 0;
  1054. for (i = 0; i < TSI108_RXRING_LEN; i++) {
  1055. struct sk_buff *skb;
  1056. skb = netdev_alloc_skb_ip_align(dev, TSI108_RXBUF_SIZE);
  1057. if (!skb) {
  1058. /* Bah. No memory for now, but maybe we'll get
  1059. * some more later.
  1060. * For now, we'll live with the smaller ring.
  1061. */
  1062. printk(KERN_WARNING
  1063. "%s: Could only allocate %d receive skb(s).\n",
  1064. dev->name, i);
  1065. data->rxhead = i;
  1066. break;
  1067. }
  1068. data->rxskbs[i] = skb;
  1069. data->rxring[i].buf0 = virt_to_phys(data->rxskbs[i]->data);
  1070. data->rxring[i].misc = TSI108_RX_OWN | TSI108_RX_INT;
  1071. }
  1072. data->rxfree = i;
  1073. TSI_WRITE(TSI108_EC_RXQ_PTRLOW, data->rxdma);
  1074. for (i = 0; i < TSI108_TXRING_LEN; i++) {
  1075. data->txring[i].next0 = data->txdma + (i + 1) * sizeof(tx_desc);
  1076. data->txring[i].misc = 0;
  1077. }
  1078. data->txring[TSI108_TXRING_LEN - 1].next0 = data->txdma;
  1079. data->txtail = 0;
  1080. data->txhead = 0;
  1081. data->txfree = TSI108_TXRING_LEN;
  1082. TSI_WRITE(TSI108_EC_TXQ_PTRLOW, data->txdma);
  1083. tsi108_init_phy(dev);
  1084. napi_enable(&data->napi);
  1085. timer_setup(&data->timer, tsi108_timed_checker, 0);
  1086. mod_timer(&data->timer, jiffies + 1);
  1087. tsi108_restart_rx(data, dev);
  1088. TSI_WRITE(TSI108_EC_INTSTAT, ~0);
  1089. TSI_WRITE(TSI108_EC_INTMASK,
  1090. ~(TSI108_INT_TXQUEUE0 | TSI108_INT_RXERROR |
  1091. TSI108_INT_RXTHRESH | TSI108_INT_RXQUEUE0 |
  1092. TSI108_INT_RXOVERRUN | TSI108_INT_RXWAIT |
  1093. TSI108_INT_SFN | TSI108_INT_STATCARRY));
  1094. TSI_WRITE(TSI108_MAC_CFG1,
  1095. TSI108_MAC_CFG1_RXEN | TSI108_MAC_CFG1_TXEN);
  1096. netif_start_queue(dev);
  1097. return 0;
  1098. }
  1099. static int tsi108_close(struct net_device *dev)
  1100. {
  1101. struct tsi108_prv_data *data = netdev_priv(dev);
  1102. netif_stop_queue(dev);
  1103. napi_disable(&data->napi);
  1104. del_timer_sync(&data->timer);
  1105. tsi108_stop_ethernet(dev);
  1106. tsi108_kill_phy(dev);
  1107. TSI_WRITE(TSI108_EC_INTMASK, ~0);
  1108. TSI_WRITE(TSI108_MAC_CFG1, 0);
  1109. /* Check for any pending TX packets, and drop them. */
  1110. while (!data->txfree || data->txhead != data->txtail) {
  1111. int tx = data->txtail;
  1112. struct sk_buff *skb;
  1113. skb = data->txskbs[tx];
  1114. data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
  1115. data->txfree++;
  1116. dev_kfree_skb(skb);
  1117. }
  1118. free_irq(data->irq_num, dev);
  1119. /* Discard the RX ring. */
  1120. while (data->rxfree) {
  1121. int rx = data->rxtail;
  1122. struct sk_buff *skb;
  1123. skb = data->rxskbs[rx];
  1124. data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
  1125. data->rxfree--;
  1126. dev_kfree_skb(skb);
  1127. }
  1128. dma_free_coherent(&data->pdev->dev,
  1129. TSI108_RXRING_LEN * sizeof(rx_desc),
  1130. data->rxring, data->rxdma);
  1131. dma_free_coherent(&data->pdev->dev,
  1132. TSI108_TXRING_LEN * sizeof(tx_desc),
  1133. data->txring, data->txdma);
  1134. return 0;
  1135. }
  1136. static void tsi108_init_mac(struct net_device *dev)
  1137. {
  1138. struct tsi108_prv_data *data = netdev_priv(dev);
  1139. TSI_WRITE(TSI108_MAC_CFG2, TSI108_MAC_CFG2_DFLT_PREAMBLE |
  1140. TSI108_MAC_CFG2_PADCRC);
  1141. TSI_WRITE(TSI108_EC_TXTHRESH,
  1142. (192 << TSI108_EC_TXTHRESH_STARTFILL) |
  1143. (192 << TSI108_EC_TXTHRESH_STOPFILL));
  1144. TSI_WRITE(TSI108_STAT_CARRYMASK1,
  1145. ~(TSI108_STAT_CARRY1_RXBYTES |
  1146. TSI108_STAT_CARRY1_RXPKTS |
  1147. TSI108_STAT_CARRY1_RXFCS |
  1148. TSI108_STAT_CARRY1_RXMCAST |
  1149. TSI108_STAT_CARRY1_RXALIGN |
  1150. TSI108_STAT_CARRY1_RXLENGTH |
  1151. TSI108_STAT_CARRY1_RXRUNT |
  1152. TSI108_STAT_CARRY1_RXJUMBO |
  1153. TSI108_STAT_CARRY1_RXFRAG |
  1154. TSI108_STAT_CARRY1_RXJABBER |
  1155. TSI108_STAT_CARRY1_RXDROP));
  1156. TSI_WRITE(TSI108_STAT_CARRYMASK2,
  1157. ~(TSI108_STAT_CARRY2_TXBYTES |
  1158. TSI108_STAT_CARRY2_TXPKTS |
  1159. TSI108_STAT_CARRY2_TXEXDEF |
  1160. TSI108_STAT_CARRY2_TXEXCOL |
  1161. TSI108_STAT_CARRY2_TXTCOL |
  1162. TSI108_STAT_CARRY2_TXPAUSE));
  1163. TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATEN);
  1164. TSI_WRITE(TSI108_MAC_CFG1, 0);
  1165. TSI_WRITE(TSI108_EC_RXCFG,
  1166. TSI108_EC_RXCFG_SE | TSI108_EC_RXCFG_BFE);
  1167. TSI_WRITE(TSI108_EC_TXQ_CFG, TSI108_EC_TXQ_CFG_DESC_INT |
  1168. TSI108_EC_TXQ_CFG_EOQ_OWN_INT |
  1169. TSI108_EC_TXQ_CFG_WSWP | (TSI108_PBM_PORT <<
  1170. TSI108_EC_TXQ_CFG_SFNPORT));
  1171. TSI_WRITE(TSI108_EC_RXQ_CFG, TSI108_EC_RXQ_CFG_DESC_INT |
  1172. TSI108_EC_RXQ_CFG_EOQ_OWN_INT |
  1173. TSI108_EC_RXQ_CFG_WSWP | (TSI108_PBM_PORT <<
  1174. TSI108_EC_RXQ_CFG_SFNPORT));
  1175. TSI_WRITE(TSI108_EC_TXQ_BUFCFG,
  1176. TSI108_EC_TXQ_BUFCFG_BURST256 |
  1177. TSI108_EC_TXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
  1178. TSI108_EC_TXQ_BUFCFG_SFNPORT));
  1179. TSI_WRITE(TSI108_EC_RXQ_BUFCFG,
  1180. TSI108_EC_RXQ_BUFCFG_BURST256 |
  1181. TSI108_EC_RXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
  1182. TSI108_EC_RXQ_BUFCFG_SFNPORT));
  1183. TSI_WRITE(TSI108_EC_INTMASK, ~0);
  1184. }
  1185. static int tsi108_get_link_ksettings(struct net_device *dev,
  1186. struct ethtool_link_ksettings *cmd)
  1187. {
  1188. struct tsi108_prv_data *data = netdev_priv(dev);
  1189. unsigned long flags;
  1190. spin_lock_irqsave(&data->txlock, flags);
  1191. mii_ethtool_get_link_ksettings(&data->mii_if, cmd);
  1192. spin_unlock_irqrestore(&data->txlock, flags);
  1193. return 0;
  1194. }
  1195. static int tsi108_set_link_ksettings(struct net_device *dev,
  1196. const struct ethtool_link_ksettings *cmd)
  1197. {
  1198. struct tsi108_prv_data *data = netdev_priv(dev);
  1199. unsigned long flags;
  1200. int rc;
  1201. spin_lock_irqsave(&data->txlock, flags);
  1202. rc = mii_ethtool_set_link_ksettings(&data->mii_if, cmd);
  1203. spin_unlock_irqrestore(&data->txlock, flags);
  1204. return rc;
  1205. }
  1206. static int tsi108_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  1207. {
  1208. struct tsi108_prv_data *data = netdev_priv(dev);
  1209. if (!netif_running(dev))
  1210. return -EINVAL;
  1211. return generic_mii_ioctl(&data->mii_if, if_mii(rq), cmd, NULL);
  1212. }
  1213. static const struct ethtool_ops tsi108_ethtool_ops = {
  1214. .get_link = ethtool_op_get_link,
  1215. .get_link_ksettings = tsi108_get_link_ksettings,
  1216. .set_link_ksettings = tsi108_set_link_ksettings,
  1217. };
  1218. static const struct net_device_ops tsi108_netdev_ops = {
  1219. .ndo_open = tsi108_open,
  1220. .ndo_stop = tsi108_close,
  1221. .ndo_start_xmit = tsi108_send_packet,
  1222. .ndo_set_rx_mode = tsi108_set_rx_mode,
  1223. .ndo_get_stats = tsi108_get_stats,
  1224. .ndo_eth_ioctl = tsi108_do_ioctl,
  1225. .ndo_set_mac_address = tsi108_set_mac,
  1226. .ndo_validate_addr = eth_validate_addr,
  1227. };
  1228. static int
  1229. tsi108_init_one(struct platform_device *pdev)
  1230. {
  1231. struct net_device *dev = NULL;
  1232. struct tsi108_prv_data *data = NULL;
  1233. hw_info *einfo;
  1234. int err = 0;
  1235. einfo = dev_get_platdata(&pdev->dev);
  1236. if (NULL == einfo) {
  1237. printk(KERN_ERR "tsi-eth %d: Missing additional data!\n",
  1238. pdev->id);
  1239. return -ENODEV;
  1240. }
  1241. /* Create an ethernet device instance */
  1242. dev = alloc_etherdev(sizeof(struct tsi108_prv_data));
  1243. if (!dev)
  1244. return -ENOMEM;
  1245. printk("tsi108_eth%d: probe...\n", pdev->id);
  1246. data = netdev_priv(dev);
  1247. data->dev = dev;
  1248. data->pdev = pdev;
  1249. pr_debug("tsi108_eth%d:regs:phyresgs:phy:irq_num=0x%x:0x%x:0x%x:0x%x\n",
  1250. pdev->id, einfo->regs, einfo->phyregs,
  1251. einfo->phy, einfo->irq_num);
  1252. data->regs = ioremap(einfo->regs, 0x400);
  1253. if (NULL == data->regs) {
  1254. err = -ENOMEM;
  1255. goto regs_fail;
  1256. }
  1257. data->phyregs = ioremap(einfo->phyregs, 0x400);
  1258. if (NULL == data->phyregs) {
  1259. err = -ENOMEM;
  1260. goto phyregs_fail;
  1261. }
  1262. /* MII setup */
  1263. data->mii_if.dev = dev;
  1264. data->mii_if.mdio_read = tsi108_mdio_read;
  1265. data->mii_if.mdio_write = tsi108_mdio_write;
  1266. data->mii_if.phy_id = einfo->phy;
  1267. data->mii_if.phy_id_mask = 0x1f;
  1268. data->mii_if.reg_num_mask = 0x1f;
  1269. data->phy = einfo->phy;
  1270. data->phy_type = einfo->phy_type;
  1271. data->irq_num = einfo->irq_num;
  1272. data->id = pdev->id;
  1273. netif_napi_add(dev, &data->napi, tsi108_poll);
  1274. dev->netdev_ops = &tsi108_netdev_ops;
  1275. dev->ethtool_ops = &tsi108_ethtool_ops;
  1276. /* Apparently, the Linux networking code won't use scatter-gather
  1277. * if the hardware doesn't do checksums. However, it's faster
  1278. * to checksum in place and use SG, as (among other reasons)
  1279. * the cache won't be dirtied (which then has to be flushed
  1280. * before DMA). The checksumming is done by the driver (via
  1281. * a new function skb_csum_dev() in net/core/skbuff.c).
  1282. */
  1283. dev->features = NETIF_F_HIGHDMA;
  1284. spin_lock_init(&data->txlock);
  1285. spin_lock_init(&data->misclock);
  1286. tsi108_reset_ether(data);
  1287. tsi108_kill_phy(dev);
  1288. if ((err = tsi108_get_mac(dev)) != 0) {
  1289. printk(KERN_ERR "%s: Invalid MAC address. Please correct.\n",
  1290. dev->name);
  1291. goto register_fail;
  1292. }
  1293. tsi108_init_mac(dev);
  1294. err = register_netdev(dev);
  1295. if (err) {
  1296. printk(KERN_ERR "%s: Cannot register net device, aborting.\n",
  1297. dev->name);
  1298. goto register_fail;
  1299. }
  1300. platform_set_drvdata(pdev, dev);
  1301. printk(KERN_INFO "%s: Tsi108 Gigabit Ethernet, MAC: %pM\n",
  1302. dev->name, dev->dev_addr);
  1303. #ifdef DEBUG
  1304. data->msg_enable = DEBUG;
  1305. dump_eth_one(dev);
  1306. #endif
  1307. return 0;
  1308. register_fail:
  1309. iounmap(data->phyregs);
  1310. phyregs_fail:
  1311. iounmap(data->regs);
  1312. regs_fail:
  1313. free_netdev(dev);
  1314. return err;
  1315. }
  1316. /* There's no way to either get interrupts from the PHY when
  1317. * something changes, or to have the Tsi108 automatically communicate
  1318. * with the PHY to reconfigure itself.
  1319. *
  1320. * Thus, we have to do it using a timer.
  1321. */
  1322. static void tsi108_timed_checker(struct timer_list *t)
  1323. {
  1324. struct tsi108_prv_data *data = from_timer(data, t, timer);
  1325. struct net_device *dev = data->dev;
  1326. tsi108_check_phy(dev);
  1327. tsi108_check_rxring(dev);
  1328. mod_timer(&data->timer, jiffies + CHECK_PHY_INTERVAL);
  1329. }
  1330. static int tsi108_ether_remove(struct platform_device *pdev)
  1331. {
  1332. struct net_device *dev = platform_get_drvdata(pdev);
  1333. struct tsi108_prv_data *priv = netdev_priv(dev);
  1334. unregister_netdev(dev);
  1335. tsi108_stop_ethernet(dev);
  1336. iounmap(priv->regs);
  1337. iounmap(priv->phyregs);
  1338. free_netdev(dev);
  1339. return 0;
  1340. }
  1341. /* Structure for a device driver */
  1342. static struct platform_driver tsi_eth_driver = {
  1343. .probe = tsi108_init_one,
  1344. .remove = tsi108_ether_remove,
  1345. .driver = {
  1346. .name = "tsi-ethernet",
  1347. },
  1348. };
  1349. module_platform_driver(tsi_eth_driver);
  1350. MODULE_AUTHOR("Tundra Semiconductor Corporation");
  1351. MODULE_DESCRIPTION("Tsi108 Gigabit Ethernet driver");
  1352. MODULE_LICENSE("GPL");
  1353. MODULE_ALIAS("platform:tsi-ethernet");