ether1.c 27 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * linux/drivers/acorn/net/ether1.c
  4. *
  5. * Copyright (C) 1996-2000 Russell King
  6. *
  7. * Acorn ether1 driver (82586 chip) for Acorn machines
  8. *
  9. * We basically keep two queues in the cards memory - one for transmit
  10. * and one for receive. Each has a head and a tail. The head is where
  11. * we/the chip adds packets to be transmitted/received, and the tail
  12. * is where the transmitter has got to/where the receiver will stop.
  13. * Both of these queues are circular, and since the chip is running
  14. * all the time, we have to be careful when we modify the pointers etc
  15. * so that the buffer memory contents is valid all the time.
  16. *
  17. * Change log:
  18. * 1.00 RMK Released
  19. * 1.01 RMK 19/03/1996 Transfers the last odd byte onto/off of the card now.
  20. * 1.02 RMK 25/05/1997 Added code to restart RU if it goes not ready
  21. * 1.03 RMK 14/09/1997 Cleaned up the handling of a reset during the TX interrupt.
  22. * Should prevent lockup.
  23. * 1.04 RMK 17/09/1997 Added more info when initialisation of chip goes wrong.
  24. * TDR now only reports failure when chip reports non-zero
  25. * TDR time-distance.
  26. * 1.05 RMK 31/12/1997 Removed calls to dev_tint for 2.1
  27. * 1.06 RMK 10/02/2000 Updated for 2.3.43
  28. * 1.07 RMK 13/05/2000 Updated for 2.3.99-pre8
  29. */
  30. #include <linux/module.h>
  31. #include <linux/kernel.h>
  32. #include <linux/types.h>
  33. #include <linux/fcntl.h>
  34. #include <linux/interrupt.h>
  35. #include <linux/ioport.h>
  36. #include <linux/in.h>
  37. #include <linux/slab.h>
  38. #include <linux/string.h>
  39. #include <linux/errno.h>
  40. #include <linux/device.h>
  41. #include <linux/init.h>
  42. #include <linux/netdevice.h>
  43. #include <linux/etherdevice.h>
  44. #include <linux/skbuff.h>
  45. #include <linux/bitops.h>
  46. #include <asm/io.h>
  47. #include <asm/dma.h>
  48. #include <asm/ecard.h>
  49. #define __ETHER1_C
  50. #include "ether1.h"
  51. static unsigned int net_debug = NET_DEBUG;
  52. #define BUFFER_SIZE 0x10000
  53. #define TX_AREA_START 0x00100
  54. #define TX_AREA_END 0x05000
  55. #define RX_AREA_START 0x05000
  56. #define RX_AREA_END 0x0fc00
  57. static int ether1_open(struct net_device *dev);
  58. static netdev_tx_t ether1_sendpacket(struct sk_buff *skb,
  59. struct net_device *dev);
  60. static irqreturn_t ether1_interrupt(int irq, void *dev_id);
  61. static int ether1_close(struct net_device *dev);
  62. static void ether1_setmulticastlist(struct net_device *dev);
  63. static void ether1_timeout(struct net_device *dev, unsigned int txqueue);
  64. /* ------------------------------------------------------------------------- */
  65. static char version[] = "ether1 ethernet driver (c) 2000 Russell King v1.07\n";
  66. #define BUS_16 16
  67. #define BUS_8 8
  68. /* ------------------------------------------------------------------------- */
  69. #define DISABLEIRQS 1
  70. #define NORMALIRQS 0
  71. #define ether1_readw(dev, addr, type, offset, svflgs) ether1_inw_p (dev, addr + (int)(&((type *)0)->offset), svflgs)
  72. #define ether1_writew(dev, val, addr, type, offset, svflgs) ether1_outw_p (dev, val, addr + (int)(&((type *)0)->offset), svflgs)
  73. static inline unsigned short
  74. ether1_inw_p (struct net_device *dev, int addr, int svflgs)
  75. {
  76. unsigned long flags;
  77. unsigned short ret;
  78. if (svflgs)
  79. local_irq_save (flags);
  80. writeb(addr >> 12, REG_PAGE);
  81. ret = readw(ETHER1_RAM + ((addr & 4095) << 1));
  82. if (svflgs)
  83. local_irq_restore (flags);
  84. return ret;
  85. }
  86. static inline void
  87. ether1_outw_p (struct net_device *dev, unsigned short val, int addr, int svflgs)
  88. {
  89. unsigned long flags;
  90. if (svflgs)
  91. local_irq_save (flags);
  92. writeb(addr >> 12, REG_PAGE);
  93. writew(val, ETHER1_RAM + ((addr & 4095) << 1));
  94. if (svflgs)
  95. local_irq_restore (flags);
  96. }
  97. /*
  98. * Some inline assembler to allow fast transfers on to/off of the card.
  99. * Since this driver depends on some features presented by the ARM
  100. * specific architecture, and that you can't configure this driver
  101. * without specifying ARM mode, this is not a problem.
  102. *
  103. * This routine is essentially an optimised memcpy from the card's
  104. * onboard RAM to kernel memory.
  105. */
  106. static void
  107. ether1_writebuffer (struct net_device *dev, void *data, unsigned int start, unsigned int length)
  108. {
  109. unsigned int page, thislen, offset;
  110. void __iomem *addr;
  111. offset = start & 4095;
  112. page = start >> 12;
  113. addr = ETHER1_RAM + (offset << 1);
  114. if (offset + length > 4096)
  115. thislen = 4096 - offset;
  116. else
  117. thislen = length;
  118. do {
  119. int used;
  120. writeb(page, REG_PAGE);
  121. length -= thislen;
  122. __asm__ __volatile__(
  123. "subs %3, %3, #2\n\
  124. bmi 2f\n\
  125. 1: ldr %0, [%1], #2\n\
  126. mov %0, %0, lsl #16\n\
  127. orr %0, %0, %0, lsr #16\n\
  128. str %0, [%2], #4\n\
  129. subs %3, %3, #2\n\
  130. bmi 2f\n\
  131. ldr %0, [%1], #2\n\
  132. mov %0, %0, lsl #16\n\
  133. orr %0, %0, %0, lsr #16\n\
  134. str %0, [%2], #4\n\
  135. subs %3, %3, #2\n\
  136. bmi 2f\n\
  137. ldr %0, [%1], #2\n\
  138. mov %0, %0, lsl #16\n\
  139. orr %0, %0, %0, lsr #16\n\
  140. str %0, [%2], #4\n\
  141. subs %3, %3, #2\n\
  142. bmi 2f\n\
  143. ldr %0, [%1], #2\n\
  144. mov %0, %0, lsl #16\n\
  145. orr %0, %0, %0, lsr #16\n\
  146. str %0, [%2], #4\n\
  147. subs %3, %3, #2\n\
  148. bpl 1b\n\
  149. 2: adds %3, %3, #1\n\
  150. ldreqb %0, [%1]\n\
  151. streqb %0, [%2]"
  152. : "=&r" (used), "=&r" (data)
  153. : "r" (addr), "r" (thislen), "1" (data));
  154. addr = ETHER1_RAM;
  155. thislen = length;
  156. if (thislen > 4096)
  157. thislen = 4096;
  158. page++;
  159. } while (thislen);
  160. }
  161. static void
  162. ether1_readbuffer (struct net_device *dev, void *data, unsigned int start, unsigned int length)
  163. {
  164. unsigned int page, thislen, offset;
  165. void __iomem *addr;
  166. offset = start & 4095;
  167. page = start >> 12;
  168. addr = ETHER1_RAM + (offset << 1);
  169. if (offset + length > 4096)
  170. thislen = 4096 - offset;
  171. else
  172. thislen = length;
  173. do {
  174. int used;
  175. writeb(page, REG_PAGE);
  176. length -= thislen;
  177. __asm__ __volatile__(
  178. "subs %3, %3, #2\n\
  179. bmi 2f\n\
  180. 1: ldr %0, [%2], #4\n\
  181. strb %0, [%1], #1\n\
  182. mov %0, %0, lsr #8\n\
  183. strb %0, [%1], #1\n\
  184. subs %3, %3, #2\n\
  185. bmi 2f\n\
  186. ldr %0, [%2], #4\n\
  187. strb %0, [%1], #1\n\
  188. mov %0, %0, lsr #8\n\
  189. strb %0, [%1], #1\n\
  190. subs %3, %3, #2\n\
  191. bmi 2f\n\
  192. ldr %0, [%2], #4\n\
  193. strb %0, [%1], #1\n\
  194. mov %0, %0, lsr #8\n\
  195. strb %0, [%1], #1\n\
  196. subs %3, %3, #2\n\
  197. bmi 2f\n\
  198. ldr %0, [%2], #4\n\
  199. strb %0, [%1], #1\n\
  200. mov %0, %0, lsr #8\n\
  201. strb %0, [%1], #1\n\
  202. subs %3, %3, #2\n\
  203. bpl 1b\n\
  204. 2: adds %3, %3, #1\n\
  205. ldreqb %0, [%2]\n\
  206. streqb %0, [%1]"
  207. : "=&r" (used), "=&r" (data)
  208. : "r" (addr), "r" (thislen), "1" (data));
  209. addr = ETHER1_RAM;
  210. thislen = length;
  211. if (thislen > 4096)
  212. thislen = 4096;
  213. page++;
  214. } while (thislen);
  215. }
  216. static int
  217. ether1_ramtest(struct net_device *dev, unsigned char byte)
  218. {
  219. unsigned char *buffer = kmalloc (BUFFER_SIZE, GFP_KERNEL);
  220. int i, ret = BUFFER_SIZE;
  221. int max_errors = 15;
  222. int bad = -1;
  223. int bad_start = 0;
  224. if (!buffer)
  225. return 1;
  226. memset (buffer, byte, BUFFER_SIZE);
  227. ether1_writebuffer (dev, buffer, 0, BUFFER_SIZE);
  228. memset (buffer, byte ^ 0xff, BUFFER_SIZE);
  229. ether1_readbuffer (dev, buffer, 0, BUFFER_SIZE);
  230. for (i = 0; i < BUFFER_SIZE; i++) {
  231. if (buffer[i] != byte) {
  232. if (max_errors >= 0 && bad != buffer[i]) {
  233. if (bad != -1)
  234. printk ("\n");
  235. printk (KERN_CRIT "%s: RAM failed with (%02X instead of %02X) at 0x%04X",
  236. dev->name, buffer[i], byte, i);
  237. ret = -ENODEV;
  238. max_errors --;
  239. bad = buffer[i];
  240. bad_start = i;
  241. }
  242. } else {
  243. if (bad != -1) {
  244. if (bad_start == i - 1)
  245. printk ("\n");
  246. else
  247. printk (" - 0x%04X\n", i - 1);
  248. bad = -1;
  249. }
  250. }
  251. }
  252. if (bad != -1)
  253. printk (" - 0x%04X\n", BUFFER_SIZE);
  254. kfree (buffer);
  255. return ret;
  256. }
  257. static int
  258. ether1_reset (struct net_device *dev)
  259. {
  260. writeb(CTRL_RST|CTRL_ACK, REG_CONTROL);
  261. return BUS_16;
  262. }
  263. static int
  264. ether1_init_2(struct net_device *dev)
  265. {
  266. int i;
  267. dev->mem_start = 0;
  268. i = ether1_ramtest (dev, 0x5a);
  269. if (i > 0)
  270. i = ether1_ramtest (dev, 0x1e);
  271. if (i <= 0)
  272. return -ENODEV;
  273. dev->mem_end = i;
  274. return 0;
  275. }
  276. /*
  277. * These are the structures that are loaded into the ether RAM card to
  278. * initialise the 82586
  279. */
  280. /* at 0x0100 */
  281. #define NOP_ADDR (TX_AREA_START)
  282. #define NOP_SIZE (0x06)
  283. static nop_t init_nop = {
  284. 0,
  285. CMD_NOP,
  286. NOP_ADDR
  287. };
  288. /* at 0x003a */
  289. #define TDR_ADDR (0x003a)
  290. #define TDR_SIZE (0x08)
  291. static tdr_t init_tdr = {
  292. 0,
  293. CMD_TDR | CMD_INTR,
  294. NOP_ADDR,
  295. 0
  296. };
  297. /* at 0x002e */
  298. #define MC_ADDR (0x002e)
  299. #define MC_SIZE (0x0c)
  300. static mc_t init_mc = {
  301. 0,
  302. CMD_SETMULTICAST,
  303. TDR_ADDR,
  304. 0,
  305. { { 0, } }
  306. };
  307. /* at 0x0022 */
  308. #define SA_ADDR (0x0022)
  309. #define SA_SIZE (0x0c)
  310. static sa_t init_sa = {
  311. 0,
  312. CMD_SETADDRESS,
  313. MC_ADDR,
  314. { 0, }
  315. };
  316. /* at 0x0010 */
  317. #define CFG_ADDR (0x0010)
  318. #define CFG_SIZE (0x12)
  319. static cfg_t init_cfg = {
  320. 0,
  321. CMD_CONFIG,
  322. SA_ADDR,
  323. 8,
  324. 8,
  325. CFG8_SRDY,
  326. CFG9_PREAMB8 | CFG9_ADDRLENBUF | CFG9_ADDRLEN(6),
  327. 0,
  328. 0x60,
  329. 0,
  330. CFG13_RETRY(15) | CFG13_SLOTH(2),
  331. 0,
  332. };
  333. /* at 0x0000 */
  334. #define SCB_ADDR (0x0000)
  335. #define SCB_SIZE (0x10)
  336. static scb_t init_scb = {
  337. 0,
  338. SCB_CMDACKRNR | SCB_CMDACKCNA | SCB_CMDACKFR | SCB_CMDACKCX,
  339. CFG_ADDR,
  340. RX_AREA_START,
  341. 0,
  342. 0,
  343. 0,
  344. 0
  345. };
  346. /* at 0xffee */
  347. #define ISCP_ADDR (0xffee)
  348. #define ISCP_SIZE (0x08)
  349. static iscp_t init_iscp = {
  350. 1,
  351. SCB_ADDR,
  352. 0x0000,
  353. 0x0000
  354. };
  355. /* at 0xfff6 */
  356. #define SCP_ADDR (0xfff6)
  357. #define SCP_SIZE (0x0a)
  358. static scp_t init_scp = {
  359. SCP_SY_16BBUS,
  360. { 0, 0 },
  361. ISCP_ADDR,
  362. 0
  363. };
  364. #define RFD_SIZE (0x16)
  365. static rfd_t init_rfd = {
  366. 0,
  367. 0,
  368. 0,
  369. 0,
  370. { 0, },
  371. { 0, },
  372. 0
  373. };
  374. #define RBD_SIZE (0x0a)
  375. static rbd_t init_rbd = {
  376. 0,
  377. 0,
  378. 0,
  379. 0,
  380. ETH_FRAME_LEN + 8
  381. };
  382. #define TX_SIZE (0x08)
  383. #define TBD_SIZE (0x08)
  384. static int
  385. ether1_init_for_open (struct net_device *dev)
  386. {
  387. int i, status, addr, next, next2;
  388. int failures = 0;
  389. unsigned long timeout;
  390. writeb(CTRL_RST|CTRL_ACK, REG_CONTROL);
  391. for (i = 0; i < 6; i++)
  392. init_sa.sa_addr[i] = dev->dev_addr[i];
  393. /* load data structures into ether1 RAM */
  394. ether1_writebuffer (dev, &init_scp, SCP_ADDR, SCP_SIZE);
  395. ether1_writebuffer (dev, &init_iscp, ISCP_ADDR, ISCP_SIZE);
  396. ether1_writebuffer (dev, &init_scb, SCB_ADDR, SCB_SIZE);
  397. ether1_writebuffer (dev, &init_cfg, CFG_ADDR, CFG_SIZE);
  398. ether1_writebuffer (dev, &init_sa, SA_ADDR, SA_SIZE);
  399. ether1_writebuffer (dev, &init_mc, MC_ADDR, MC_SIZE);
  400. ether1_writebuffer (dev, &init_tdr, TDR_ADDR, TDR_SIZE);
  401. ether1_writebuffer (dev, &init_nop, NOP_ADDR, NOP_SIZE);
  402. if (ether1_readw(dev, CFG_ADDR, cfg_t, cfg_command, NORMALIRQS) != CMD_CONFIG) {
  403. printk (KERN_ERR "%s: detected either RAM fault or compiler bug\n",
  404. dev->name);
  405. return 1;
  406. }
  407. /*
  408. * setup circularly linked list of { rfd, rbd, buffer }, with
  409. * all rfds circularly linked, rbds circularly linked.
  410. * First rfd is linked to scp, first rbd is linked to first
  411. * rfd. Last rbd has a suspend command.
  412. */
  413. addr = RX_AREA_START;
  414. do {
  415. next = addr + RFD_SIZE + RBD_SIZE + ETH_FRAME_LEN + 10;
  416. next2 = next + RFD_SIZE + RBD_SIZE + ETH_FRAME_LEN + 10;
  417. if (next2 >= RX_AREA_END) {
  418. next = RX_AREA_START;
  419. init_rfd.rfd_command = RFD_CMDEL | RFD_CMDSUSPEND;
  420. priv(dev)->rx_tail = addr;
  421. } else
  422. init_rfd.rfd_command = 0;
  423. if (addr == RX_AREA_START)
  424. init_rfd.rfd_rbdoffset = addr + RFD_SIZE;
  425. else
  426. init_rfd.rfd_rbdoffset = 0;
  427. init_rfd.rfd_link = next;
  428. init_rbd.rbd_link = next + RFD_SIZE;
  429. init_rbd.rbd_bufl = addr + RFD_SIZE + RBD_SIZE;
  430. ether1_writebuffer (dev, &init_rfd, addr, RFD_SIZE);
  431. ether1_writebuffer (dev, &init_rbd, addr + RFD_SIZE, RBD_SIZE);
  432. addr = next;
  433. } while (next2 < RX_AREA_END);
  434. priv(dev)->tx_link = NOP_ADDR;
  435. priv(dev)->tx_head = NOP_ADDR + NOP_SIZE;
  436. priv(dev)->tx_tail = TDR_ADDR;
  437. priv(dev)->rx_head = RX_AREA_START;
  438. /* release reset & give 586 a prod */
  439. priv(dev)->resetting = 1;
  440. priv(dev)->initialising = 1;
  441. writeb(CTRL_RST, REG_CONTROL);
  442. writeb(0, REG_CONTROL);
  443. writeb(CTRL_CA, REG_CONTROL);
  444. /* 586 should now unset iscp.busy */
  445. timeout = jiffies + HZ/2;
  446. while (ether1_readw(dev, ISCP_ADDR, iscp_t, iscp_busy, DISABLEIRQS) == 1) {
  447. if (time_after(jiffies, timeout)) {
  448. printk (KERN_WARNING "%s: can't initialise 82586: iscp is busy\n", dev->name);
  449. return 1;
  450. }
  451. }
  452. /* check status of commands that we issued */
  453. timeout += HZ/10;
  454. while (((status = ether1_readw(dev, CFG_ADDR, cfg_t, cfg_status, DISABLEIRQS))
  455. & STAT_COMPLETE) == 0) {
  456. if (time_after(jiffies, timeout))
  457. break;
  458. }
  459. if ((status & (STAT_COMPLETE | STAT_OK)) != (STAT_COMPLETE | STAT_OK)) {
  460. printk (KERN_WARNING "%s: can't initialise 82586: config status %04X\n", dev->name, status);
  461. printk (KERN_DEBUG "%s: SCB=[STS=%04X CMD=%04X CBL=%04X RFA=%04X]\n", dev->name,
  462. ether1_readw(dev, SCB_ADDR, scb_t, scb_status, NORMALIRQS),
  463. ether1_readw(dev, SCB_ADDR, scb_t, scb_command, NORMALIRQS),
  464. ether1_readw(dev, SCB_ADDR, scb_t, scb_cbl_offset, NORMALIRQS),
  465. ether1_readw(dev, SCB_ADDR, scb_t, scb_rfa_offset, NORMALIRQS));
  466. failures += 1;
  467. }
  468. timeout += HZ/10;
  469. while (((status = ether1_readw(dev, SA_ADDR, sa_t, sa_status, DISABLEIRQS))
  470. & STAT_COMPLETE) == 0) {
  471. if (time_after(jiffies, timeout))
  472. break;
  473. }
  474. if ((status & (STAT_COMPLETE | STAT_OK)) != (STAT_COMPLETE | STAT_OK)) {
  475. printk (KERN_WARNING "%s: can't initialise 82586: set address status %04X\n", dev->name, status);
  476. printk (KERN_DEBUG "%s: SCB=[STS=%04X CMD=%04X CBL=%04X RFA=%04X]\n", dev->name,
  477. ether1_readw(dev, SCB_ADDR, scb_t, scb_status, NORMALIRQS),
  478. ether1_readw(dev, SCB_ADDR, scb_t, scb_command, NORMALIRQS),
  479. ether1_readw(dev, SCB_ADDR, scb_t, scb_cbl_offset, NORMALIRQS),
  480. ether1_readw(dev, SCB_ADDR, scb_t, scb_rfa_offset, NORMALIRQS));
  481. failures += 1;
  482. }
  483. timeout += HZ/10;
  484. while (((status = ether1_readw(dev, MC_ADDR, mc_t, mc_status, DISABLEIRQS))
  485. & STAT_COMPLETE) == 0) {
  486. if (time_after(jiffies, timeout))
  487. break;
  488. }
  489. if ((status & (STAT_COMPLETE | STAT_OK)) != (STAT_COMPLETE | STAT_OK)) {
  490. printk (KERN_WARNING "%s: can't initialise 82586: set multicast status %04X\n", dev->name, status);
  491. printk (KERN_DEBUG "%s: SCB=[STS=%04X CMD=%04X CBL=%04X RFA=%04X]\n", dev->name,
  492. ether1_readw(dev, SCB_ADDR, scb_t, scb_status, NORMALIRQS),
  493. ether1_readw(dev, SCB_ADDR, scb_t, scb_command, NORMALIRQS),
  494. ether1_readw(dev, SCB_ADDR, scb_t, scb_cbl_offset, NORMALIRQS),
  495. ether1_readw(dev, SCB_ADDR, scb_t, scb_rfa_offset, NORMALIRQS));
  496. failures += 1;
  497. }
  498. timeout += HZ;
  499. while (((status = ether1_readw(dev, TDR_ADDR, tdr_t, tdr_status, DISABLEIRQS))
  500. & STAT_COMPLETE) == 0) {
  501. if (time_after(jiffies, timeout))
  502. break;
  503. }
  504. if ((status & (STAT_COMPLETE | STAT_OK)) != (STAT_COMPLETE | STAT_OK)) {
  505. printk (KERN_WARNING "%s: can't tdr (ignored)\n", dev->name);
  506. printk (KERN_DEBUG "%s: SCB=[STS=%04X CMD=%04X CBL=%04X RFA=%04X]\n", dev->name,
  507. ether1_readw(dev, SCB_ADDR, scb_t, scb_status, NORMALIRQS),
  508. ether1_readw(dev, SCB_ADDR, scb_t, scb_command, NORMALIRQS),
  509. ether1_readw(dev, SCB_ADDR, scb_t, scb_cbl_offset, NORMALIRQS),
  510. ether1_readw(dev, SCB_ADDR, scb_t, scb_rfa_offset, NORMALIRQS));
  511. } else {
  512. status = ether1_readw(dev, TDR_ADDR, tdr_t, tdr_result, DISABLEIRQS);
  513. if (status & TDR_XCVRPROB)
  514. printk (KERN_WARNING "%s: i/f failed tdr: transceiver problem\n", dev->name);
  515. else if ((status & (TDR_SHORT|TDR_OPEN)) && (status & TDR_TIME)) {
  516. #ifdef FANCY
  517. printk (KERN_WARNING "%s: i/f failed tdr: cable %s %d.%d us away\n", dev->name,
  518. status & TDR_SHORT ? "short" : "open", (status & TDR_TIME) / 10,
  519. (status & TDR_TIME) % 10);
  520. #else
  521. printk (KERN_WARNING "%s: i/f failed tdr: cable %s %d clks away\n", dev->name,
  522. status & TDR_SHORT ? "short" : "open", (status & TDR_TIME));
  523. #endif
  524. }
  525. }
  526. if (failures)
  527. ether1_reset (dev);
  528. return failures ? 1 : 0;
  529. }
  530. /* ------------------------------------------------------------------------- */
  531. static int
  532. ether1_txalloc (struct net_device *dev, int size)
  533. {
  534. int start, tail;
  535. size = (size + 1) & ~1;
  536. tail = priv(dev)->tx_tail;
  537. if (priv(dev)->tx_head + size > TX_AREA_END) {
  538. if (tail > priv(dev)->tx_head)
  539. return -1;
  540. start = TX_AREA_START;
  541. if (start + size > tail)
  542. return -1;
  543. priv(dev)->tx_head = start + size;
  544. } else {
  545. if (priv(dev)->tx_head < tail && (priv(dev)->tx_head + size) > tail)
  546. return -1;
  547. start = priv(dev)->tx_head;
  548. priv(dev)->tx_head += size;
  549. }
  550. return start;
  551. }
  552. static int
  553. ether1_open (struct net_device *dev)
  554. {
  555. if (request_irq(dev->irq, ether1_interrupt, 0, "ether1", dev))
  556. return -EAGAIN;
  557. if (ether1_init_for_open (dev)) {
  558. free_irq (dev->irq, dev);
  559. return -EAGAIN;
  560. }
  561. netif_start_queue(dev);
  562. return 0;
  563. }
  564. static void
  565. ether1_timeout(struct net_device *dev, unsigned int txqueue)
  566. {
  567. printk(KERN_WARNING "%s: transmit timeout, network cable problem?\n",
  568. dev->name);
  569. printk(KERN_WARNING "%s: resetting device\n", dev->name);
  570. ether1_reset (dev);
  571. if (ether1_init_for_open (dev))
  572. printk (KERN_ERR "%s: unable to restart interface\n", dev->name);
  573. dev->stats.tx_errors++;
  574. netif_wake_queue(dev);
  575. }
  576. static netdev_tx_t
  577. ether1_sendpacket (struct sk_buff *skb, struct net_device *dev)
  578. {
  579. int tmp, tst, nopaddr, txaddr, tbdaddr, dataddr;
  580. unsigned long flags;
  581. tx_t tx;
  582. tbd_t tbd;
  583. nop_t nop;
  584. if (priv(dev)->restart) {
  585. printk(KERN_WARNING "%s: resetting device\n", dev->name);
  586. ether1_reset(dev);
  587. if (ether1_init_for_open(dev))
  588. printk(KERN_ERR "%s: unable to restart interface\n", dev->name);
  589. else
  590. priv(dev)->restart = 0;
  591. }
  592. if (skb->len < ETH_ZLEN) {
  593. if (skb_padto(skb, ETH_ZLEN))
  594. goto out;
  595. }
  596. /*
  597. * insert packet followed by a nop
  598. */
  599. txaddr = ether1_txalloc (dev, TX_SIZE);
  600. tbdaddr = ether1_txalloc (dev, TBD_SIZE);
  601. dataddr = ether1_txalloc (dev, skb->len);
  602. nopaddr = ether1_txalloc (dev, NOP_SIZE);
  603. tx.tx_status = 0;
  604. tx.tx_command = CMD_TX | CMD_INTR;
  605. tx.tx_link = nopaddr;
  606. tx.tx_tbdoffset = tbdaddr;
  607. tbd.tbd_opts = TBD_EOL | skb->len;
  608. tbd.tbd_link = I82586_NULL;
  609. tbd.tbd_bufl = dataddr;
  610. tbd.tbd_bufh = 0;
  611. nop.nop_status = 0;
  612. nop.nop_command = CMD_NOP;
  613. nop.nop_link = nopaddr;
  614. local_irq_save(flags);
  615. ether1_writebuffer (dev, &tx, txaddr, TX_SIZE);
  616. ether1_writebuffer (dev, &tbd, tbdaddr, TBD_SIZE);
  617. ether1_writebuffer (dev, skb->data, dataddr, skb->len);
  618. ether1_writebuffer (dev, &nop, nopaddr, NOP_SIZE);
  619. tmp = priv(dev)->tx_link;
  620. priv(dev)->tx_link = nopaddr;
  621. /* now reset the previous nop pointer */
  622. ether1_writew(dev, txaddr, tmp, nop_t, nop_link, NORMALIRQS);
  623. local_irq_restore(flags);
  624. /* handle transmit */
  625. /* check to see if we have room for a full sized ether frame */
  626. tmp = priv(dev)->tx_head;
  627. tst = ether1_txalloc (dev, TX_SIZE + TBD_SIZE + NOP_SIZE + ETH_FRAME_LEN);
  628. priv(dev)->tx_head = tmp;
  629. dev_kfree_skb (skb);
  630. if (tst == -1)
  631. netif_stop_queue(dev);
  632. out:
  633. return NETDEV_TX_OK;
  634. }
  635. static void
  636. ether1_xmit_done (struct net_device *dev)
  637. {
  638. nop_t nop;
  639. int caddr, tst;
  640. caddr = priv(dev)->tx_tail;
  641. again:
  642. ether1_readbuffer (dev, &nop, caddr, NOP_SIZE);
  643. switch (nop.nop_command & CMD_MASK) {
  644. case CMD_TDR:
  645. /* special case */
  646. if (ether1_readw(dev, SCB_ADDR, scb_t, scb_cbl_offset, NORMALIRQS)
  647. != (unsigned short)I82586_NULL) {
  648. ether1_writew(dev, SCB_CMDCUCSTART | SCB_CMDRXSTART, SCB_ADDR, scb_t,
  649. scb_command, NORMALIRQS);
  650. writeb(CTRL_CA, REG_CONTROL);
  651. }
  652. priv(dev)->tx_tail = NOP_ADDR;
  653. return;
  654. case CMD_NOP:
  655. if (nop.nop_link == caddr) {
  656. if (priv(dev)->initialising == 0)
  657. printk (KERN_WARNING "%s: strange command complete with no tx command!\n", dev->name);
  658. else
  659. priv(dev)->initialising = 0;
  660. return;
  661. }
  662. if (caddr == nop.nop_link)
  663. return;
  664. caddr = nop.nop_link;
  665. goto again;
  666. case CMD_TX:
  667. if (nop.nop_status & STAT_COMPLETE)
  668. break;
  669. printk (KERN_ERR "%s: strange command complete without completed command\n", dev->name);
  670. priv(dev)->restart = 1;
  671. return;
  672. default:
  673. printk (KERN_WARNING "%s: strange command %d complete! (offset %04X)", dev->name,
  674. nop.nop_command & CMD_MASK, caddr);
  675. priv(dev)->restart = 1;
  676. return;
  677. }
  678. while (nop.nop_status & STAT_COMPLETE) {
  679. if (nop.nop_status & STAT_OK) {
  680. dev->stats.tx_packets++;
  681. dev->stats.collisions += (nop.nop_status & STAT_COLLISIONS);
  682. } else {
  683. dev->stats.tx_errors++;
  684. if (nop.nop_status & STAT_COLLAFTERTX)
  685. dev->stats.collisions++;
  686. if (nop.nop_status & STAT_NOCARRIER)
  687. dev->stats.tx_carrier_errors++;
  688. if (nop.nop_status & STAT_TXLOSTCTS)
  689. printk (KERN_WARNING "%s: cts lost\n", dev->name);
  690. if (nop.nop_status & STAT_TXSLOWDMA)
  691. dev->stats.tx_fifo_errors++;
  692. if (nop.nop_status & STAT_COLLEXCESSIVE)
  693. dev->stats.collisions += 16;
  694. }
  695. if (nop.nop_link == caddr) {
  696. printk (KERN_ERR "%s: tx buffer chaining error: tx command points to itself\n", dev->name);
  697. break;
  698. }
  699. caddr = nop.nop_link;
  700. ether1_readbuffer (dev, &nop, caddr, NOP_SIZE);
  701. if ((nop.nop_command & CMD_MASK) != CMD_NOP) {
  702. printk (KERN_ERR "%s: tx buffer chaining error: no nop after tx command\n", dev->name);
  703. break;
  704. }
  705. if (caddr == nop.nop_link)
  706. break;
  707. caddr = nop.nop_link;
  708. ether1_readbuffer (dev, &nop, caddr, NOP_SIZE);
  709. if ((nop.nop_command & CMD_MASK) != CMD_TX) {
  710. printk (KERN_ERR "%s: tx buffer chaining error: no tx command after nop\n", dev->name);
  711. break;
  712. }
  713. }
  714. priv(dev)->tx_tail = caddr;
  715. caddr = priv(dev)->tx_head;
  716. tst = ether1_txalloc (dev, TX_SIZE + TBD_SIZE + NOP_SIZE + ETH_FRAME_LEN);
  717. priv(dev)->tx_head = caddr;
  718. if (tst != -1)
  719. netif_wake_queue(dev);
  720. }
  721. static void
  722. ether1_recv_done (struct net_device *dev)
  723. {
  724. int status;
  725. int nexttail, rbdaddr;
  726. rbd_t rbd;
  727. do {
  728. status = ether1_readw(dev, priv(dev)->rx_head, rfd_t, rfd_status, NORMALIRQS);
  729. if ((status & RFD_COMPLETE) == 0)
  730. break;
  731. rbdaddr = ether1_readw(dev, priv(dev)->rx_head, rfd_t, rfd_rbdoffset, NORMALIRQS);
  732. ether1_readbuffer (dev, &rbd, rbdaddr, RBD_SIZE);
  733. if ((rbd.rbd_status & (RBD_EOF | RBD_ACNTVALID)) == (RBD_EOF | RBD_ACNTVALID)) {
  734. int length = rbd.rbd_status & RBD_ACNT;
  735. struct sk_buff *skb;
  736. length = (length + 1) & ~1;
  737. skb = netdev_alloc_skb(dev, length + 2);
  738. if (skb) {
  739. skb_reserve (skb, 2);
  740. ether1_readbuffer (dev, skb_put (skb, length), rbd.rbd_bufl, length);
  741. skb->protocol = eth_type_trans (skb, dev);
  742. netif_rx (skb);
  743. dev->stats.rx_packets++;
  744. } else
  745. dev->stats.rx_dropped++;
  746. } else {
  747. printk(KERN_WARNING "%s: %s\n", dev->name,
  748. (rbd.rbd_status & RBD_EOF) ? "oversized packet" : "acnt not valid");
  749. dev->stats.rx_dropped++;
  750. }
  751. nexttail = ether1_readw(dev, priv(dev)->rx_tail, rfd_t, rfd_link, NORMALIRQS);
  752. /* nexttail should be rx_head */
  753. if (nexttail != priv(dev)->rx_head)
  754. printk(KERN_ERR "%s: receiver buffer chaining error (%04X != %04X)\n",
  755. dev->name, nexttail, priv(dev)->rx_head);
  756. ether1_writew(dev, RFD_CMDEL | RFD_CMDSUSPEND, nexttail, rfd_t, rfd_command, NORMALIRQS);
  757. ether1_writew(dev, 0, priv(dev)->rx_tail, rfd_t, rfd_command, NORMALIRQS);
  758. ether1_writew(dev, 0, priv(dev)->rx_tail, rfd_t, rfd_status, NORMALIRQS);
  759. ether1_writew(dev, 0, priv(dev)->rx_tail, rfd_t, rfd_rbdoffset, NORMALIRQS);
  760. priv(dev)->rx_tail = nexttail;
  761. priv(dev)->rx_head = ether1_readw(dev, priv(dev)->rx_head, rfd_t, rfd_link, NORMALIRQS);
  762. } while (1);
  763. }
  764. static irqreturn_t
  765. ether1_interrupt (int irq, void *dev_id)
  766. {
  767. struct net_device *dev = (struct net_device *)dev_id;
  768. int status;
  769. status = ether1_readw(dev, SCB_ADDR, scb_t, scb_status, NORMALIRQS);
  770. if (status) {
  771. ether1_writew(dev, status & (SCB_STRNR | SCB_STCNA | SCB_STFR | SCB_STCX),
  772. SCB_ADDR, scb_t, scb_command, NORMALIRQS);
  773. writeb(CTRL_CA | CTRL_ACK, REG_CONTROL);
  774. if (status & SCB_STCX) {
  775. ether1_xmit_done (dev);
  776. }
  777. if (status & SCB_STCNA) {
  778. if (priv(dev)->resetting == 0)
  779. printk (KERN_WARNING "%s: CU went not ready ???\n", dev->name);
  780. else
  781. priv(dev)->resetting += 1;
  782. if (ether1_readw(dev, SCB_ADDR, scb_t, scb_cbl_offset, NORMALIRQS)
  783. != (unsigned short)I82586_NULL) {
  784. ether1_writew(dev, SCB_CMDCUCSTART, SCB_ADDR, scb_t, scb_command, NORMALIRQS);
  785. writeb(CTRL_CA, REG_CONTROL);
  786. }
  787. if (priv(dev)->resetting == 2)
  788. priv(dev)->resetting = 0;
  789. }
  790. if (status & SCB_STFR) {
  791. ether1_recv_done (dev);
  792. }
  793. if (status & SCB_STRNR) {
  794. if (ether1_readw(dev, SCB_ADDR, scb_t, scb_status, NORMALIRQS) & SCB_STRXSUSP) {
  795. printk (KERN_WARNING "%s: RU went not ready: RU suspended\n", dev->name);
  796. ether1_writew(dev, SCB_CMDRXRESUME, SCB_ADDR, scb_t, scb_command, NORMALIRQS);
  797. writeb(CTRL_CA, REG_CONTROL);
  798. dev->stats.rx_dropped++; /* we suspended due to lack of buffer space */
  799. } else
  800. printk(KERN_WARNING "%s: RU went not ready: %04X\n", dev->name,
  801. ether1_readw(dev, SCB_ADDR, scb_t, scb_status, NORMALIRQS));
  802. printk (KERN_WARNING "RU ptr = %04X\n", ether1_readw(dev, SCB_ADDR, scb_t, scb_rfa_offset,
  803. NORMALIRQS));
  804. }
  805. } else
  806. writeb(CTRL_ACK, REG_CONTROL);
  807. return IRQ_HANDLED;
  808. }
  809. static int
  810. ether1_close (struct net_device *dev)
  811. {
  812. ether1_reset (dev);
  813. free_irq(dev->irq, dev);
  814. return 0;
  815. }
  816. /*
  817. * Set or clear the multicast filter for this adaptor.
  818. * num_addrs == -1 Promiscuous mode, receive all packets.
  819. * num_addrs == 0 Normal mode, clear multicast list.
  820. * num_addrs > 0 Multicast mode, receive normal and MC packets, and do
  821. * best-effort filtering.
  822. */
  823. static void
  824. ether1_setmulticastlist (struct net_device *dev)
  825. {
  826. }
  827. /* ------------------------------------------------------------------------- */
  828. static void ether1_banner(void)
  829. {
  830. static unsigned int version_printed = 0;
  831. if (net_debug && version_printed++ == 0)
  832. printk(KERN_INFO "%s", version);
  833. }
  834. static const struct net_device_ops ether1_netdev_ops = {
  835. .ndo_open = ether1_open,
  836. .ndo_stop = ether1_close,
  837. .ndo_start_xmit = ether1_sendpacket,
  838. .ndo_set_rx_mode = ether1_setmulticastlist,
  839. .ndo_tx_timeout = ether1_timeout,
  840. .ndo_validate_addr = eth_validate_addr,
  841. .ndo_set_mac_address = eth_mac_addr,
  842. };
  843. static int
  844. ether1_probe(struct expansion_card *ec, const struct ecard_id *id)
  845. {
  846. struct net_device *dev;
  847. u8 addr[ETH_ALEN];
  848. int i, ret = 0;
  849. ether1_banner();
  850. ret = ecard_request_resources(ec);
  851. if (ret)
  852. goto out;
  853. dev = alloc_etherdev(sizeof(struct ether1_priv));
  854. if (!dev) {
  855. ret = -ENOMEM;
  856. goto release;
  857. }
  858. SET_NETDEV_DEV(dev, &ec->dev);
  859. dev->irq = ec->irq;
  860. priv(dev)->base = ecardm_iomap(ec, ECARD_RES_IOCFAST, 0, 0);
  861. if (!priv(dev)->base) {
  862. ret = -ENOMEM;
  863. goto free;
  864. }
  865. if ((priv(dev)->bus_type = ether1_reset(dev)) == 0) {
  866. ret = -ENODEV;
  867. goto free;
  868. }
  869. for (i = 0; i < 6; i++)
  870. addr[i] = readb(IDPROM_ADDRESS + (i << 2));
  871. eth_hw_addr_set(dev, addr);
  872. if (ether1_init_2(dev)) {
  873. ret = -ENODEV;
  874. goto free;
  875. }
  876. dev->netdev_ops = &ether1_netdev_ops;
  877. dev->watchdog_timeo = 5 * HZ / 100;
  878. ret = register_netdev(dev);
  879. if (ret)
  880. goto free;
  881. printk(KERN_INFO "%s: ether1 in slot %d, %pM\n",
  882. dev->name, ec->slot_no, dev->dev_addr);
  883. ecard_set_drvdata(ec, dev);
  884. return 0;
  885. free:
  886. free_netdev(dev);
  887. release:
  888. ecard_release_resources(ec);
  889. out:
  890. return ret;
  891. }
  892. static void ether1_remove(struct expansion_card *ec)
  893. {
  894. struct net_device *dev = ecard_get_drvdata(ec);
  895. ecard_set_drvdata(ec, NULL);
  896. unregister_netdev(dev);
  897. free_netdev(dev);
  898. ecard_release_resources(ec);
  899. }
  900. static const struct ecard_id ether1_ids[] = {
  901. { MANU_ACORN, PROD_ACORN_ETHER1 },
  902. { 0xffff, 0xffff }
  903. };
  904. static struct ecard_driver ether1_driver = {
  905. .probe = ether1_probe,
  906. .remove = ether1_remove,
  907. .id_table = ether1_ids,
  908. .drv = {
  909. .name = "ether1",
  910. },
  911. };
  912. static int __init ether1_init(void)
  913. {
  914. return ecard_register_driver(&ether1_driver);
  915. }
  916. static void __exit ether1_exit(void)
  917. {
  918. ecard_remove_driver(&ether1_driver);
  919. }
  920. module_init(ether1_init);
  921. module_exit(ether1_exit);
  922. MODULE_LICENSE("GPL");