bcmsysport.c 76 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Broadcom BCM7xxx System Port Ethernet MAC driver
  4. *
  5. * Copyright (C) 2014 Broadcom Corporation
  6. */
  7. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  8. #include <linux/init.h>
  9. #include <linux/interrupt.h>
  10. #include <linux/module.h>
  11. #include <linux/kernel.h>
  12. #include <linux/netdevice.h>
  13. #include <linux/dsa/brcm.h>
  14. #include <linux/etherdevice.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/of.h>
  17. #include <linux/of_net.h>
  18. #include <linux/of_mdio.h>
  19. #include <linux/phy.h>
  20. #include <linux/phy_fixed.h>
  21. #include <net/dsa.h>
  22. #include <linux/clk.h>
  23. #include <net/ip.h>
  24. #include <net/ipv6.h>
  25. #include "bcmsysport.h"
  26. /* I/O accessors register helpers */
  27. #define BCM_SYSPORT_IO_MACRO(name, offset) \
  28. static inline u32 name##_readl(struct bcm_sysport_priv *priv, u32 off) \
  29. { \
  30. u32 reg = readl_relaxed(priv->base + offset + off); \
  31. return reg; \
  32. } \
  33. static inline void name##_writel(struct bcm_sysport_priv *priv, \
  34. u32 val, u32 off) \
  35. { \
  36. writel_relaxed(val, priv->base + offset + off); \
  37. } \
  38. BCM_SYSPORT_IO_MACRO(intrl2_0, SYS_PORT_INTRL2_0_OFFSET);
  39. BCM_SYSPORT_IO_MACRO(intrl2_1, SYS_PORT_INTRL2_1_OFFSET);
  40. BCM_SYSPORT_IO_MACRO(umac, SYS_PORT_UMAC_OFFSET);
  41. BCM_SYSPORT_IO_MACRO(gib, SYS_PORT_GIB_OFFSET);
  42. BCM_SYSPORT_IO_MACRO(tdma, SYS_PORT_TDMA_OFFSET);
  43. BCM_SYSPORT_IO_MACRO(rxchk, SYS_PORT_RXCHK_OFFSET);
  44. BCM_SYSPORT_IO_MACRO(txchk, SYS_PORT_TXCHK_OFFSET);
  45. BCM_SYSPORT_IO_MACRO(rbuf, SYS_PORT_RBUF_OFFSET);
  46. BCM_SYSPORT_IO_MACRO(tbuf, SYS_PORT_TBUF_OFFSET);
  47. BCM_SYSPORT_IO_MACRO(topctrl, SYS_PORT_TOPCTRL_OFFSET);
  48. /* On SYSTEMPORT Lite, any register after RDMA_STATUS has the exact
  49. * same layout, except it has been moved by 4 bytes up, *sigh*
  50. */
  51. static inline u32 rdma_readl(struct bcm_sysport_priv *priv, u32 off)
  52. {
  53. if (priv->is_lite && off >= RDMA_STATUS)
  54. off += 4;
  55. return readl_relaxed(priv->base + SYS_PORT_RDMA_OFFSET + off);
  56. }
  57. static inline void rdma_writel(struct bcm_sysport_priv *priv, u32 val, u32 off)
  58. {
  59. if (priv->is_lite && off >= RDMA_STATUS)
  60. off += 4;
  61. writel_relaxed(val, priv->base + SYS_PORT_RDMA_OFFSET + off);
  62. }
  63. static inline u32 tdma_control_bit(struct bcm_sysport_priv *priv, u32 bit)
  64. {
  65. if (!priv->is_lite) {
  66. return BIT(bit);
  67. } else {
  68. if (bit >= ACB_ALGO)
  69. return BIT(bit + 1);
  70. else
  71. return BIT(bit);
  72. }
  73. }
  74. /* L2-interrupt masking/unmasking helpers, does automatic saving of the applied
  75. * mask in a software copy to avoid CPU_MASK_STATUS reads in hot-paths.
  76. */
  77. #define BCM_SYSPORT_INTR_L2(which) \
  78. static inline void intrl2_##which##_mask_clear(struct bcm_sysport_priv *priv, \
  79. u32 mask) \
  80. { \
  81. priv->irq##which##_mask &= ~(mask); \
  82. intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR); \
  83. } \
  84. static inline void intrl2_##which##_mask_set(struct bcm_sysport_priv *priv, \
  85. u32 mask) \
  86. { \
  87. intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET); \
  88. priv->irq##which##_mask |= (mask); \
  89. } \
  90. BCM_SYSPORT_INTR_L2(0)
  91. BCM_SYSPORT_INTR_L2(1)
  92. /* Register accesses to GISB/RBUS registers are expensive (few hundred
  93. * nanoseconds), so keep the check for 64-bits explicit here to save
  94. * one register write per-packet on 32-bits platforms.
  95. */
  96. static inline void dma_desc_set_addr(struct bcm_sysport_priv *priv,
  97. void __iomem *d,
  98. dma_addr_t addr)
  99. {
  100. #ifdef CONFIG_PHYS_ADDR_T_64BIT
  101. writel_relaxed(upper_32_bits(addr) & DESC_ADDR_HI_MASK,
  102. d + DESC_ADDR_HI_STATUS_LEN);
  103. #endif
  104. writel_relaxed(lower_32_bits(addr), d + DESC_ADDR_LO);
  105. }
  106. /* Ethtool operations */
  107. static void bcm_sysport_set_rx_csum(struct net_device *dev,
  108. netdev_features_t wanted)
  109. {
  110. struct bcm_sysport_priv *priv = netdev_priv(dev);
  111. u32 reg;
  112. priv->rx_chk_en = !!(wanted & NETIF_F_RXCSUM);
  113. reg = rxchk_readl(priv, RXCHK_CONTROL);
  114. /* Clear L2 header checks, which would prevent BPDUs
  115. * from being received.
  116. */
  117. reg &= ~RXCHK_L2_HDR_DIS;
  118. if (priv->rx_chk_en)
  119. reg |= RXCHK_EN;
  120. else
  121. reg &= ~RXCHK_EN;
  122. /* If UniMAC forwards CRC, we need to skip over it to get
  123. * a valid CHK bit to be set in the per-packet status word
  124. */
  125. if (priv->rx_chk_en && priv->crc_fwd)
  126. reg |= RXCHK_SKIP_FCS;
  127. else
  128. reg &= ~RXCHK_SKIP_FCS;
  129. /* If Broadcom tags are enabled (e.g: using a switch), make
  130. * sure we tell the RXCHK hardware to expect a 4-bytes Broadcom
  131. * tag after the Ethernet MAC Source Address.
  132. */
  133. if (netdev_uses_dsa(dev))
  134. reg |= RXCHK_BRCM_TAG_EN;
  135. else
  136. reg &= ~RXCHK_BRCM_TAG_EN;
  137. rxchk_writel(priv, reg, RXCHK_CONTROL);
  138. }
  139. static void bcm_sysport_set_tx_csum(struct net_device *dev,
  140. netdev_features_t wanted)
  141. {
  142. struct bcm_sysport_priv *priv = netdev_priv(dev);
  143. u32 reg;
  144. /* Hardware transmit checksum requires us to enable the Transmit status
  145. * block prepended to the packet contents
  146. */
  147. priv->tsb_en = !!(wanted & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
  148. NETIF_F_HW_VLAN_CTAG_TX));
  149. reg = tdma_readl(priv, TDMA_CONTROL);
  150. if (priv->tsb_en)
  151. reg |= tdma_control_bit(priv, TSB_EN);
  152. else
  153. reg &= ~tdma_control_bit(priv, TSB_EN);
  154. /* Indicating that software inserts Broadcom tags is needed for the TX
  155. * checksum to be computed correctly when using VLAN HW acceleration,
  156. * else it has no effect, so it can always be turned on.
  157. */
  158. if (netdev_uses_dsa(dev))
  159. reg |= tdma_control_bit(priv, SW_BRCM_TAG);
  160. else
  161. reg &= ~tdma_control_bit(priv, SW_BRCM_TAG);
  162. tdma_writel(priv, reg, TDMA_CONTROL);
  163. /* Default TPID is ETH_P_8021AD, change to ETH_P_8021Q */
  164. if (wanted & NETIF_F_HW_VLAN_CTAG_TX)
  165. tdma_writel(priv, ETH_P_8021Q, TDMA_TPID);
  166. }
  167. static int bcm_sysport_set_features(struct net_device *dev,
  168. netdev_features_t features)
  169. {
  170. struct bcm_sysport_priv *priv = netdev_priv(dev);
  171. int ret;
  172. ret = clk_prepare_enable(priv->clk);
  173. if (ret)
  174. return ret;
  175. /* Read CRC forward */
  176. if (!priv->is_lite)
  177. priv->crc_fwd = !!(umac_readl(priv, UMAC_CMD) & CMD_CRC_FWD);
  178. else
  179. priv->crc_fwd = !((gib_readl(priv, GIB_CONTROL) &
  180. GIB_FCS_STRIP) >> GIB_FCS_STRIP_SHIFT);
  181. bcm_sysport_set_rx_csum(dev, features);
  182. bcm_sysport_set_tx_csum(dev, features);
  183. clk_disable_unprepare(priv->clk);
  184. return 0;
  185. }
  186. /* Hardware counters must be kept in sync because the order/offset
  187. * is important here (order in structure declaration = order in hardware)
  188. */
  189. static const struct bcm_sysport_stats bcm_sysport_gstrings_stats[] = {
  190. /* general stats */
  191. STAT_NETDEV64(rx_packets),
  192. STAT_NETDEV64(tx_packets),
  193. STAT_NETDEV64(rx_bytes),
  194. STAT_NETDEV64(tx_bytes),
  195. STAT_NETDEV(rx_errors),
  196. STAT_NETDEV(tx_errors),
  197. STAT_NETDEV(rx_dropped),
  198. STAT_NETDEV(tx_dropped),
  199. STAT_NETDEV(multicast),
  200. /* UniMAC RSV counters */
  201. STAT_MIB_RX("rx_64_octets", mib.rx.pkt_cnt.cnt_64),
  202. STAT_MIB_RX("rx_65_127_oct", mib.rx.pkt_cnt.cnt_127),
  203. STAT_MIB_RX("rx_128_255_oct", mib.rx.pkt_cnt.cnt_255),
  204. STAT_MIB_RX("rx_256_511_oct", mib.rx.pkt_cnt.cnt_511),
  205. STAT_MIB_RX("rx_512_1023_oct", mib.rx.pkt_cnt.cnt_1023),
  206. STAT_MIB_RX("rx_1024_1518_oct", mib.rx.pkt_cnt.cnt_1518),
  207. STAT_MIB_RX("rx_vlan_1519_1522_oct", mib.rx.pkt_cnt.cnt_mgv),
  208. STAT_MIB_RX("rx_1522_2047_oct", mib.rx.pkt_cnt.cnt_2047),
  209. STAT_MIB_RX("rx_2048_4095_oct", mib.rx.pkt_cnt.cnt_4095),
  210. STAT_MIB_RX("rx_4096_9216_oct", mib.rx.pkt_cnt.cnt_9216),
  211. STAT_MIB_RX("rx_pkts", mib.rx.pkt),
  212. STAT_MIB_RX("rx_bytes", mib.rx.bytes),
  213. STAT_MIB_RX("rx_multicast", mib.rx.mca),
  214. STAT_MIB_RX("rx_broadcast", mib.rx.bca),
  215. STAT_MIB_RX("rx_fcs", mib.rx.fcs),
  216. STAT_MIB_RX("rx_control", mib.rx.cf),
  217. STAT_MIB_RX("rx_pause", mib.rx.pf),
  218. STAT_MIB_RX("rx_unknown", mib.rx.uo),
  219. STAT_MIB_RX("rx_align", mib.rx.aln),
  220. STAT_MIB_RX("rx_outrange", mib.rx.flr),
  221. STAT_MIB_RX("rx_code", mib.rx.cde),
  222. STAT_MIB_RX("rx_carrier", mib.rx.fcr),
  223. STAT_MIB_RX("rx_oversize", mib.rx.ovr),
  224. STAT_MIB_RX("rx_jabber", mib.rx.jbr),
  225. STAT_MIB_RX("rx_mtu_err", mib.rx.mtue),
  226. STAT_MIB_RX("rx_good_pkts", mib.rx.pok),
  227. STAT_MIB_RX("rx_unicast", mib.rx.uc),
  228. STAT_MIB_RX("rx_ppp", mib.rx.ppp),
  229. STAT_MIB_RX("rx_crc", mib.rx.rcrc),
  230. /* UniMAC TSV counters */
  231. STAT_MIB_TX("tx_64_octets", mib.tx.pkt_cnt.cnt_64),
  232. STAT_MIB_TX("tx_65_127_oct", mib.tx.pkt_cnt.cnt_127),
  233. STAT_MIB_TX("tx_128_255_oct", mib.tx.pkt_cnt.cnt_255),
  234. STAT_MIB_TX("tx_256_511_oct", mib.tx.pkt_cnt.cnt_511),
  235. STAT_MIB_TX("tx_512_1023_oct", mib.tx.pkt_cnt.cnt_1023),
  236. STAT_MIB_TX("tx_1024_1518_oct", mib.tx.pkt_cnt.cnt_1518),
  237. STAT_MIB_TX("tx_vlan_1519_1522_oct", mib.tx.pkt_cnt.cnt_mgv),
  238. STAT_MIB_TX("tx_1522_2047_oct", mib.tx.pkt_cnt.cnt_2047),
  239. STAT_MIB_TX("tx_2048_4095_oct", mib.tx.pkt_cnt.cnt_4095),
  240. STAT_MIB_TX("tx_4096_9216_oct", mib.tx.pkt_cnt.cnt_9216),
  241. STAT_MIB_TX("tx_pkts", mib.tx.pkts),
  242. STAT_MIB_TX("tx_multicast", mib.tx.mca),
  243. STAT_MIB_TX("tx_broadcast", mib.tx.bca),
  244. STAT_MIB_TX("tx_pause", mib.tx.pf),
  245. STAT_MIB_TX("tx_control", mib.tx.cf),
  246. STAT_MIB_TX("tx_fcs_err", mib.tx.fcs),
  247. STAT_MIB_TX("tx_oversize", mib.tx.ovr),
  248. STAT_MIB_TX("tx_defer", mib.tx.drf),
  249. STAT_MIB_TX("tx_excess_defer", mib.tx.edf),
  250. STAT_MIB_TX("tx_single_col", mib.tx.scl),
  251. STAT_MIB_TX("tx_multi_col", mib.tx.mcl),
  252. STAT_MIB_TX("tx_late_col", mib.tx.lcl),
  253. STAT_MIB_TX("tx_excess_col", mib.tx.ecl),
  254. STAT_MIB_TX("tx_frags", mib.tx.frg),
  255. STAT_MIB_TX("tx_total_col", mib.tx.ncl),
  256. STAT_MIB_TX("tx_jabber", mib.tx.jbr),
  257. STAT_MIB_TX("tx_bytes", mib.tx.bytes),
  258. STAT_MIB_TX("tx_good_pkts", mib.tx.pok),
  259. STAT_MIB_TX("tx_unicast", mib.tx.uc),
  260. /* UniMAC RUNT counters */
  261. STAT_RUNT("rx_runt_pkts", mib.rx_runt_cnt),
  262. STAT_RUNT("rx_runt_valid_fcs", mib.rx_runt_fcs),
  263. STAT_RUNT("rx_runt_inval_fcs_align", mib.rx_runt_fcs_align),
  264. STAT_RUNT("rx_runt_bytes", mib.rx_runt_bytes),
  265. /* RXCHK misc statistics */
  266. STAT_RXCHK("rxchk_bad_csum", mib.rxchk_bad_csum, RXCHK_BAD_CSUM_CNTR),
  267. STAT_RXCHK("rxchk_other_pkt_disc", mib.rxchk_other_pkt_disc,
  268. RXCHK_OTHER_DISC_CNTR),
  269. /* RBUF misc statistics */
  270. STAT_RBUF("rbuf_ovflow_cnt", mib.rbuf_ovflow_cnt, RBUF_OVFL_DISC_CNTR),
  271. STAT_RBUF("rbuf_err_cnt", mib.rbuf_err_cnt, RBUF_ERR_PKT_CNTR),
  272. STAT_MIB_SOFT("alloc_rx_buff_failed", mib.alloc_rx_buff_failed),
  273. STAT_MIB_SOFT("rx_dma_failed", mib.rx_dma_failed),
  274. STAT_MIB_SOFT("tx_dma_failed", mib.tx_dma_failed),
  275. STAT_MIB_SOFT("tx_realloc_tsb", mib.tx_realloc_tsb),
  276. STAT_MIB_SOFT("tx_realloc_tsb_failed", mib.tx_realloc_tsb_failed),
  277. /* Per TX-queue statistics are dynamically appended */
  278. };
  279. #define BCM_SYSPORT_STATS_LEN ARRAY_SIZE(bcm_sysport_gstrings_stats)
  280. static void bcm_sysport_get_drvinfo(struct net_device *dev,
  281. struct ethtool_drvinfo *info)
  282. {
  283. strscpy(info->driver, KBUILD_MODNAME, sizeof(info->driver));
  284. strscpy(info->bus_info, "platform", sizeof(info->bus_info));
  285. }
  286. static u32 bcm_sysport_get_msglvl(struct net_device *dev)
  287. {
  288. struct bcm_sysport_priv *priv = netdev_priv(dev);
  289. return priv->msg_enable;
  290. }
  291. static void bcm_sysport_set_msglvl(struct net_device *dev, u32 enable)
  292. {
  293. struct bcm_sysport_priv *priv = netdev_priv(dev);
  294. priv->msg_enable = enable;
  295. }
  296. static inline bool bcm_sysport_lite_stat_valid(enum bcm_sysport_stat_type type)
  297. {
  298. switch (type) {
  299. case BCM_SYSPORT_STAT_NETDEV:
  300. case BCM_SYSPORT_STAT_NETDEV64:
  301. case BCM_SYSPORT_STAT_RXCHK:
  302. case BCM_SYSPORT_STAT_RBUF:
  303. case BCM_SYSPORT_STAT_SOFT:
  304. return true;
  305. default:
  306. return false;
  307. }
  308. }
  309. static int bcm_sysport_get_sset_count(struct net_device *dev, int string_set)
  310. {
  311. struct bcm_sysport_priv *priv = netdev_priv(dev);
  312. const struct bcm_sysport_stats *s;
  313. unsigned int i, j;
  314. switch (string_set) {
  315. case ETH_SS_STATS:
  316. for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
  317. s = &bcm_sysport_gstrings_stats[i];
  318. if (priv->is_lite &&
  319. !bcm_sysport_lite_stat_valid(s->type))
  320. continue;
  321. j++;
  322. }
  323. /* Include per-queue statistics */
  324. return j + dev->num_tx_queues * NUM_SYSPORT_TXQ_STAT;
  325. default:
  326. return -EOPNOTSUPP;
  327. }
  328. }
  329. static void bcm_sysport_get_strings(struct net_device *dev,
  330. u32 stringset, u8 *data)
  331. {
  332. struct bcm_sysport_priv *priv = netdev_priv(dev);
  333. const struct bcm_sysport_stats *s;
  334. char buf[128];
  335. int i, j;
  336. switch (stringset) {
  337. case ETH_SS_STATS:
  338. for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
  339. s = &bcm_sysport_gstrings_stats[i];
  340. if (priv->is_lite &&
  341. !bcm_sysport_lite_stat_valid(s->type))
  342. continue;
  343. memcpy(data + j * ETH_GSTRING_LEN, s->stat_string,
  344. ETH_GSTRING_LEN);
  345. j++;
  346. }
  347. for (i = 0; i < dev->num_tx_queues; i++) {
  348. snprintf(buf, sizeof(buf), "txq%d_packets", i);
  349. memcpy(data + j * ETH_GSTRING_LEN, buf,
  350. ETH_GSTRING_LEN);
  351. j++;
  352. snprintf(buf, sizeof(buf), "txq%d_bytes", i);
  353. memcpy(data + j * ETH_GSTRING_LEN, buf,
  354. ETH_GSTRING_LEN);
  355. j++;
  356. }
  357. break;
  358. default:
  359. break;
  360. }
  361. }
  362. static void bcm_sysport_update_mib_counters(struct bcm_sysport_priv *priv)
  363. {
  364. int i, j = 0;
  365. for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
  366. const struct bcm_sysport_stats *s;
  367. u8 offset = 0;
  368. u32 val = 0;
  369. char *p;
  370. s = &bcm_sysport_gstrings_stats[i];
  371. switch (s->type) {
  372. case BCM_SYSPORT_STAT_NETDEV:
  373. case BCM_SYSPORT_STAT_NETDEV64:
  374. case BCM_SYSPORT_STAT_SOFT:
  375. continue;
  376. case BCM_SYSPORT_STAT_MIB_RX:
  377. case BCM_SYSPORT_STAT_MIB_TX:
  378. case BCM_SYSPORT_STAT_RUNT:
  379. if (priv->is_lite)
  380. continue;
  381. if (s->type != BCM_SYSPORT_STAT_MIB_RX)
  382. offset = UMAC_MIB_STAT_OFFSET;
  383. val = umac_readl(priv, UMAC_MIB_START + j + offset);
  384. break;
  385. case BCM_SYSPORT_STAT_RXCHK:
  386. val = rxchk_readl(priv, s->reg_offset);
  387. if (val == ~0)
  388. rxchk_writel(priv, 0, s->reg_offset);
  389. break;
  390. case BCM_SYSPORT_STAT_RBUF:
  391. val = rbuf_readl(priv, s->reg_offset);
  392. if (val == ~0)
  393. rbuf_writel(priv, 0, s->reg_offset);
  394. break;
  395. }
  396. j += s->stat_sizeof;
  397. p = (char *)priv + s->stat_offset;
  398. *(u32 *)p = val;
  399. }
  400. netif_dbg(priv, hw, priv->netdev, "updated MIB counters\n");
  401. }
  402. static void bcm_sysport_update_tx_stats(struct bcm_sysport_priv *priv,
  403. u64 *tx_bytes, u64 *tx_packets)
  404. {
  405. struct bcm_sysport_tx_ring *ring;
  406. u64 bytes = 0, packets = 0;
  407. unsigned int start;
  408. unsigned int q;
  409. for (q = 0; q < priv->netdev->num_tx_queues; q++) {
  410. ring = &priv->tx_rings[q];
  411. do {
  412. start = u64_stats_fetch_begin_irq(&priv->syncp);
  413. bytes = ring->bytes;
  414. packets = ring->packets;
  415. } while (u64_stats_fetch_retry_irq(&priv->syncp, start));
  416. *tx_bytes += bytes;
  417. *tx_packets += packets;
  418. }
  419. }
  420. static void bcm_sysport_get_stats(struct net_device *dev,
  421. struct ethtool_stats *stats, u64 *data)
  422. {
  423. struct bcm_sysport_priv *priv = netdev_priv(dev);
  424. struct bcm_sysport_stats64 *stats64 = &priv->stats64;
  425. struct u64_stats_sync *syncp = &priv->syncp;
  426. struct bcm_sysport_tx_ring *ring;
  427. u64 tx_bytes = 0, tx_packets = 0;
  428. unsigned int start;
  429. int i, j;
  430. if (netif_running(dev)) {
  431. bcm_sysport_update_mib_counters(priv);
  432. bcm_sysport_update_tx_stats(priv, &tx_bytes, &tx_packets);
  433. stats64->tx_bytes = tx_bytes;
  434. stats64->tx_packets = tx_packets;
  435. }
  436. for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
  437. const struct bcm_sysport_stats *s;
  438. char *p;
  439. s = &bcm_sysport_gstrings_stats[i];
  440. if (s->type == BCM_SYSPORT_STAT_NETDEV)
  441. p = (char *)&dev->stats;
  442. else if (s->type == BCM_SYSPORT_STAT_NETDEV64)
  443. p = (char *)stats64;
  444. else
  445. p = (char *)priv;
  446. if (priv->is_lite && !bcm_sysport_lite_stat_valid(s->type))
  447. continue;
  448. p += s->stat_offset;
  449. if (s->stat_sizeof == sizeof(u64) &&
  450. s->type == BCM_SYSPORT_STAT_NETDEV64) {
  451. do {
  452. start = u64_stats_fetch_begin_irq(syncp);
  453. data[i] = *(u64 *)p;
  454. } while (u64_stats_fetch_retry_irq(syncp, start));
  455. } else
  456. data[i] = *(u32 *)p;
  457. j++;
  458. }
  459. /* For SYSTEMPORT Lite since we have holes in our statistics, j would
  460. * be equal to BCM_SYSPORT_STATS_LEN at the end of the loop, but it
  461. * needs to point to how many total statistics we have minus the
  462. * number of per TX queue statistics
  463. */
  464. j = bcm_sysport_get_sset_count(dev, ETH_SS_STATS) -
  465. dev->num_tx_queues * NUM_SYSPORT_TXQ_STAT;
  466. for (i = 0; i < dev->num_tx_queues; i++) {
  467. ring = &priv->tx_rings[i];
  468. data[j] = ring->packets;
  469. j++;
  470. data[j] = ring->bytes;
  471. j++;
  472. }
  473. }
  474. static void bcm_sysport_get_wol(struct net_device *dev,
  475. struct ethtool_wolinfo *wol)
  476. {
  477. struct bcm_sysport_priv *priv = netdev_priv(dev);
  478. wol->supported = WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_FILTER;
  479. wol->wolopts = priv->wolopts;
  480. if (!(priv->wolopts & WAKE_MAGICSECURE))
  481. return;
  482. memcpy(wol->sopass, priv->sopass, sizeof(priv->sopass));
  483. }
  484. static int bcm_sysport_set_wol(struct net_device *dev,
  485. struct ethtool_wolinfo *wol)
  486. {
  487. struct bcm_sysport_priv *priv = netdev_priv(dev);
  488. struct device *kdev = &priv->pdev->dev;
  489. u32 supported = WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_FILTER;
  490. if (!device_can_wakeup(kdev))
  491. return -ENOTSUPP;
  492. if (wol->wolopts & ~supported)
  493. return -EINVAL;
  494. if (wol->wolopts & WAKE_MAGICSECURE)
  495. memcpy(priv->sopass, wol->sopass, sizeof(priv->sopass));
  496. /* Flag the device and relevant IRQ as wakeup capable */
  497. if (wol->wolopts) {
  498. device_set_wakeup_enable(kdev, 1);
  499. if (priv->wol_irq_disabled)
  500. enable_irq_wake(priv->wol_irq);
  501. priv->wol_irq_disabled = 0;
  502. } else {
  503. device_set_wakeup_enable(kdev, 0);
  504. /* Avoid unbalanced disable_irq_wake calls */
  505. if (!priv->wol_irq_disabled)
  506. disable_irq_wake(priv->wol_irq);
  507. priv->wol_irq_disabled = 1;
  508. }
  509. priv->wolopts = wol->wolopts;
  510. return 0;
  511. }
  512. static void bcm_sysport_set_rx_coalesce(struct bcm_sysport_priv *priv,
  513. u32 usecs, u32 pkts)
  514. {
  515. u32 reg;
  516. reg = rdma_readl(priv, RDMA_MBDONE_INTR);
  517. reg &= ~(RDMA_INTR_THRESH_MASK |
  518. RDMA_TIMEOUT_MASK << RDMA_TIMEOUT_SHIFT);
  519. reg |= pkts;
  520. reg |= DIV_ROUND_UP(usecs * 1000, 8192) << RDMA_TIMEOUT_SHIFT;
  521. rdma_writel(priv, reg, RDMA_MBDONE_INTR);
  522. }
  523. static void bcm_sysport_set_tx_coalesce(struct bcm_sysport_tx_ring *ring,
  524. struct ethtool_coalesce *ec)
  525. {
  526. struct bcm_sysport_priv *priv = ring->priv;
  527. u32 reg;
  528. reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(ring->index));
  529. reg &= ~(RING_INTR_THRESH_MASK |
  530. RING_TIMEOUT_MASK << RING_TIMEOUT_SHIFT);
  531. reg |= ec->tx_max_coalesced_frames;
  532. reg |= DIV_ROUND_UP(ec->tx_coalesce_usecs * 1000, 8192) <<
  533. RING_TIMEOUT_SHIFT;
  534. tdma_writel(priv, reg, TDMA_DESC_RING_INTR_CONTROL(ring->index));
  535. }
  536. static int bcm_sysport_get_coalesce(struct net_device *dev,
  537. struct ethtool_coalesce *ec,
  538. struct kernel_ethtool_coalesce *kernel_coal,
  539. struct netlink_ext_ack *extack)
  540. {
  541. struct bcm_sysport_priv *priv = netdev_priv(dev);
  542. u32 reg;
  543. reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(0));
  544. ec->tx_coalesce_usecs = (reg >> RING_TIMEOUT_SHIFT) * 8192 / 1000;
  545. ec->tx_max_coalesced_frames = reg & RING_INTR_THRESH_MASK;
  546. reg = rdma_readl(priv, RDMA_MBDONE_INTR);
  547. ec->rx_coalesce_usecs = (reg >> RDMA_TIMEOUT_SHIFT) * 8192 / 1000;
  548. ec->rx_max_coalesced_frames = reg & RDMA_INTR_THRESH_MASK;
  549. ec->use_adaptive_rx_coalesce = priv->dim.use_dim;
  550. return 0;
  551. }
  552. static int bcm_sysport_set_coalesce(struct net_device *dev,
  553. struct ethtool_coalesce *ec,
  554. struct kernel_ethtool_coalesce *kernel_coal,
  555. struct netlink_ext_ack *extack)
  556. {
  557. struct bcm_sysport_priv *priv = netdev_priv(dev);
  558. struct dim_cq_moder moder;
  559. u32 usecs, pkts;
  560. unsigned int i;
  561. /* Base system clock is 125Mhz, DMA timeout is this reference clock
  562. * divided by 1024, which yield roughly 8.192 us, our maximum value has
  563. * to fit in the RING_TIMEOUT_MASK (16 bits).
  564. */
  565. if (ec->tx_max_coalesced_frames > RING_INTR_THRESH_MASK ||
  566. ec->tx_coalesce_usecs > (RING_TIMEOUT_MASK * 8) + 1 ||
  567. ec->rx_max_coalesced_frames > RDMA_INTR_THRESH_MASK ||
  568. ec->rx_coalesce_usecs > (RDMA_TIMEOUT_MASK * 8) + 1)
  569. return -EINVAL;
  570. if ((ec->tx_coalesce_usecs == 0 && ec->tx_max_coalesced_frames == 0) ||
  571. (ec->rx_coalesce_usecs == 0 && ec->rx_max_coalesced_frames == 0))
  572. return -EINVAL;
  573. for (i = 0; i < dev->num_tx_queues; i++)
  574. bcm_sysport_set_tx_coalesce(&priv->tx_rings[i], ec);
  575. priv->rx_coalesce_usecs = ec->rx_coalesce_usecs;
  576. priv->rx_max_coalesced_frames = ec->rx_max_coalesced_frames;
  577. usecs = priv->rx_coalesce_usecs;
  578. pkts = priv->rx_max_coalesced_frames;
  579. if (ec->use_adaptive_rx_coalesce && !priv->dim.use_dim) {
  580. moder = net_dim_get_def_rx_moderation(priv->dim.dim.mode);
  581. usecs = moder.usec;
  582. pkts = moder.pkts;
  583. }
  584. priv->dim.use_dim = ec->use_adaptive_rx_coalesce;
  585. /* Apply desired coalescing parameters */
  586. bcm_sysport_set_rx_coalesce(priv, usecs, pkts);
  587. return 0;
  588. }
  589. static void bcm_sysport_free_cb(struct bcm_sysport_cb *cb)
  590. {
  591. dev_consume_skb_any(cb->skb);
  592. cb->skb = NULL;
  593. dma_unmap_addr_set(cb, dma_addr, 0);
  594. }
  595. static struct sk_buff *bcm_sysport_rx_refill(struct bcm_sysport_priv *priv,
  596. struct bcm_sysport_cb *cb)
  597. {
  598. struct device *kdev = &priv->pdev->dev;
  599. struct net_device *ndev = priv->netdev;
  600. struct sk_buff *skb, *rx_skb;
  601. dma_addr_t mapping;
  602. /* Allocate a new SKB for a new packet */
  603. skb = __netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH,
  604. GFP_ATOMIC | __GFP_NOWARN);
  605. if (!skb) {
  606. priv->mib.alloc_rx_buff_failed++;
  607. netif_err(priv, rx_err, ndev, "SKB alloc failed\n");
  608. return NULL;
  609. }
  610. mapping = dma_map_single(kdev, skb->data,
  611. RX_BUF_LENGTH, DMA_FROM_DEVICE);
  612. if (dma_mapping_error(kdev, mapping)) {
  613. priv->mib.rx_dma_failed++;
  614. dev_kfree_skb_any(skb);
  615. netif_err(priv, rx_err, ndev, "DMA mapping failure\n");
  616. return NULL;
  617. }
  618. /* Grab the current SKB on the ring */
  619. rx_skb = cb->skb;
  620. if (likely(rx_skb))
  621. dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
  622. RX_BUF_LENGTH, DMA_FROM_DEVICE);
  623. /* Put the new SKB on the ring */
  624. cb->skb = skb;
  625. dma_unmap_addr_set(cb, dma_addr, mapping);
  626. dma_desc_set_addr(priv, cb->bd_addr, mapping);
  627. netif_dbg(priv, rx_status, ndev, "RX refill\n");
  628. /* Return the current SKB to the caller */
  629. return rx_skb;
  630. }
  631. static int bcm_sysport_alloc_rx_bufs(struct bcm_sysport_priv *priv)
  632. {
  633. struct bcm_sysport_cb *cb;
  634. struct sk_buff *skb;
  635. unsigned int i;
  636. for (i = 0; i < priv->num_rx_bds; i++) {
  637. cb = &priv->rx_cbs[i];
  638. skb = bcm_sysport_rx_refill(priv, cb);
  639. dev_kfree_skb(skb);
  640. if (!cb->skb)
  641. return -ENOMEM;
  642. }
  643. return 0;
  644. }
  645. /* Poll the hardware for up to budget packets to process */
  646. static unsigned int bcm_sysport_desc_rx(struct bcm_sysport_priv *priv,
  647. unsigned int budget)
  648. {
  649. struct bcm_sysport_stats64 *stats64 = &priv->stats64;
  650. struct net_device *ndev = priv->netdev;
  651. unsigned int processed = 0, to_process;
  652. unsigned int processed_bytes = 0;
  653. struct bcm_sysport_cb *cb;
  654. struct sk_buff *skb;
  655. unsigned int p_index;
  656. u16 len, status;
  657. struct bcm_rsb *rsb;
  658. /* Clear status before servicing to reduce spurious interrupts */
  659. intrl2_0_writel(priv, INTRL2_0_RDMA_MBDONE, INTRL2_CPU_CLEAR);
  660. /* Determine how much we should process since last call, SYSTEMPORT Lite
  661. * groups the producer and consumer indexes into the same 32-bit
  662. * which we access using RDMA_CONS_INDEX
  663. */
  664. if (!priv->is_lite)
  665. p_index = rdma_readl(priv, RDMA_PROD_INDEX);
  666. else
  667. p_index = rdma_readl(priv, RDMA_CONS_INDEX);
  668. p_index &= RDMA_PROD_INDEX_MASK;
  669. to_process = (p_index - priv->rx_c_index) & RDMA_CONS_INDEX_MASK;
  670. netif_dbg(priv, rx_status, ndev,
  671. "p_index=%d rx_c_index=%d to_process=%d\n",
  672. p_index, priv->rx_c_index, to_process);
  673. while ((processed < to_process) && (processed < budget)) {
  674. cb = &priv->rx_cbs[priv->rx_read_ptr];
  675. skb = bcm_sysport_rx_refill(priv, cb);
  676. /* We do not have a backing SKB, so we do not a corresponding
  677. * DMA mapping for this incoming packet since
  678. * bcm_sysport_rx_refill always either has both skb and mapping
  679. * or none.
  680. */
  681. if (unlikely(!skb)) {
  682. netif_err(priv, rx_err, ndev, "out of memory!\n");
  683. ndev->stats.rx_dropped++;
  684. ndev->stats.rx_errors++;
  685. goto next;
  686. }
  687. /* Extract the Receive Status Block prepended */
  688. rsb = (struct bcm_rsb *)skb->data;
  689. len = (rsb->rx_status_len >> DESC_LEN_SHIFT) & DESC_LEN_MASK;
  690. status = (rsb->rx_status_len >> DESC_STATUS_SHIFT) &
  691. DESC_STATUS_MASK;
  692. netif_dbg(priv, rx_status, ndev,
  693. "p=%d, c=%d, rd_ptr=%d, len=%d, flag=0x%04x\n",
  694. p_index, priv->rx_c_index, priv->rx_read_ptr,
  695. len, status);
  696. if (unlikely(len > RX_BUF_LENGTH)) {
  697. netif_err(priv, rx_status, ndev, "oversized packet\n");
  698. ndev->stats.rx_length_errors++;
  699. ndev->stats.rx_errors++;
  700. dev_kfree_skb_any(skb);
  701. goto next;
  702. }
  703. if (unlikely(!(status & DESC_EOP) || !(status & DESC_SOP))) {
  704. netif_err(priv, rx_status, ndev, "fragmented packet!\n");
  705. ndev->stats.rx_dropped++;
  706. ndev->stats.rx_errors++;
  707. dev_kfree_skb_any(skb);
  708. goto next;
  709. }
  710. if (unlikely(status & (RX_STATUS_ERR | RX_STATUS_OVFLOW))) {
  711. netif_err(priv, rx_err, ndev, "error packet\n");
  712. if (status & RX_STATUS_OVFLOW)
  713. ndev->stats.rx_over_errors++;
  714. ndev->stats.rx_dropped++;
  715. ndev->stats.rx_errors++;
  716. dev_kfree_skb_any(skb);
  717. goto next;
  718. }
  719. skb_put(skb, len);
  720. /* Hardware validated our checksum */
  721. if (likely(status & DESC_L4_CSUM))
  722. skb->ip_summed = CHECKSUM_UNNECESSARY;
  723. /* Hardware pre-pends packets with 2bytes before Ethernet
  724. * header plus we have the Receive Status Block, strip off all
  725. * of this from the SKB.
  726. */
  727. skb_pull(skb, sizeof(*rsb) + 2);
  728. len -= (sizeof(*rsb) + 2);
  729. processed_bytes += len;
  730. /* UniMAC may forward CRC */
  731. if (priv->crc_fwd) {
  732. skb_trim(skb, len - ETH_FCS_LEN);
  733. len -= ETH_FCS_LEN;
  734. }
  735. skb->protocol = eth_type_trans(skb, ndev);
  736. ndev->stats.rx_packets++;
  737. ndev->stats.rx_bytes += len;
  738. u64_stats_update_begin(&priv->syncp);
  739. stats64->rx_packets++;
  740. stats64->rx_bytes += len;
  741. u64_stats_update_end(&priv->syncp);
  742. napi_gro_receive(&priv->napi, skb);
  743. next:
  744. processed++;
  745. priv->rx_read_ptr++;
  746. if (priv->rx_read_ptr == priv->num_rx_bds)
  747. priv->rx_read_ptr = 0;
  748. }
  749. priv->dim.packets = processed;
  750. priv->dim.bytes = processed_bytes;
  751. return processed;
  752. }
  753. static void bcm_sysport_tx_reclaim_one(struct bcm_sysport_tx_ring *ring,
  754. struct bcm_sysport_cb *cb,
  755. unsigned int *bytes_compl,
  756. unsigned int *pkts_compl)
  757. {
  758. struct bcm_sysport_priv *priv = ring->priv;
  759. struct device *kdev = &priv->pdev->dev;
  760. if (cb->skb) {
  761. *bytes_compl += cb->skb->len;
  762. dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
  763. dma_unmap_len(cb, dma_len),
  764. DMA_TO_DEVICE);
  765. (*pkts_compl)++;
  766. bcm_sysport_free_cb(cb);
  767. /* SKB fragment */
  768. } else if (dma_unmap_addr(cb, dma_addr)) {
  769. *bytes_compl += dma_unmap_len(cb, dma_len);
  770. dma_unmap_page(kdev, dma_unmap_addr(cb, dma_addr),
  771. dma_unmap_len(cb, dma_len), DMA_TO_DEVICE);
  772. dma_unmap_addr_set(cb, dma_addr, 0);
  773. }
  774. }
  775. /* Reclaim queued SKBs for transmission completion, lockless version */
  776. static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
  777. struct bcm_sysport_tx_ring *ring)
  778. {
  779. unsigned int pkts_compl = 0, bytes_compl = 0;
  780. struct net_device *ndev = priv->netdev;
  781. unsigned int txbds_processed = 0;
  782. struct bcm_sysport_cb *cb;
  783. unsigned int txbds_ready;
  784. unsigned int c_index;
  785. u32 hw_ind;
  786. /* Clear status before servicing to reduce spurious interrupts */
  787. if (!ring->priv->is_lite)
  788. intrl2_1_writel(ring->priv, BIT(ring->index), INTRL2_CPU_CLEAR);
  789. else
  790. intrl2_0_writel(ring->priv, BIT(ring->index +
  791. INTRL2_0_TDMA_MBDONE_SHIFT), INTRL2_CPU_CLEAR);
  792. /* Compute how many descriptors have been processed since last call */
  793. hw_ind = tdma_readl(priv, TDMA_DESC_RING_PROD_CONS_INDEX(ring->index));
  794. c_index = (hw_ind >> RING_CONS_INDEX_SHIFT) & RING_CONS_INDEX_MASK;
  795. txbds_ready = (c_index - ring->c_index) & RING_CONS_INDEX_MASK;
  796. netif_dbg(priv, tx_done, ndev,
  797. "ring=%d old_c_index=%u c_index=%u txbds_ready=%u\n",
  798. ring->index, ring->c_index, c_index, txbds_ready);
  799. while (txbds_processed < txbds_ready) {
  800. cb = &ring->cbs[ring->clean_index];
  801. bcm_sysport_tx_reclaim_one(ring, cb, &bytes_compl, &pkts_compl);
  802. ring->desc_count++;
  803. txbds_processed++;
  804. if (likely(ring->clean_index < ring->size - 1))
  805. ring->clean_index++;
  806. else
  807. ring->clean_index = 0;
  808. }
  809. u64_stats_update_begin(&priv->syncp);
  810. ring->packets += pkts_compl;
  811. ring->bytes += bytes_compl;
  812. u64_stats_update_end(&priv->syncp);
  813. ring->c_index = c_index;
  814. netif_dbg(priv, tx_done, ndev,
  815. "ring=%d c_index=%d pkts_compl=%d, bytes_compl=%d\n",
  816. ring->index, ring->c_index, pkts_compl, bytes_compl);
  817. return pkts_compl;
  818. }
  819. /* Locked version of the per-ring TX reclaim routine */
  820. static unsigned int bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
  821. struct bcm_sysport_tx_ring *ring)
  822. {
  823. struct netdev_queue *txq;
  824. unsigned int released;
  825. unsigned long flags;
  826. txq = netdev_get_tx_queue(priv->netdev, ring->index);
  827. spin_lock_irqsave(&ring->lock, flags);
  828. released = __bcm_sysport_tx_reclaim(priv, ring);
  829. if (released)
  830. netif_tx_wake_queue(txq);
  831. spin_unlock_irqrestore(&ring->lock, flags);
  832. return released;
  833. }
  834. /* Locked version of the per-ring TX reclaim, but does not wake the queue */
  835. static void bcm_sysport_tx_clean(struct bcm_sysport_priv *priv,
  836. struct bcm_sysport_tx_ring *ring)
  837. {
  838. unsigned long flags;
  839. spin_lock_irqsave(&ring->lock, flags);
  840. __bcm_sysport_tx_reclaim(priv, ring);
  841. spin_unlock_irqrestore(&ring->lock, flags);
  842. }
  843. static int bcm_sysport_tx_poll(struct napi_struct *napi, int budget)
  844. {
  845. struct bcm_sysport_tx_ring *ring =
  846. container_of(napi, struct bcm_sysport_tx_ring, napi);
  847. unsigned int work_done = 0;
  848. work_done = bcm_sysport_tx_reclaim(ring->priv, ring);
  849. if (work_done == 0) {
  850. napi_complete(napi);
  851. /* re-enable TX interrupt */
  852. if (!ring->priv->is_lite)
  853. intrl2_1_mask_clear(ring->priv, BIT(ring->index));
  854. else
  855. intrl2_0_mask_clear(ring->priv, BIT(ring->index +
  856. INTRL2_0_TDMA_MBDONE_SHIFT));
  857. return 0;
  858. }
  859. return budget;
  860. }
  861. static void bcm_sysport_tx_reclaim_all(struct bcm_sysport_priv *priv)
  862. {
  863. unsigned int q;
  864. for (q = 0; q < priv->netdev->num_tx_queues; q++)
  865. bcm_sysport_tx_reclaim(priv, &priv->tx_rings[q]);
  866. }
  867. static int bcm_sysport_poll(struct napi_struct *napi, int budget)
  868. {
  869. struct bcm_sysport_priv *priv =
  870. container_of(napi, struct bcm_sysport_priv, napi);
  871. struct dim_sample dim_sample = {};
  872. unsigned int work_done = 0;
  873. work_done = bcm_sysport_desc_rx(priv, budget);
  874. priv->rx_c_index += work_done;
  875. priv->rx_c_index &= RDMA_CONS_INDEX_MASK;
  876. /* SYSTEMPORT Lite groups the producer/consumer index, producer is
  877. * maintained by HW, but writes to it will be ignore while RDMA
  878. * is active
  879. */
  880. if (!priv->is_lite)
  881. rdma_writel(priv, priv->rx_c_index, RDMA_CONS_INDEX);
  882. else
  883. rdma_writel(priv, priv->rx_c_index << 16, RDMA_CONS_INDEX);
  884. if (work_done < budget) {
  885. napi_complete_done(napi, work_done);
  886. /* re-enable RX interrupts */
  887. intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE);
  888. }
  889. if (priv->dim.use_dim) {
  890. dim_update_sample(priv->dim.event_ctr, priv->dim.packets,
  891. priv->dim.bytes, &dim_sample);
  892. net_dim(&priv->dim.dim, dim_sample);
  893. }
  894. return work_done;
  895. }
  896. static void mpd_enable_set(struct bcm_sysport_priv *priv, bool enable)
  897. {
  898. u32 reg, bit;
  899. reg = umac_readl(priv, UMAC_MPD_CTRL);
  900. if (enable)
  901. reg |= MPD_EN;
  902. else
  903. reg &= ~MPD_EN;
  904. umac_writel(priv, reg, UMAC_MPD_CTRL);
  905. if (priv->is_lite)
  906. bit = RBUF_ACPI_EN_LITE;
  907. else
  908. bit = RBUF_ACPI_EN;
  909. reg = rbuf_readl(priv, RBUF_CONTROL);
  910. if (enable)
  911. reg |= bit;
  912. else
  913. reg &= ~bit;
  914. rbuf_writel(priv, reg, RBUF_CONTROL);
  915. }
  916. static void bcm_sysport_resume_from_wol(struct bcm_sysport_priv *priv)
  917. {
  918. unsigned int index;
  919. u32 reg;
  920. /* Disable RXCHK, active filters and Broadcom tag matching */
  921. reg = rxchk_readl(priv, RXCHK_CONTROL);
  922. reg &= ~(RXCHK_BRCM_TAG_MATCH_MASK <<
  923. RXCHK_BRCM_TAG_MATCH_SHIFT | RXCHK_EN | RXCHK_BRCM_TAG_EN);
  924. rxchk_writel(priv, reg, RXCHK_CONTROL);
  925. /* Make sure we restore correct CID index in case HW lost
  926. * its context during deep idle state
  927. */
  928. for_each_set_bit(index, priv->filters, RXCHK_BRCM_TAG_MAX) {
  929. rxchk_writel(priv, priv->filters_loc[index] <<
  930. RXCHK_BRCM_TAG_CID_SHIFT, RXCHK_BRCM_TAG(index));
  931. rxchk_writel(priv, 0xff00ffff, RXCHK_BRCM_TAG_MASK(index));
  932. }
  933. /* Clear the MagicPacket detection logic */
  934. mpd_enable_set(priv, false);
  935. reg = intrl2_0_readl(priv, INTRL2_CPU_STATUS);
  936. if (reg & INTRL2_0_MPD)
  937. netdev_info(priv->netdev, "Wake-on-LAN (MPD) interrupt!\n");
  938. if (reg & INTRL2_0_BRCM_MATCH_TAG) {
  939. reg = rxchk_readl(priv, RXCHK_BRCM_TAG_MATCH_STATUS) &
  940. RXCHK_BRCM_TAG_MATCH_MASK;
  941. netdev_info(priv->netdev,
  942. "Wake-on-LAN (filters 0x%02x) interrupt!\n", reg);
  943. }
  944. netif_dbg(priv, wol, priv->netdev, "resumed from WOL\n");
  945. }
  946. static void bcm_sysport_dim_work(struct work_struct *work)
  947. {
  948. struct dim *dim = container_of(work, struct dim, work);
  949. struct bcm_sysport_net_dim *ndim =
  950. container_of(dim, struct bcm_sysport_net_dim, dim);
  951. struct bcm_sysport_priv *priv =
  952. container_of(ndim, struct bcm_sysport_priv, dim);
  953. struct dim_cq_moder cur_profile = net_dim_get_rx_moderation(dim->mode,
  954. dim->profile_ix);
  955. bcm_sysport_set_rx_coalesce(priv, cur_profile.usec, cur_profile.pkts);
  956. dim->state = DIM_START_MEASURE;
  957. }
  958. /* RX and misc interrupt routine */
  959. static irqreturn_t bcm_sysport_rx_isr(int irq, void *dev_id)
  960. {
  961. struct net_device *dev = dev_id;
  962. struct bcm_sysport_priv *priv = netdev_priv(dev);
  963. struct bcm_sysport_tx_ring *txr;
  964. unsigned int ring, ring_bit;
  965. priv->irq0_stat = intrl2_0_readl(priv, INTRL2_CPU_STATUS) &
  966. ~intrl2_0_readl(priv, INTRL2_CPU_MASK_STATUS);
  967. intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR);
  968. if (unlikely(priv->irq0_stat == 0)) {
  969. netdev_warn(priv->netdev, "spurious RX interrupt\n");
  970. return IRQ_NONE;
  971. }
  972. if (priv->irq0_stat & INTRL2_0_RDMA_MBDONE) {
  973. priv->dim.event_ctr++;
  974. if (likely(napi_schedule_prep(&priv->napi))) {
  975. /* disable RX interrupts */
  976. intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE);
  977. __napi_schedule_irqoff(&priv->napi);
  978. }
  979. }
  980. /* TX ring is full, perform a full reclaim since we do not know
  981. * which one would trigger this interrupt
  982. */
  983. if (priv->irq0_stat & INTRL2_0_TX_RING_FULL)
  984. bcm_sysport_tx_reclaim_all(priv);
  985. if (!priv->is_lite)
  986. goto out;
  987. for (ring = 0; ring < dev->num_tx_queues; ring++) {
  988. ring_bit = BIT(ring + INTRL2_0_TDMA_MBDONE_SHIFT);
  989. if (!(priv->irq0_stat & ring_bit))
  990. continue;
  991. txr = &priv->tx_rings[ring];
  992. if (likely(napi_schedule_prep(&txr->napi))) {
  993. intrl2_0_mask_set(priv, ring_bit);
  994. __napi_schedule(&txr->napi);
  995. }
  996. }
  997. out:
  998. return IRQ_HANDLED;
  999. }
  1000. /* TX interrupt service routine */
  1001. static irqreturn_t bcm_sysport_tx_isr(int irq, void *dev_id)
  1002. {
  1003. struct net_device *dev = dev_id;
  1004. struct bcm_sysport_priv *priv = netdev_priv(dev);
  1005. struct bcm_sysport_tx_ring *txr;
  1006. unsigned int ring;
  1007. priv->irq1_stat = intrl2_1_readl(priv, INTRL2_CPU_STATUS) &
  1008. ~intrl2_1_readl(priv, INTRL2_CPU_MASK_STATUS);
  1009. intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
  1010. if (unlikely(priv->irq1_stat == 0)) {
  1011. netdev_warn(priv->netdev, "spurious TX interrupt\n");
  1012. return IRQ_NONE;
  1013. }
  1014. for (ring = 0; ring < dev->num_tx_queues; ring++) {
  1015. if (!(priv->irq1_stat & BIT(ring)))
  1016. continue;
  1017. txr = &priv->tx_rings[ring];
  1018. if (likely(napi_schedule_prep(&txr->napi))) {
  1019. intrl2_1_mask_set(priv, BIT(ring));
  1020. __napi_schedule_irqoff(&txr->napi);
  1021. }
  1022. }
  1023. return IRQ_HANDLED;
  1024. }
  1025. static irqreturn_t bcm_sysport_wol_isr(int irq, void *dev_id)
  1026. {
  1027. struct bcm_sysport_priv *priv = dev_id;
  1028. pm_wakeup_event(&priv->pdev->dev, 0);
  1029. return IRQ_HANDLED;
  1030. }
  1031. #ifdef CONFIG_NET_POLL_CONTROLLER
  1032. static void bcm_sysport_poll_controller(struct net_device *dev)
  1033. {
  1034. struct bcm_sysport_priv *priv = netdev_priv(dev);
  1035. disable_irq(priv->irq0);
  1036. bcm_sysport_rx_isr(priv->irq0, priv);
  1037. enable_irq(priv->irq0);
  1038. if (!priv->is_lite) {
  1039. disable_irq(priv->irq1);
  1040. bcm_sysport_tx_isr(priv->irq1, priv);
  1041. enable_irq(priv->irq1);
  1042. }
  1043. }
  1044. #endif
  1045. static struct sk_buff *bcm_sysport_insert_tsb(struct sk_buff *skb,
  1046. struct net_device *dev)
  1047. {
  1048. struct bcm_sysport_priv *priv = netdev_priv(dev);
  1049. struct sk_buff *nskb;
  1050. struct bcm_tsb *tsb;
  1051. u32 csum_info;
  1052. u8 ip_proto;
  1053. u16 csum_start;
  1054. __be16 ip_ver;
  1055. /* Re-allocate SKB if needed */
  1056. if (unlikely(skb_headroom(skb) < sizeof(*tsb))) {
  1057. nskb = skb_realloc_headroom(skb, sizeof(*tsb));
  1058. if (!nskb) {
  1059. dev_kfree_skb_any(skb);
  1060. priv->mib.tx_realloc_tsb_failed++;
  1061. dev->stats.tx_errors++;
  1062. dev->stats.tx_dropped++;
  1063. return NULL;
  1064. }
  1065. dev_consume_skb_any(skb);
  1066. skb = nskb;
  1067. priv->mib.tx_realloc_tsb++;
  1068. }
  1069. tsb = skb_push(skb, sizeof(*tsb));
  1070. /* Zero-out TSB by default */
  1071. memset(tsb, 0, sizeof(*tsb));
  1072. if (skb_vlan_tag_present(skb)) {
  1073. tsb->pcp_dei_vid = skb_vlan_tag_get_prio(skb) & PCP_DEI_MASK;
  1074. tsb->pcp_dei_vid |= (u32)skb_vlan_tag_get_id(skb) << VID_SHIFT;
  1075. }
  1076. if (skb->ip_summed == CHECKSUM_PARTIAL) {
  1077. ip_ver = skb->protocol;
  1078. switch (ip_ver) {
  1079. case htons(ETH_P_IP):
  1080. ip_proto = ip_hdr(skb)->protocol;
  1081. break;
  1082. case htons(ETH_P_IPV6):
  1083. ip_proto = ipv6_hdr(skb)->nexthdr;
  1084. break;
  1085. default:
  1086. return skb;
  1087. }
  1088. /* Get the checksum offset and the L4 (transport) offset */
  1089. csum_start = skb_checksum_start_offset(skb) - sizeof(*tsb);
  1090. /* Account for the HW inserted VLAN tag */
  1091. if (skb_vlan_tag_present(skb))
  1092. csum_start += VLAN_HLEN;
  1093. csum_info = (csum_start + skb->csum_offset) & L4_CSUM_PTR_MASK;
  1094. csum_info |= (csum_start << L4_PTR_SHIFT);
  1095. if (ip_proto == IPPROTO_TCP || ip_proto == IPPROTO_UDP) {
  1096. csum_info |= L4_LENGTH_VALID;
  1097. if (ip_proto == IPPROTO_UDP &&
  1098. ip_ver == htons(ETH_P_IP))
  1099. csum_info |= L4_UDP;
  1100. } else {
  1101. csum_info = 0;
  1102. }
  1103. tsb->l4_ptr_dest_map = csum_info;
  1104. }
  1105. return skb;
  1106. }
  1107. static netdev_tx_t bcm_sysport_xmit(struct sk_buff *skb,
  1108. struct net_device *dev)
  1109. {
  1110. struct bcm_sysport_priv *priv = netdev_priv(dev);
  1111. struct device *kdev = &priv->pdev->dev;
  1112. struct bcm_sysport_tx_ring *ring;
  1113. unsigned long flags, desc_flags;
  1114. struct bcm_sysport_cb *cb;
  1115. struct netdev_queue *txq;
  1116. u32 len_status, addr_lo;
  1117. unsigned int skb_len;
  1118. dma_addr_t mapping;
  1119. u16 queue;
  1120. int ret;
  1121. queue = skb_get_queue_mapping(skb);
  1122. txq = netdev_get_tx_queue(dev, queue);
  1123. ring = &priv->tx_rings[queue];
  1124. /* lock against tx reclaim in BH context and TX ring full interrupt */
  1125. spin_lock_irqsave(&ring->lock, flags);
  1126. if (unlikely(ring->desc_count == 0)) {
  1127. netif_tx_stop_queue(txq);
  1128. netdev_err(dev, "queue %d awake and ring full!\n", queue);
  1129. ret = NETDEV_TX_BUSY;
  1130. goto out;
  1131. }
  1132. /* Insert TSB and checksum infos */
  1133. if (priv->tsb_en) {
  1134. skb = bcm_sysport_insert_tsb(skb, dev);
  1135. if (!skb) {
  1136. ret = NETDEV_TX_OK;
  1137. goto out;
  1138. }
  1139. }
  1140. skb_len = skb->len;
  1141. mapping = dma_map_single(kdev, skb->data, skb_len, DMA_TO_DEVICE);
  1142. if (dma_mapping_error(kdev, mapping)) {
  1143. priv->mib.tx_dma_failed++;
  1144. netif_err(priv, tx_err, dev, "DMA map failed at %p (len=%d)\n",
  1145. skb->data, skb_len);
  1146. ret = NETDEV_TX_OK;
  1147. goto out;
  1148. }
  1149. /* Remember the SKB for future freeing */
  1150. cb = &ring->cbs[ring->curr_desc];
  1151. cb->skb = skb;
  1152. dma_unmap_addr_set(cb, dma_addr, mapping);
  1153. dma_unmap_len_set(cb, dma_len, skb_len);
  1154. addr_lo = lower_32_bits(mapping);
  1155. len_status = upper_32_bits(mapping) & DESC_ADDR_HI_MASK;
  1156. len_status |= (skb_len << DESC_LEN_SHIFT);
  1157. len_status |= (DESC_SOP | DESC_EOP | TX_STATUS_APP_CRC) <<
  1158. DESC_STATUS_SHIFT;
  1159. if (skb->ip_summed == CHECKSUM_PARTIAL)
  1160. len_status |= (DESC_L4_CSUM << DESC_STATUS_SHIFT);
  1161. if (skb_vlan_tag_present(skb))
  1162. len_status |= (TX_STATUS_VLAN_VID_TSB << DESC_STATUS_SHIFT);
  1163. ring->curr_desc++;
  1164. if (ring->curr_desc == ring->size)
  1165. ring->curr_desc = 0;
  1166. ring->desc_count--;
  1167. /* Ports are latched, so write upper address first */
  1168. spin_lock_irqsave(&priv->desc_lock, desc_flags);
  1169. tdma_writel(priv, len_status, TDMA_WRITE_PORT_HI(ring->index));
  1170. tdma_writel(priv, addr_lo, TDMA_WRITE_PORT_LO(ring->index));
  1171. spin_unlock_irqrestore(&priv->desc_lock, desc_flags);
  1172. /* Check ring space and update SW control flow */
  1173. if (ring->desc_count == 0)
  1174. netif_tx_stop_queue(txq);
  1175. netif_dbg(priv, tx_queued, dev, "ring=%d desc_count=%d, curr_desc=%d\n",
  1176. ring->index, ring->desc_count, ring->curr_desc);
  1177. ret = NETDEV_TX_OK;
  1178. out:
  1179. spin_unlock_irqrestore(&ring->lock, flags);
  1180. return ret;
  1181. }
  1182. static void bcm_sysport_tx_timeout(struct net_device *dev, unsigned int txqueue)
  1183. {
  1184. netdev_warn(dev, "transmit timeout!\n");
  1185. netif_trans_update(dev);
  1186. dev->stats.tx_errors++;
  1187. netif_tx_wake_all_queues(dev);
  1188. }
  1189. /* phylib adjust link callback */
  1190. static void bcm_sysport_adj_link(struct net_device *dev)
  1191. {
  1192. struct bcm_sysport_priv *priv = netdev_priv(dev);
  1193. struct phy_device *phydev = dev->phydev;
  1194. unsigned int changed = 0;
  1195. u32 cmd_bits = 0, reg;
  1196. if (priv->old_link != phydev->link) {
  1197. changed = 1;
  1198. priv->old_link = phydev->link;
  1199. }
  1200. if (priv->old_duplex != phydev->duplex) {
  1201. changed = 1;
  1202. priv->old_duplex = phydev->duplex;
  1203. }
  1204. if (priv->is_lite)
  1205. goto out;
  1206. switch (phydev->speed) {
  1207. case SPEED_2500:
  1208. cmd_bits = CMD_SPEED_2500;
  1209. break;
  1210. case SPEED_1000:
  1211. cmd_bits = CMD_SPEED_1000;
  1212. break;
  1213. case SPEED_100:
  1214. cmd_bits = CMD_SPEED_100;
  1215. break;
  1216. case SPEED_10:
  1217. cmd_bits = CMD_SPEED_10;
  1218. break;
  1219. default:
  1220. break;
  1221. }
  1222. cmd_bits <<= CMD_SPEED_SHIFT;
  1223. if (phydev->duplex == DUPLEX_HALF)
  1224. cmd_bits |= CMD_HD_EN;
  1225. if (priv->old_pause != phydev->pause) {
  1226. changed = 1;
  1227. priv->old_pause = phydev->pause;
  1228. }
  1229. if (!phydev->pause)
  1230. cmd_bits |= CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE;
  1231. if (!changed)
  1232. return;
  1233. if (phydev->link) {
  1234. reg = umac_readl(priv, UMAC_CMD);
  1235. reg &= ~((CMD_SPEED_MASK << CMD_SPEED_SHIFT) |
  1236. CMD_HD_EN | CMD_RX_PAUSE_IGNORE |
  1237. CMD_TX_PAUSE_IGNORE);
  1238. reg |= cmd_bits;
  1239. umac_writel(priv, reg, UMAC_CMD);
  1240. }
  1241. out:
  1242. if (changed)
  1243. phy_print_status(phydev);
  1244. }
  1245. static void bcm_sysport_init_dim(struct bcm_sysport_priv *priv,
  1246. void (*cb)(struct work_struct *work))
  1247. {
  1248. struct bcm_sysport_net_dim *dim = &priv->dim;
  1249. INIT_WORK(&dim->dim.work, cb);
  1250. dim->dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;
  1251. dim->event_ctr = 0;
  1252. dim->packets = 0;
  1253. dim->bytes = 0;
  1254. }
  1255. static void bcm_sysport_init_rx_coalesce(struct bcm_sysport_priv *priv)
  1256. {
  1257. struct bcm_sysport_net_dim *dim = &priv->dim;
  1258. struct dim_cq_moder moder;
  1259. u32 usecs, pkts;
  1260. usecs = priv->rx_coalesce_usecs;
  1261. pkts = priv->rx_max_coalesced_frames;
  1262. /* If DIM was enabled, re-apply default parameters */
  1263. if (dim->use_dim) {
  1264. moder = net_dim_get_def_rx_moderation(dim->dim.mode);
  1265. usecs = moder.usec;
  1266. pkts = moder.pkts;
  1267. }
  1268. bcm_sysport_set_rx_coalesce(priv, usecs, pkts);
  1269. }
  1270. static int bcm_sysport_init_tx_ring(struct bcm_sysport_priv *priv,
  1271. unsigned int index)
  1272. {
  1273. struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
  1274. size_t size;
  1275. u32 reg;
  1276. /* Simple descriptors partitioning for now */
  1277. size = 256;
  1278. ring->cbs = kcalloc(size, sizeof(struct bcm_sysport_cb), GFP_KERNEL);
  1279. if (!ring->cbs) {
  1280. netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
  1281. return -ENOMEM;
  1282. }
  1283. /* Initialize SW view of the ring */
  1284. spin_lock_init(&ring->lock);
  1285. ring->priv = priv;
  1286. netif_napi_add_tx(priv->netdev, &ring->napi, bcm_sysport_tx_poll);
  1287. ring->index = index;
  1288. ring->size = size;
  1289. ring->clean_index = 0;
  1290. ring->alloc_size = ring->size;
  1291. ring->desc_count = ring->size;
  1292. ring->curr_desc = 0;
  1293. /* Initialize HW ring */
  1294. tdma_writel(priv, RING_EN, TDMA_DESC_RING_HEAD_TAIL_PTR(index));
  1295. tdma_writel(priv, 0, TDMA_DESC_RING_COUNT(index));
  1296. tdma_writel(priv, 1, TDMA_DESC_RING_INTR_CONTROL(index));
  1297. tdma_writel(priv, 0, TDMA_DESC_RING_PROD_CONS_INDEX(index));
  1298. /* Configure QID and port mapping */
  1299. reg = tdma_readl(priv, TDMA_DESC_RING_MAPPING(index));
  1300. reg &= ~(RING_QID_MASK | RING_PORT_ID_MASK << RING_PORT_ID_SHIFT);
  1301. if (ring->inspect) {
  1302. reg |= ring->switch_queue & RING_QID_MASK;
  1303. reg |= ring->switch_port << RING_PORT_ID_SHIFT;
  1304. } else {
  1305. reg |= RING_IGNORE_STATUS;
  1306. }
  1307. tdma_writel(priv, reg, TDMA_DESC_RING_MAPPING(index));
  1308. reg = 0;
  1309. /* Adjust the packet size calculations if SYSTEMPORT is responsible
  1310. * for HW insertion of VLAN tags
  1311. */
  1312. if (priv->netdev->features & NETIF_F_HW_VLAN_CTAG_TX)
  1313. reg = VLAN_HLEN << RING_PKT_SIZE_ADJ_SHIFT;
  1314. tdma_writel(priv, reg, TDMA_DESC_RING_PCP_DEI_VID(index));
  1315. /* Enable ACB algorithm 2 */
  1316. reg = tdma_readl(priv, TDMA_CONTROL);
  1317. reg |= tdma_control_bit(priv, ACB_ALGO);
  1318. tdma_writel(priv, reg, TDMA_CONTROL);
  1319. /* Do not use tdma_control_bit() here because TSB_SWAP1 collides
  1320. * with the original definition of ACB_ALGO
  1321. */
  1322. reg = tdma_readl(priv, TDMA_CONTROL);
  1323. if (priv->is_lite)
  1324. reg &= ~BIT(TSB_SWAP1);
  1325. /* Set a correct TSB format based on host endian */
  1326. if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
  1327. reg |= tdma_control_bit(priv, TSB_SWAP0);
  1328. else
  1329. reg &= ~tdma_control_bit(priv, TSB_SWAP0);
  1330. tdma_writel(priv, reg, TDMA_CONTROL);
  1331. /* Program the number of descriptors as MAX_THRESHOLD and half of
  1332. * its size for the hysteresis trigger
  1333. */
  1334. tdma_writel(priv, ring->size |
  1335. 1 << RING_HYST_THRESH_SHIFT,
  1336. TDMA_DESC_RING_MAX_HYST(index));
  1337. /* Enable the ring queue in the arbiter */
  1338. reg = tdma_readl(priv, TDMA_TIER1_ARB_0_QUEUE_EN);
  1339. reg |= (1 << index);
  1340. tdma_writel(priv, reg, TDMA_TIER1_ARB_0_QUEUE_EN);
  1341. napi_enable(&ring->napi);
  1342. netif_dbg(priv, hw, priv->netdev,
  1343. "TDMA cfg, size=%d, switch q=%d,port=%d\n",
  1344. ring->size, ring->switch_queue,
  1345. ring->switch_port);
  1346. return 0;
  1347. }
  1348. static void bcm_sysport_fini_tx_ring(struct bcm_sysport_priv *priv,
  1349. unsigned int index)
  1350. {
  1351. struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
  1352. u32 reg;
  1353. /* Caller should stop the TDMA engine */
  1354. reg = tdma_readl(priv, TDMA_STATUS);
  1355. if (!(reg & TDMA_DISABLED))
  1356. netdev_warn(priv->netdev, "TDMA not stopped!\n");
  1357. /* ring->cbs is the last part in bcm_sysport_init_tx_ring which could
  1358. * fail, so by checking this pointer we know whether the TX ring was
  1359. * fully initialized or not.
  1360. */
  1361. if (!ring->cbs)
  1362. return;
  1363. napi_disable(&ring->napi);
  1364. netif_napi_del(&ring->napi);
  1365. bcm_sysport_tx_clean(priv, ring);
  1366. kfree(ring->cbs);
  1367. ring->cbs = NULL;
  1368. ring->size = 0;
  1369. ring->alloc_size = 0;
  1370. netif_dbg(priv, hw, priv->netdev, "TDMA fini done\n");
  1371. }
  1372. /* RDMA helper */
  1373. static inline int rdma_enable_set(struct bcm_sysport_priv *priv,
  1374. unsigned int enable)
  1375. {
  1376. unsigned int timeout = 1000;
  1377. u32 reg;
  1378. reg = rdma_readl(priv, RDMA_CONTROL);
  1379. if (enable)
  1380. reg |= RDMA_EN;
  1381. else
  1382. reg &= ~RDMA_EN;
  1383. rdma_writel(priv, reg, RDMA_CONTROL);
  1384. /* Poll for RMDA disabling completion */
  1385. do {
  1386. reg = rdma_readl(priv, RDMA_STATUS);
  1387. if (!!(reg & RDMA_DISABLED) == !enable)
  1388. return 0;
  1389. usleep_range(1000, 2000);
  1390. } while (timeout-- > 0);
  1391. netdev_err(priv->netdev, "timeout waiting for RDMA to finish\n");
  1392. return -ETIMEDOUT;
  1393. }
  1394. /* TDMA helper */
  1395. static inline int tdma_enable_set(struct bcm_sysport_priv *priv,
  1396. unsigned int enable)
  1397. {
  1398. unsigned int timeout = 1000;
  1399. u32 reg;
  1400. reg = tdma_readl(priv, TDMA_CONTROL);
  1401. if (enable)
  1402. reg |= tdma_control_bit(priv, TDMA_EN);
  1403. else
  1404. reg &= ~tdma_control_bit(priv, TDMA_EN);
  1405. tdma_writel(priv, reg, TDMA_CONTROL);
  1406. /* Poll for TMDA disabling completion */
  1407. do {
  1408. reg = tdma_readl(priv, TDMA_STATUS);
  1409. if (!!(reg & TDMA_DISABLED) == !enable)
  1410. return 0;
  1411. usleep_range(1000, 2000);
  1412. } while (timeout-- > 0);
  1413. netdev_err(priv->netdev, "timeout waiting for TDMA to finish\n");
  1414. return -ETIMEDOUT;
  1415. }
  1416. static int bcm_sysport_init_rx_ring(struct bcm_sysport_priv *priv)
  1417. {
  1418. struct bcm_sysport_cb *cb;
  1419. u32 reg;
  1420. int ret;
  1421. int i;
  1422. /* Initialize SW view of the RX ring */
  1423. priv->num_rx_bds = priv->num_rx_desc_words / WORDS_PER_DESC;
  1424. priv->rx_bds = priv->base + SYS_PORT_RDMA_OFFSET;
  1425. priv->rx_c_index = 0;
  1426. priv->rx_read_ptr = 0;
  1427. priv->rx_cbs = kcalloc(priv->num_rx_bds, sizeof(struct bcm_sysport_cb),
  1428. GFP_KERNEL);
  1429. if (!priv->rx_cbs) {
  1430. netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
  1431. return -ENOMEM;
  1432. }
  1433. for (i = 0; i < priv->num_rx_bds; i++) {
  1434. cb = priv->rx_cbs + i;
  1435. cb->bd_addr = priv->rx_bds + i * DESC_SIZE;
  1436. }
  1437. ret = bcm_sysport_alloc_rx_bufs(priv);
  1438. if (ret) {
  1439. netif_err(priv, hw, priv->netdev, "SKB allocation failed\n");
  1440. return ret;
  1441. }
  1442. /* Initialize HW, ensure RDMA is disabled */
  1443. reg = rdma_readl(priv, RDMA_STATUS);
  1444. if (!(reg & RDMA_DISABLED))
  1445. rdma_enable_set(priv, 0);
  1446. rdma_writel(priv, 0, RDMA_WRITE_PTR_LO);
  1447. rdma_writel(priv, 0, RDMA_WRITE_PTR_HI);
  1448. rdma_writel(priv, 0, RDMA_PROD_INDEX);
  1449. rdma_writel(priv, 0, RDMA_CONS_INDEX);
  1450. rdma_writel(priv, priv->num_rx_bds << RDMA_RING_SIZE_SHIFT |
  1451. RX_BUF_LENGTH, RDMA_RING_BUF_SIZE);
  1452. /* Operate the queue in ring mode */
  1453. rdma_writel(priv, 0, RDMA_START_ADDR_HI);
  1454. rdma_writel(priv, 0, RDMA_START_ADDR_LO);
  1455. rdma_writel(priv, 0, RDMA_END_ADDR_HI);
  1456. rdma_writel(priv, priv->num_rx_desc_words - 1, RDMA_END_ADDR_LO);
  1457. netif_dbg(priv, hw, priv->netdev,
  1458. "RDMA cfg, num_rx_bds=%d, rx_bds=%p\n",
  1459. priv->num_rx_bds, priv->rx_bds);
  1460. return 0;
  1461. }
  1462. static void bcm_sysport_fini_rx_ring(struct bcm_sysport_priv *priv)
  1463. {
  1464. struct bcm_sysport_cb *cb;
  1465. unsigned int i;
  1466. u32 reg;
  1467. /* Caller should ensure RDMA is disabled */
  1468. reg = rdma_readl(priv, RDMA_STATUS);
  1469. if (!(reg & RDMA_DISABLED))
  1470. netdev_warn(priv->netdev, "RDMA not stopped!\n");
  1471. for (i = 0; i < priv->num_rx_bds; i++) {
  1472. cb = &priv->rx_cbs[i];
  1473. if (dma_unmap_addr(cb, dma_addr))
  1474. dma_unmap_single(&priv->pdev->dev,
  1475. dma_unmap_addr(cb, dma_addr),
  1476. RX_BUF_LENGTH, DMA_FROM_DEVICE);
  1477. bcm_sysport_free_cb(cb);
  1478. }
  1479. kfree(priv->rx_cbs);
  1480. priv->rx_cbs = NULL;
  1481. netif_dbg(priv, hw, priv->netdev, "RDMA fini done\n");
  1482. }
  1483. static void bcm_sysport_set_rx_mode(struct net_device *dev)
  1484. {
  1485. struct bcm_sysport_priv *priv = netdev_priv(dev);
  1486. u32 reg;
  1487. if (priv->is_lite)
  1488. return;
  1489. reg = umac_readl(priv, UMAC_CMD);
  1490. if (dev->flags & IFF_PROMISC)
  1491. reg |= CMD_PROMISC;
  1492. else
  1493. reg &= ~CMD_PROMISC;
  1494. umac_writel(priv, reg, UMAC_CMD);
  1495. /* No support for ALLMULTI */
  1496. if (dev->flags & IFF_ALLMULTI)
  1497. return;
  1498. }
  1499. static inline void umac_enable_set(struct bcm_sysport_priv *priv,
  1500. u32 mask, unsigned int enable)
  1501. {
  1502. u32 reg;
  1503. if (!priv->is_lite) {
  1504. reg = umac_readl(priv, UMAC_CMD);
  1505. if (enable)
  1506. reg |= mask;
  1507. else
  1508. reg &= ~mask;
  1509. umac_writel(priv, reg, UMAC_CMD);
  1510. } else {
  1511. reg = gib_readl(priv, GIB_CONTROL);
  1512. if (enable)
  1513. reg |= mask;
  1514. else
  1515. reg &= ~mask;
  1516. gib_writel(priv, reg, GIB_CONTROL);
  1517. }
  1518. /* UniMAC stops on a packet boundary, wait for a full-sized packet
  1519. * to be processed (1 msec).
  1520. */
  1521. if (enable == 0)
  1522. usleep_range(1000, 2000);
  1523. }
  1524. static inline void umac_reset(struct bcm_sysport_priv *priv)
  1525. {
  1526. u32 reg;
  1527. if (priv->is_lite)
  1528. return;
  1529. reg = umac_readl(priv, UMAC_CMD);
  1530. reg |= CMD_SW_RESET;
  1531. umac_writel(priv, reg, UMAC_CMD);
  1532. udelay(10);
  1533. reg = umac_readl(priv, UMAC_CMD);
  1534. reg &= ~CMD_SW_RESET;
  1535. umac_writel(priv, reg, UMAC_CMD);
  1536. }
  1537. static void umac_set_hw_addr(struct bcm_sysport_priv *priv,
  1538. const unsigned char *addr)
  1539. {
  1540. u32 mac0 = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) |
  1541. addr[3];
  1542. u32 mac1 = (addr[4] << 8) | addr[5];
  1543. if (!priv->is_lite) {
  1544. umac_writel(priv, mac0, UMAC_MAC0);
  1545. umac_writel(priv, mac1, UMAC_MAC1);
  1546. } else {
  1547. gib_writel(priv, mac0, GIB_MAC0);
  1548. gib_writel(priv, mac1, GIB_MAC1);
  1549. }
  1550. }
  1551. static void topctrl_flush(struct bcm_sysport_priv *priv)
  1552. {
  1553. topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
  1554. topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
  1555. mdelay(1);
  1556. topctrl_writel(priv, 0, RX_FLUSH_CNTL);
  1557. topctrl_writel(priv, 0, TX_FLUSH_CNTL);
  1558. }
  1559. static int bcm_sysport_change_mac(struct net_device *dev, void *p)
  1560. {
  1561. struct bcm_sysport_priv *priv = netdev_priv(dev);
  1562. struct sockaddr *addr = p;
  1563. if (!is_valid_ether_addr(addr->sa_data))
  1564. return -EINVAL;
  1565. eth_hw_addr_set(dev, addr->sa_data);
  1566. /* interface is disabled, changes to MAC will be reflected on next
  1567. * open call
  1568. */
  1569. if (!netif_running(dev))
  1570. return 0;
  1571. umac_set_hw_addr(priv, dev->dev_addr);
  1572. return 0;
  1573. }
  1574. static void bcm_sysport_get_stats64(struct net_device *dev,
  1575. struct rtnl_link_stats64 *stats)
  1576. {
  1577. struct bcm_sysport_priv *priv = netdev_priv(dev);
  1578. struct bcm_sysport_stats64 *stats64 = &priv->stats64;
  1579. unsigned int start;
  1580. netdev_stats_to_stats64(stats, &dev->stats);
  1581. bcm_sysport_update_tx_stats(priv, &stats->tx_bytes,
  1582. &stats->tx_packets);
  1583. do {
  1584. start = u64_stats_fetch_begin_irq(&priv->syncp);
  1585. stats->rx_packets = stats64->rx_packets;
  1586. stats->rx_bytes = stats64->rx_bytes;
  1587. } while (u64_stats_fetch_retry_irq(&priv->syncp, start));
  1588. }
  1589. static void bcm_sysport_netif_start(struct net_device *dev)
  1590. {
  1591. struct bcm_sysport_priv *priv = netdev_priv(dev);
  1592. /* Enable NAPI */
  1593. bcm_sysport_init_dim(priv, bcm_sysport_dim_work);
  1594. bcm_sysport_init_rx_coalesce(priv);
  1595. napi_enable(&priv->napi);
  1596. /* Enable RX interrupt and TX ring full interrupt */
  1597. intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
  1598. phy_start(dev->phydev);
  1599. /* Enable TX interrupts for the TXQs */
  1600. if (!priv->is_lite)
  1601. intrl2_1_mask_clear(priv, 0xffffffff);
  1602. else
  1603. intrl2_0_mask_clear(priv, INTRL2_0_TDMA_MBDONE_MASK);
  1604. }
  1605. static void rbuf_init(struct bcm_sysport_priv *priv)
  1606. {
  1607. u32 reg;
  1608. reg = rbuf_readl(priv, RBUF_CONTROL);
  1609. reg |= RBUF_4B_ALGN | RBUF_RSB_EN;
  1610. /* Set a correct RSB format on SYSTEMPORT Lite */
  1611. if (priv->is_lite)
  1612. reg &= ~RBUF_RSB_SWAP1;
  1613. /* Set a correct RSB format based on host endian */
  1614. if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
  1615. reg |= RBUF_RSB_SWAP0;
  1616. else
  1617. reg &= ~RBUF_RSB_SWAP0;
  1618. rbuf_writel(priv, reg, RBUF_CONTROL);
  1619. }
  1620. static inline void bcm_sysport_mask_all_intrs(struct bcm_sysport_priv *priv)
  1621. {
  1622. intrl2_0_mask_set(priv, 0xffffffff);
  1623. intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
  1624. if (!priv->is_lite) {
  1625. intrl2_1_mask_set(priv, 0xffffffff);
  1626. intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
  1627. }
  1628. }
  1629. static inline void gib_set_pad_extension(struct bcm_sysport_priv *priv)
  1630. {
  1631. u32 reg;
  1632. reg = gib_readl(priv, GIB_CONTROL);
  1633. /* Include Broadcom tag in pad extension and fix up IPG_LENGTH */
  1634. if (netdev_uses_dsa(priv->netdev)) {
  1635. reg &= ~(GIB_PAD_EXTENSION_MASK << GIB_PAD_EXTENSION_SHIFT);
  1636. reg |= ENET_BRCM_TAG_LEN << GIB_PAD_EXTENSION_SHIFT;
  1637. }
  1638. reg &= ~(GIB_IPG_LEN_MASK << GIB_IPG_LEN_SHIFT);
  1639. reg |= 12 << GIB_IPG_LEN_SHIFT;
  1640. gib_writel(priv, reg, GIB_CONTROL);
  1641. }
  1642. static int bcm_sysport_open(struct net_device *dev)
  1643. {
  1644. struct bcm_sysport_priv *priv = netdev_priv(dev);
  1645. struct phy_device *phydev;
  1646. unsigned int i;
  1647. int ret;
  1648. clk_prepare_enable(priv->clk);
  1649. /* Reset UniMAC */
  1650. umac_reset(priv);
  1651. /* Flush TX and RX FIFOs at TOPCTRL level */
  1652. topctrl_flush(priv);
  1653. /* Disable the UniMAC RX/TX */
  1654. umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0);
  1655. /* Enable RBUF 2bytes alignment and Receive Status Block */
  1656. rbuf_init(priv);
  1657. /* Set maximum frame length */
  1658. if (!priv->is_lite)
  1659. umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
  1660. else
  1661. gib_set_pad_extension(priv);
  1662. /* Apply features again in case we changed them while interface was
  1663. * down
  1664. */
  1665. bcm_sysport_set_features(dev, dev->features);
  1666. /* Set MAC address */
  1667. umac_set_hw_addr(priv, dev->dev_addr);
  1668. phydev = of_phy_connect(dev, priv->phy_dn, bcm_sysport_adj_link,
  1669. 0, priv->phy_interface);
  1670. if (!phydev) {
  1671. netdev_err(dev, "could not attach to PHY\n");
  1672. ret = -ENODEV;
  1673. goto out_clk_disable;
  1674. }
  1675. /* Indicate that the MAC is responsible for PHY PM */
  1676. phydev->mac_managed_pm = true;
  1677. /* Reset house keeping link status */
  1678. priv->old_duplex = -1;
  1679. priv->old_link = -1;
  1680. priv->old_pause = -1;
  1681. /* mask all interrupts and request them */
  1682. bcm_sysport_mask_all_intrs(priv);
  1683. ret = request_irq(priv->irq0, bcm_sysport_rx_isr, 0, dev->name, dev);
  1684. if (ret) {
  1685. netdev_err(dev, "failed to request RX interrupt\n");
  1686. goto out_phy_disconnect;
  1687. }
  1688. if (!priv->is_lite) {
  1689. ret = request_irq(priv->irq1, bcm_sysport_tx_isr, 0,
  1690. dev->name, dev);
  1691. if (ret) {
  1692. netdev_err(dev, "failed to request TX interrupt\n");
  1693. goto out_free_irq0;
  1694. }
  1695. }
  1696. /* Initialize both hardware and software ring */
  1697. spin_lock_init(&priv->desc_lock);
  1698. for (i = 0; i < dev->num_tx_queues; i++) {
  1699. ret = bcm_sysport_init_tx_ring(priv, i);
  1700. if (ret) {
  1701. netdev_err(dev, "failed to initialize TX ring %d\n",
  1702. i);
  1703. goto out_free_tx_ring;
  1704. }
  1705. }
  1706. /* Initialize linked-list */
  1707. tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
  1708. /* Initialize RX ring */
  1709. ret = bcm_sysport_init_rx_ring(priv);
  1710. if (ret) {
  1711. netdev_err(dev, "failed to initialize RX ring\n");
  1712. goto out_free_rx_ring;
  1713. }
  1714. /* Turn on RDMA */
  1715. ret = rdma_enable_set(priv, 1);
  1716. if (ret)
  1717. goto out_free_rx_ring;
  1718. /* Turn on TDMA */
  1719. ret = tdma_enable_set(priv, 1);
  1720. if (ret)
  1721. goto out_clear_rx_int;
  1722. /* Turn on UniMAC TX/RX */
  1723. umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 1);
  1724. bcm_sysport_netif_start(dev);
  1725. netif_tx_start_all_queues(dev);
  1726. return 0;
  1727. out_clear_rx_int:
  1728. intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
  1729. out_free_rx_ring:
  1730. bcm_sysport_fini_rx_ring(priv);
  1731. out_free_tx_ring:
  1732. for (i = 0; i < dev->num_tx_queues; i++)
  1733. bcm_sysport_fini_tx_ring(priv, i);
  1734. if (!priv->is_lite)
  1735. free_irq(priv->irq1, dev);
  1736. out_free_irq0:
  1737. free_irq(priv->irq0, dev);
  1738. out_phy_disconnect:
  1739. phy_disconnect(phydev);
  1740. out_clk_disable:
  1741. clk_disable_unprepare(priv->clk);
  1742. return ret;
  1743. }
  1744. static void bcm_sysport_netif_stop(struct net_device *dev)
  1745. {
  1746. struct bcm_sysport_priv *priv = netdev_priv(dev);
  1747. /* stop all software from updating hardware */
  1748. netif_tx_disable(dev);
  1749. napi_disable(&priv->napi);
  1750. cancel_work_sync(&priv->dim.dim.work);
  1751. phy_stop(dev->phydev);
  1752. /* mask all interrupts */
  1753. bcm_sysport_mask_all_intrs(priv);
  1754. }
  1755. static int bcm_sysport_stop(struct net_device *dev)
  1756. {
  1757. struct bcm_sysport_priv *priv = netdev_priv(dev);
  1758. unsigned int i;
  1759. int ret;
  1760. bcm_sysport_netif_stop(dev);
  1761. /* Disable UniMAC RX */
  1762. umac_enable_set(priv, CMD_RX_EN, 0);
  1763. ret = tdma_enable_set(priv, 0);
  1764. if (ret) {
  1765. netdev_err(dev, "timeout disabling RDMA\n");
  1766. return ret;
  1767. }
  1768. /* Wait for a maximum packet size to be drained */
  1769. usleep_range(2000, 3000);
  1770. ret = rdma_enable_set(priv, 0);
  1771. if (ret) {
  1772. netdev_err(dev, "timeout disabling TDMA\n");
  1773. return ret;
  1774. }
  1775. /* Disable UniMAC TX */
  1776. umac_enable_set(priv, CMD_TX_EN, 0);
  1777. /* Free RX/TX rings SW structures */
  1778. for (i = 0; i < dev->num_tx_queues; i++)
  1779. bcm_sysport_fini_tx_ring(priv, i);
  1780. bcm_sysport_fini_rx_ring(priv);
  1781. free_irq(priv->irq0, dev);
  1782. if (!priv->is_lite)
  1783. free_irq(priv->irq1, dev);
  1784. /* Disconnect from PHY */
  1785. phy_disconnect(dev->phydev);
  1786. clk_disable_unprepare(priv->clk);
  1787. return 0;
  1788. }
  1789. static int bcm_sysport_rule_find(struct bcm_sysport_priv *priv,
  1790. u64 location)
  1791. {
  1792. unsigned int index;
  1793. u32 reg;
  1794. for_each_set_bit(index, priv->filters, RXCHK_BRCM_TAG_MAX) {
  1795. reg = rxchk_readl(priv, RXCHK_BRCM_TAG(index));
  1796. reg >>= RXCHK_BRCM_TAG_CID_SHIFT;
  1797. reg &= RXCHK_BRCM_TAG_CID_MASK;
  1798. if (reg == location)
  1799. return index;
  1800. }
  1801. return -EINVAL;
  1802. }
  1803. static int bcm_sysport_rule_get(struct bcm_sysport_priv *priv,
  1804. struct ethtool_rxnfc *nfc)
  1805. {
  1806. int index;
  1807. /* This is not a rule that we know about */
  1808. index = bcm_sysport_rule_find(priv, nfc->fs.location);
  1809. if (index < 0)
  1810. return -EOPNOTSUPP;
  1811. nfc->fs.ring_cookie = RX_CLS_FLOW_WAKE;
  1812. return 0;
  1813. }
  1814. static int bcm_sysport_rule_set(struct bcm_sysport_priv *priv,
  1815. struct ethtool_rxnfc *nfc)
  1816. {
  1817. unsigned int index;
  1818. u32 reg;
  1819. /* We cannot match locations greater than what the classification ID
  1820. * permits (256 entries)
  1821. */
  1822. if (nfc->fs.location > RXCHK_BRCM_TAG_CID_MASK)
  1823. return -E2BIG;
  1824. /* We cannot support flows that are not destined for a wake-up */
  1825. if (nfc->fs.ring_cookie != RX_CLS_FLOW_WAKE)
  1826. return -EOPNOTSUPP;
  1827. index = find_first_zero_bit(priv->filters, RXCHK_BRCM_TAG_MAX);
  1828. if (index >= RXCHK_BRCM_TAG_MAX)
  1829. /* All filters are already in use, we cannot match more rules */
  1830. return -ENOSPC;
  1831. /* Location is the classification ID, and index is the position
  1832. * within one of our 8 possible filters to be programmed
  1833. */
  1834. reg = rxchk_readl(priv, RXCHK_BRCM_TAG(index));
  1835. reg &= ~(RXCHK_BRCM_TAG_CID_MASK << RXCHK_BRCM_TAG_CID_SHIFT);
  1836. reg |= nfc->fs.location << RXCHK_BRCM_TAG_CID_SHIFT;
  1837. rxchk_writel(priv, reg, RXCHK_BRCM_TAG(index));
  1838. rxchk_writel(priv, 0xff00ffff, RXCHK_BRCM_TAG_MASK(index));
  1839. priv->filters_loc[index] = nfc->fs.location;
  1840. set_bit(index, priv->filters);
  1841. return 0;
  1842. }
  1843. static int bcm_sysport_rule_del(struct bcm_sysport_priv *priv,
  1844. u64 location)
  1845. {
  1846. int index;
  1847. /* This is not a rule that we know about */
  1848. index = bcm_sysport_rule_find(priv, location);
  1849. if (index < 0)
  1850. return -EOPNOTSUPP;
  1851. /* No need to disable this filter if it was enabled, this will
  1852. * be taken care of during suspend time by bcm_sysport_suspend_to_wol
  1853. */
  1854. clear_bit(index, priv->filters);
  1855. priv->filters_loc[index] = 0;
  1856. return 0;
  1857. }
  1858. static int bcm_sysport_get_rxnfc(struct net_device *dev,
  1859. struct ethtool_rxnfc *nfc, u32 *rule_locs)
  1860. {
  1861. struct bcm_sysport_priv *priv = netdev_priv(dev);
  1862. int ret = -EOPNOTSUPP;
  1863. switch (nfc->cmd) {
  1864. case ETHTOOL_GRXCLSRULE:
  1865. ret = bcm_sysport_rule_get(priv, nfc);
  1866. break;
  1867. default:
  1868. break;
  1869. }
  1870. return ret;
  1871. }
  1872. static int bcm_sysport_set_rxnfc(struct net_device *dev,
  1873. struct ethtool_rxnfc *nfc)
  1874. {
  1875. struct bcm_sysport_priv *priv = netdev_priv(dev);
  1876. int ret = -EOPNOTSUPP;
  1877. switch (nfc->cmd) {
  1878. case ETHTOOL_SRXCLSRLINS:
  1879. ret = bcm_sysport_rule_set(priv, nfc);
  1880. break;
  1881. case ETHTOOL_SRXCLSRLDEL:
  1882. ret = bcm_sysport_rule_del(priv, nfc->fs.location);
  1883. break;
  1884. default:
  1885. break;
  1886. }
  1887. return ret;
  1888. }
  1889. static const struct ethtool_ops bcm_sysport_ethtool_ops = {
  1890. .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
  1891. ETHTOOL_COALESCE_MAX_FRAMES |
  1892. ETHTOOL_COALESCE_USE_ADAPTIVE_RX,
  1893. .get_drvinfo = bcm_sysport_get_drvinfo,
  1894. .get_msglevel = bcm_sysport_get_msglvl,
  1895. .set_msglevel = bcm_sysport_set_msglvl,
  1896. .get_link = ethtool_op_get_link,
  1897. .get_strings = bcm_sysport_get_strings,
  1898. .get_ethtool_stats = bcm_sysport_get_stats,
  1899. .get_sset_count = bcm_sysport_get_sset_count,
  1900. .get_wol = bcm_sysport_get_wol,
  1901. .set_wol = bcm_sysport_set_wol,
  1902. .get_coalesce = bcm_sysport_get_coalesce,
  1903. .set_coalesce = bcm_sysport_set_coalesce,
  1904. .get_link_ksettings = phy_ethtool_get_link_ksettings,
  1905. .set_link_ksettings = phy_ethtool_set_link_ksettings,
  1906. .get_rxnfc = bcm_sysport_get_rxnfc,
  1907. .set_rxnfc = bcm_sysport_set_rxnfc,
  1908. };
  1909. static u16 bcm_sysport_select_queue(struct net_device *dev, struct sk_buff *skb,
  1910. struct net_device *sb_dev)
  1911. {
  1912. struct bcm_sysport_priv *priv = netdev_priv(dev);
  1913. u16 queue = skb_get_queue_mapping(skb);
  1914. struct bcm_sysport_tx_ring *tx_ring;
  1915. unsigned int q, port;
  1916. if (!netdev_uses_dsa(dev))
  1917. return netdev_pick_tx(dev, skb, NULL);
  1918. /* DSA tagging layer will have configured the correct queue */
  1919. q = BRCM_TAG_GET_QUEUE(queue);
  1920. port = BRCM_TAG_GET_PORT(queue);
  1921. tx_ring = priv->ring_map[q + port * priv->per_port_num_tx_queues];
  1922. if (unlikely(!tx_ring))
  1923. return netdev_pick_tx(dev, skb, NULL);
  1924. return tx_ring->index;
  1925. }
  1926. static const struct net_device_ops bcm_sysport_netdev_ops = {
  1927. .ndo_start_xmit = bcm_sysport_xmit,
  1928. .ndo_tx_timeout = bcm_sysport_tx_timeout,
  1929. .ndo_open = bcm_sysport_open,
  1930. .ndo_stop = bcm_sysport_stop,
  1931. .ndo_set_features = bcm_sysport_set_features,
  1932. .ndo_set_rx_mode = bcm_sysport_set_rx_mode,
  1933. .ndo_set_mac_address = bcm_sysport_change_mac,
  1934. #ifdef CONFIG_NET_POLL_CONTROLLER
  1935. .ndo_poll_controller = bcm_sysport_poll_controller,
  1936. #endif
  1937. .ndo_get_stats64 = bcm_sysport_get_stats64,
  1938. .ndo_select_queue = bcm_sysport_select_queue,
  1939. };
  1940. static int bcm_sysport_map_queues(struct net_device *dev,
  1941. struct net_device *slave_dev)
  1942. {
  1943. struct dsa_port *dp = dsa_port_from_netdev(slave_dev);
  1944. struct bcm_sysport_priv *priv = netdev_priv(dev);
  1945. struct bcm_sysport_tx_ring *ring;
  1946. unsigned int num_tx_queues;
  1947. unsigned int q, qp, port;
  1948. /* We can't be setting up queue inspection for non directly attached
  1949. * switches
  1950. */
  1951. if (dp->ds->index)
  1952. return 0;
  1953. port = dp->index;
  1954. /* On SYSTEMPORT Lite we have twice as less queues, so we cannot do a
  1955. * 1:1 mapping, we can only do a 2:1 mapping. By reducing the number of
  1956. * per-port (slave_dev) network devices queue, we achieve just that.
  1957. * This need to happen now before any slave network device is used such
  1958. * it accurately reflects the number of real TX queues.
  1959. */
  1960. if (priv->is_lite)
  1961. netif_set_real_num_tx_queues(slave_dev,
  1962. slave_dev->num_tx_queues / 2);
  1963. num_tx_queues = slave_dev->real_num_tx_queues;
  1964. if (priv->per_port_num_tx_queues &&
  1965. priv->per_port_num_tx_queues != num_tx_queues)
  1966. netdev_warn(slave_dev, "asymmetric number of per-port queues\n");
  1967. priv->per_port_num_tx_queues = num_tx_queues;
  1968. for (q = 0, qp = 0; q < dev->num_tx_queues && qp < num_tx_queues;
  1969. q++) {
  1970. ring = &priv->tx_rings[q];
  1971. if (ring->inspect)
  1972. continue;
  1973. /* Just remember the mapping actual programming done
  1974. * during bcm_sysport_init_tx_ring
  1975. */
  1976. ring->switch_queue = qp;
  1977. ring->switch_port = port;
  1978. ring->inspect = true;
  1979. priv->ring_map[qp + port * num_tx_queues] = ring;
  1980. qp++;
  1981. }
  1982. return 0;
  1983. }
  1984. static int bcm_sysport_unmap_queues(struct net_device *dev,
  1985. struct net_device *slave_dev)
  1986. {
  1987. struct dsa_port *dp = dsa_port_from_netdev(slave_dev);
  1988. struct bcm_sysport_priv *priv = netdev_priv(dev);
  1989. struct bcm_sysport_tx_ring *ring;
  1990. unsigned int num_tx_queues;
  1991. unsigned int q, qp, port;
  1992. port = dp->index;
  1993. num_tx_queues = slave_dev->real_num_tx_queues;
  1994. for (q = 0; q < dev->num_tx_queues; q++) {
  1995. ring = &priv->tx_rings[q];
  1996. if (ring->switch_port != port)
  1997. continue;
  1998. if (!ring->inspect)
  1999. continue;
  2000. ring->inspect = false;
  2001. qp = ring->switch_queue;
  2002. priv->ring_map[qp + port * num_tx_queues] = NULL;
  2003. }
  2004. return 0;
  2005. }
  2006. static int bcm_sysport_netdevice_event(struct notifier_block *nb,
  2007. unsigned long event, void *ptr)
  2008. {
  2009. struct net_device *dev = netdev_notifier_info_to_dev(ptr);
  2010. struct netdev_notifier_changeupper_info *info = ptr;
  2011. struct bcm_sysport_priv *priv;
  2012. int ret = 0;
  2013. priv = container_of(nb, struct bcm_sysport_priv, netdev_notifier);
  2014. if (priv->netdev != dev)
  2015. return NOTIFY_DONE;
  2016. switch (event) {
  2017. case NETDEV_CHANGEUPPER:
  2018. if (dev->netdev_ops != &bcm_sysport_netdev_ops)
  2019. return NOTIFY_DONE;
  2020. if (!dsa_slave_dev_check(info->upper_dev))
  2021. return NOTIFY_DONE;
  2022. if (info->linking)
  2023. ret = bcm_sysport_map_queues(dev, info->upper_dev);
  2024. else
  2025. ret = bcm_sysport_unmap_queues(dev, info->upper_dev);
  2026. break;
  2027. }
  2028. return notifier_from_errno(ret);
  2029. }
  2030. #define REV_FMT "v%2x.%02x"
  2031. static const struct bcm_sysport_hw_params bcm_sysport_params[] = {
  2032. [SYSTEMPORT] = {
  2033. .is_lite = false,
  2034. .num_rx_desc_words = SP_NUM_HW_RX_DESC_WORDS,
  2035. },
  2036. [SYSTEMPORT_LITE] = {
  2037. .is_lite = true,
  2038. .num_rx_desc_words = SP_LT_NUM_HW_RX_DESC_WORDS,
  2039. },
  2040. };
  2041. static const struct of_device_id bcm_sysport_of_match[] = {
  2042. { .compatible = "brcm,systemportlite-v1.00",
  2043. .data = &bcm_sysport_params[SYSTEMPORT_LITE] },
  2044. { .compatible = "brcm,systemport-v1.00",
  2045. .data = &bcm_sysport_params[SYSTEMPORT] },
  2046. { .compatible = "brcm,systemport",
  2047. .data = &bcm_sysport_params[SYSTEMPORT] },
  2048. { /* sentinel */ }
  2049. };
  2050. MODULE_DEVICE_TABLE(of, bcm_sysport_of_match);
  2051. static int bcm_sysport_probe(struct platform_device *pdev)
  2052. {
  2053. const struct bcm_sysport_hw_params *params;
  2054. const struct of_device_id *of_id = NULL;
  2055. struct bcm_sysport_priv *priv;
  2056. struct device_node *dn;
  2057. struct net_device *dev;
  2058. u32 txq, rxq;
  2059. int ret;
  2060. dn = pdev->dev.of_node;
  2061. of_id = of_match_node(bcm_sysport_of_match, dn);
  2062. if (!of_id || !of_id->data)
  2063. return -EINVAL;
  2064. ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(40));
  2065. if (ret)
  2066. ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
  2067. if (ret) {
  2068. dev_err(&pdev->dev, "unable to set DMA mask: %d\n", ret);
  2069. return ret;
  2070. }
  2071. /* Fairly quickly we need to know the type of adapter we have */
  2072. params = of_id->data;
  2073. /* Read the Transmit/Receive Queue properties */
  2074. if (of_property_read_u32(dn, "systemport,num-txq", &txq))
  2075. txq = TDMA_NUM_RINGS;
  2076. if (of_property_read_u32(dn, "systemport,num-rxq", &rxq))
  2077. rxq = 1;
  2078. /* Sanity check the number of transmit queues */
  2079. if (!txq || txq > TDMA_NUM_RINGS)
  2080. return -EINVAL;
  2081. dev = alloc_etherdev_mqs(sizeof(*priv), txq, rxq);
  2082. if (!dev)
  2083. return -ENOMEM;
  2084. /* Initialize private members */
  2085. priv = netdev_priv(dev);
  2086. priv->clk = devm_clk_get_optional(&pdev->dev, "sw_sysport");
  2087. if (IS_ERR(priv->clk)) {
  2088. ret = PTR_ERR(priv->clk);
  2089. goto err_free_netdev;
  2090. }
  2091. /* Allocate number of TX rings */
  2092. priv->tx_rings = devm_kcalloc(&pdev->dev, txq,
  2093. sizeof(struct bcm_sysport_tx_ring),
  2094. GFP_KERNEL);
  2095. if (!priv->tx_rings) {
  2096. ret = -ENOMEM;
  2097. goto err_free_netdev;
  2098. }
  2099. priv->is_lite = params->is_lite;
  2100. priv->num_rx_desc_words = params->num_rx_desc_words;
  2101. priv->irq0 = platform_get_irq(pdev, 0);
  2102. if (!priv->is_lite) {
  2103. priv->irq1 = platform_get_irq(pdev, 1);
  2104. priv->wol_irq = platform_get_irq(pdev, 2);
  2105. } else {
  2106. priv->wol_irq = platform_get_irq(pdev, 1);
  2107. }
  2108. if (priv->irq0 <= 0 || (priv->irq1 <= 0 && !priv->is_lite)) {
  2109. ret = -EINVAL;
  2110. goto err_free_netdev;
  2111. }
  2112. priv->base = devm_platform_ioremap_resource(pdev, 0);
  2113. if (IS_ERR(priv->base)) {
  2114. ret = PTR_ERR(priv->base);
  2115. goto err_free_netdev;
  2116. }
  2117. priv->netdev = dev;
  2118. priv->pdev = pdev;
  2119. ret = of_get_phy_mode(dn, &priv->phy_interface);
  2120. /* Default to GMII interface mode */
  2121. if (ret)
  2122. priv->phy_interface = PHY_INTERFACE_MODE_GMII;
  2123. /* In the case of a fixed PHY, the DT node associated
  2124. * to the PHY is the Ethernet MAC DT node.
  2125. */
  2126. if (of_phy_is_fixed_link(dn)) {
  2127. ret = of_phy_register_fixed_link(dn);
  2128. if (ret) {
  2129. dev_err(&pdev->dev, "failed to register fixed PHY\n");
  2130. goto err_free_netdev;
  2131. }
  2132. priv->phy_dn = dn;
  2133. }
  2134. /* Initialize netdevice members */
  2135. ret = of_get_ethdev_address(dn, dev);
  2136. if (ret) {
  2137. dev_warn(&pdev->dev, "using random Ethernet MAC\n");
  2138. eth_hw_addr_random(dev);
  2139. }
  2140. SET_NETDEV_DEV(dev, &pdev->dev);
  2141. dev_set_drvdata(&pdev->dev, dev);
  2142. dev->ethtool_ops = &bcm_sysport_ethtool_ops;
  2143. dev->netdev_ops = &bcm_sysport_netdev_ops;
  2144. netif_napi_add(dev, &priv->napi, bcm_sysport_poll);
  2145. dev->features |= NETIF_F_RXCSUM | NETIF_F_HIGHDMA |
  2146. NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
  2147. NETIF_F_HW_VLAN_CTAG_TX;
  2148. dev->hw_features |= dev->features;
  2149. dev->vlan_features |= dev->features;
  2150. dev->max_mtu = UMAC_MAX_MTU_SIZE;
  2151. /* Request the WOL interrupt and advertise suspend if available */
  2152. priv->wol_irq_disabled = 1;
  2153. ret = devm_request_irq(&pdev->dev, priv->wol_irq,
  2154. bcm_sysport_wol_isr, 0, dev->name, priv);
  2155. if (!ret)
  2156. device_set_wakeup_capable(&pdev->dev, 1);
  2157. priv->wol_clk = devm_clk_get_optional(&pdev->dev, "sw_sysportwol");
  2158. if (IS_ERR(priv->wol_clk)) {
  2159. ret = PTR_ERR(priv->wol_clk);
  2160. goto err_deregister_fixed_link;
  2161. }
  2162. /* Set the needed headroom once and for all */
  2163. BUILD_BUG_ON(sizeof(struct bcm_tsb) != 8);
  2164. dev->needed_headroom += sizeof(struct bcm_tsb);
  2165. /* libphy will adjust the link state accordingly */
  2166. netif_carrier_off(dev);
  2167. priv->rx_max_coalesced_frames = 1;
  2168. u64_stats_init(&priv->syncp);
  2169. priv->netdev_notifier.notifier_call = bcm_sysport_netdevice_event;
  2170. ret = register_netdevice_notifier(&priv->netdev_notifier);
  2171. if (ret) {
  2172. dev_err(&pdev->dev, "failed to register DSA notifier\n");
  2173. goto err_deregister_fixed_link;
  2174. }
  2175. ret = register_netdev(dev);
  2176. if (ret) {
  2177. dev_err(&pdev->dev, "failed to register net_device\n");
  2178. goto err_deregister_notifier;
  2179. }
  2180. clk_prepare_enable(priv->clk);
  2181. priv->rev = topctrl_readl(priv, REV_CNTL) & REV_MASK;
  2182. dev_info(&pdev->dev,
  2183. "Broadcom SYSTEMPORT%s " REV_FMT
  2184. " (irqs: %d, %d, TXQs: %d, RXQs: %d)\n",
  2185. priv->is_lite ? " Lite" : "",
  2186. (priv->rev >> 8) & 0xff, priv->rev & 0xff,
  2187. priv->irq0, priv->irq1, txq, rxq);
  2188. clk_disable_unprepare(priv->clk);
  2189. return 0;
  2190. err_deregister_notifier:
  2191. unregister_netdevice_notifier(&priv->netdev_notifier);
  2192. err_deregister_fixed_link:
  2193. if (of_phy_is_fixed_link(dn))
  2194. of_phy_deregister_fixed_link(dn);
  2195. err_free_netdev:
  2196. free_netdev(dev);
  2197. return ret;
  2198. }
  2199. static int bcm_sysport_remove(struct platform_device *pdev)
  2200. {
  2201. struct net_device *dev = dev_get_drvdata(&pdev->dev);
  2202. struct bcm_sysport_priv *priv = netdev_priv(dev);
  2203. struct device_node *dn = pdev->dev.of_node;
  2204. /* Not much to do, ndo_close has been called
  2205. * and we use managed allocations
  2206. */
  2207. unregister_netdevice_notifier(&priv->netdev_notifier);
  2208. unregister_netdev(dev);
  2209. if (of_phy_is_fixed_link(dn))
  2210. of_phy_deregister_fixed_link(dn);
  2211. free_netdev(dev);
  2212. dev_set_drvdata(&pdev->dev, NULL);
  2213. return 0;
  2214. }
  2215. static int bcm_sysport_suspend_to_wol(struct bcm_sysport_priv *priv)
  2216. {
  2217. struct net_device *ndev = priv->netdev;
  2218. unsigned int timeout = 1000;
  2219. unsigned int index, i = 0;
  2220. u32 reg;
  2221. reg = umac_readl(priv, UMAC_MPD_CTRL);
  2222. if (priv->wolopts & (WAKE_MAGIC | WAKE_MAGICSECURE))
  2223. reg |= MPD_EN;
  2224. reg &= ~PSW_EN;
  2225. if (priv->wolopts & WAKE_MAGICSECURE) {
  2226. /* Program the SecureOn password */
  2227. umac_writel(priv, get_unaligned_be16(&priv->sopass[0]),
  2228. UMAC_PSW_MS);
  2229. umac_writel(priv, get_unaligned_be32(&priv->sopass[2]),
  2230. UMAC_PSW_LS);
  2231. reg |= PSW_EN;
  2232. }
  2233. umac_writel(priv, reg, UMAC_MPD_CTRL);
  2234. if (priv->wolopts & WAKE_FILTER) {
  2235. /* Turn on ACPI matching to steal packets from RBUF */
  2236. reg = rbuf_readl(priv, RBUF_CONTROL);
  2237. if (priv->is_lite)
  2238. reg |= RBUF_ACPI_EN_LITE;
  2239. else
  2240. reg |= RBUF_ACPI_EN;
  2241. rbuf_writel(priv, reg, RBUF_CONTROL);
  2242. /* Enable RXCHK, active filters and Broadcom tag matching */
  2243. reg = rxchk_readl(priv, RXCHK_CONTROL);
  2244. reg &= ~(RXCHK_BRCM_TAG_MATCH_MASK <<
  2245. RXCHK_BRCM_TAG_MATCH_SHIFT);
  2246. for_each_set_bit(index, priv->filters, RXCHK_BRCM_TAG_MAX) {
  2247. reg |= BIT(RXCHK_BRCM_TAG_MATCH_SHIFT + i);
  2248. i++;
  2249. }
  2250. reg |= RXCHK_EN | RXCHK_BRCM_TAG_EN;
  2251. rxchk_writel(priv, reg, RXCHK_CONTROL);
  2252. }
  2253. /* Make sure RBUF entered WoL mode as result */
  2254. do {
  2255. reg = rbuf_readl(priv, RBUF_STATUS);
  2256. if (reg & RBUF_WOL_MODE)
  2257. break;
  2258. udelay(10);
  2259. } while (timeout-- > 0);
  2260. /* Do not leave the UniMAC RBUF matching only MPD packets */
  2261. if (!timeout) {
  2262. mpd_enable_set(priv, false);
  2263. netif_err(priv, wol, ndev, "failed to enter WOL mode\n");
  2264. return -ETIMEDOUT;
  2265. }
  2266. /* UniMAC receive needs to be turned on */
  2267. umac_enable_set(priv, CMD_RX_EN, 1);
  2268. netif_dbg(priv, wol, ndev, "entered WOL mode\n");
  2269. return 0;
  2270. }
  2271. static int __maybe_unused bcm_sysport_suspend(struct device *d)
  2272. {
  2273. struct net_device *dev = dev_get_drvdata(d);
  2274. struct bcm_sysport_priv *priv = netdev_priv(dev);
  2275. unsigned int i;
  2276. int ret = 0;
  2277. u32 reg;
  2278. if (!netif_running(dev))
  2279. return 0;
  2280. netif_device_detach(dev);
  2281. bcm_sysport_netif_stop(dev);
  2282. phy_suspend(dev->phydev);
  2283. /* Disable UniMAC RX */
  2284. umac_enable_set(priv, CMD_RX_EN, 0);
  2285. ret = rdma_enable_set(priv, 0);
  2286. if (ret) {
  2287. netdev_err(dev, "RDMA timeout!\n");
  2288. return ret;
  2289. }
  2290. /* Disable RXCHK if enabled */
  2291. if (priv->rx_chk_en) {
  2292. reg = rxchk_readl(priv, RXCHK_CONTROL);
  2293. reg &= ~RXCHK_EN;
  2294. rxchk_writel(priv, reg, RXCHK_CONTROL);
  2295. }
  2296. /* Flush RX pipe */
  2297. if (!priv->wolopts)
  2298. topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
  2299. ret = tdma_enable_set(priv, 0);
  2300. if (ret) {
  2301. netdev_err(dev, "TDMA timeout!\n");
  2302. return ret;
  2303. }
  2304. /* Wait for a packet boundary */
  2305. usleep_range(2000, 3000);
  2306. umac_enable_set(priv, CMD_TX_EN, 0);
  2307. topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
  2308. /* Free RX/TX rings SW structures */
  2309. for (i = 0; i < dev->num_tx_queues; i++)
  2310. bcm_sysport_fini_tx_ring(priv, i);
  2311. bcm_sysport_fini_rx_ring(priv);
  2312. /* Get prepared for Wake-on-LAN */
  2313. if (device_may_wakeup(d) && priv->wolopts) {
  2314. clk_prepare_enable(priv->wol_clk);
  2315. ret = bcm_sysport_suspend_to_wol(priv);
  2316. }
  2317. clk_disable_unprepare(priv->clk);
  2318. return ret;
  2319. }
  2320. static int __maybe_unused bcm_sysport_resume(struct device *d)
  2321. {
  2322. struct net_device *dev = dev_get_drvdata(d);
  2323. struct bcm_sysport_priv *priv = netdev_priv(dev);
  2324. unsigned int i;
  2325. int ret;
  2326. if (!netif_running(dev))
  2327. return 0;
  2328. clk_prepare_enable(priv->clk);
  2329. if (priv->wolopts)
  2330. clk_disable_unprepare(priv->wol_clk);
  2331. umac_reset(priv);
  2332. /* Disable the UniMAC RX/TX */
  2333. umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0);
  2334. /* We may have been suspended and never received a WOL event that
  2335. * would turn off MPD detection, take care of that now
  2336. */
  2337. bcm_sysport_resume_from_wol(priv);
  2338. /* Initialize both hardware and software ring */
  2339. for (i = 0; i < dev->num_tx_queues; i++) {
  2340. ret = bcm_sysport_init_tx_ring(priv, i);
  2341. if (ret) {
  2342. netdev_err(dev, "failed to initialize TX ring %d\n",
  2343. i);
  2344. goto out_free_tx_rings;
  2345. }
  2346. }
  2347. /* Initialize linked-list */
  2348. tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
  2349. /* Initialize RX ring */
  2350. ret = bcm_sysport_init_rx_ring(priv);
  2351. if (ret) {
  2352. netdev_err(dev, "failed to initialize RX ring\n");
  2353. goto out_free_rx_ring;
  2354. }
  2355. /* RX pipe enable */
  2356. topctrl_writel(priv, 0, RX_FLUSH_CNTL);
  2357. ret = rdma_enable_set(priv, 1);
  2358. if (ret) {
  2359. netdev_err(dev, "failed to enable RDMA\n");
  2360. goto out_free_rx_ring;
  2361. }
  2362. /* Restore enabled features */
  2363. bcm_sysport_set_features(dev, dev->features);
  2364. rbuf_init(priv);
  2365. /* Set maximum frame length */
  2366. if (!priv->is_lite)
  2367. umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
  2368. else
  2369. gib_set_pad_extension(priv);
  2370. /* Set MAC address */
  2371. umac_set_hw_addr(priv, dev->dev_addr);
  2372. umac_enable_set(priv, CMD_RX_EN, 1);
  2373. /* TX pipe enable */
  2374. topctrl_writel(priv, 0, TX_FLUSH_CNTL);
  2375. umac_enable_set(priv, CMD_TX_EN, 1);
  2376. ret = tdma_enable_set(priv, 1);
  2377. if (ret) {
  2378. netdev_err(dev, "TDMA timeout!\n");
  2379. goto out_free_rx_ring;
  2380. }
  2381. phy_resume(dev->phydev);
  2382. bcm_sysport_netif_start(dev);
  2383. netif_device_attach(dev);
  2384. return 0;
  2385. out_free_rx_ring:
  2386. bcm_sysport_fini_rx_ring(priv);
  2387. out_free_tx_rings:
  2388. for (i = 0; i < dev->num_tx_queues; i++)
  2389. bcm_sysport_fini_tx_ring(priv, i);
  2390. clk_disable_unprepare(priv->clk);
  2391. return ret;
  2392. }
  2393. static SIMPLE_DEV_PM_OPS(bcm_sysport_pm_ops,
  2394. bcm_sysport_suspend, bcm_sysport_resume);
  2395. static struct platform_driver bcm_sysport_driver = {
  2396. .probe = bcm_sysport_probe,
  2397. .remove = bcm_sysport_remove,
  2398. .driver = {
  2399. .name = "brcm-systemport",
  2400. .of_match_table = bcm_sysport_of_match,
  2401. .pm = &bcm_sysport_pm_ops,
  2402. },
  2403. };
  2404. module_platform_driver(bcm_sysport_driver);
  2405. MODULE_AUTHOR("Broadcom Corporation");
  2406. MODULE_DESCRIPTION("Broadcom System Port Ethernet MAC driver");
  2407. MODULE_ALIAS("platform:brcm-systemport");
  2408. MODULE_LICENSE("GPL");