xsurf100.c 10 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. #include <linux/module.h>
  3. #include <linux/netdevice.h>
  4. #include <linux/platform_device.h>
  5. #include <linux/zorro.h>
  6. #include <net/ax88796.h>
  7. #include <asm/amigaints.h>
  8. #define ZORRO_PROD_INDIVIDUAL_COMPUTERS_X_SURF100 \
  9. ZORRO_ID(INDIVIDUAL_COMPUTERS, 0x64, 0)
  10. #define XS100_IRQSTATUS_BASE 0x40
  11. #define XS100_8390_BASE 0x800
  12. /* Longword-access area. Translated to 2 16-bit access cycles by the
  13. * X-Surf 100 FPGA
  14. */
  15. #define XS100_8390_DATA32_BASE 0x8000
  16. #define XS100_8390_DATA32_SIZE 0x2000
  17. /* Sub-Areas for fast data register access; addresses relative to area begin */
  18. #define XS100_8390_DATA_READ32_BASE 0x0880
  19. #define XS100_8390_DATA_WRITE32_BASE 0x0C80
  20. #define XS100_8390_DATA_AREA_SIZE 0x80
  21. /* force unsigned long back to 'void __iomem *' */
  22. #define ax_convert_addr(_a) ((void __force __iomem *)(_a))
  23. #define ei_inb(_a) z_readb(ax_convert_addr(_a))
  24. #define ei_outb(_v, _a) z_writeb(_v, ax_convert_addr(_a))
  25. #define ei_inw(_a) z_readw(ax_convert_addr(_a))
  26. #define ei_outw(_v, _a) z_writew(_v, ax_convert_addr(_a))
  27. #define ei_inb_p(_a) ei_inb(_a)
  28. #define ei_outb_p(_v, _a) ei_outb(_v, _a)
  29. /* define EI_SHIFT() to take into account our register offsets */
  30. #define EI_SHIFT(x) (ei_local->reg_offset[(x)])
  31. /* Ensure we have our RCR base value */
  32. #define AX88796_PLATFORM
  33. #include "8390.h"
  34. /* from ne.c */
  35. #define NE_CMD EI_SHIFT(0x00)
  36. #define NE_RESET EI_SHIFT(0x1f)
  37. #define NE_DATAPORT EI_SHIFT(0x10)
  38. struct xsurf100_ax_plat_data {
  39. struct ax_plat_data ax;
  40. void __iomem *base_regs;
  41. void __iomem *data_area;
  42. };
  43. static int is_xsurf100_network_irq(struct platform_device *pdev)
  44. {
  45. struct xsurf100_ax_plat_data *xs100 = dev_get_platdata(&pdev->dev);
  46. return (readw(xs100->base_regs + XS100_IRQSTATUS_BASE) & 0xaaaa) != 0;
  47. }
  48. /* These functions guarantee that the iomem is accessed with 32 bit
  49. * cycles only. z_memcpy_fromio / z_memcpy_toio don't
  50. */
  51. static void z_memcpy_fromio32(void *dst, const void __iomem *src, size_t bytes)
  52. {
  53. while (bytes > 32) {
  54. asm __volatile__
  55. ("movem.l (%0)+,%%d0-%%d7\n"
  56. "movem.l %%d0-%%d7,(%1)\n"
  57. "adda.l #32,%1" : "=a"(src), "=a"(dst)
  58. : "0"(src), "1"(dst) : "d0", "d1", "d2", "d3", "d4",
  59. "d5", "d6", "d7", "memory");
  60. bytes -= 32;
  61. }
  62. while (bytes) {
  63. *(uint32_t *)dst = z_readl(src);
  64. src += 4;
  65. dst += 4;
  66. bytes -= 4;
  67. }
  68. }
  69. static void z_memcpy_toio32(void __iomem *dst, const void *src, size_t bytes)
  70. {
  71. while (bytes) {
  72. z_writel(*(const uint32_t *)src, dst);
  73. src += 4;
  74. dst += 4;
  75. bytes -= 4;
  76. }
  77. }
  78. static void xs100_write(struct net_device *dev, const void *src,
  79. unsigned int count)
  80. {
  81. struct ei_device *ei_local = netdev_priv(dev);
  82. struct platform_device *pdev = to_platform_device(dev->dev.parent);
  83. struct xsurf100_ax_plat_data *xs100 = dev_get_platdata(&pdev->dev);
  84. /* copy whole blocks */
  85. while (count > XS100_8390_DATA_AREA_SIZE) {
  86. z_memcpy_toio32(xs100->data_area +
  87. XS100_8390_DATA_WRITE32_BASE, src,
  88. XS100_8390_DATA_AREA_SIZE);
  89. src += XS100_8390_DATA_AREA_SIZE;
  90. count -= XS100_8390_DATA_AREA_SIZE;
  91. }
  92. /* copy whole dwords */
  93. z_memcpy_toio32(xs100->data_area + XS100_8390_DATA_WRITE32_BASE,
  94. src, count & ~3);
  95. src += count & ~3;
  96. if (count & 2) {
  97. ei_outw(*(uint16_t *)src, ei_local->mem + NE_DATAPORT);
  98. src += 2;
  99. }
  100. if (count & 1)
  101. ei_outb(*(uint8_t *)src, ei_local->mem + NE_DATAPORT);
  102. }
  103. static void xs100_read(struct net_device *dev, void *dst, unsigned int count)
  104. {
  105. struct ei_device *ei_local = netdev_priv(dev);
  106. struct platform_device *pdev = to_platform_device(dev->dev.parent);
  107. struct xsurf100_ax_plat_data *xs100 = dev_get_platdata(&pdev->dev);
  108. /* copy whole blocks */
  109. while (count > XS100_8390_DATA_AREA_SIZE) {
  110. z_memcpy_fromio32(dst, xs100->data_area +
  111. XS100_8390_DATA_READ32_BASE,
  112. XS100_8390_DATA_AREA_SIZE);
  113. dst += XS100_8390_DATA_AREA_SIZE;
  114. count -= XS100_8390_DATA_AREA_SIZE;
  115. }
  116. /* copy whole dwords */
  117. z_memcpy_fromio32(dst, xs100->data_area + XS100_8390_DATA_READ32_BASE,
  118. count & ~3);
  119. dst += count & ~3;
  120. if (count & 2) {
  121. *(uint16_t *)dst = ei_inw(ei_local->mem + NE_DATAPORT);
  122. dst += 2;
  123. }
  124. if (count & 1)
  125. *(uint8_t *)dst = ei_inb(ei_local->mem + NE_DATAPORT);
  126. }
  127. /* Block input and output, similar to the Crynwr packet driver. If
  128. * you are porting to a new ethercard, look at the packet driver
  129. * source for hints. The NEx000 doesn't share the on-board packet
  130. * memory -- you have to put the packet out through the "remote DMA"
  131. * dataport using ei_outb.
  132. */
  133. static void xs100_block_input(struct net_device *dev, int count,
  134. struct sk_buff *skb, int ring_offset)
  135. {
  136. struct ei_device *ei_local = netdev_priv(dev);
  137. void __iomem *nic_base = ei_local->mem;
  138. char *buf = skb->data;
  139. if (ei_local->dmaing) {
  140. netdev_err(dev,
  141. "DMAing conflict in %s [DMAstat:%d][irqlock:%d]\n",
  142. __func__,
  143. ei_local->dmaing, ei_local->irqlock);
  144. return;
  145. }
  146. ei_local->dmaing |= 0x01;
  147. ei_outb(E8390_NODMA + E8390_PAGE0 + E8390_START, nic_base + NE_CMD);
  148. ei_outb(count & 0xff, nic_base + EN0_RCNTLO);
  149. ei_outb(count >> 8, nic_base + EN0_RCNTHI);
  150. ei_outb(ring_offset & 0xff, nic_base + EN0_RSARLO);
  151. ei_outb(ring_offset >> 8, nic_base + EN0_RSARHI);
  152. ei_outb(E8390_RREAD + E8390_START, nic_base + NE_CMD);
  153. xs100_read(dev, buf, count);
  154. ei_local->dmaing &= ~1;
  155. }
  156. static void xs100_block_output(struct net_device *dev, int count,
  157. const unsigned char *buf, const int start_page)
  158. {
  159. struct ei_device *ei_local = netdev_priv(dev);
  160. void __iomem *nic_base = ei_local->mem;
  161. unsigned long dma_start;
  162. /* Round the count up for word writes. Do we need to do this?
  163. * What effect will an odd byte count have on the 8390? I
  164. * should check someday.
  165. */
  166. if (ei_local->word16 && (count & 0x01))
  167. count++;
  168. /* This *shouldn't* happen. If it does, it's the last thing
  169. * you'll see
  170. */
  171. if (ei_local->dmaing) {
  172. netdev_err(dev,
  173. "DMAing conflict in %s [DMAstat:%d][irqlock:%d]\n",
  174. __func__,
  175. ei_local->dmaing, ei_local->irqlock);
  176. return;
  177. }
  178. ei_local->dmaing |= 0x01;
  179. /* We should already be in page 0, but to be safe... */
  180. ei_outb(E8390_PAGE0 + E8390_START + E8390_NODMA, nic_base + NE_CMD);
  181. ei_outb(ENISR_RDC, nic_base + EN0_ISR);
  182. /* Now the normal output. */
  183. ei_outb(count & 0xff, nic_base + EN0_RCNTLO);
  184. ei_outb(count >> 8, nic_base + EN0_RCNTHI);
  185. ei_outb(0x00, nic_base + EN0_RSARLO);
  186. ei_outb(start_page, nic_base + EN0_RSARHI);
  187. ei_outb(E8390_RWRITE + E8390_START, nic_base + NE_CMD);
  188. xs100_write(dev, buf, count);
  189. dma_start = jiffies;
  190. while ((ei_inb(nic_base + EN0_ISR) & ENISR_RDC) == 0) {
  191. if (jiffies - dma_start > 2 * HZ / 100) { /* 20ms */
  192. netdev_warn(dev, "timeout waiting for Tx RDC.\n");
  193. ei_local->reset_8390(dev);
  194. ax_NS8390_reinit(dev);
  195. break;
  196. }
  197. }
  198. ei_outb(ENISR_RDC, nic_base + EN0_ISR); /* Ack intr. */
  199. ei_local->dmaing &= ~0x01;
  200. }
  201. static int xsurf100_probe(struct zorro_dev *zdev,
  202. const struct zorro_device_id *ent)
  203. {
  204. struct platform_device *pdev;
  205. struct xsurf100_ax_plat_data ax88796_data;
  206. struct resource res[2] = {
  207. DEFINE_RES_NAMED(IRQ_AMIGA_PORTS, 1, NULL,
  208. IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE),
  209. DEFINE_RES_MEM(zdev->resource.start + XS100_8390_BASE,
  210. 4 * 0x20)
  211. };
  212. int reg;
  213. /* This table is referenced in the device structure, so it must
  214. * outlive the scope of xsurf100_probe.
  215. */
  216. static u32 reg_offsets[32];
  217. int ret = 0;
  218. /* X-Surf 100 control and 32 bit ring buffer data access areas.
  219. * These resources are not used by the ax88796 driver, so must
  220. * be requested here and passed via platform data.
  221. */
  222. if (!request_mem_region(zdev->resource.start, 0x100, zdev->name)) {
  223. dev_err(&zdev->dev, "cannot reserve X-Surf 100 control registers\n");
  224. return -ENXIO;
  225. }
  226. if (!request_mem_region(zdev->resource.start +
  227. XS100_8390_DATA32_BASE,
  228. XS100_8390_DATA32_SIZE,
  229. "X-Surf 100 32-bit data access")) {
  230. dev_err(&zdev->dev, "cannot reserve 32-bit area\n");
  231. ret = -ENXIO;
  232. goto exit_req;
  233. }
  234. for (reg = 0; reg < 0x20; reg++)
  235. reg_offsets[reg] = 4 * reg;
  236. memset(&ax88796_data, 0, sizeof(ax88796_data));
  237. ax88796_data.ax.flags = AXFLG_HAS_EEPROM;
  238. ax88796_data.ax.wordlength = 2;
  239. ax88796_data.ax.dcr_val = 0x48;
  240. ax88796_data.ax.rcr_val = 0x40;
  241. ax88796_data.ax.reg_offsets = reg_offsets;
  242. ax88796_data.ax.check_irq = is_xsurf100_network_irq;
  243. ax88796_data.base_regs = ioremap(zdev->resource.start, 0x100);
  244. /* error handling for ioremap regs */
  245. if (!ax88796_data.base_regs) {
  246. dev_err(&zdev->dev, "Cannot ioremap area %pR (registers)\n",
  247. &zdev->resource);
  248. ret = -ENXIO;
  249. goto exit_req2;
  250. }
  251. ax88796_data.data_area = ioremap(zdev->resource.start +
  252. XS100_8390_DATA32_BASE, XS100_8390_DATA32_SIZE);
  253. /* error handling for ioremap data */
  254. if (!ax88796_data.data_area) {
  255. dev_err(&zdev->dev,
  256. "Cannot ioremap area %pR offset %x (32-bit access)\n",
  257. &zdev->resource, XS100_8390_DATA32_BASE);
  258. ret = -ENXIO;
  259. goto exit_mem;
  260. }
  261. ax88796_data.ax.block_output = xs100_block_output;
  262. ax88796_data.ax.block_input = xs100_block_input;
  263. pdev = platform_device_register_resndata(&zdev->dev, "ax88796",
  264. zdev->slotaddr, res, 2,
  265. &ax88796_data,
  266. sizeof(ax88796_data));
  267. if (IS_ERR(pdev)) {
  268. dev_err(&zdev->dev, "cannot register platform device\n");
  269. ret = -ENXIO;
  270. goto exit_mem2;
  271. }
  272. zorro_set_drvdata(zdev, pdev);
  273. if (!ret)
  274. return 0;
  275. exit_mem2:
  276. iounmap(ax88796_data.data_area);
  277. exit_mem:
  278. iounmap(ax88796_data.base_regs);
  279. exit_req2:
  280. release_mem_region(zdev->resource.start + XS100_8390_DATA32_BASE,
  281. XS100_8390_DATA32_SIZE);
  282. exit_req:
  283. release_mem_region(zdev->resource.start, 0x100);
  284. return ret;
  285. }
  286. static void xsurf100_remove(struct zorro_dev *zdev)
  287. {
  288. struct platform_device *pdev = zorro_get_drvdata(zdev);
  289. struct xsurf100_ax_plat_data *xs100 = dev_get_platdata(&pdev->dev);
  290. platform_device_unregister(pdev);
  291. iounmap(xs100->base_regs);
  292. release_mem_region(zdev->resource.start, 0x100);
  293. iounmap(xs100->data_area);
  294. release_mem_region(zdev->resource.start + XS100_8390_DATA32_BASE,
  295. XS100_8390_DATA32_SIZE);
  296. }
  297. static const struct zorro_device_id xsurf100_zorro_tbl[] = {
  298. { ZORRO_PROD_INDIVIDUAL_COMPUTERS_X_SURF100, },
  299. { 0 }
  300. };
  301. MODULE_DEVICE_TABLE(zorro, xsurf100_zorro_tbl);
  302. static struct zorro_driver xsurf100_driver = {
  303. .name = "xsurf100",
  304. .id_table = xsurf100_zorro_tbl,
  305. .probe = xsurf100_probe,
  306. .remove = xsurf100_remove,
  307. };
  308. module_driver(xsurf100_driver, zorro_register_driver, zorro_unregister_driver);
  309. MODULE_DESCRIPTION("X-Surf 100 driver");
  310. MODULE_AUTHOR("Michael Karcher <[email protected]>");
  311. MODULE_LICENSE("GPL v2");