ne2k-pci.c 21 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747
  1. /* A Linux device driver for PCI NE2000 clones.
  2. *
  3. * Authors and other copyright holders:
  4. * 1992-2000 by Donald Becker, NE2000 core and various modifications.
  5. * 1995-1998 by Paul Gortmaker, core modifications and PCI support.
  6. * Copyright 1993 assigned to the United States Government as represented
  7. * by the Director, National Security Agency.
  8. *
  9. * This software may be used and distributed according to the terms of
  10. * the GNU General Public License (GPL), incorporated herein by reference.
  11. * Drivers based on or derived from this code fall under the GPL and must
  12. * retain the authorship, copyright and license notice. This file is not
  13. * a complete program and may only be used when the entire operating
  14. * system is licensed under the GPL.
  15. *
  16. * The author may be reached as [email protected], or C/O
  17. * Scyld Computing Corporation
  18. * 410 Severn Ave., Suite 210
  19. * Annapolis MD 21403
  20. *
  21. * Issues remaining:
  22. * People are making PCI NE2000 clones! Oh the horror, the horror...
  23. * Limited full-duplex support.
  24. */
  25. #define DRV_NAME "ne2k-pci"
  26. #define DRV_DESCRIPTION "PCI NE2000 clone driver"
  27. #define DRV_AUTHOR "Donald Becker / Paul Gortmaker"
  28. #define DRV_VERSION "1.03"
  29. #define DRV_RELDATE "9/22/2003"
  30. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  31. /* The user-configurable values.
  32. * These may be modified when a driver module is loaded.
  33. */
  34. /* More are supported, limit only on options */
  35. #define MAX_UNITS 8
  36. /* Used to pass the full-duplex flag, etc. */
  37. static int full_duplex[MAX_UNITS];
  38. static int options[MAX_UNITS];
  39. /* Force a non std. amount of memory. Units are 256 byte pages. */
  40. /* #define PACKETBUF_MEMSIZE 0x40 */
  41. #include <linux/module.h>
  42. #include <linux/kernel.h>
  43. #include <linux/errno.h>
  44. #include <linux/pci.h>
  45. #include <linux/init.h>
  46. #include <linux/interrupt.h>
  47. #include <linux/ethtool.h>
  48. #include <linux/netdevice.h>
  49. #include <linux/etherdevice.h>
  50. #include <linux/io.h>
  51. #include <asm/irq.h>
  52. #include <linux/uaccess.h>
  53. #include "8390.h"
  54. static int ne2k_msg_enable;
  55. static const int default_msg_level = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
  56. NETIF_MSG_RX_ERR | NETIF_MSG_TX_ERR);
  57. #if defined(__powerpc__)
  58. #define inl_le(addr) le32_to_cpu(inl(addr))
  59. #define inw_le(addr) le16_to_cpu(inw(addr))
  60. #endif
  61. MODULE_AUTHOR(DRV_AUTHOR);
  62. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  63. MODULE_VERSION(DRV_VERSION);
  64. MODULE_LICENSE("GPL");
  65. module_param_named(msg_enable, ne2k_msg_enable, int, 0444);
  66. module_param_array(options, int, NULL, 0);
  67. module_param_array(full_duplex, int, NULL, 0);
  68. MODULE_PARM_DESC(msg_enable, "Debug message level (see linux/netdevice.h for bitmap)");
  69. MODULE_PARM_DESC(options, "Bit 5: full duplex");
  70. MODULE_PARM_DESC(full_duplex, "full duplex setting(s) (1)");
  71. /* Some defines that people can play with if so inclined.
  72. */
  73. /* Use 32 bit data-movement operations instead of 16 bit. */
  74. #define USE_LONGIO
  75. /* Do we implement the read before write bugfix ? */
  76. /* #define NE_RW_BUGFIX */
  77. /* Flags. We rename an existing ei_status field to store flags!
  78. * Thus only the low 8 bits are usable for non-init-time flags.
  79. */
  80. #define ne2k_flags reg0
  81. enum {
  82. /* Chip can do only 16/32-bit xfers. */
  83. ONLY_16BIT_IO = 8, ONLY_32BIT_IO = 4,
  84. /* User override. */
  85. FORCE_FDX = 0x20,
  86. REALTEK_FDX = 0x40, HOLTEK_FDX = 0x80,
  87. STOP_PG_0x60 = 0x100,
  88. };
  89. enum ne2k_pci_chipsets {
  90. CH_RealTek_RTL_8029 = 0,
  91. CH_Winbond_89C940,
  92. CH_Compex_RL2000,
  93. CH_KTI_ET32P2,
  94. CH_NetVin_NV5000SC,
  95. CH_Via_86C926,
  96. CH_SureCom_NE34,
  97. CH_Winbond_W89C940F,
  98. CH_Holtek_HT80232,
  99. CH_Holtek_HT80229,
  100. CH_Winbond_89C940_8c4a,
  101. };
  102. static struct {
  103. char *name;
  104. int flags;
  105. } pci_clone_list[] = {
  106. {"RealTek RTL-8029(AS)", REALTEK_FDX},
  107. {"Winbond 89C940", 0},
  108. {"Compex RL2000", 0},
  109. {"KTI ET32P2", 0},
  110. {"NetVin NV5000SC", 0},
  111. {"Via 86C926", ONLY_16BIT_IO},
  112. {"SureCom NE34", 0},
  113. {"Winbond W89C940F", 0},
  114. {"Holtek HT80232", ONLY_16BIT_IO | HOLTEK_FDX},
  115. {"Holtek HT80229", ONLY_32BIT_IO | HOLTEK_FDX | STOP_PG_0x60 },
  116. {"Winbond W89C940(misprogrammed)", 0},
  117. {NULL,}
  118. };
  119. static const struct pci_device_id ne2k_pci_tbl[] = {
  120. { 0x10ec, 0x8029, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_RealTek_RTL_8029 },
  121. { 0x1050, 0x0940, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_Winbond_89C940 },
  122. { 0x11f6, 0x1401, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_Compex_RL2000 },
  123. { 0x8e2e, 0x3000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_KTI_ET32P2 },
  124. { 0x4a14, 0x5000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_NetVin_NV5000SC },
  125. { 0x1106, 0x0926, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_Via_86C926 },
  126. { 0x10bd, 0x0e34, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_SureCom_NE34 },
  127. { 0x1050, 0x5a5a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_Winbond_W89C940F },
  128. { 0x12c3, 0x0058, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_Holtek_HT80232 },
  129. { 0x12c3, 0x5598, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_Holtek_HT80229 },
  130. { 0x8c4a, 0x1980, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_Winbond_89C940_8c4a },
  131. { 0, }
  132. };
  133. MODULE_DEVICE_TABLE(pci, ne2k_pci_tbl);
  134. /* ---- No user-serviceable parts below ---- */
  135. #define NE_BASE (dev->base_addr)
  136. #define NE_CMD 0x00
  137. #define NE_DATAPORT 0x10 /* NatSemi-defined port window offset. */
  138. #define NE_RESET 0x1f /* Issue a read to reset, a write to clear. */
  139. #define NE_IO_EXTENT 0x20
  140. #define NESM_START_PG 0x40 /* First page of TX buffer */
  141. #define NESM_STOP_PG 0x80 /* Last page +1 of RX ring */
  142. static int ne2k_pci_open(struct net_device *dev);
  143. static int ne2k_pci_close(struct net_device *dev);
  144. static void ne2k_pci_reset_8390(struct net_device *dev);
  145. static void ne2k_pci_get_8390_hdr(struct net_device *dev,
  146. struct e8390_pkt_hdr *hdr, int ring_page);
  147. static void ne2k_pci_block_input(struct net_device *dev, int count,
  148. struct sk_buff *skb, int ring_offset);
  149. static void ne2k_pci_block_output(struct net_device *dev, const int count,
  150. const unsigned char *buf,
  151. const int start_page);
  152. static const struct ethtool_ops ne2k_pci_ethtool_ops;
  153. /* There is no room in the standard 8390 structure for extra info we need,
  154. * so we build a meta/outer-wrapper structure..
  155. */
  156. struct ne2k_pci_card {
  157. struct net_device *dev;
  158. struct pci_dev *pci_dev;
  159. };
  160. /* NEx000-clone boards have a Station Address (SA) PROM (SAPROM) in the packet
  161. * buffer memory space. By-the-spec NE2000 clones have 0x57,0x57 in bytes
  162. * 0x0e,0x0f of the SAPROM, while other supposed NE2000 clones must be
  163. * detected by their SA prefix.
  164. *
  165. * Reading the SAPROM from a word-wide card with the 8390 set in byte-wide
  166. * mode results in doubled values, which can be detected and compensated for.
  167. *
  168. * The probe is also responsible for initializing the card and filling
  169. * in the 'dev' and 'ei_status' structures.
  170. */
  171. static const struct net_device_ops ne2k_netdev_ops = {
  172. .ndo_open = ne2k_pci_open,
  173. .ndo_stop = ne2k_pci_close,
  174. .ndo_start_xmit = ei_start_xmit,
  175. .ndo_tx_timeout = ei_tx_timeout,
  176. .ndo_get_stats = ei_get_stats,
  177. .ndo_set_rx_mode = ei_set_multicast_list,
  178. .ndo_validate_addr = eth_validate_addr,
  179. .ndo_set_mac_address = eth_mac_addr,
  180. #ifdef CONFIG_NET_POLL_CONTROLLER
  181. .ndo_poll_controller = ei_poll,
  182. #endif
  183. };
  184. static int ne2k_pci_init_one(struct pci_dev *pdev,
  185. const struct pci_device_id *ent)
  186. {
  187. struct net_device *dev;
  188. int i;
  189. unsigned char SA_prom[32];
  190. int start_page, stop_page;
  191. int irq, reg0, chip_idx = ent->driver_data;
  192. static unsigned int fnd_cnt;
  193. long ioaddr;
  194. int flags = pci_clone_list[chip_idx].flags;
  195. struct ei_device *ei_local;
  196. fnd_cnt++;
  197. i = pci_enable_device(pdev);
  198. if (i)
  199. return i;
  200. ioaddr = pci_resource_start(pdev, 0);
  201. irq = pdev->irq;
  202. if (!ioaddr || ((pci_resource_flags(pdev, 0) & IORESOURCE_IO) == 0)) {
  203. dev_err(&pdev->dev, "no I/O resource at PCI BAR #0\n");
  204. goto err_out;
  205. }
  206. if (!request_region(ioaddr, NE_IO_EXTENT, DRV_NAME)) {
  207. dev_err(&pdev->dev, "I/O resource 0x%x @ 0x%lx busy\n",
  208. NE_IO_EXTENT, ioaddr);
  209. goto err_out;
  210. }
  211. reg0 = inb(ioaddr);
  212. if (reg0 == 0xFF)
  213. goto err_out_free_res;
  214. /* Do a preliminary verification that we have a 8390. */
  215. {
  216. int regd;
  217. outb(E8390_NODMA + E8390_PAGE1 + E8390_STOP, ioaddr + E8390_CMD);
  218. regd = inb(ioaddr + 0x0d);
  219. outb(0xff, ioaddr + 0x0d);
  220. outb(E8390_NODMA + E8390_PAGE0, ioaddr + E8390_CMD);
  221. /* Clear the counter by reading. */
  222. inb(ioaddr + EN0_COUNTER0);
  223. if (inb(ioaddr + EN0_COUNTER0) != 0) {
  224. outb(reg0, ioaddr);
  225. /* Restore the old values. */
  226. outb(regd, ioaddr + 0x0d);
  227. goto err_out_free_res;
  228. }
  229. }
  230. /* Allocate net_device, dev->priv; fill in 8390 specific dev fields. */
  231. dev = alloc_ei_netdev();
  232. if (!dev) {
  233. dev_err(&pdev->dev, "cannot allocate ethernet device\n");
  234. goto err_out_free_res;
  235. }
  236. dev->netdev_ops = &ne2k_netdev_ops;
  237. ei_local = netdev_priv(dev);
  238. ei_local->msg_enable = netif_msg_init(ne2k_msg_enable, default_msg_level);
  239. SET_NETDEV_DEV(dev, &pdev->dev);
  240. /* Reset card. Who knows what dain-bramaged state it was left in. */
  241. {
  242. unsigned long reset_start_time = jiffies;
  243. outb(inb(ioaddr + NE_RESET), ioaddr + NE_RESET);
  244. /* This looks like a horrible timing loop, but it should never
  245. * take more than a few cycles.
  246. */
  247. while ((inb(ioaddr + EN0_ISR) & ENISR_RESET) == 0)
  248. /* Limit wait: '2' avoids jiffy roll-over. */
  249. if (jiffies - reset_start_time > 2) {
  250. dev_err(&pdev->dev,
  251. "Card failure (no reset ack).\n");
  252. goto err_out_free_netdev;
  253. }
  254. /* Ack all intr. */
  255. outb(0xff, ioaddr + EN0_ISR);
  256. }
  257. /* Read the 16 bytes of station address PROM.
  258. * We must first initialize registers, similar
  259. * to NS8390_init(eifdev, 0).
  260. * We can't reliably read the SAPROM address without this.
  261. * (I learned the hard way!).
  262. */
  263. {
  264. struct {unsigned char value, offset; } program_seq[] = {
  265. /* Select page 0 */
  266. {E8390_NODMA + E8390_PAGE0 + E8390_STOP, E8390_CMD},
  267. /* Set word-wide access */
  268. {0x49, EN0_DCFG},
  269. /* Clear the count regs. */
  270. {0x00, EN0_RCNTLO},
  271. /* Mask completion IRQ */
  272. {0x00, EN0_RCNTHI},
  273. {0x00, EN0_IMR},
  274. {0xFF, EN0_ISR},
  275. /* 0x20 Set to monitor */
  276. {E8390_RXOFF, EN0_RXCR},
  277. /* 0x02 and loopback mode */
  278. {E8390_TXOFF, EN0_TXCR},
  279. {32, EN0_RCNTLO},
  280. {0x00, EN0_RCNTHI},
  281. /* DMA starting at 0x0000 */
  282. {0x00, EN0_RSARLO},
  283. {0x00, EN0_RSARHI},
  284. {E8390_RREAD+E8390_START, E8390_CMD},
  285. };
  286. for (i = 0; i < ARRAY_SIZE(program_seq); i++)
  287. outb(program_seq[i].value,
  288. ioaddr + program_seq[i].offset);
  289. }
  290. /* Note: all PCI cards have at least 16 bit access, so we don't have
  291. * to check for 8 bit cards. Most cards permit 32 bit access.
  292. */
  293. if (flags & ONLY_32BIT_IO) {
  294. for (i = 0; i < 4 ; i++)
  295. ((u32 *)SA_prom)[i] = le32_to_cpu(inl(ioaddr + NE_DATAPORT));
  296. } else
  297. for (i = 0; i < 32 /* sizeof(SA_prom )*/; i++)
  298. SA_prom[i] = inb(ioaddr + NE_DATAPORT);
  299. /* We always set the 8390 registers for word mode. */
  300. outb(0x49, ioaddr + EN0_DCFG);
  301. start_page = NESM_START_PG;
  302. stop_page = flags & STOP_PG_0x60 ? 0x60 : NESM_STOP_PG;
  303. /* Set up the rest of the parameters. */
  304. dev->irq = irq;
  305. dev->base_addr = ioaddr;
  306. pci_set_drvdata(pdev, dev);
  307. ei_status.name = pci_clone_list[chip_idx].name;
  308. ei_status.tx_start_page = start_page;
  309. ei_status.stop_page = stop_page;
  310. ei_status.word16 = 1;
  311. ei_status.ne2k_flags = flags;
  312. if (fnd_cnt < MAX_UNITS) {
  313. if (full_duplex[fnd_cnt] > 0 || (options[fnd_cnt] & FORCE_FDX))
  314. ei_status.ne2k_flags |= FORCE_FDX;
  315. }
  316. ei_status.rx_start_page = start_page + TX_PAGES;
  317. #ifdef PACKETBUF_MEMSIZE
  318. /* Allow the packet buffer size to be overridden by know-it-alls. */
  319. ei_status.stop_page = ei_status.tx_start_page + PACKETBUF_MEMSIZE;
  320. #endif
  321. ei_status.reset_8390 = &ne2k_pci_reset_8390;
  322. ei_status.block_input = &ne2k_pci_block_input;
  323. ei_status.block_output = &ne2k_pci_block_output;
  324. ei_status.get_8390_hdr = &ne2k_pci_get_8390_hdr;
  325. ei_status.priv = (unsigned long) pdev;
  326. dev->ethtool_ops = &ne2k_pci_ethtool_ops;
  327. NS8390_init(dev, 0);
  328. eth_hw_addr_set(dev, SA_prom);
  329. i = register_netdev(dev);
  330. if (i)
  331. goto err_out_free_netdev;
  332. netdev_info(dev, "%s found at %#lx, IRQ %d, %pM.\n",
  333. pci_clone_list[chip_idx].name, ioaddr, dev->irq,
  334. dev->dev_addr);
  335. return 0;
  336. err_out_free_netdev:
  337. free_netdev(dev);
  338. err_out_free_res:
  339. release_region(ioaddr, NE_IO_EXTENT);
  340. err_out:
  341. pci_disable_device(pdev);
  342. return -ENODEV;
  343. }
  344. /* Magic incantation sequence for full duplex on the supported cards.
  345. */
  346. static inline int set_realtek_fdx(struct net_device *dev)
  347. {
  348. long ioaddr = dev->base_addr;
  349. outb(0xC0 + E8390_NODMA, ioaddr + NE_CMD); /* Page 3 */
  350. outb(0xC0, ioaddr + 0x01); /* Enable writes to CONFIG3 */
  351. outb(0x40, ioaddr + 0x06); /* Enable full duplex */
  352. outb(0x00, ioaddr + 0x01); /* Disable writes to CONFIG3 */
  353. outb(E8390_PAGE0 + E8390_NODMA, ioaddr + NE_CMD); /* Page 0 */
  354. return 0;
  355. }
  356. static inline int set_holtek_fdx(struct net_device *dev)
  357. {
  358. long ioaddr = dev->base_addr;
  359. outb(inb(ioaddr + 0x20) | 0x80, ioaddr + 0x20);
  360. return 0;
  361. }
  362. static int ne2k_pci_set_fdx(struct net_device *dev)
  363. {
  364. if (ei_status.ne2k_flags & REALTEK_FDX)
  365. return set_realtek_fdx(dev);
  366. else if (ei_status.ne2k_flags & HOLTEK_FDX)
  367. return set_holtek_fdx(dev);
  368. return -EOPNOTSUPP;
  369. }
  370. static int ne2k_pci_open(struct net_device *dev)
  371. {
  372. int ret = request_irq(dev->irq, ei_interrupt, IRQF_SHARED,
  373. dev->name, dev);
  374. if (ret)
  375. return ret;
  376. if (ei_status.ne2k_flags & FORCE_FDX)
  377. ne2k_pci_set_fdx(dev);
  378. ei_open(dev);
  379. return 0;
  380. }
  381. static int ne2k_pci_close(struct net_device *dev)
  382. {
  383. ei_close(dev);
  384. free_irq(dev->irq, dev);
  385. return 0;
  386. }
  387. /* Hard reset the card. This used to pause for the same period that a
  388. * 8390 reset command required, but that shouldn't be necessary.
  389. */
  390. static void ne2k_pci_reset_8390(struct net_device *dev)
  391. {
  392. unsigned long reset_start_time = jiffies;
  393. struct ei_device *ei_local = netdev_priv(dev);
  394. netif_dbg(ei_local, hw, dev, "resetting the 8390 t=%ld...\n",
  395. jiffies);
  396. outb(inb(NE_BASE + NE_RESET), NE_BASE + NE_RESET);
  397. ei_status.txing = 0;
  398. ei_status.dmaing = 0;
  399. /* This check _should_not_ be necessary, omit eventually. */
  400. while ((inb(NE_BASE+EN0_ISR) & ENISR_RESET) == 0)
  401. if (jiffies - reset_start_time > 2) {
  402. netdev_err(dev, "%s did not complete.\n", __func__);
  403. break;
  404. }
  405. /* Ack intr. */
  406. outb(ENISR_RESET, NE_BASE + EN0_ISR);
  407. }
  408. /* Grab the 8390 specific header. Similar to the block_input routine, but
  409. * we don't need to be concerned with ring wrap as the header will be at
  410. * the start of a page, so we optimize accordingly.
  411. */
  412. static void ne2k_pci_get_8390_hdr(struct net_device *dev,
  413. struct e8390_pkt_hdr *hdr, int ring_page)
  414. {
  415. long nic_base = dev->base_addr;
  416. /* This *shouldn't* happen. If it does, it's the last thing you'll see
  417. */
  418. if (ei_status.dmaing) {
  419. netdev_err(dev, "DMAing conflict in %s [DMAstat:%d][irqlock:%d].\n",
  420. __func__, ei_status.dmaing, ei_status.irqlock);
  421. return;
  422. }
  423. ei_status.dmaing |= 0x01;
  424. outb(E8390_NODMA + E8390_PAGE0 + E8390_START, nic_base + NE_CMD);
  425. outb(sizeof(struct e8390_pkt_hdr), nic_base + EN0_RCNTLO);
  426. outb(0, nic_base + EN0_RCNTHI);
  427. outb(0, nic_base + EN0_RSARLO); /* On page boundary */
  428. outb(ring_page, nic_base + EN0_RSARHI);
  429. outb(E8390_RREAD+E8390_START, nic_base + NE_CMD);
  430. if (ei_status.ne2k_flags & ONLY_16BIT_IO) {
  431. insw(NE_BASE + NE_DATAPORT, hdr,
  432. sizeof(struct e8390_pkt_hdr) >> 1);
  433. } else {
  434. *(u32 *)hdr = le32_to_cpu(inl(NE_BASE + NE_DATAPORT));
  435. le16_to_cpus(&hdr->count);
  436. }
  437. /* Ack intr. */
  438. outb(ENISR_RDC, nic_base + EN0_ISR);
  439. ei_status.dmaing &= ~0x01;
  440. }
  441. /* Block input and output, similar to the Crynwr packet driver. If you
  442. *are porting to a new ethercard, look at the packet driver source for hints.
  443. *The NEx000 doesn't share the on-board packet memory -- you have to put
  444. *the packet out through the "remote DMA" dataport using outb.
  445. */
  446. static void ne2k_pci_block_input(struct net_device *dev, int count,
  447. struct sk_buff *skb, int ring_offset)
  448. {
  449. long nic_base = dev->base_addr;
  450. char *buf = skb->data;
  451. /* This *shouldn't* happen.
  452. * If it does, it's the last thing you'll see.
  453. */
  454. if (ei_status.dmaing) {
  455. netdev_err(dev, "DMAing conflict in %s [DMAstat:%d][irqlock:%d]\n",
  456. __func__, ei_status.dmaing, ei_status.irqlock);
  457. return;
  458. }
  459. ei_status.dmaing |= 0x01;
  460. if (ei_status.ne2k_flags & ONLY_32BIT_IO)
  461. count = (count + 3) & 0xFFFC;
  462. outb(E8390_NODMA + E8390_PAGE0 + E8390_START, nic_base + NE_CMD);
  463. outb(count & 0xff, nic_base + EN0_RCNTLO);
  464. outb(count >> 8, nic_base + EN0_RCNTHI);
  465. outb(ring_offset & 0xff, nic_base + EN0_RSARLO);
  466. outb(ring_offset >> 8, nic_base + EN0_RSARHI);
  467. outb(E8390_RREAD + E8390_START, nic_base + NE_CMD);
  468. if (ei_status.ne2k_flags & ONLY_16BIT_IO) {
  469. insw(NE_BASE + NE_DATAPORT, buf, count >> 1);
  470. if (count & 0x01)
  471. buf[count-1] = inb(NE_BASE + NE_DATAPORT);
  472. } else {
  473. insl(NE_BASE + NE_DATAPORT, buf, count >> 2);
  474. if (count & 3) {
  475. buf += count & ~3;
  476. if (count & 2) {
  477. __le16 *b = (__le16 *)buf;
  478. *b++ = cpu_to_le16(inw(NE_BASE + NE_DATAPORT));
  479. buf = (char *)b;
  480. }
  481. if (count & 1)
  482. *buf = inb(NE_BASE + NE_DATAPORT);
  483. }
  484. }
  485. /* Ack intr. */
  486. outb(ENISR_RDC, nic_base + EN0_ISR);
  487. ei_status.dmaing &= ~0x01;
  488. }
  489. static void ne2k_pci_block_output(struct net_device *dev, int count,
  490. const unsigned char *buf, const int start_page)
  491. {
  492. long nic_base = NE_BASE;
  493. unsigned long dma_start;
  494. /* On little-endian it's always safe to round the count up for
  495. * word writes.
  496. */
  497. if (ei_status.ne2k_flags & ONLY_32BIT_IO)
  498. count = (count + 3) & 0xFFFC;
  499. else
  500. if (count & 0x01)
  501. count++;
  502. /* This *shouldn't* happen.
  503. * If it does, it's the last thing you'll see.
  504. */
  505. if (ei_status.dmaing) {
  506. netdev_err(dev, "DMAing conflict in %s [DMAstat:%d][irqlock:%d]\n",
  507. __func__, ei_status.dmaing, ei_status.irqlock);
  508. return;
  509. }
  510. ei_status.dmaing |= 0x01;
  511. /* We should already be in page 0, but to be safe... */
  512. outb(E8390_PAGE0+E8390_START+E8390_NODMA, nic_base + NE_CMD);
  513. #ifdef NE_RW_BUGFIX
  514. /* Handle the read-before-write bug the same way as the
  515. * Crynwr packet driver -- the NatSemi method doesn't work.
  516. * Actually this doesn't always work either, but if you have
  517. * problems with your NEx000 this is better than nothing!
  518. */
  519. outb(0x42, nic_base + EN0_RCNTLO);
  520. outb(0x00, nic_base + EN0_RCNTHI);
  521. outb(0x42, nic_base + EN0_RSARLO);
  522. outb(0x00, nic_base + EN0_RSARHI);
  523. outb(E8390_RREAD+E8390_START, nic_base + NE_CMD);
  524. #endif
  525. outb(ENISR_RDC, nic_base + EN0_ISR);
  526. /* Now the normal output. */
  527. outb(count & 0xff, nic_base + EN0_RCNTLO);
  528. outb(count >> 8, nic_base + EN0_RCNTHI);
  529. outb(0x00, nic_base + EN0_RSARLO);
  530. outb(start_page, nic_base + EN0_RSARHI);
  531. outb(E8390_RWRITE+E8390_START, nic_base + NE_CMD);
  532. if (ei_status.ne2k_flags & ONLY_16BIT_IO) {
  533. outsw(NE_BASE + NE_DATAPORT, buf, count >> 1);
  534. } else {
  535. outsl(NE_BASE + NE_DATAPORT, buf, count >> 2);
  536. if (count & 3) {
  537. buf += count & ~3;
  538. if (count & 2) {
  539. __le16 *b = (__le16 *)buf;
  540. outw(le16_to_cpu(*b++), NE_BASE + NE_DATAPORT);
  541. buf = (char *)b;
  542. }
  543. }
  544. }
  545. dma_start = jiffies;
  546. while ((inb(nic_base + EN0_ISR) & ENISR_RDC) == 0)
  547. /* Avoid clock roll-over. */
  548. if (jiffies - dma_start > 2) {
  549. netdev_warn(dev, "timeout waiting for Tx RDC.\n");
  550. ne2k_pci_reset_8390(dev);
  551. NS8390_init(dev, 1);
  552. break;
  553. }
  554. /* Ack intr. */
  555. outb(ENISR_RDC, nic_base + EN0_ISR);
  556. ei_status.dmaing &= ~0x01;
  557. }
  558. static void ne2k_pci_get_drvinfo(struct net_device *dev,
  559. struct ethtool_drvinfo *info)
  560. {
  561. struct ei_device *ei = netdev_priv(dev);
  562. struct pci_dev *pci_dev = (struct pci_dev *) ei->priv;
  563. strscpy(info->driver, DRV_NAME, sizeof(info->driver));
  564. strscpy(info->version, DRV_VERSION, sizeof(info->version));
  565. strscpy(info->bus_info, pci_name(pci_dev), sizeof(info->bus_info));
  566. }
  567. static u32 ne2k_pci_get_msglevel(struct net_device *dev)
  568. {
  569. struct ei_device *ei_local = netdev_priv(dev);
  570. return ei_local->msg_enable;
  571. }
  572. static void ne2k_pci_set_msglevel(struct net_device *dev, u32 v)
  573. {
  574. struct ei_device *ei_local = netdev_priv(dev);
  575. ei_local->msg_enable = v;
  576. }
  577. static const struct ethtool_ops ne2k_pci_ethtool_ops = {
  578. .get_drvinfo = ne2k_pci_get_drvinfo,
  579. .get_msglevel = ne2k_pci_get_msglevel,
  580. .set_msglevel = ne2k_pci_set_msglevel,
  581. };
  582. static void ne2k_pci_remove_one(struct pci_dev *pdev)
  583. {
  584. struct net_device *dev = pci_get_drvdata(pdev);
  585. BUG_ON(!dev);
  586. unregister_netdev(dev);
  587. release_region(dev->base_addr, NE_IO_EXTENT);
  588. free_netdev(dev);
  589. pci_disable_device(pdev);
  590. }
  591. static int __maybe_unused ne2k_pci_suspend(struct device *dev_d)
  592. {
  593. struct net_device *dev = dev_get_drvdata(dev_d);
  594. netif_device_detach(dev);
  595. return 0;
  596. }
  597. static int __maybe_unused ne2k_pci_resume(struct device *dev_d)
  598. {
  599. struct net_device *dev = dev_get_drvdata(dev_d);
  600. NS8390_init(dev, 1);
  601. netif_device_attach(dev);
  602. return 0;
  603. }
  604. static SIMPLE_DEV_PM_OPS(ne2k_pci_pm_ops, ne2k_pci_suspend, ne2k_pci_resume);
  605. static struct pci_driver ne2k_driver = {
  606. .name = DRV_NAME,
  607. .probe = ne2k_pci_init_one,
  608. .remove = ne2k_pci_remove_one,
  609. .id_table = ne2k_pci_tbl,
  610. .driver.pm = &ne2k_pci_pm_ops,
  611. };
  612. static int __init ne2k_pci_init(void)
  613. {
  614. return pci_register_driver(&ne2k_driver);
  615. }
  616. static void __exit ne2k_pci_cleanup(void)
  617. {
  618. pci_unregister_driver(&ne2k_driver);
  619. }
  620. module_init(ne2k_pci_init);
  621. module_exit(ne2k_pci_cleanup);